1

OBJECTIVE
Understand the algebraic representation of general logic operations using AND,OR
and NOT gates.

Be able to construct the above using NAND gates.

THEORY AND GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT (A.B) 0 0 0 1

OR GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT (A+B) 0 1 1 1

NOT GATE

INPUT A 0 0

OUTPUT 0 0

NAND GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT 1 1 1 0

NAND GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT 1 1 1 0

NOR GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT 1 0 0 0

EXOR GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT

0 1 1 0

EXNOR GATE

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT

1 0 0 1

EQUIPMENTS
Logic tutor Power supply unit +5v dc at 50mA Multi meter

SCHEMATIC DIAGRAMS

A B A+B

FIG 1

A B A.B

FIG 2

FIG 3

A B

FIG 4

A B

FIG 5

5 A B

FIG 6

A B

FIG 7

DISTRIBUTIVE LAW - A(B+C) = AB + AC

B C

A A(B+C) B+C

FIG 8

A Q B Q

AB

FIG 9
AB + AC

C Q

AC

DISTRIBUTIVE LAW A + BC = (A+B)(A+C)

A Q B Q C Q

A + BC

FIG 10

B.C

6 A Q B Q A+C C

A+B

(A+B)(A+C)

FIG 11

DE MORGANS LAW - =

FIG 12
A Q B Q

. B

FIG 13

DE MORGANS LAW -

A Q B Q

FIG 14

FIG 15
B Q

NOTES -

FIG16

A B A+B

FIG 17

NOTES -

=AB

A B

FIG 18

A B AB

FIG 19

A+

FIG 20

A B B

FIG 21

C D

PROCEDURE
Switch on the logic tutor and give the 5v Construct the logic circuits (shown in figure) Give the inputs to circuit Get the output values

RESULTS FIG1
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
69.6mV 3.81V 3.80V 3.81V

F
O 1 1 1

FIG2
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
118mV 116mV 115mV 3.81V

F
0 0 0 1

10

FIG3
A
0 1

OUTPUT VOTAGE
4.16V 159.9mV

F
1 0

FIG4
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
4.15V 84.8mV 79.7mV 68.5mV

F
1 0 0 0

FIG5
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
5V 4.99V 5V 15.8V

F
1 1 1 0

FIG6
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
9mV 5V 5V 7.7mV

F
0 1 1 0

11

FIG7
A
0 0 1 1

C
0 1 0 1

OUTPUT VOTAGE
4.15V 158.2mV 157.5mV 4.17V

F
1 0 0 1

FIG8 AND FIG9

A
0 0 0 0 1 1 1 1

B
0 0 1 1 0 0 1 1

C
0 1 0 1 0 1 0 1

F
0 0 0 0 0 1 1 1

FIG10 AND FIG11

A
0 0 0 0 1 1 1 1

B
0 0 1 1 0 0 1 1

C
0 1 0 1 0 1 0 1

F
0 0 0 1 1 1 1 1

12

FIG12 AND FIG13

A
0 0 1 1

B
0 1 0 1

F
1 0 0 0

FIG14 AND FIG15

A
0 0 1 1

B
0 1 0 1

F
1 1 1 0

FIG16 AND FIG17

A
0 0 1 1

B
0 1 0 1

F
0 1 1 1

13

FIG18 AND FIG19

A
0 0 1 1

B
0 1 0 1

F
0 0 0 1

FIG20 AND FIG21

A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT 0 0 1 0 1 1 1 1 0 0 1 0 0 0 1 0

QUESTIONS
QUESTION 3.1 Using AND and OR

QUESTION 3.2 Yes

14

DISCUSSION
We cannot get the accurate value of voltages because o Loose connection o Human errors While we doing the practical, we used British standard symbols.

REFERENCES
Electronics and electrical engineering (v.k Metha and Rohit metha)
http://whatis.techtarget.com/definition/0,,sid9_gci213512,00.html