Clevo w24h0 W240humb W240huq W241huq W245huq W249huq - 6-7p-w24h5-002

W240HU/W241HUQ/W245HUQ/W249HUQ Series
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Notebook Computer
W240HU/ W241HUQ/ W245HUQ/ W249HUQ
Service Manual
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Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
March 2011
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows
is a registered trademark of Microsoft Corporation.

Other brand and product names are trademarks and /or registered trademarks of their respective companies.
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About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the W240HU/
W241HUQ/W245HUQ/W249HUQ series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
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IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 3.42A or 18.5V, 3.5A (65W) minimum AC/DC Adapter.
CAUTION
This Computers Optical Device is a Laser Class 1 Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.
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Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Dont drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
2. Keep it dry, and dont overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
3. Follow the proper working procedures for the computer. Shut the computer down properly and dont forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not expose the computer
to any shock or vibration.
Do not place it on an unstable
surface.
Do not place anything heavy
on the computer.
Do not expose it to excessive
heat or direct sunlight.
Do not leave it in a place
where foreign matter or mois-
ture may affect the system.
Dont use or store the com-
puter in a humid environment.
Do not place the computer on
any surface which will block
the vents.
Do not turn off the power
until you properly shut down
all programs.
Do not turn off any peripheral
devices when the computer is
on.
Do not disassemble the com-
puter by yourself.
Perform routine maintenance
on your computer.
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4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Power Safety
The computer has specific power requirements:
Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected fromany external power supplies.
Use only approved brands of
peripherals.
Unplug the power cord before
attaching peripheral devices.
Do not plug in the power
cord if you are wet.
Do not use the power cord if
it is broken.
Do not place heavy objects
on the power cord.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
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Battery Precautions
Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
Recharge the batteries using the notebooks system. Incorrect recharging may make the battery explode.
Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
Keep the battery away frommetal appliances.
Affix tape to the battery contacts before disposing of the battery.
Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
If you do not use the battery for an extended period, then remove the battery fromthe computer for storage.
Before removing the battery for storage charge it to 60% - 70%.
Check stored batteries at least every 3 months and charge themto 60% - 70%.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturers instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
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Related Documents
You may also need to consult the following manual for additional information:
Users Manual on CD/DVD
This describes the notebook PCs features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the computer
(e.g. keyboard and mouse) to their ports.
5. Attach the AC/DC adapter to the DC-In jack at the rear of the
computer, then plug the AC power cord into an outlet, and connect
the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do
not exceed 130 degrees); use the other hand (as illustrated in Figure
1) to support the base of the computer (Note: Never lift the computer
by the lid/LCD).
7. Press the power button to turn the computer on.
Shut Down
Note that you should al-
ways shut your com-
puter down by
choosing Shut Down
from the Start Menu.
This will help prevent
hard disk or system
problems.
130
Figure 1
Opening the Lid/LCD/
Computer with AC/DC
Adapter Plugged-In
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Contents
Introduction ..............................................1-1
Overview .........................................................................................1-1
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right Side Views .................................1-5
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7
Mainboard Overview - Top (Key Parts) .........................................1-8
Mainboard Overview - Bottom (Key Parts) ....................................1-9
Mainboard Overview - Top (Connectors) .....................................1-10
Mainboard Overview - Bottom (Connectors) ...............................1-11
Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-8
Removing the System Memory (RAM) ..........................................2-9
Removing and Installing a Processor ............................................2-11
Removing the Wireless LAN Module ...........................................2-14
Removing the Keyboard ................................................................2-15
Part Lists ..................................................A-1
Part List Illustration Location ........................................................A-2
Top (W240HU/W241HUQ Series) ................................................A-3
Top (W245HUQ Series) .................................................................A-4
Top (W249HUQ Series) .................................................................A-5
Bottom with SIM (W240HU/W241HUQ/W245HUQ Series) ...... A-6
Bottom without SIM (W240HU/W241HUQ/W245HUQ Series) . A-7
Bottom without SIM (W249HUQ Series) ..................................... A-8
Combo (W249HUQ Series) ........................................................... A-9
DVD (W240HU/W241HUQ/W245HUQ Series) ........................ A-10
DVD (W249HUQ Series) ............................................................ A-11
LCD (W240HU/W241HUQ Series) ............................................ A-12
LCD (W245HUQ Series) ............................................................. A-13
LCD (W249HUQ Series) ............................................................. A-14
Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
CPU 1/7 (DMI, PEG, FDI) .............................................................B-3
CPU 2/7 (CLK, MISC, J TAG) .......................................................B-4
CPU 3/7 (DDR3) ............................................................................B-5
CPU 4/7 (Power) .............................................................................B-6
CPU 5/7 (Graphics Power) .............................................................B-7
CPU 6/7 (GND) ..............................................................................B-8
CPU 7/7 (RESERVED) ..................................................................B-9
DDR3 SO-DIMM_0 .....................................................................B-10
DDR3 SO-DIMM_1 .....................................................................B-11
LVDS, Inverter .............................................................................B-12
HDMI, CRT ..................................................................................B-13
CougarPoint - M 1/9 .....................................................................B-14
CougarPoint - M 2/9 .....................................................................B-15
CougarPoint - M 3/9 .....................................................................B-16
CougarPoint - M 4/9 .....................................................................B-17
CougarPoint - M 5/9 .....................................................................B-18
CougarPoint - M 6/9 .....................................................................B-19
CougarPoint - M 7/9 .....................................................................B-20
CougarPoint - M 8/9 .....................................................................B-21
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CougarPoint - M 9/9 .....................................................................B-22
New Card, Mini PCIE .................................................................. B-23
CCD, 3G, TPM .............................................................................B-24
Card Reader/LAN J MC251C ....................................................... B-25
LAN (J MC251C), SATA HDD, ODD ......................................... B-26
USB 3.0 NEC, USB Charger ....................................................... B-27
KBC-ITE IT8518 .........................................................................B-28
LED, MDC, BT ............................................................................B-29
Audio Codec ALC269 .................................................................. B-30
USB, Fan, TP, Multi-Conn ........................................................... B-31
5VS, 3VS, 1.05VS, 1.5VS_CPU .................................................. B-32
VDD3, VDD5 ............................................................................... B-33
Power 1.5V/0.75V/1.8VS ............................................................. B-34
Power 1.05VS ............................................................................... B-35
Power 0.85VS ............................................................................... B-36
Power V-Core1 .............................................................................B-37
Power V-Core2 .............................................................................B-38
Charger, DC In .............................................................................B-39
Click Board .................................................................................. B-40
Audio Board/USB ........................................................................B-41
Power Switch & LID Board ......................................................... B-42
Updating the FLASH ROM BIOS......... C-1
To update the FLASH ROM BIOS you must: C-1
Download the BIOS ....................................................................... C-1
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash
drive ................................................................................................ C-1
Set the computer to boot from the external drive ........................... C-1
Use the flash tools to update the BIOS .......................................... C-2
Restart the computer (booting from the HDD) .............................. C-2
Introduction
Overview 1 - 1
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Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W240HU/W241HUQ/W245HUQ/W249HUQ
series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the
Users Manual. Information about dri-vers (e.g. VGA & audio) is also found in the Users Manual. The manual is
shipped with the computer.
Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application softwares (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
The W240HU/W241HUQ/W245HUQ/W249HUQ series notebook is designed to be upgradeable. See Disassembly on
page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take note of the warn-
ing and safety information indicated by the symbol.
The balance of this chapter reviews the computers technical specifications and features.
Introduction
1 - 2 Specifications
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Specifications
Latest Specification Information

The specifications listed here are correct at the
time of sending them to the press. Certain items
(particularly processor types/speeds) may be
changed, delayed or updated due to the manu-
facturer's release schedule. Check with your
service center for more details.
CPU
The CPU is not a user serviceable part. Ac-
cessing the CPU in any way may violate your
warranty.
Processor Options
Intel Core i7 Processor
i7-2620M (2.70GHz)
4MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W
i5-2540M (2.60GHz), i5-2520M (2.50GHz),
i5-2410M (2.30GHz)
i3-2310M (2.10GHz)
Core Logic
Intel HM65 Chipset
LCD
14" (35.56cm) HD TFT LCD
Memory
Two 204 Pin SO-DIMM Sockets Supporting DDR3 1066/
1333MHz Memory
Memory Expandable up to 8GB
Video Adapter
Intel HM65 Integrated Video
Shared Memory Architecture of up to 1748MB
MS DirectX10 compatible
BIOS
One 32Mb SPI Flash ROM
AMI BIOS
Security
Security (KensingtonType) Lock Slot
BIOS Password
Storage
(Factory Option) One Changeable 12.7mm(h) Optical
Device Type Drive (Super Multi Drive Module or Blu-Ray
Combo Drive Module)
One Changeable 2.5" 9.5 mm (h) SATA HDD
Audio
High Definition Audio Compliant Interface
2 * Built-In Speakers
Built-In Microphone
Communication
Built-In Gigabit Ethernet LAN
(Factory Option) 300K/1.3M Pixel USB PC Camera Module
(Factory Option) 3.75G/HSPA Mini-Card Module
WLAN/ Bluetooth Half Mini-Card Modules:
(Factory Option) IntelCentrinoWireless-N 100 (802.11b/
g/n)
(Factory Option) IntelCentrinoWireless-N 130 Wireless
LAN (802.11b/g/n) +Bluetooth 3.0
(Factory Option) IntelCentrinoWireless-N 1030 Wire-
less LAN (802.11b/g/n) +Bluetooth 3.0
(Factory Option) Third-Party Wireless LAN (802.11b/g/n)
(Factory Option) Third-Party Wireless LAN (802.11b/g/n) +
Bluetooth 3.0
Keyboard
WinKeykeyboard (with embedded numeric keypad)
Pointing Device
Built-in Touchpad
Mini Card Slots
Slot 1 for WLAN Module or Combo WLAN and Bluetooth
Module
(Factory Option) Slot 2 for 3.75G/HSPA Module
Introduction
Specifications 1 - 3
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Interface
Three USB 2.0 Ports
One HDMI-Out Port
One Headphone-Out J ack
One Microphone-In J ack
One RJ -45 LAN J ack
One DC-in J ack
One External Monitor Port
Card Reader
Embedded Multi-In-1 Card Reader
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC
MS (Memory Stick) / MS Pro / MS Duo
Power
6 Cell Smart Lithium-Ion Battery Pack, 48.84WH
(Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
62.16WH
(Factory Option) 4 Cell Smart Lithium-Ion Battery Pack,
32.56WH
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 3.42A or 18.5V, 3.5A (65W)
Energy Star 5.0 Compliant
Environmental Spec
Temperature
Operating: 5C - 35C
Non-Operating: -20C - 60C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Dimensions & Weight
340mm (w) * 238mm (d) * 13.9 - 31.8mm (h)
2.2 kg (with 48.84WH Battery and ODD)
Or
341mm (w) * 238.5mm (d) * 16 - 34mm (h)
2.2 kg (with 48.84WH Battery and ODD)
Introduction
1 - 4 External Locator - Top View with LCD Panel Open
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External Locator - Top View with LCD Panel Open
Figure 1
Top View
1. PC Camera
(Optional)
2. LCD
3. Power Button
4. Hot-Key Buttons
(Design 1 only)
5. LED Status
Indicators
6. Keyboard
7. Built-In
Microphone
8. Touchpad &
Buttons
4
6
3 5
7
1
8
6
3
5
7
1
8
Design I
Design II
14 (35.56cm)
2 2
14 (35.56cm)
Introduction
External Locator - Front & Right Side Views 1 - 5
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External Locator - Front & Right Side Views
Figure 2
Front View
1. LED Power
Indicators
Figure 3
Right Side View
1. Microphone-In
J ack
2. Headphone-Out
J ack
3. USB 2.0 Port
4. Optical Device
Drive Bay
5. Emergency Eject
Hole
6. Security Lock
Slot

FRONT VIEW
1
RIGHT SIDE VIEW
1 2 3
5 4 6
Introduction
1 - 6 External Locator - Left Side & Rear View
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External Locator - Left Side & Rear View
/
Figure 4
Left Side View
1. DC-In J ack
2. External Monitor
Port
3. RJ -45 LAN J ack
4. HDMI-Out Port
5. USB 2.0 Port
6. Vent
7. USB 2.0 Port
8. Multi-in-1 Card
Reader
LEFT SIDE VIEW
1
2
3 4 5
6
7
8
Figure 5
Rear View
1. Battery
REAR VIEW
1
Introduction
External Locator - Bottom View 1 - 7
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External Locator - Bottom View
Figure 6
Bottom View
1. Battery
2. Component Bay
Cover
3. Vent
4. Hard Disk Bay
Cover
5. Speakers
6. USIM Card Cover
Overheating
To prevent your com-
puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.
2
3
1
4
3
5 5
3
3
6
3
Introduction
1 - 8 Mainboard Overview - Top (Key Parts)
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Mainboard Overview - Top (Key Parts) Figure 7
Mainboard Top
Key Parts
1. KBC-ITE IT8518
2. Audio Codec
ALC269
1
2
Introduction
Mainboard Overview - Bottom (Key Parts) 1 - 9
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Mainboard Overview - Bottom (Key Parts)
1
2
3
4
Figure 8
Mainboard Bottom
Key Parts
1. Memory Slots
DDR3 SO-DIMM
2. CPU Socket (no
CPU installed)
3. Platform Controller
Hub
4. Mini-Card
Connector (WLAN
Module)
Introduction
1 - 10 Mainboard Overview - Top (Connectors)
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Mainboard Overview - Top (Connectors)
Figure 9
Mainboard Top
Connectors
1. HDMI-Out Port
2. USB Port 2.0
3. USB 2.0 Port
4. Speaker Cable
Connector
5. Microphone
Cable Connector
6. Audio Board
Connector
7. TouchPad Cable
Connector 1
8. TouchPad Cable
Connector 2
9. Keyboard Cable
Connector
10. Switch Board
Cable Connector
7
1
2
8
9
3
4
5
6
10
Introduction
Mainboard Overview - Bottom (Connectors) 1 - 11
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Mainboard Overview - Bottom (Connectors)
Figure 10
Mainboard Bottom
Connectors
1. Battery
Connector
2. ODD Connector
3. HDD Connector
4. CMOS Battery
Connector
5. CPU Fan Cable
Connector
6. Multi-in-1 Card
Reader
7. RJ -45 LAN J ack
8. External Monitor
Port
9. DC-In J ack
10. CCD Cable
Connector
11. LCD Cable
Connector
1
2
4
5
6
7
8
9
3
10
11
Introduction
1 - 12
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Disassembly
Overview 2 - 1
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Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W240HU/W241HUQ/W245HUQ/W249HUQ se-
ries notebooks parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the Users Manual but are
repeated here for your convenience.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure #will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Information
Warning
Disassembly
2 - 2 Overview
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NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away fromits base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it fromside to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away fromits socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock themfromside to side as
you pull themapart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
Disassembly
Overview 2 - 3
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Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions:
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Power Safety
Warning
Before you undertake
any upgrade proce-
dures, make sure that
you have turned off the
power, and discon-
nected all peripherals
and cables (including
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
Disassembly
2 - 4 Disassembly Steps
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Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery:
1. Remove the battery page 2 - 5
To remove the HDD:
2. Remove the HDD page 2 - 6
To remove the Optical Device:
2. Remove the Optical device page 2 - 8
To remove the System Memory:
2. Remove the system memory page 2 - 9
To remove and install a Processor:
2. Remove the processor page 2 - 11
3. Install the processor page 2 - 13
To remove the Wireless LAN Module:
2. Remove the WLAN module page 2 - 14
To remove the Keyboard:
2. Remove the keyboard page 2 - 15
Disassembly
Removing the Battery 2 - 5
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Removing the Battery
1. Turn the computer off, and turn it over.
2. Slide the latch in the direction of the arrow (Figure 1a).
3. Slide the latch in the direction of the arrow, and hold it in place (Figure 1a).
4. Slide the battery in the direction of the arrow (Figure 1b).
3. Battery
1
2
63 4
Figure 1
Battery Removal
a. Slide the latch and hold it
in place.
b. Slide the battery in the di-
rection of the arrow.
a. b.
3
4
2 1
Disassembly
2 - 6 Removing the Hard Disk Drive
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Removing the Hard Disk Drive
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating systems installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the Users Manual) when setting up a new hard disk.
Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screws & (Figure 2a).
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay cover
and remove the screws.
2 Screws
1 2
a.

HDD System Warning
New HDDs are blank. Before you
begin make sure:
You have backed up any data
you want to keep from your old
HDD.
You have all the CD-ROMs and
FDDs required to install your op-
erating system and programs.
If you have access to the internet,
download the latest application
and hardware driver updates for
the operating system you plan to
install. Copy these to a remov-
able medium.
2 1
Disassembly
Removing the Hard Disk Drive 2 - 7
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3. Remove the hard disk bay cover (Figure 3b).
4. Grip the tab and slide the hard disk in the direction of arrow (Figure 3c).
5. Lift the hard disk out of the bay (Figure 3d).
6. Remove the screws - and the mylar cover from the hard disk (Figure 3e).
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
63
4
5
6 9 10 11
4
b.
c. e.
5
3
11
10
d.
6
7
8
9
3. HDD Bay Cover

10. Mylar Cover
11. HDD
4 Screws
Figure 3
HDD Assembly
Removal (contd.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
mylar cover.
Disassembly
2 - 8 Removing the Optical (CD/DVD) Device
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Removing the Optical (CD/DVD) Device
2. Locate the RAM & CPU bay cover , and remove screws - (Figure 4a).
3. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
4. Carefully disconnect the fan cable , and remove the cover (Figure 4b).
5. Remove the screw at point , and use a screwdriver to carefully push out the optical device at point (Fig-
ure 4c).
6. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
Figure 4
Optical Device
Removal
a. Remove the screws.
b. Remove the cover.
c. Remove the screw and
push the optical device
out off the computer at
point . 8
1 2 5
6 1
7 9 8
1. Component Bay Cov-

er
9. Optical Device
5 Screws
3
c.
9
1
4
6
a.
b.
1
2
5
7
8
Disassembly
Removing the System Memory (RAM) 2 - 9
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Removing the System Memory (RAM)
The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR3 1066/1333MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1GB,
2GB and 4GB and DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.
Memory Upgrade Process
1. Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. The RAM modules will be visible at point on the main board (Figure 5a).
3. Gently pull the two release latches ( & ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 5b).
4. The RAM module will pop-up (Figure 5c), and you can then remove it.
5. Pull the latches to release the second module if necessary.
6. Insert a new module holding it at about a 30 angle and fit the connectors firmly into the memory slot.
7. The modules pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
Figure 5
RAM Module
Removal
a. Locate the memory
socket.
b. Pull the release
latches.
c. Remove the mod-
ule.
Contact Warning
Be careful not to touch
the metal pins on the
modules connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
modules perfor-
mance.
1
2 3
4. RAM Module
c.
4
3
2
b.
a.
1
4
Disassembly
2 - 10 Removing the System Memory (RAM)
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9. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
Note that there are four - cover pins which need to be aligned with slots in the case, to insure a proper cover
fit, before screwing down the bay cover (Figure 6d).
10. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
5 8
d.
5
6
7
8
Figure 6
RAM Module
Removal (contd.)
d. Properly re-insert the
bay cover pins.
Disassembly
Removing and Installing a Processor 2 - 11
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Removing and Installing a Processor
Processor Removal Procedure
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
2. The CPU heat sink will be visible at point (Figure 7a).
3. Loosen the CPU heat sink screws in the order , & (the reverse order as indicated on the label Figure 7a).
4. Grip the heat sink tab and carefully lift the heat sink up and off the computer (Figure 7b).
A
3 2 1
4
Figure 7
Processor Removal
a. The CPU heat sink will
be visible at point .
Remove the screws from
the CPU heatsink.
b. Grip the heat sink tab
and carefully lift the heat
sink up and off the com-
puter.
A
4. Heat Sink
3 Screws
a.
b.
1
2
3
A
4
Disassembly
2 - 12 Removing and Installing a Processor
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5. Turn the release latch towards the unlock symbol to release the CPU (Figure 8d).
6. Carefully (it may be hot) lift the CPU up and out of the socket (Figure 8e).
7. Reverse the process to install a new CPU.
8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
5
6
Figure 8
Processor Removal
(contd)
c. Turn the release latch to
unlock the CPU.
d. Lift the CPU out of the
socket.
c.
d.
Caution
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.
Unlock Lock
5
6
5
6. CPU
Disassembly
Removing and Installing a Processor 2 - 13
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Processor Installation Procedure
1. Insert the CPU (Figure 9a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE
IT!), and turn the release latch towards the lock symbol (Figure 9b).
2. Remove the sticker (Figure 9c) from the heat sink.
3. Insert the heat sink as indicated in Figure 9d.
4. Tighten the CPU heat sink screws in the order , & (the order as indicated on the label and Figure 9d).
5. Replace the component bay cover (dont forget to replace the fan cable) and tighten the screws (page 2 - 9).
A
B
C
D
1 2 3
b.
B
a.
D
1
3
2
Note:
Tighten the screws
in the order as indi-
cated on the label.
C
A
c.
d.
Figure 9
Processor
Installation
a. Insert the CPU.
b. Turn the release latch to-
wards the lock symbol.
c. Remove the sticker from
the heat sink and insert
the heat sink.
d. Tighten the screws.
A. CPU
D. Heat Sink
3 Screws
Disassembly
2 - 14 Removing the Wireless LAN Module
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Removing the Wireless LAN Module
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
2. The Wireless LAN module will be visible at point on the mainboard (Figure 10a).
3. Carefully disconnect the cable , and then remove the screw (Figure 10b).
4. The Wireless LAN module (Figure 10c) will pop-up, and you can remove it from the computer (Figure 10d).
Figure 10
Wireless LAN
Module Removal
a. Locate the WLAN.
b. Disconnect the cable
and remove the screw.
c. The WLAN module will
pop up.
d. Remove the Wireless
LAN module.
Note: Make sure you
reconnect the antenna
cable to the 1 +2
socket (Figure 10b).
1
2 3
4
b.
c.
a.
2
3
d.
4
4
1
4.Wireless LAN Module

1 Screw
Disassembly
Removing the Keyboard 2 - 15
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Removing the Keyboard
2. Remove screws - from the bottom of the computer. Press at points to unsnap the LED cover module
(use the Eject Pin Tool to do this (Figure 11a).
3. Remove the LED cover module and screws - from the keyboard (Figure 11b).
4. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable . Disconnect the keyboard
ribbon cable from the locking collar socket (Figure 11c)
5. Carefully lift up the keyboard (Figure 11d) off the computer.
Figure 11
Keyboard Removal
a. Remove screws from the
bottom of the computer.
Press at points to un-
snap the LED cover
module.
b. Remove the LED cover
module and screws
from the keyboard.
c. Carefully lift the key-
board up and disconnect
the keyboard ribbon ca-
ble from the locking col-
lar socket.
d. Remove the keyboard.
5
1 4 5 6
6 7 11
12
12 13
14
Re-Inserting the
Keyboard
When re-inserting the
keyboard firstly align the
four keyboard tabs at the
bottom (Figure 11c) at
the bottom of the key-
board with the slots in the
case.
a.
Keyboard Tabs
1
3 2 4
7
5
c.
b. d.
8
9
14
10 11
12
6
5
13
6. LED Cover Module

14. Keyboard
9 Screws
Disassembly
2 - 16
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A - 1
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Appendix A:Part Lists
This appendix breaks down the W240HU/W241HUQ/W245HUQ/W249HUQ series notebooks construction into a se-
ries of illustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturers part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 2
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Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Location
Part W240HU/W241HUQ W245HUQ W249HUQ
Top page A - 3 page A - 4 page A - 5
Bottom (w/ SIM) page A - 6 N/A
Bottom (w/o SIM) page A - 7 page A - 8
Combo N/A page A - 9
DVD Dual Drive page A - 10 page A - 11
LCD page A - 12 page A - 13 page A - 14
Top (W240HU/W241HUQ Series) A - 3
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Top (W240HU/W241HUQ Series)
()

Figure A - 1
Top (W240HU/
W241HUQ Series)
A - 4 Top (W245HUQ Series)
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Top (W245HUQ Series)
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Figure A - 2
Top (W245HUQ Se-
ries)
Top (W249HUQ Series) A - 5
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Top (W249HUQ Series)

I

Figure A - 3
Top (W249HUQ Se-
ries)
A - 6 Bottom with SIM (W240HU/W241HUQ/W245HUQ Series)
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Bottom with SIM (W240HU/W241HUQ/W245HUQ Series)
Figure A - 4
Bottom with SIM
(W240HU/
W241HUQ/
W245HUQ Series)
Bottom without SIM (W240HU/W241HUQ/W245HUQ Series) A - 7
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Bottom without SIM (W240HU/W241HUQ/W245HUQ Series)
Figure A - 5
Bottom without
SIM (W240HU/
W241HUQ/
W245HUQ Series)
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Bottom without SIM (W249HUQ Series)
Figure A - 6
Bottom without
SIM (W249HUQ Se-
ries)
Combo (W249HUQ Series) A - 9
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Combo (W249HUQ Series)
*()
_
Figure 7
Combo (W249HUQ
Series)
A - 10 DVD (W240HU/W241HUQ/W245HUQ Series)
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DVD (W240HU/W241HUQ/W245HUQ Series)
Figure A - 8
DVD (W240HU/
W241HUQ/
W245HUQ Series)
*()
DVD (W249HUQ Series) A - 11
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DVD (W249HUQ Series)
Figure A - 9
DVD (W249HUQ
Series)
*()
A - 12 LCD (W240HU/W241HUQ Series)
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LCD (W240HU/W241HUQ Series)
Figure A - 10
LCD (W240HU/
W241HUQ Series)
LCD (W245HUQ Series) A - 13
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LCD (W245HUQ Series)
Figure A - 11
LCD (W245HUQ
Series)
A - 14 LCD (W249HUQ Series)
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LCD (W249HUQ Series)
Figure A - 12
LCD (W249HUQ
Series)
Schematic Diagrams
B - 1
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Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the W240HU/W241HUQ/W245HUQ/W249HUQ notebooks PCBs. The follow-
ing table indicates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 CougarPoint - M 6/9 - Page B - 19 Power 0.85VS - Page B - 36
CPU 1/7 (DMI, PEG, FDI) - Page B - 3 CougarPoint - M 7/9 - Page B - 20 Power V-Core1 - Page B - 37
CPU 2/7 (CLK, MISC, JTAG) - Page B - 4 CougarPoint - M 8/9 - Page B - 21 Power V-Core2 - Page B - 38
CPU 3/7 (DDR3) - Page B - 5 CougarPoint - M 9/9 - Page B - 22 Charger, DC In - Page B - 39
CPU 4/7 (Power) - Page B - 6 New Card, Mini PCIE - Page B - 23 Click Board - Page B - 40
CPU 5/7 (Graphics Power) - Page B - 7 CCD, 3G, TPM - Page B - 24 Audio Board/USB - Page B - 41
CPU 6/7 (GND) - Page B - 8 Card Reader/LAN JMC251C - Page B - 25 Power Switch & LID Board - Page B - 42
CPU 7/7 (RESERVED) - Page B - 9 LAN (JMC251C), SATA HDD, ODD - Page B - 26
DDR3 SO-DIMM_0 - Page B - 10 USB 2.0 Connector - Page B - 27
DDR3 SO-DIMM_1 - Page B - 11 KBC-ITE IT8518 - Page B - 28
LVDS, Inverter - Page B - 12 LED, MDC, BT - Page B - 29
HDMI, CRT - Page B - 13 Audio Codec ALC269 - Page B - 30
CougarPoint - M 1/9 - Page B - 14 USB, Fan, TP, Multi-Conn - Page B - 31
CougarPoint - M 2/9 - Page B - 15 5VS, 3VS, 1.05VS, 1.5VS_CPU - Page B - 32
CougarPoint - M 3/9 - Page B - 16 VDD3, VDD5 - Page B - 33
CougarPoint - M 4/9 - Page B - 17 Power 1.5V/0.75V/1.8VS - Page B - 34
CougarPoint - M 5/9 - Page B - 18 Power 1.05VS - Page B - 35
Table B - 1
SCHEMATIC
DIAGRAMS
Version Note
The schematic dia-
grams in this chapter
are based upon ver-
sion 6-7P-W24H5-002.
If your mainboard (or
other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).
Schematic Diagrams
B - 2 System Block Diagram
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System Block Diagram
Sheet 1 of 43
System Block
Diagram

Huron River System Bl ock Di agram
( US B2 )
P OW ER S WI TCH +H OT KE Y X 3
L CD C ON NE CT OR , <8 "
T OU CH P AD
CR T CO NN EC TO R
VGFX_CORE
S MA RT
B AT TE RY
LPC
SO-DIMM1
CARD READER
INT SPK R
Mi ni P CI E
S OC KE T
WL AN
CLICK BOARD
PCIE
<= 8"
480 Mbps
Memory Termination
S yn ap ti c
DDRIII
S PI
0. 5" ~6 .5 "
7I N1
1" ~1 6"
25
MH z
(U SB 0)
DDRIII
INT MIC
24 MHz
FDI
<1 2"
AZALIA
MDC
MODULE
HD MI
128pins LQFP
INT SPK L
MD C CO N
32.768KHz
SO-DIMM0
EC SMBUS
C CD
AZALIA LINK
SYSTEM SMBUS
0 .1 "~1 3
B IO S
S PI
LAN
IT E 85 18 E
SA TA O DD S AT A HD D
< 12 "
I NT . K/ B
CLICK BOARD
Az al ia C od ec E C
0. 5" ~1 1"
RJ-11
S OC KE T
5V,3V,5VS,3VS,1.5VS,
1.5VS_CPU
<1 5"
CRT SWITCH
L VD S S WI TC H
USB2.0
RJ-45
VDD3,VDD5
DMI*4
32.768 KHz
W 83 L7 71 AW G
JMICRO
6 -7 1- E5 1Q S-D 02
SATA I/II 3.0Gb/s
VIA VT1802
800/1067 MHz
DDR3 / 1.5V
14*14*1.6mm 33 MHz
TH ER MA L
SE NS OR
100 MHz
POWER SWITCH BOARD
810602-1703
S MA RT
F AN
(U SB 5)
PROCESSOR
37.5*37.5 mm
JMC251 C
CougarPoint
Platform
Controller
Hub (PCH)
25x25x0.6 mm
989 Balls FCBGA
rPGA989/988
Sandy Bridge
6 -7 1- W2 40 2-D 01
A UD IO
B OA RD
6 -7 1- E5 1Q N-D 01
E XT . OD D
EXTERNAL ODD BOARD
6 -7 1- C4 50 8-D 03
U SB +E AR PH ONE +E XT .M IC
AUDIO BOARD
( US B9 )
(Optional)
Mi ni P CI E
S OC KE T
3 G CA RD
HP
OUT
INTERNAL
GRAPHICS
INTERNAL
GRAPHICS
MIC
IN
VCORE, 0.85VS
AU DI O BO AR D
1.05VS, 1.05VS_VTT
1.5V,0.75VS(VTT_MEM)
1.8VS
US B PO RT
( US B9 )
USB P OR T U SB P OR T
(U SB 1)
Schematic Diagrams
CPU 1/7 (DMI, PEG, FDI) B - 3
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CPU 1/7 (DMI, PEG, FDI)
Sheet 2 of 43
CPU 1/7
(DMI, PEG, FDI)

DP _ T X P 3 [1 1]
11/03
D P _ T XN _ 3
DP _ T X P 0 [1 1]
C3 2 4 *0 . 1 u _1 0 V_ X7R _ 04
DP _ T X P 1 [1 1]
D P _ T XP _3
DP _ T X N1 [1 1]
DP _ T X N0 [1 1]
D P _ T XP _1
D P _ T XP _0
C3 2 9 *0 . 1 u _1 0 V_ X7R _ 04
C3 3 0 *0 . 1 u _1 0 V_ X7R _ 04
D P _ AU X_ N
D P _ AU X_ P
D P _ T XP _2 C3 2 7 *0 . 1 u _1 0 V_ X7R _ 04
DP _ T X P 2 [1 1]
D P _ T XN _ 2
DP _ AU XN [1 1]
DP _ AU XP [1 1]
D P _ T XN _ 0
C3 2 8 *0 . 1 u _1 0 V_ X7R _ 04 D P _ T XN _ 1
C3 3 1 *0 . 1 u _1 0 V_ X7R _ 04
DP _ T X N2 [1 1]
C3 2 5 *0 . 1 u _1 0 V_ X7R _ 04
C3 2 6 *0 . 1 u _1 0 V_ X7R _ 04
P
C
I

E
X
P
R
E
S
S
*

-

G
R
A
P
H
I
C
S
D
M
I
I
n
t
e
l
(
R
)

F
D
I
e
D
P
U 3 4A
P Z 98 8 2 7- 36 4 B-0 1 F
D MI _ RX #[0 ]
B 2 7
D MI _ RX #[1 ]
B 2 5
D MI _ RX #[2 ]
A 2 5
D MI _ RX #[3 ]
B 2 4
D MI _ RX [0 ]
B 2 8
D MI _ RX [1 ]
B 2 6
D MI _ RX [2 ]
A 2 4
D MI _ RX [3 ]
B 2 3
D MI _ T X#[0 ]
G2 1
D MI _ T X#[1 ]
E 2 2
D MI _ T X#[2 ]
F 2 1
D MI _ T X#[3 ]
D2 1
D MI _ T X[ 0]
G2 2
D MI _ T X[ 1]
D2 2
D MI _ T X[ 3]
C2 1 D MI _ T X[ 2]
F 2 0
F D I 0 _T X #[0 ]
A 2 1
F D I 0 _T X #[1 ]
H1 9
F D I 0 _T X #[2 ]
E 1 9
F D I 0 _T X #[3 ]
F 1 8
F D I 1 _T X #[0 ]
B 2 1
F D I 1 _T X #[1 ]
C2 0
F D I 1 _T X #[2 ]
D1 8
F D I 1 _T X #[3 ]
E 1 7
F D I 0 _T X [0 ]
A 2 2
F D I 0 _T X [1 ]
G1 9
F D I 0 _T X [2 ]
E 2 0
F D I 0 _T X [3 ]
G1 8
F D I 1 _T X [0 ]
B 2 0
F D I 1 _T X [1 ]
C1 9
F D I 1 _T X [2 ]
D1 9
F D I 1 _T X [3 ]
F 1 7
F D I 0 _F S Y N C
J 1 8
F D I 1 _F S Y N C
J 1 7
F D I _ I NT
H2 0
F D I 0 _L S Y NC
J 1 9
F D I 1 _L S Y NC
H1 7
P E G_ I C OM P I
J 2 2
P E G_ I CO MP O
J 2 1
P E G _R CO MP O
H 2 2
P E G_ RX#[0 ]
K 3 3
P E G_ RX#[1 ]
M 3 5
P E G_ RX#[2 ]
L 3 4
P E G_ RX#[3 ]
J 3 5
P E G_ RX#[4 ]
J 3 2
P E G_ RX#[5 ]
H 3 4
P E G_ RX#[6 ]
H 3 1
P E G_ RX#[7 ]
G 3 3
P E G_ RX#[8 ]
G 3 0
P E G_ RX#[9 ]
F 3 5
P E G_ R X#[1 0 ]
E 3 4
P E G_ R X#[1 1 ]
E 3 2
P E G_ R X#[1 2 ]
D 3 3
P E G_ R X#[1 3 ]
D 3 1
P E G_ R X#[1 4 ]
B 3 3
P E G_ R X#[1 5 ]
C 3 2
P E G_ RX[0 ]
J 3 3
P E G_ RX[1 ]
L 3 5
P E G_ RX[2 ]
K 3 4
P E G_ RX[3 ]
H 3 5
P E G_ RX[4 ]
H 3 2
P E G_ RX[5 ]
G 3 4
P E G_ RX[6 ]
G 3 1
P E G_ RX[7 ]
F 3 3
P E G_ RX[8 ]
F 3 0
P E G_ RX[9 ]
E 3 5
P E G_ RX[1 0 ]
E 3 3
P E G_ RX[1 1 ]
F 3 2
P E G_ RX[1 2 ]
D 3 4
P E G_ RX[1 3 ]
E 3 1
P E G_ RX[1 4 ]
C 3 3
P E G_ RX[1 5 ]
B 3 2
P E G _ TX#[0 ]
M 2 9
P E G _ TX#[1 ]
M 3 2
P E G _ TX#[2 ]
M 3 1
P E G _ TX#[3 ]
L 3 2
P E G _ TX#[4 ]
L 2 9
P E G _ TX#[5 ]
K 3 1
P E G _ TX#[6 ]
K 2 8
P E G _ TX#[7 ]
J 3 0
P E G _ TX#[8 ]
J 2 8
P E G _ TX#[9 ]
H 2 9
P E G_ T X#[1 0 ]
G 2 7
P E G_ T X#[1 1 ]
E 2 9
P E G_ T X#[1 2 ]
F 2 7
P E G_ T X#[1 3 ]
D 2 8
P E G_ T X#[1 4 ]
F 2 6
P E G_ T X#[1 5 ]
E 2 5
P E G _T X[0 ]
M 2 8
P E G _T X[1 ]
M 3 3
P E G _T X[2 ]
M 3 0
P E G _T X[3 ]
L 3 1
P E G _T X[4 ]
L 2 8
P E G _T X[5 ]
K 3 0
P E G _T X[6 ]
K 2 7
P E G _T X[7 ]
J 2 9
P E G _T X[8 ]
J 2 7
P E G _T X[9 ]
H 2 8
P E G _ TX[1 0 ]
G 2 8
P E G _ TX[1 1 ]
E 2 8
P E G _ TX[1 2 ]
F 2 8
P E G _ TX[1 3 ]
D 2 7
P E G _ TX[1 4 ]
E 2 6
P E G _ TX[1 5 ]
D 2 5
e DP _ AU X
C1 5
e DP _ AU X#
D1 5
e DP _ T X [0 ]
C1 7
e DP _ T X [1 ]
F 1 6
e DP _ T X [2 ]
C1 6
e DP _ T X [3 ]
G1 5
e DP _ T X #[0]
C1 8
e DP _ T X #[1]
E 1 6
e DP _ T X #[2]
D1 6
e DP _ T X #[3]
F 1 5
e DP _ C OM P I O
A 1 8
e DP _ H P D#
B 1 6 e DP _ I C OM P O
A 1 7
R1 2 2 *1 0 m i l _ 0 4
U 1 1
* W 8 3L 7 7 1 AW G
VD D
1
D +
2
D -
3
TH E RM
4
G ND
5
AL E RT
6
S D AT A
7
S CL K
8
Q1 8
* 2N 3 9 04
B
E
C
S M C_ CP U _ T HE R M [1 4 , 2 7 ]
3. 3 V
C RI T _ T E MP _ R E P # [1 8 ]
S M D_ CP U _ T HE R M [1 4 , 2 7 ]
C9 7
*0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
TS #_ D I MM 0_ 1 [9 , 1 0 ]
D +_ C P U
D -_C P U
Analog Thermal Sensor
On Board CPU Thermal Sensor
C5 4 0 *0 . 1 u _1 0 V_ X7R _ 04
C 10 0
0 . 1 u _1 0 V _ X7R _ 04
E DP _ C OM P
R 3 89
1 K _ 0 4
1 . 05 VS _ V T T
E DP _ H P D#
P Q 4 7
* MT N7 0 0 2 ZHS 3 G
D
S
EDP Function Disable
EDP_HPD: Pull-up10K- DISABLED
E MB_ H P D [1 1]
R3 8 8
*1 0 0 K _ 04
Q1 7
*T MP 2 0
N C
1
GN D
2
V O
3
G ND
5
VC C
4
SC70-5 & SC70-3 Co-lay
PLACE NEAR U3
1
3
2
R3 9 0
24 . 9 _ 1 %_ 0 4
R6 3 2 4 . 9_ 1 % _ 04
D MI _ R XP 1 [ 15 ]
D MI _ R XP 0 [ 15 ]
1 . 0 5V S _ VTT
1 . 0 5V S _V TT
D MI _ R XN 1 [ 15 ]
D MI _ R XP 3 [ 15 ]
D MI _ R XP 2 [ 15 ]
D MI _ R XN 2 [ 15 ]
D MI _ R XN 3 [ 15 ]
D MI _ R XN 0 [ 15 ]
D MI _ T XP 0 [ 15 ]
3. 3 V [3 , 8 , 11 , 1 3 , 1 4, 15 , 1 7 , 1 8, 1 9 , 2 0 , 22 , 2 3 , 2 6 , 28 , 3 0 , 3 1, 3 3 , 3 4 , 3 5]
1 . 05 VS _V T T [3 , 5, 18 , 1 9 , 2 0, 3 4 , 3 6 ]
F D I _T XN 2 [1 5 ]
F D I _T XN 0 [1 5 ]
F D I _T XN 5 [1 5 ]
F D I _T XN 1 [1 5 ]
F D I _T XN 7 [1 5 ]
F D I _T XN 4 [1 5 ]
F D I _T XN 3 [1 5 ]
F D I _T XP 5 [1 5 ]
F D I _T XP 1 [1 5 ]
F D I _T XN 6 [1 5 ]
F D I _T XP 3 [1 5 ]
F D I _T XP 2 [1 5 ]
F D I _T XP 0 [1 5 ]
F D I _T XP 6 [1 5 ]
F D I _T XP 7 [1 5 ]
F D I _T XP 4 [1 5 ]
F DI _ L S Y NC 0 [1 5 ]
F DI _ L S Y NC 1 [1 5 ]
F DI _I N T [1 5 ]
Sandy Bridge Processor 1/7
( DMI,PEG,FDI )
F DI _ F S Y NC 1 [1 5 ]
F DI _ F S Y NC 0 [1 5 ]
D MI _ T XP 3 [ 15 ]
D MI _ T XP 2 [ 15 ]
D MI _ T XP 1 [ 15 ]
DP Compensation Signal
D MI _ T XN1 [ 15 ]
P E G_ C OM P
20 mil
D MI _ T XN0 [ 15 ]
D MI _ T XN2 [ 15 ]
D MI _ T XN3 [ 15 ]
Q1 6
G 71 1 S T 9 U
O UT
1
VC C
2
G ND
3
1: 2 (4 mi ls :8 mi ls )
3 . 3 V
T H E RM _ V OL T [2 7 ]
C5 4 1 *0 . 1 u _1 0 V_ X7R _ 04
9/20
EVT
DP _ T X N3 [1 1]
C9 9
0 . 1 u_ 1 0 V _ X7 R _0 4
CADNOTE: DP_COMPI Oand ICOMPOsi gnal s
should be shorted near bal l s and routed wi th
- typi cal i mpedance <25 mohms
Schematic Diagrams
B - 4 CPU 2/7 (CLK, MISC, JTAG)
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 2/7 (CLK, MISC, JTAG)

H_ P RO CH OT # [3 6]
S
D
G Q3 6 B
MT D N7 0 02 ZH S 6 R
5
3
4
R9 1 1 0 0 K _ 04
C
L
O
C
K
S
M
I
S
C
T
H
E
R
M
A
L
P
W
R

M
A
N
A
G
E
M
E
N
T
D
D
R
3

M
I
S
C
J
T
A
G

&

B
P
M
U3 4 B
P Z98 8 2 7-3 6 4 B-0 1F
S M _ RC OMP [1]
A5
S M _ RC OMP [2]
A4
S M_ DR AMR S T #
R8
S M _ RC OMP [0]
AK 1
BC L K #
A27 B C LK
A28
DP L L _ RE F _ S S C L K #
A15 DP L L _R E F _ S S C LK
A16
CAT E RR #
A L 3 3
P E CI
AN 3 3
P RO CH OT #
A L 3 2
TH E RM T RI P #
AN 3 2
S M_ DR AMP W RO K
V8
RE S E T #
AR 3 3
P R DY #
AP 2 9
P RE Q #
AP 2 7
T CK
AR2 6
T MS
AR2 7
TR S T #
AP 3 0
T DI
AR2 8
T DO
AP 2 6
DBR #
AL3 5
BP M #[0]
AT2 8
BP M #[1]
AR2 9
BP M #[2]
AR3 0
BP M #[3]
AT3 0
BP M #[4]
AP 3 2
BP M #[5]
AR3 1
BP M #[6]
AT3 1
BP M #[7]
AR3 2
P M_ S Y N C
AM 3 4
S K T OCC #
AN 3 4
P RO C_ S E L E CT #
C 2 6
UN COR E P W R GO OD
A P 3 3
C2 2
0 . 0 47 u _ 10 V_ X7R _ 04
R5 9 0 _ 04
S3 circuit:- DRAM PWR GOOD logic
1 . 8 V S _ P W RG D [1 5, 3 3 ]
P M_ DR A M_ P W R GD [1 5]
P MS Y S _P W RG D_ BUF
R7 3
*2 0 0_ 1 % _0 4
1 . 5 V _ CP U
R 57
1 0 K _ 04
R 58
* 39 _ 0 4
S US B [6 , 3 1, 3 3 , 3 4 ]
Q 10
* MT N7 0 0 2ZH S 3
G
D
S
3 . 3V
11/03
S
D
G
Q3 6 A
MT D N7 0 02 ZH S 6 R 2
6
1
R5 3 0 1 0K _ 0 4
11/ 04
C 51 5
4 7 p_ 5 0 V _ NP O _0 4
H_ P R OCH OT #
R9 0 * 0 _0 4
R 60 1 3 0_ 1 % _0 4
CAD Not e: Capaci t or
need t o be pl aced
cl ose t o buf f er out put pi n
H_ P R OC HO T_ E C [2 7 ]
Q1 4
MT N 70 0 2 Z HS 3
G
D
S
C
A
A
D2 0
*B AT5 4 AW G H
1
2
3
P M S Y S _ P W R GD _ BUF
R 41 4 5 1 _ 04
R 41 6 5 1 _ 04
R 10 8 5 1 _ 04
R 41 5 5 1 _ 04
R 10 9 * 51 _ 0 4
R 95 5 1 _ 04
3 . 3V S
1. 0 5 VS _ VT T
XD P _ DBR _R R 40 7 1 K _ 0 4
XD P _ TM S
XD P _ TD O_ R
PU/PD for JTAG signals
XD P _ TR S T #
XD P _ P RE Q #
XD P _ TD I _ R
XD P _ TC L K
H_ C P UP W R GD _ R
R 10 6
*7 5 0_ 1 % _0 4
R 1 12 *1 . 5K _1 % _ 04
Processor Pullups/Pull downs
TRA CE W ID TH 1 0MI L, L EN GT H < 50 0M IL S
3 . 3 VS
BUF _C P U_ R S T#
DDR3 Compensation Signals
S M_ R CO MP _ 2
S M_ R CO MP _ 1
S M_ R CO MP _ 0
C9 6
*6 8 p _5 0 V_ NP O _ 04
VDD P W R GO OD_ R
XDP _ T RS T #
XDP _ T CL K
P L T_ R S T # [17 , 2 3 ]
XDP _ T MS
XDP _ T DI _ R
CP U DR AMR S T #
H_ P R OC HO T#_ D
H_ C ATE RR#
Buffered reset to CPU
XDP _ T DO _R
XDP _ P R E Q#
H_ T HR MT R I P # [1 8 ]
H _S NB_ I V B# [18 ]
R 38 2 2 5 . 5 _1 % _ 04
R 38 1 2 0 0_ 1 % _ 04
R4 1 9 *1 0 mi l _ 04
R 41 2 10 K _ 0 4
R 41 3 1 4 0_ 1 % _ 04
H _ P E CI [1 8 , 27 ]
P M_ S Y NC _R
I f P ROCHOT # i s no t us ed, t he n i t must
be t er mi na t ed wi t h a 68- O +- 5% p ul l - u p
r e si st or t o 1 . 0 5V S_ VT T .
( CLK,MISC,JTAG )
R4 1 8 *1 0 mi l _ 04
R 41 0 62 _ 0 4
1 . 05 V S _ V T T
H _P RO CHO T #
S M _ RC OMP _2
S M _ RC OMP _0
S M _ RC OMP _1
CL K _ DP _ N [ 14 ]
CL K _ E XP _N [1 4]
CL K _ E XP _P [14 ]
H_ P M _S Y N C [1 5 ]
CL K _ DP _ P [1 4 ]
H_ S N B_ I V B#
1 . 5V [6 , 8 , 9, 1 0 , 2 0, 2 6 , 2 8 , 31 , 3 3 ]
1 . 5V _C P U [6 , 3 1 ]
1 . 05 VS _ VT T [2 , 5 , 1 8, 1 9 , 2 0 , 34 , 3 6 ]
3 . 3V [ 2, 8 , 1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 19 , 2 0 , 22 , 2 3 , 2 6, 2 8 , 3 0, 3 1 , 3 3 , 34 , 3 5 ]
H _ CP U P W RG D [1 8]
Q8
MT N 70 0 2 ZHS 3
G
D S
R4 6
4
.9
9K
_
1
%
_0
4
C P UD RA M RS T #
R4 7 *0 _0 4
1 . 5V
R4 5
1K _ 0 4
S3 circuit:- DRAM_RST# to memory
should be high during S3
D RAM RS T _ CN TR L [8 , 14 ]
D DR 3_ D RAM RS T # [9 , 10 ] R 48 1K _0 4
10/ 1
XDP _ DB R_ R
R4 1 1 *1 0 mi l _ 04
XDP _ B P M 1_ R
XDP _ B P M 0_ R
XDP _ B P M 6_ R
XDP _ B P M 5_ R
XDP _ B P M 4_ R
XDP _ B P M 3_ R
XDP _ B P M 2_ R
XDP _ B P M 7_ R
H_ P E C I _ R
R1 0 5 7 5_ 1 % _0 4
R4 0 5 5 6 _1 % _ 04
H _C P U P W RG D_ R
R 1 04 43 _ 1 %_ 0 4
10/29
R5 3 1
1 00 K _ 0 4
C 58 5 * 0. 1 u _ 10 V _ X7 R_ 0 4
XDP _ P R DY #
10/28
1 . 0 5 VS _ VT T
3 . 3V S [9, 1 0 , 1 1 , 12 , 1 3 , 14 , 1 5 , 1 6, 1 7 , 1 8, 19 , 2 0 , 23 , 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 6 ]
R4 1 7 *1 0 mi l _ 04 H_ T HR MT RI P #_ R
Sheet 3 of 43
CPU 2/7
(CLK, MISC, JTAG)
Schematic Diagrams
CPU 3/7 (DDR3) B - 5
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 3/7 (DDR3)

D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

B
U34D
PZ98827-364B-01F
SB_BS[0]
AA9
SB_BS[1]
AA7
SB_BS[2]
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK[0]
AE2
SB_CLK[1]
AE1
SB_CLK#[0]
AD2
SB_CLK#[1]
AD1
SB_CKE[0]
R9
SB_CKE[1]
R10
SB_ODT[0]
AE4
SB_ODT[1]
AD4
SB_DQS[4]
AN6
SB_DQS#[4]
AN5
SB_DQS[5]
AP8
SB_DQS#[5]
AP9
SB_DQS[6]
AK11
SB_DQS#[6]
AK12
SB_DQS[7]
AP14
SB_DQS#[7]
AP15
SB_DQS[0]
C7
SB_DQS#[0]
D7
SB_DQS[1]
G3
SB_DQS#[1]
F3
SB_DQS[2]
J6
SB_DQS#[2]
K6
SB_DQS[3]
M3
SB_DQS#[3]
N3
SB_MA[0]
AA8
SB_MA[1]
T7
SB_MA[2]
R7
SB_MA[3]
T6
SB_MA[4]
T2
SB_MA[5]
T4
SB_MA[6]
T3
SB_MA[7]
R2
SB_MA[8]
T5
SB_MA[9]
R3
SB_MA[10]
AB7
SB_MA[11]
R1
SB_MA[12]
T1
SB_MA[13]
AB10
SB_MA[14]
R5
SB_MA[15]
R4
SB_DQ[0]
C9
SB_DQ[1]
A7
SB_DQ[2]
D10
SB_DQ[3]
C8
SB_DQ[4]
A9
SB_DQ[5]
A8
SB_DQ[6]
D9
SB_DQ[7]
D8
SB_DQ[8]
G4
SB_DQ[9]
F4
SB_DQ[10]
F1
SB_DQ[11]
G1
SB_DQ[12]
G5
SB_DQ[13]
F5
SB_DQ[14]
F2
SB_DQ[15]
G2
SB_DQ[16]
J7
SB_DQ[17]
J8
SB_DQ[18]
K10
SB_DQ[19]
K9
SB_DQ[20]
J9
SB_DQ[21]
J 10
SB_DQ[22]
K8
SB_DQ[23]
K7
SB_DQ[24]
M5
SB_DQ[25]
N4
SB_DQ[26]
N2
SB_DQ[27]
N1
SB_DQ[28]
M4
SB_DQ[29]
N5
SB_DQ[30]
M2
SB_DQ[31]
M1
SB_DQ[32]
AM5
SB_DQ[33]
AM6
SB_DQ[34]
AR3
SB_DQ[35]
AP3
SB_DQ[36]
AN3
SB_DQ[37]
AN2
SB_DQ[38]
AN1
SB_DQ[39]
AP2
SB_DQ[40]
AP5
SB_DQ[41]
AN9
SB_DQ[42]
AT5
SB_DQ[43]
AT6
SB_DQ[44]
AP6
SB_DQ[45]
AN8
SB_DQ[46]
AR6
SB_DQ[47]
AR5
SB_DQ[48]
AR9
SB_DQ[49]
AJ 11
SB_DQ[50]
AT8
SB_DQ[51]
AT9
SB_DQ[52]
AH11
SB_DQ[53]
AR8
SB_DQ[54]
AJ 12
SB_DQ[55]
AH12
SB_DQ[56]
AT11
SB_DQ[57]
AN14
SB_DQ[58]
AR14
SB_DQ[59]
AT14
SB_DQ[60]
AT12
SB_DQ[61]
AN15
SB_DQ[62]
AR15
SB_DQ[63]
AT15
SB_CLK[2]
AB2
SB_CLK#[2]
AA2
SB_CKE[2]
T9
SB_CLK[3]
AA1
SB_CLK#[3]
AB1
SB_CKE[3]
T10
SB_CS#[0]
AD3
SB_CS#[1]
AE3
SB_CS#[2]
AD6
SB_CS#[3]
AE6
SB_ODT[2]
AD5
SB_ODT[3]
AE5
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#4
M_A_DQS#1
M_A_DQS#3
M_A_DQS#0
M_A_DQS#2
M_A_DQS0
M_A_DQS7
M_A_DQS5
M_A_DQS6
M_A_DQS4
M_A_DQS2
M_A_DQS1
M_A_DQS3
M_B_DQ[63:0] [10] M_A_DQ[63:0] [9]
M_B_DQS#4
M_B_DQS#6
M_B_DQS#5
M_B_DQS#2
M_B_DQS#3
M_B_DQS#0
M_B_DQS#7
M_B_DQS#1
M_B_B6
M_B_B2
M_B_B3
M_B_B4
M_B_B0
M_B_B5
M_B_B13
M_B_B12
M_B_B9
M_B_B10
M_B_B1
M_B_B14
M_B_B15
M_B_B7
M_B_B8
M_B_B11
M_B_DQS3
M_B_DQS4
M_B_DQS2
M_B_DQS6
M_B_DQS5
M_B_DQS0
M_B_DQS7
M_B_DQS1
Sandy Bridge Processor 3/7 ( DDR3 )
M_A_BS0 [9]
M_A_DQS#[7:0] [9]
M_A_CAS# [9]
M_A_BS1 [9]
M_A_BS2 [9]
M_A_CLK_DDR#1 [9]
M_A_CLK_DDR1 [9]
M_A_WE# [9]
M_A_RAS# [9]
M_A_CKE0 [9]
M_A_CLK_DDR#0 [9]
M_A_CKE1 [9]
M_A_DQS[7:0] [9]
M_A_ODT1 [9]
M_A_CLK_DDR0 [9]
M_A_CS#0 [9]
M_A_CS#1 [9]
M_A_ODT0 [9]
M_A_A[15:0] [9]
M_A_DQ2
M_A_DQ1
M_A_DQ29
M_A_DQ4
M_A_DQ3
M_A_DQ36
M_A_DQ35
M_A_DQ31
M_A_DQ30
M_A_DQ32
M_A_DQ41
M_A_DQ39
M_A_DQ42
M_A_DQ33
M_A_DQ34
M_A_DQ37
M_A_DQ44
M_A_DQ46
M_A_DQ43
M_A_DQ45
M_A_DQ40
M_A_DQ28
M_A_DQ50
M_A_DQ38
M_A_DQ49
M_A_DQ47
M_A_DQ55
M_A_DQ54
M_A_DQ52
M_A_DQ53
M_A_DQ48
M_A_DQ51
M_A_DQ6
M_A_DQ56
M_A_DQ58
M_A_DQ57
M_A_DQ5
M_A_DQ59
M_A_DQ62
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ16
M_A_DQ15
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ14
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ25
M_A_DQ23
M_A_DQ0
M_A_DQ21
M_A_DQ22
M_A_DQ20
M_A_DQ27
M_A_DQ26
M_A_DQ24
M_B_RAS# [10]
M_B_BS2 [10]
M_B_CAS# [10]
M_B_BS1 [10]
M_B_BS0 [10]
M_B_WE# [10]
M_B_DQS[7:0] [10]
M_B_DQS#[7:0] [10]
M_B_B[15:0] [10]
M_B_CKE1 [10]
M_B_ODT1 [10]
M_B_CLK_DDR#1 [10]
M_B_CS#0 [10]
M_B_ODT0 [10]
M_B_CKE0 [10]
M_B_CLK_DDR1 [10]
M_B_CLK_DDR0 [10]
M_B_CLK_DDR#0 [10]
M_B_CS#1 [10]
M_B_DQ49
M_B_DQ54
M_B_DQ53
M_B_DQ48
M_B_DQ47
M_B_DQ57
M_B_DQ56
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ61
M_B_DQ60
M_B_DQ58
M_B_DQ55
M_B_DQ12
M_B_DQ62
M_B_DQ11
M_B_DQ63
M_B_DQ59
M_B_DQ5
M_B_DQ4
M_B_DQ2
M_B_DQ1
M_B_DQ3
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ13
M_B_DQ10
M_B_DQ0
M_B_DQ16
M_B_DQ15
M_B_DQ18
M_B_DQ17
M_B_DQ14
M_B_DQ20
M_B_DQ19
M_B_DQ22
M_B_DQ21
M_B_DQ23
M_B_DQ29
M_B_DQ24
M_B_DQ26
M_B_DQ25
M_B_DQ28
M_B_DQ27
M_B_DQ32
M_B_DQ31
M_B_DQ34
M_B_DQ30
M_B_DQ33
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ39
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ46
M_A_A7
M_A_A4
M_A_A6
M_A_A8
M_A_A9
M_A_A15
M_A_A3
M_A_A0
M_A_A1
M_A_A5
M_A_A11
M_A_A13
M_A_A10
M_A_A12
M_A_A2
M_A_A14
D
D
R

S
Y
S
T
E
M

M
E
M
O
R
Y

A
U34C
PZ98827-364B-01F
SA_BS[0]
AE10
SA_BS[1]
AF10
SA_BS[2]
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK[0]
AB6
SA_CLK[1]
AA5
SA_CLK#[0]
AA6
SA_CLK#[1]
AB5
SA_CKE[0]
V9
SA_CKE[1]
V10
SA_CS#[0]
AK3
SA_CS#[1]
AL3
SA_ODT[0]
AH3
SA_ODT[1]
AG3
SA_DQS[0]
D4
SA_DQS#[0]
C4
SA_DQS[1]
F6
SA_DQS#[1]
G6
SA_DQS[2]
K3
SA_DQS#[2]
J 3
SA_DQS[3]
N6
SA_DQS#[3]
M6
SA_DQS[4]
AL5
SA_DQS#[4]
AL6
SA_DQS[5]
AM9
SA_DQS#[5]
AM8
SA_DQS[6]
AR11
SA_DQS#[6]
AR12
SA_DQS[7]
AM14
SA_DQS#[7]
AM15
SA_MA[0]
AD10
SA_MA[1]
W1
SA_MA[2]
W2
SA_MA[3]
W7
SA_MA[4]
V3
SA_MA[5]
V2
SA_MA[6]
W3
SA_MA[7]
W6
SA_MA[8]
V1
SA_MA[9]
W5
SA_MA[10]
AD8
SA_MA[11]
V4
SA_MA[12]
W4
SA_MA[13]
AF8
SA_MA[14]
V5
SA_MA[15]
V7
SA_DQ[0]
C5
SA_DQ[1]
D5
SA_DQ[2]
D3
SA_DQ[3]
D2
SA_DQ[4]
D6
SA_DQ[5]
C6
SA_DQ[6]
C2
SA_DQ[7]
C3
SA_DQ[8]
F10
SA_DQ[9]
F8
SA_DQ[10]
G10
SA_DQ[11]
G9
SA_DQ[12]
F9
SA_DQ[13]
F7
SA_DQ[14]
G8
SA_DQ[15]
G7
SA_DQ[16]
K4
SA_DQ[17]
K5
SA_DQ[18]
K1
SA_DQ[19]
J 1
SA_DQ[20]
J 5
SA_DQ[21]
J 4
SA_DQ[22]
J 2
SA_DQ[23]
K2
SA_DQ[24]
M8
SA_DQ[25]
N10
SA_DQ[26]
N8
SA_DQ[27]
N7
SA_DQ[28]
M10
SA_DQ[29]
M9
SA_DQ[30]
N9
SA_DQ[31]
M7
SA_DQ[32]
AG6
SA_DQ[33]
AG5
SA_DQ[34]
AK6
SA_DQ[35]
AK5
SA_DQ[36]
AH5
SA_DQ[37]
AH6
SA_DQ[38]
AJ 5
SA_DQ[39]
AJ 6
SA_DQ[40]
AJ 8
SA_DQ[41]
AK8
SA_DQ[42]
AJ 9
SA_DQ[43]
AK9
SA_DQ[44]
AH8
SA_DQ[45]
AH9
SA_DQ[46]
AL9
SA_DQ[47]
AL8
SA_DQ[48]
AP11
SA_DQ[49]
AN11
SA_DQ[50]
AL12
SA_DQ[51]
AM12
SA_DQ[52]
AM11
SA_DQ[53]
AL11
SA_DQ[54]
AP12
SA_DQ[55]
AN12
SA_DQ[56]
AJ 14
SA_DQ[57]
AH14
SA_DQ[58]
AL15
SA_DQ[59]
AK15
SA_DQ[60]
AL14
SA_DQ[61]
AK14
SA_DQ[62]
AJ 15
SA_DQ[63]
AH15
SA_CLK[2]
AB4
SA_CLK#[2]
AA4
SA_CLK[3]
AB3
SA_CLK#[3]
AA3
SA_CKE[2]
W9
SA_CKE[3]
W10
SA_CS#[2]
AG1
SA_CS#[3]
AH1
SA_ODT[2]
AG2
SA_ODT[3]
AH2
Sheet 4 of 43
CPU 3/7
(DDR3)
Schematic Diagrams
B - 6 CPU 4/7 (Power)
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 4/7 (Power)

VC OR E _ V S S _ S E N S E [3 6 ]
VC OR E _ V C C_ S E NS E [3 6 ]
C 5 3 1 0u _ 6 . 3 V _ X5 R_ 0 6
SVID Signals
R8 6 1 30 _ 1 % _ 0 4
R4 0 8 7 5_ 1 % _ 0 4
R 8 9 *5 4 . 9 _ 1 % _0 4
1 . 0 5 V S _ VT T
H_ C P U _S VI D DAT _ R
H_ C P U _S VI D CL K
H_ C P U _S VI D AL RT #
CAD Not e: H_ CPU_ SVI DALRT#_ R, H_ CPU_ SVI DDAT_ R
Pl ace t he PU r esi st or s cl ose t o CPU
+
C4 1 7
22 0 u _ 6 . 3 V_ 6 . 3 *6 . 3 *4 . 2
R 88 0 _ 0 4
PROCESSOR UNCORE POWER
C 7 2 *1 0 u _ 6. 3V _X 5 R _ 06
C 6 6 *1 0 u _ 6. 3V _X 5 R _ 06
C 6 2 *1 0 u _ 6. 3V _X 5 R _ 06
C 5 9 *1 0 u _ 6. 3V _X 5 R _ 06
VC CI O _ S E N S E _ R
48A
PROCESSOR CORE POWER
8.5A
C 3 3 7 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 3 3 2 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 3 5 1 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 3 3 6 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 3 6 3 2 2u _ 6 . 3 V _ X5 R_ 0 8
VC CI O _ S E N S E [34 ]
1. 05 V S _ V T T [ 2, 3 , 1 8 , 1 9 , 2 0 , 3 4 , 36 ]
V CO R E [3 6 , 37 ]
C 3 3 4 *2 2 u _ 6. 3V _X 5 R _ 08
C 3 3 3 *2 2 u _ 6. 3V _X 5 R _ 08
C 3 6 2 *2 2 u _ 6. 3V _X 5 R _ 08
C 3 6 0 *2 2 u _ 6. 3V _X 5 R _ 08
C 3 5 6 *2 2 u _ 6. 3V _X 5 R _ 08
VC OR E
H _ CP U_ S V I DAL R T #_R
ICCMAX Maximum Processor SV 48
H _C P U _ S VI D DA T [3 6]
C 5 6 1 0u _ 6 . 3 V _ X5 R_ 0 6
C 3 4 6
2 2 u _ 6 . 3 V _ X5 R _ 0 8
C 3 6 5
2 2 u _ 6 . 3 V_ X 5R _ 0 8
C 4 2 0
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 7 5
2 2 u _ 6 . 3 V_ X 5R _ 0 8
C 6 9 1 0u _ 6 . 3 V _ X5 R_ 0 6
H _ CP U_ S V I DD A T _ R
C 3 9 7
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 6 7
2 2 u _ 6 . 3 V_ X5R _ 0 8
C 3 6 6 2 2u _ 6 . 3 V _ X5 R_ 0 8
R 40 6 4 3 _ 1 % _0 4
C3 7 2
22 u _ 6 . 3 V_ X5R _ 0 8
C3 5 5
*2 2 u _6 . 3 V_ X 5 R _0 8
C 3 8 2
* 2 2 u_ 6 . 3 V_ X 5 R_ 0 8
C3 8 1
*2 2 u _6 . 3 V_ X 5 R _0 8
+V1 . 0 5 S _ VC CP _ F
C 3 8 5
2 2 u _ 6 . 3 V _ X5 R _ 0 8
C3 9 4
*2 2 u _6 . 3 V_ X5 R _0 8
C 3 6 4
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 8 4
2 2 u _ 6 . 3 V _ X5 R _ 0 8
C 3 5 8
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 6 8
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C3 6 1
22 u _ 6 . 3 V _ X5 R_ 0 8
C 3 3 1 0u _ 6 . 3 V _ X5 R_ 0 6
C4 1 9
*2 2 u _6 . 3 V_ X5 R _0 8
C3 4 4
*2 2 u _6 . 3 V_ X5 R _0 8
C3 5 7
22 u _ 6 . 3 V_ X5R _ 0 8
C 3 9 8
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 5 2
2 2 u _ 6 . 3 V_ X 5R _ 0 8
C 3 7 1 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 7 4 1 0u _ 6 . 3 V _ X5 R_ 0 6
C3 2 1
*2 2 u _6 . 3 V_ X 5 R _0 8
C 3 4 1 0u _ 6 . 3 V _ X5 R_ 0 6
C 3 5 9 2 2u _ 6 . 3 V _ X5 R_ 0 8
C 3 8 3
2 2 u _ 6 . 3 V_ X5R _ 0 8
H _C P U _ S VI D CL K [3 6]
H _C P U _ S VI D AL RT # [3 6 ]
R 62 * 2 0m i l _ 0 4
C 3 5 0
* 2 2 u_ 6 . 3 V_ X 5 R_ 0 8
C4 1 8
*2 2 u _6 . 3 V_ X5 R _0 8
C 4 0 6
* 2 2 u_ 6 . 3 V_ X5 R_ 0 8
C 3 5 4 2 2u _ 6 . 3 V _ X5 R_ 0 8
C3 9 6
*2 2 u _6 . 3 V_ X 5 R _0 8
C4 0 7
*2 2 u _6 . 3 V_ X 5 R _0 8
C 3 5 3 2 2u _ 6 . 3 V _ X5 R_ 0 8
VC OR E
1 . 0 5 VS _ V T T
V CO R E
1 . 0 5 VS _ VT T
VC OR E
H _ CP U_ S V I DC L K _ R
R 85 0 _ 0 4
R 3 84 *0 _ 0 4
CAD Not e: H_ CPU_ SVI DCLK_ R
Pl ace t he PU
r esi st or s cl ose t o VR
R 3 79
1 0 _ 0 4
1 . 0 5 VS _ V T T
R 3 83
1 0 _ 0 4
VS S I O_ S E N S E
POWER
C
O
R
E

S
U
P
P
L
Y
P
E
G

A
N
D

D
D
R
S
E
N
S
E

L
I
N
E
S
S
V
I
D
U 3 4 F
P Z9 88 2 7 -3 6 4 B-0 1 F
VC C_ S E N S E
AJ 3 5
V S S _ S E N S E
AJ 3 4
VI D AL E R T #
AJ 2 9
VI D S CL K
AJ 3 0
VI DS O U T
AJ 2 8
VS S I O_ S E N S E
A1 0
V CC 1
A G3 5
V CC 2
A G3 4
V CC 3
A G3 3
V CC 4
A G3 2
V CC 5
A G3 1
V CC 6
A G3 0
V CC 7
A G2 9
V CC 8
A G2 8
V CC 9
A G2 7
V CC 1 0
A G2 6
V CC 1 1
AF 3 5
V CC 1 2
AF 3 4
V CC 1 3
AF 3 3
V CC 1 4
AF 3 2
V CC 1 5
AF 3 1
V CC 1 6
AF 3 0
V CC 1 7
AF 2 9
V CC 1 8
AF 2 8
V CC 1 9
AF 2 7
V CC 2 0
AF 2 6
V CC 2 1
A D3 5
V CC 2 2
A D3 4
V CC 2 3
A D3 3
V CC 2 4
A D3 2
V CC 2 5
A D3 1
V CC 2 6
A D3 0
V CC 2 7
A D2 9
V CC 2 8
A D2 8
V CC 2 9
A D2 7
V CC 3 0
A D2 6
V CC 3 1
A C3 5
V CC 3 2
A C3 4
V CC 3 3
A C3 3
V CC 3 4
A C3 2
V CC 3 5
A C3 1
V CC 3 6
A C3 0
V CC 3 7
A C2 9
V CC 3 8
A C2 8
V CC 3 9
A C2 7
V CC 4 0
A C2 6
V CC 4 1
AA3 5
V CC 4 2
AA3 4
V CC 4 3
AA3 3
V CC 4 4
AA3 2
V CC 4 5
AA3 1
V CC 4 6
AA3 0
V CC 4 7
AA2 9
V CC 4 8
AA2 8
V CC 4 9
AA2 7
V CC 5 0
AA2 6
V CC 5 1
Y 3 5
V CC 5 2
Y 3 4
V CC 5 3
Y 3 3
V CC 5 4
Y 3 2
V CC 5 5
Y 3 1
V CC 5 6
Y 3 0
V CC 5 7
Y 2 9
V CC 5 8
Y 2 8
V CC 5 9
Y 2 7
V CC 6 0
Y 2 6
V CC 6 1
V3 5
V CC 6 2
V3 4
V CC 6 3
V3 3
V CC 6 4
V3 2
V CC 6 5
V3 1
V CC 6 6
V3 0
V CC 6 7
V2 9
V CC 6 8
V2 8
V CC 6 9
V2 7
V CC 7 0
V2 6
V CC 7 1
U3 5
V CC 7 2
U3 4
V CC 7 3
U3 3
V CC 7 4
U3 2
V CC 7 5
U3 1
V CC 7 6
U3 0
V CC 7 7
U2 9
V CC 7 8
U2 8
V CC 7 9
U2 7
V CC 8 0
U2 6
V CC 8 1
R3 5
V CC 8 2
R3 4
V CC 8 3
R3 3
V CC 8 4
R3 2
V CC 8 5
R3 1
V CC 8 6
R3 0
V CC 8 7
R2 9
V CC 8 8
R2 8
V CC 8 9
R2 7
V CC 9 0
R2 6
V CC 9 1
P 3 5
V CC 9 2
P 3 4
V CC 9 3
P 3 3
V CC 9 4
P 3 2
V CC 9 5
P 3 1
V CC 9 6
P 3 0
V CC 9 7
P 2 9
V CC 9 8
P 2 8
V CC 9 9
P 2 7
V CC 1 00
P 2 6
V CC I O 1
AH 13
VCC I O 1 2
J 1 1
VCC I O 1 8
G1 2
VCC I O 1 9
F 1 4
VCC I O 2 0
F 1 3
VCC I O 2 1
F 1 2
VCC I O 2 2
F 1 1
VCC I O 2 3
E 1 4
VCC I O 2 4
E 1 2
V CC I O 2
AH 10
V CC I O 3
AG 10
V CC I O 4
AC 10
V CC I O 5
Y 1 0
V CC I O 6
U1 0
V CC I O 7
P 1 0
V CC I O 8
L 1 0
V CC I O 9
J 1 4
VCC I O 1 0
J 1 3
VCC I O 1 1
J 1 2
VCC I O 1 3
H1 4
VCC I O 1 4
H1 2
VCC I O 1 5
H1 1
VCC I O 1 6
G1 4
VCC I O 1 7
G1 3
VCC I O 2 5
E 1 1
VCC I O 3 2
C1 2
VCC I O 3 3
C1 1
VCC I O 3 4
B1 4
VCC I O 3 5
B1 2
VCC I O 3 6
A1 4
VCC I O 3 7
A1 3
VCC I O 3 8
A1 2
VCC I O 3 9
A1 1
VCC I O 2 6
D1 4
VCC I O 2 7
D1 3
VCC I O 2 8
D1 2
VCC I O 2 9
D1 1
VCC I O 3 0
C1 4
VCC I O 3 1
C1 3
V C CI O_ S E N S E
B1 0
VCC I O 4 0
J 2 3
+
C4 0 2
22 0 u _ 6 . 3 V_ 6 . 3 *6 . 3 *4 . 2
Sheet 5 of 43
CPU 4/7
(Power)
Schematic Diagrams
CPU 5/7 (Graphics Power) B - 7
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 5/7 (Graphics Power)

11/29
+
C 4 58
3 3 0 uF _2 . 5 V_ 9 m_ 6 . 3 *6
C 6 5
1 0 u _6 . 3 V_ X 5R _ 0 6
C6 3
10 u _ 6 . 3V _X5 R_ 0 6
C3 2 3
10 u _ 6 . 3V _X5 R_ 0 8
C 37 6
2 2 u_ 6 . 3 V_ X5 R _ 08
C 3 17
2 2 u _6 . 3 V_ X5R _ 0 8
C 3 88
2 2 u _6 . 3 V_ X5R _ 0 8
C 32 0
1 u _ 6. 3 V_ X5 R_ 0 4
C 3 86
2 2 u _ 6. 3 V_ X5 R_ 0 8
C 39 2
2 2 u_ 6 . 3 V_ X5 R _ 08
C3 1 9
1u _ 6 . 3 V _X5 R _0 4
C3 7 4
22 u _ 6 . 3V _X5 R_ 0 8
VCC _ GT _ S E NS E [3 6]
C3 7 7
2 2u _ 6 . 3 V_X 5 R _0 8
VS S _ GT _ S E N S E [3 6 ] C 3 91
2 2 u _ 6. 3 V_ X5 R_ 0 8
C3 1 6
1 0 u_ 6 . 3 V_ X5 R _0 6
C3 8 7
2 2u _ 6 . 3 V_X 5 R _0 8
C3 6 9
*2 2 u_ 6 . 3 V_ X 5R _ 08
C 3 45
1 0 u _6 . 3 V_ X 5R _ 0 8
C5 8
1 0u _ 6 . 3 V_X5 R _0 6
C2 8
1 0u _ 6 . 3 V_X5 R _0 6
C7 1
10 u _ 6 . 3V _X5 R_ 0 6
1 . 8 V S
0. 8 5 VS
V G F X _ CO RE
1. 5 V_ C P U
1. 5 V_ C P U [3 , 3 1]
1. 8 VS [ 18 , 1 9 , 3 3]
3. 3 VS [3 , 9 , 1 0, 1 1 , 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 30 , 3 1 , 3 6]
All VDDQ = 12A
All VCCPLL = 1.2A
1. 5 V [3 , 8 , 9 , 10 , 2 0 , 2 6, 28 , 3 1 , 3 3]
VGF X_ CO RE [3 7]
R1 1 6 0 _0 4
All VDDQ = 6A
1. 5 VS [ 19 , 2 9 , 3 1]
Sandy Bridge Processor 5/7 ( GRAPHICS POWER )
All VAXG = 33A
+
C 3 15
* 3 30 U _2 . 5 V_ D 2_ D
V_ S M _ VRE F V_ S M _V R E F _ CN T
V CC S A_ S E NS E [3 5 ] VC CS A_S E NS E
+
C 31 4
5 6 0u _ 2 . 5 V_6 . 6 * 6. 6 * 5. 9
+C 4 00
2 2 0 u _6 . 3 V _ 6 . 3* 6 . 3 *4 . 2
R5 3 2 * 0 _0 4
C 39 0
2 2 u_ 6 . 3 V_ X5 R _ 08
C3 2 2
22 u _ 6 . 3V _X5 R_ 0 8
C 3 89
2 2 u _ 6. 3 V_ X5 R_ 0 8
0. 8 5 VS [3 5]
C5 8 6 *0 . 1 u _1 0 V _ X7R _ 04
CADNot e: +V_SM_VREF shoul d
have 10 mi l t race wi dt h
POWER
G
R
A
P
H
I
C
S
D
D
R
3

-
1
.
5
V

R
A
I
L
S
S
E
N
S
E
L
I
N
E
S
1
.
8
V

R
A
I
L
S
A

R
A
I
L
V
R
E
F
M
I
S
C
U 3 4G
P Z 98 8 2 7-3 6 4 B-0 1 F
S M _ VRE F
A L 1
V S S A XG _ S E NS E
A K 3 4 VA XG _ S E NS E
A K 3 5
VAX G 1
AT 2 4
VAX G 2
AT 2 3
VAX G 3
AT 2 1
VAX G 4
AT 2 0
VAX G 5
AT 1 8
VAX G 6
AT 1 7
VAX G 7
AR2 4
VAX G 8
AR2 3
VAX G 9
AR2 1
VAX G 10
AR2 0
VAX G 11
AR1 8
VAX G 12
AR1 7
VAX G 13
AP 2 4
VAX G 14
AP 2 3
VAX G 15
AP 2 1
VAX G 16
AP 2 0
VAX G 17
AP 1 8
VAX G 18
AP 1 7
VAX G 19
AN2 4
VAX G 20
AN2 3
VAX G 21
AN2 1
VAX G 22
AN2 0
VAX G 23
AN1 8
VAX G 24
AN1 7
VAX G 25
AM2 4
VAX G 26
AM2 3
VAX G 27
AM2 1
VAX G 28
AM2 0
VAX G 29
AM1 8
VAX G 30
AM1 7
VAX G 31
AL 2 4
VAX G 32
AL 2 3
VAX G 33
AL 2 1
VAX G 34
AL 2 0
VAX G 35
AL 1 8
VAX G 36
AL 1 7
VAX G 37
AK 2 4
VAX G 38
AK 2 3
VAX G 39
AK 2 1
VAX G 40
AK 2 0
VAX G 41
AK 1 8
VAX G 42
AK 1 7
VAX G 43
AJ 2 4
VAX G 44
AJ 2 3
VAX G 45
AJ 2 1
VAX G 46
AJ 2 0
VAX G 47
AJ 1 8
VAX G 48
AJ 1 7
VAX G 49
AH2 4
VAX G 50
AH2 3
VAX G 51
AH2 1
VAX G 52
AH2 0
VAX G 53
AH1 8
VAX G 54
AH1 7
V DD Q1 1
U4
V DD Q1 2
U1
V DD Q1 3
P 7
V DD Q1 4
P 4
V DD Q1 5
P 1
VD DQ 1
A F 7
VD DQ 2
A F 4
VD DQ 3
A F 1
VD DQ 4
A C7
VD DQ 5
A C4
VD DQ 6
A C1
VD DQ 7
Y 7
VD DQ 8
Y 4
VD DQ 9
Y 1
V DD Q1 0
U7
VC CP L L 1
B 6
VC CP L L 2
A 6
V CC S A1
M2 7
V CC S A2
M2 6
V CC S A3
L 26
V CC S A4
J 26
V CC S A5
J 25
V CC S A6
J 24
V CC S A7
H2 6
V CC S A8
H2 5
V CCS A _ S E NS E
H2 3
V C CS A_ V I D 1
C2 4
VC CP L L 3
A 2
F C _ C2 2
C2 2
V _ S M _V RE F
Q1 5
*A O3 4 02 L
G
D S
R 11 9
1 K _ 1 % _0 4
R1 1 4
*1 0 0K _1 % _ 04 R 11 7
1 K _ 1 % _0 4
1 . 5 V
S US B # [3, 3 1 , 3 3 , 34 ]
V _ S M _ V RE F _ C NT
V CC S A_ V I D0 [3 5 ]
R 56 1 0K _0 4
VCC S A_ VI D 1 [35 ]
1 . 5 V_ CP U
R3 9 3
*1 0 K _ 0 4
11/03
R3 8 6
1 0 K _0 4
+
P C1 6 7
* 3 30 u _ 2 . 5V _9 m _ 6. 3* 6
C3 7 3
2 2u _ 6 . 3 V_X 5 R _0 8
C 3 18
* 22 u _ 6 . 3V _X5 R_ 0 8
C 6 0
1 0 u _6 . 3 V_ X 5R _ 0 6
C6 7
1 0u _ 6 . 3 V_X5 R _0 6
11/03
Sheet 6 of 43
CPU 5/7
(Graphics Power)
Schematic Diagrams
B - 8 CPU 6/7 (GND)
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 6/7 (GND)

Sandy Bridge Processor 6/7 ( GND )
VSS
U34H
PZ98827-364B-01F
VSS1
AT35
VSS2
AT32
VSS3
AT29
VSS4
AT27
VSS5
AT25
VSS6
AT22
VSS7
AT19
VSS8
AT16
VSS9
AT13
VSS10
AT10
VSS11
AT7
VSS12
AT4
VSS13
AT3
VSS14
AR25
VSS15
AR22
VSS16
AR19
VSS17
AR16
VSS18
AR13
VSS19
AR10
VSS20
AR7
VSS21
AR4
VSS22
AR2
VSS23
AP34
VSS24
AP31
VSS25
AP28
VSS26
AP25
VSS27
AP22
VSS28
AP19
VSS29
AP16
VSS30
AP13
VSS31
AP10
VSS32
AP7
VSS33
AP4
VSS34
AP1
VSS35
AN30
VSS36
AN27
VSS37
AN25
VSS38
AN22
VSS39
AN19
VSS40
AN16
VSS41
AN13
VSS42
AN10
VSS43
AN7
VSS44
AN4
VSS45
AM29
VSS46
AM25
VSS47
AM22
VSS48
AM19
VSS49
AM16
VSS50
AM13
VSS51
AM10
VSS52
AM7
VSS53
AM4
VSS54
AM3
VSS55
AM2
VSS56
AM1
VSS57
AL34
VSS58
AL31
VSS59
AL28
VSS60
AL25
VSS61
AL22
VSS62
AL19
VSS63
AL16
VSS64
AL13
VSS65
AL10
VSS66
AL7
VSS67
AL4
VSS68
AL2
VSS69
AK33
VSS70
AK30
VSS71
AK27
VSS72
AK25
VSS73
AK22
VSS74
AK19
VSS75
AK16
VSS76
AK13
VSS77
AK10
VSS78
AK7
VSS79
AK4
VSS80
AJ 25
VSS81
AJ 22
VSS82
AJ 19
VSS83
AJ 16
VSS84
AJ 13
VSS85
AJ 10
VSS86
AJ 7
VSS87
AJ 4
VSS88
AJ 3
VSS89
AJ 2
VSS90
AJ 1
VSS91
AH35
VSS92
AH34
VSS93
AH32
VSS94
AH30
VSS95
AH29
VSS96
AH28
VSS97
AH26
VSS98
AH25
VSS99
AH22
VSS100
AH19
VSS101
AH16
VSS102
AH7
VSS103
AH4
VSS104
AG9
VSS105
AG8
VSS106
AG4
VSS107
AF6
VSS108
AF5
VSS109
AF3
VSS110
AF2
VSS111
AE35
VSS112
AE34
VSS113
AE33
VSS114
AE32
VSS115
AE31
VSS116
AE30
VSS117
AE29
VSS118
AE28
VSS119
AE27
VSS120
AE26
VSS121
AE9
VSS122
AD7
VSS123
AC9
VSS124
AC8
VSS125
AC6
VSS126
AC5
VSS127
AC3
VSS128
AC2
VSS129
AB35
VSS130
AB34
VSS131
AB33
VSS132
AB32
VSS133
AB31
VSS134
AB30
VSS135
AB29
VSS136
AB28
VSS137
AB27
VSS138
AB26
VSS139
Y9
VSS140
Y8
VSS141
Y6
VSS142
Y5
VSS143
Y3
VSS144
Y2
VSS145
W35
VSS146
W34
VSS147
W33
VSS148
W32
VSS149
W31
VSS150
W30
VSS151
W29
VSS152
W28
VSS153
W27
VSS154
W26
VSS155
U9
VSS156
U8
VSS157
U6
VSS158
U5
VSS159
U3
VSS160
U2
VSS
U34I
PZ98827-364B-01F
VSS161
T35
VSS162
T34
VSS163
T33
VSS164
T32
VSS165
T31
VSS166
T30
VSS167
T29
VSS168
T28
VSS169
T27
VSS170
T26
VSS171
P9
VSS172
P8
VSS173
P6
VSS174
P5
VSS175
P3
VSS176
P2
VSS177
N35
VSS178
N34
VSS179
N33
VSS180
N32
VSS181
N31
VSS182
N30
VSS183
N29
VSS184
N28
VSS185
N27
VSS186
N26
VSS187
M34
VSS188
L33
VSS189
L30
VSS190
L27
VSS191
L9
VSS192
L8
VSS193
L6
VSS194
L5
VSS195
L4
VSS196
L3
VSS197
L2
VSS198
L1
VSS199
K35
VSS200
K32
VSS201
K29
VSS202
K26
VSS203
J 34
VSS204
J 31
VSS205
H33
VSS206
H30
VSS207
H27
VSS208
H24
VSS209
H21
VSS210
H18
VSS211
H15
VSS212
H13
VSS213
H10
VSS214
H9
VSS215
H8
VSS216
H7
VSS217
H6
VSS218
H5
VSS219
H4
VSS220
H3
VSS221
H2
VSS222
H1
VSS223
G35
VSS224
G32
VSS225
G29
VSS226
G26
VSS227
G23
VSS228
G20
VSS229
G17
VSS230
G11
VSS231
F34
VSS232
F31
VSS233
F29
VSS234
F22
VSS235
F19
VSS236
E30
VSS237
E27
VSS238
E24
VSS239
E21
VSS240
E18
VSS241
E15
VSS242
E13
VSS243
E10
VSS244
E9
VSS245
E8
VSS246
E7
VSS247
E6
VSS248
E5
VSS249
E4
VSS250
E3
VSS251
E2
VSS252
E1
VSS253
D35
VSS254
D32
VSS255
D29
VSS256
D26
VSS257
D20
VSS258
D17
VSS259
C34
VSS260
C31
VSS261
C28
VSS262
C27
VSS263
C25
VSS264
C23
VSS265
C10
VSS266
C1
VSS267
B22
VSS268
B19
VSS269
B17
VSS270
B15
VSS271
B13
VSS272
B11
VSS273
B9
VSS274
B8
VSS275
B7
VSS276
B5
VSS277
B3
VSS278
B2
VSS279
A35
VSS280
A32
VSS281
A29
VSS282
A26
VSS283
A23
VSS284
A20
VSS285
A3
CAD Note: 0 ohmr esi stor
shoul d be pl aced cl ose
to CPU
Sheet 7 of 43
CPU 6/7 (GND)
Schematic Diagrams
CPU 7/7 (RESERVED) B - 9
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CPU 7/7 (RESERVED)

V R E F _ CH_ A_ D I MM
R 4 0 * 0 _0 4
MV RE F _ DQ _ DI M 0
R 4 4 * 0 _0 4
M V RE F _ D Q_ DI M 1
Q 7
* A O3 4 0 2L
G
D S
R 28
1 K _ 1% _ 0 4
R4 9
*1 K _ 0 4
R 29
1 K _ 1% _ 0 4
Q 6
* A O3 4 0 2L
G
D S
R3 9
*1 K _ 0 4
R3 1
1K _ 1 % _ 04
R3 8
1K _ 1 % _ 04
D RA M RS T _ CN TR L [3, 14 ]
1 . 5 V
1 . 5 V
M VRE F _D Q_ D I MMA [9]
D RAM RS T _ CN TR L
D RAM RS T _ CN TR L
M VRE F _D Q_ D I MMB [10 ]
V R E F _ CH_ B_ D I MM
R
E
S
E
R
V
E
D
U 34 E
P Z9 8 8 27 -3 6 4B- 01 F
CF G [0 ]
AK 2 8
CF G [1 ]
AK 2 9
CF G [2 ]
AL 2 6
CF G [3 ]
AL 2 7
CF G [4 ]
AK 2 6
CF G [5 ]
AL 2 9
CF G [6 ]
AL 3 0
CF G [7 ]
AM3 1
CF G [8 ]
AM3 2
CF G [9 ]
AM3 0
CF G [1 0]
AM2 8
CF G [1 1]
AM2 6
CF G [1 2]
AN2 8
CF G [1 3]
AN3 1
CF G [1 4]
AN2 6
CF G [1 5]
AM2 7
CF G [1 6]
AK 3 1
CF G [1 7]
AN2 9
R S VD 34
A M 3 3
R S VD 35
A J 2 7
R S VD 38
J 1 6
R S VD 42
A T 3 4
R S VD 39
H 16
R S VD 40
G 16
R S VD 41
A R 3 5
R S VD 43
A T 3 3
R S VD 45
A R 3 4
R S VD 56
A T 2
R S VD 57
A T 1
R S VD 58
A R 1
R S VD 46
B 3 4
R S VD 47
A 3 3
R S VD 48
A 3 4
R S VD 49
B 3 5
R S VD 50
C 35
R S VD 51
A J 3 2
R S VD 52
A K 3 2
R S VD 30
A E 7
R S VD 31
A K 2
R S VD 28
L 7
R S VD 29
A G 7
RS V D 2 7
J 1 5
RS V D 1 6
C3 0 RS V D 1 5
D2 3
RS V D 1 7
A 3 1
RS V D 1 8
B 3 0
RS V D 2 0
D3 0 RS V D 1 9
B 2 9
RS V D 2 2
A 3 0 RS V D 2 1
B 3 1
RS V D 2 3
C2 9
RS V D 2 4
J 2 0
R S VD 37
T 8
RS V D 6
B4
RS V D 7
D 1
RS V D 8
F 2 5
RS V D 9
F 2 4
RS V D 1 1
D2 4
RS V D 1 2
G2 5
RS V D 1 3
G2 4
RS V D 1 4
E 2 3
R S VD 32
W 8
R S VD 33
A T 2 6
RS V D 2 5
B 1 8
R S VD 44
A P 3 5
RS V D 1 0
F 2 3
RS V D 5
AJ 2 6
VA X G_ VA L _ S E NS E
AJ 3 1
VS S AX G_ VA L _ S E N S E
AH3 1
VCC _ VA L _S E NS E
AJ 3 3
VS S _ V AL _ S E NS E
AH3 3
K E Y
B 1
V C C_ DI E _ S E N S E
A H 2 7
VCC I O_ S E L
A 1 9
R S VD 54
A N 3 5
R S VD 55
A M 3 5
CF G 6
CF G 5
11: (Def aul t ) x16 - Devi ce 1 f unct i ons 1 and 2 di sabl ed
10: x8, x8 - Devi ce 1 f unct i on 1 enabl ed ; f unct i on 2 di sabl ed
01: Reser ved - ( Devi ce 1 funct i on 1 di sabl ed ; f uncti on 2 enabl ed)
00: x8, x4,x4 - Devi ce 1 f unct i ons 1 and 2 enabled
CFG[ 6: 5]
R 92 *1 K _ 0 4
PCI E Por t Bi f urcat i on St raps
R 99 *1 K _ 0 4
On CRB
H_SNB_I VB#_PWRCTRL =l ow, 1. 0V
H_SNB_I VB#_PWRCTRL =hi gh/ NC, 1. 05V
PEGDEFER TRAI NI NG
1: ( Defaul t ) PEG Tr ai n i mmedi at ely f oll owi ng xxRESETB de asser t i on
0: PEGWai t f or BIOS f or t r ai ni ng
CFG7
R 93 *1 K _ 0 4 CF G 7
3 . 3V [ 2, 3 , 1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 19 , 2 0 , 22 , 2 3 , 2 6, 2 8 , 3 0, 3 1 , 3 3 , 34 , 3 5 ]
10/29
CF G 2
CFG2
CF G 4
CFG Straps for Processor
PEGSt at i c Lane Rever sal - CFG2 i s f or t he 16x
1:( Def aul t ) Nor mal Operat i on; Lane #
def i ni ti on mat ches socket pi n map def ini t i on
0:Lane Reversed
Di spl ay Por t Presence St rap
1:( Def aul t ) Di sabl ed; No Physi cal Di spl ay Por t
att ached t o Embedded Di spl ay Por t
0:Enabled; An ext er nal Di spl ay Por t devi ce is
connected t o t he Embedded Di spl ay Por t
CFG4
R 11 0 *1 K _ 0 4
R 11 1 *1 K _ 0 4
H_ CP U _ RS V D 1
H_ CP U _ RS V D 4
H_ CP U _ RS V D 3
H_ CP U _ RS V D 2
10/29
CF G 7
CF G 4
CF G 2
CF G 6
CF G 0
CF G 5
10/29
1 . 5V [3 , 6 , 9, 1 0 , 2 0, 2 6 , 2 8 , 31 , 3 3 ]
( RESERVED )
V R E F _ CH _A _ D I MM
V R E F _ CH _B _ D I MM
R3 9 1 * 10 m i l _ 0 4
3 . 3 V R 39 2 10 K _ 0 4
H _S N B_ I VB #_P W RC TR L
Sheet 8 of 43
CPU 7/7
(RESERVED)
Schematic Diagrams
B - 10 DDR3 SO-DIMM_0
B
.
S
c
h
e
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a
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i
c

D
i
a
g
r
a
m
s
DDR3 SO-DIMM_0

C6 1
1u _ 6 . 3V _X5 R_ 0 4
C 84
1 u _6 . 3 V_ X5R _ 04
C5 5
1 0u _ 6 . 3V _X5 R_ 0 6
C 7 0
1 u _ 6. 3 V_ X5 R_ 0 4
C 64
1 0 u_ 1 0 V_ Y 5 V_ 08
C5 7
1 0u _ 1 0 V_Y 5 V_ 08
C4 6
1 u_ 6 . 3 V_ X5 R _ 04
C 4 0
1 u _ 6 . 3V_ X5 R_ 0 4
1 . 5 V
C1 0 3
1 u_ 6 . 3 V_ X5R _ 04
C 9 2 1 u _6 . 3 V_ X5R _ 04
C 2 3 0 . 1 u_ 1 0 V_ X5 R _0 4
C 1 11
1 0 u _6 . 3 V_ X5R _ 06
C 9 1 0 . 1 u_ 1 0 V_ X5 R _0 4
C 4 7
0 . 1 u _ 10 V_ X5 R_ 0 4
1 . 5V
C5 2
0. 1 u _ 1 0V_ X5 R_ 0 4
C8 6
0 . 1u _ 1 0V _X5 R_ 0 4
C5 0
0 . 1u _ 1 0V _X5 R_ 0 4
C3 7
0 . 1 u_ 1 0 V_ X5 R _0 4
C 49
0 . 1 u_ 1 0 V_ X5 R _0 4
C5 1
0 . 1 u_ 1 0 V_ X5 R _0 4
C 8 2
0 . 1 u _ 10 V_ X5 R_ 0 4
C 4 8
0 . 1 u _1 0 V_ X5R _ 04
C6 8
0. 1 u _ 1 0V_ X5 R_ 0 4
+C3 4 7
5 6 0 u_ 2 . 5 V_ 6 . 6* 6 . 6* 5 . 9
SO-DIMM A
1 . 5 VS [1 9 , 29 , 3 1 ]
M _ A_ DQ 2
M _ A_ DQ 1
M _ A_ DQ 31
M _ A_ DQ 30
M _ A_ DQ 29
M _ A_ DQ 4
M _ A_ DQ 3
M _ A_ DQ 37
M _ A_ DQ 36
M _ A_ DQ 35
M _ A_ DQ 34
M _ A_ DQ 33
M _ A_ DQ 32
M _ A_ DQ 43
M _ A_ DQ 42
M _ A_ DQ 41
M _ A_ DQ 40
M _ A_ DQ 39
M _ A_ DQ 38
M _ A_ DQ 47
M _ A_ DQ 46
M _ A_ DQ 45
M _ A_ DQ 44
M _ A_ DQ 52
M _ A_ DQ 51
M _ A_ DQ 28
M _ A_ DQ 50
M _ A_ DQ 49
M _ A_ DQ 5
M _ A_ DQ 48
M _ A_ DQ 55
M _ A_ DQ 54
M _ A_ DQ 53
M _ A_ DQ 61
M _ A_ DQ 60
M _ A_ DQ 58
M _ A_ DQ 57
M _ A_ DQ 56
M _ A_ DQ 6
M _ A_ DQ 8
M _ A_ DQ 7
M _ A_ DQ 59
M _ A_ DQ 63
M _ A_ DQ 62
M _ A_ DQ 14
M _ A_ DQ 13
M _ A_ DQ 12
M _ A_ DQ 11
M _ A_ DQ 9
M _ A_ DQ 17
M _ A_ DQ 16
M _ A_ DQ 15
M _ A_ DQ 21
M _ A_ DQ 10
M _ A_ DQ 19
M _ A_ DQ 18
M _ A_ DQ 25
M _ A_ DQ 24
M _ A_ DQ 23
M _ A_ DQ 0
M _ A_ DQ 22
M _ A_ DQ 20
M _ A_ DQ 27
M _ A_ DQ 26
CHANGE TO STANDARD
C 1 06
1 u _ 6 . 3V_ X5 R_ 0 4
C1 0 4
1u _ 6 . 3 V_X5 R_ 0 4
VT T _ ME M
C1 0 5
1 u_ 6 . 3 V_ X5 R _0 4
R1 2 4 *1 0K _0 4
J DI M M2 A
D DR S K -2 04 0 1 -T R5 B
A0
9 8
A1
9 7
A2
9 6
A3
9 5
A4
9 2
A5
9 1
A6
9 0
A7
8 6
A8
8 9
A9
8 5
A1 0 / AP
1 0 7
A1 1
8 4
A1 2 / BC#
8 3
A1 3
1 1 9
A1 4
8 0
A1 5
7 8
DQ 0
5
DQ 1
7
DQ 2
15
DQ 3
17
DQ 4
4
DQ 5
6
DQ 6
16
DQ 7
18
DQ 8
21
DQ 9
23
DQ 1 0
33
DQ 1 1
35
DQ 1 2
22
DQ 1 3
24
DQ 1 4
34
DQ 1 5
36
DQ 1 6
39
DQ 1 7
41
DQ 1 8
51
DQ 1 9
53
DQ 2 0
40
DQ 2 1
42
DQ 2 2
50
DQ 2 3
52
DQ 2 4
57
DQ 2 5
59
DQ 2 6
67
DQ 2 7
69
DQ 2 8
56
DQ 2 9
58
DQ 3 0
68
DQ 3 1
70
DQ 3 2
12 9
DQ 3 3
13 1
DQ 3 4
14 1
DQ 3 5
14 3
DQ 3 6
13 0
DQ 3 7
13 2
DQ 3 8
14 0
DQ 3 9
14 2
DQ 4 0
14 7
DQ 4 1
14 9
DQ 4 2
15 7
DQ 4 3
15 9
DQ 4 4
14 6
DQ 4 5
14 8
DQ 4 6
15 8
DQ 4 7
16 0
DQ 4 8
16 3
DQ 4 9
16 5
DQ 5 0
17 5
DQ 5 1
17 7
DQ 5 2
16 4
DQ 5 3
16 6
DQ 5 4
17 4
DQ 5 5
17 6
DQ 5 6
18 1
DQ 5 7
18 3
DQ 5 8
19 1
DQ 5 9
19 3
DQ 6 0
18 0
DQ 6 1
18 2
DQ 6 2
19 2
DQ 6 3
19 4
BA0
1 0 9
BA1
1 0 8
RAS #
1 1 0
W E #
1 1 3
CAS #
1 1 5
S 0 #
1 1 4
S 1 #
1 2 1
CK E 0
7 3
CK E 1
7 4
CK 0
1 0 1
CK 0 #
1 0 3
CK 1
1 0 2
CK 1 #
1 0 4
S DA
2 0 0 S CL
2 0 2 S A1
2 0 1 S A0
1 9 7
DM 0
1 1
DM 1
2 8
DM 2
4 6
DM 3
6 3
DM 4
1 3 6
DM 5
1 5 3
DM 6
1 7 0
DM 7
1 8 7
DQ S 0
1 2
DQ S 1
2 9
DQ S 2
4 7
DQ S 3
6 4
DQ S 4
1 3 7
DQ S 5
1 5 4
DQ S 6
1 7 1
DQ S 7
1 8 8
DQ S 0 #
1 0
DQ S 1 #
2 7
DQ S 2 #
4 5
DQ S 3 #
6 2
DQ S 4 #
1 3 5
DQ S 5 #
1 5 2
DQ S 6 #
1 6 9
DQ S 7 #
1 8 6
OD T 0
1 1 6
OD T 1
1 2 0
BA2
7 9
C 10 1
1 u _6 . 3 V_ Y 5 V_ 0 4
R 9 4 1 K _ 1 %_ 0 4
R1 0 3
1K _ 1 % _ 04
J D I MM 2B
D DR S K -2 0 40 1 -T R5 B
VD D1
7 5
VD D2
7 6
VD D3
8 1
VD D4
8 2
VD D5
8 7
VD D6
8 8
VD D7
9 3
VD D8
9 4
VD D9
9 9
VD D1 0
1 0 0
VD D1 1
1 0 5
VD D1 2
1 0 6
VD DS P D
1 9 9
N C1
7 7
N C2
1 2 2
N CT E S T
1 2 5
VR E F _ DQ
1
VS S 1
2
VS S 2
3
VS S 3
8
VS S 4
9
VS S 5
1 3
VS S 6
1 4
VS S 7
1 9
VS S 8
2 0
VS S 9
2 5
VS S 1 0
2 6
VS S 1 1
3 1
VS S 1 2
3 2
VS S 1 3
3 7
VS S 1 4
3 8
VS S 1 5
4 3
V S S 1 6
44
V S S 1 7
48
V S S 1 8
49
V S S 1 9
54
V S S 2 0
55
V S S 2 1
60
V S S 2 2
61
V S S 2 3
65
V S S 2 4
66
V S S 2 5
71
V S S 2 6
72
V S S 2 7
12 7
V S S 2 8
12 8
V S S 2 9
13 3
V S S 3 0
13 4
V S S 3 1
13 8
V S S 3 2
13 9
V S S 3 3
14 4
V S S 3 4
14 5
V S S 3 5
15 0
V S S 3 6
15 1
V S S 3 7
15 5
V S S 3 8
15 6
V S S 3 9
16 1
V S S 4 0
16 2
V S S 4 1
16 7
V S S 4 2
16 8
V S S 4 3
17 2
V S S 4 4
17 3
V S S 4 5
17 8
V S S 4 6
17 9
V S S 4 7
18 4
V S S 4 8
18 5
V S S 4 9
18 9
V S S 5 0
19 0
V S S 5 1
19 5
V S S 5 2
19 6
G 2
GN D2 G 1
GN D1
VT T 2
20 4 VT T 1
20 3
VR E F _ CA
1 2 6
R E S E T #
3 0 E VE N T #
1 9 8
VD D1 3
1 1 1
VD D1 4
1 1 2
VD D1 6
1 1 8 VD D1 5
1 1 7
VD D1 7
1 2 3
VD D1 8
1 2 4
3 . 3 VS
3 . 3 VS
1. 5 V
1. 5V
VT T _ ME M
M_ A_ RAS # [4 ]
M _ A_ BS 1 [4 ]
M_ A_ CL K _ D DR 1 [4 ]
M_ A_ CL K _ D DR #1 [4 ]
DD R3 _ DR AMR S T # [3 , 1 0 ]
M _ A_ ODT 1 [4 ]
M _ A_ BS 0 [4 ]
M_ A_ W E # [4 ]
M_ A_ CAS # [4 ]
M _ A_ CK E 0 [4 ]
M_ A_ CL K _ D DR 0 [4 ]
VT T _M E M [10 , 3 3 ]
M _ A_ ODT 0 [4 ]
M _ A_ DQ [63 :0 ] [4 ]
M _ A_ CK E 1 [4 ]
M _ A_ BS 2 [4 ]
3 . 3 VS [3 , 1 0, 11 , 1 2 , 13 , 1 4 , 1 5, 16 , 1 7 , 18 , 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 29 , 3 0 , 31 , 3 6 ]
M_ A_ CL K _ D DR #0 [4 ]
M _ A_ CS #1 [4 ]
M_ A_ DQ S [7 : 0 ] [4 ]
T S #_D I MM 0 _1 [2 , 1 0 ]
M _ A_ CS #0 [4 ]
M_ A_ A[1 5 : 0] [4]
M _A_ D QS #[7 : 0 ] [4 ]
1 . 5 V [3 , 6, 8 , 1 0 , 2 0, 26 , 2 8 , 31 , 3 3 ]
S A1 _ DI M 1 [10 ]
S A1 _D I M1
S A0 _D I M0
S A1 _D I M0
CL OSE TO S O- DIMM_0
S A0 _ DI M 1 [10 ]
S A0 _D I M1
R N2
1 0 K _ 8P 4 R _0 4
1
2
3
4 5
6
7
8
3 . 3 VS
MVR E F _ DI M 0
20 mi ls
R4 1 * 0_ 0 4
MVR E F _ DI M 0
M VRE F _D Q_ D I MM A [8 ]
S MB _C L K [ 10 , 1 4 ]
S MB_ D AT A [1 0 , 1 4 ]
+
C3 7 0
*2 2 0 u_ 4 V_ V_ A
S A0_ D I M0
S A1_ D I M0
M _ A_ A8
M _ A_ A9
M _ A_ A2
M _ A_ A3
M _ A_ A4
M _ A_ A6
M _ A_ A5
M _ A_ A7
M _ A_ A13
M _ A_ A14
M _ A_ A15
M _ A_ A0
M _ A_ A1
M _ A_ A10
M _ A_ A12
M _ A_ A11
M _ A_ DQ S 1
M _ A_ DQ S 0
M _ A_ DQ S 2
M _ A_ DQ S 4
M _ A_ DQ S 3
M _ A_ DQ S 5
M _ A_ DQ S 6
M _ A_ DQ S #1
M _ A_ DQ S #0
M _ A_ DQ S 7
M _ A_ DQ S #4
M _ A_ DQ S #3
M _ A_ DQ S #2
M _ A_ DQ S #5
M _ A_ DQ S #7
M _ A_ DQ S #6
C1 0 2
0 . 1 u_ 1 6 V_ Y 5 V_ 04
C 2 4 1 u _6 . 3 V_ X5R _ 04
Sheet 9 of 43
DDR3 SO-DIMM_0
Schematic Diagrams
DDR3 SO-DIMM_1 B - 11
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
DDR3 SO-DIMM_1

MV R E F _ DI M 1
CHANGE TO STANDARD
SO-DIMM B
M_ B_ D Q3 1
M_ B_ D Q4 6
M_ B_ D Q2 4
M_ B_ D Q5 6
M_ B_ D Q2 8
M_ B_ D Q1 1
M_ B_ D Q1
M_ B_ D Q1 6
M_ B_ D Q2 3
M_ B_ D Q6 1
M_ B_ D Q1 3
M_ B_ D Q4 0
M_ B_ D Q5 4
M_ B_ D Q6 2
M_ B_ D Q5 8
M_ B_ D Q5 0
M_ B_ D Q4 1
M_ B_ D Q5 7
M_ B_ D Q3 7
M_ B_ D Q6 0
M_ B_ D Q2
M_ B_ D Q5
M_ B_ D Q2 5
M_ B_ D Q3 0
M_ B_ D Q2 7
M_ B_ D Q4 4
M_ B_ D Q1 7
M_ B_ D Q3
M_ B_ D Q7
M_ B_ D Q9
M_ B_ D Q3 4
M_ B_ D Q5 9
M_ B_ D Q3 5
M_ B_ D Q3 6
M_ B_ D Q4 7
M_ B_ D Q4 3
M_ B_ D Q3 8
C2 5 0 . 1 u _1 0 V_ X5R _ 04
M_ B_ D Q6 3
M_ B_ D Q3 3
M_ B_ D Q4 2
M_ B_ D Q8
M_ B_ D Q1 5
M_ B_ D Q4
M_ B_ D Q2 6
M_ B_ D Q4 5
M_ B_ D Q4 8
M_ B_ D Q5 5
M_ B_ D Q2 9
M_ B_ D Q1 0
M_ B_ D Q5 2
M_ B_ D Q5 3
C 1 07
1 u _ 6. 3 V _ X5 R_ 0 4
C1 0 9
1u _ 6 . 3V _X5 R_ 0 4
M_ B_ D Q1 2
C 43
0 . 1 u _1 0 V_ X5 R _0 4
M_ B_ D Q6
M_ B_ D Q1 9
M_ B_ D Q1 8
M_ B_ D Q0
C1 0 8
1 u _6 . 3 V _ X5R _0 4
VT T _ ME M
M_ B_ D Q2 1
M_ B_ D Q2 0
M_ B_ D Q3 9
M_ B_ D Q4 9
M_ B_ D Q5 1
M_ B_ D Q1 4
M_ B_ D Q2 2
M_ B_ D Q3 2
R 42 * 0 _0 4
M _ B _ B 5
M _ B _ B 1
M _ B _ B 2
M _ B _ B 3
M _ B _ B 4
M _ B _ B 6
M _ B _ B 9
M _ B _ B 10
M _ B _ B 11
M _ B _ B 13
M _ B _ B 12
M _ B _ B 0
20mil s
M _ B _ B 14
M _ B _ B 7
M _ B _ B 8
S A 1 _ DI M 1
J DI M M1 B
DD RS K -2 0 4 01 -T R 9D
V DD 1
7 5
V DD 2
7 6
V DD 3
8 1
V DD 4
8 2
V DD 5
8 7
V DD 6
8 8
V DD 7
9 3
V DD 8
9 4
V DD 9
9 9
V DD 10
1 0 0
V DD 11
1 0 5
V DD 12
1 0 6
V DD S P D
1 9 9
NC1
7 7
NC2
1 2 2
NCT E S T
1 2 5
V RE F _ D Q
1
V S S 1
2
V S S 2
3
V S S 3
8
V S S 4
9
V S S 5
1 3
V S S 6
1 4
V S S 7
1 9
V S S 8
2 0
V S S 9
2 5
V S S 1 0
2 6
V S S 1 1
3 1
V S S 1 2
3 2
V S S 1 3
3 7
V S S 1 4
3 8
V S S 1 5
4 3
VS S 1 6
4 4
VS S 1 7
4 8
VS S 1 8
4 9
VS S 1 9
5 4
VS S 2 0
5 5
VS S 2 1
6 0
VS S 2 2
6 1
VS S 2 3
6 5
VS S 2 4
6 6
VS S 2 5
7 1
VS S 2 6
7 2
VS S 2 7
1 27
VS S 2 8
1 28
VS S 2 9
1 33
VS S 3 0
1 34
VS S 3 1
1 38
VS S 3 2
1 39
VS S 3 3
1 44
VS S 3 4
1 45
VS S 3 5
1 50
VS S 3 6
1 51
VS S 3 7
1 55
VS S 3 8
1 56
VS S 3 9
1 61
VS S 4 0
1 62
VS S 4 1
1 67
VS S 4 2
1 68
VS S 4 3
1 72
VS S 4 4
1 73
VS S 4 5
1 78
VS S 4 6
1 79
VS S 4 7
1 84
VS S 4 8
1 85
VS S 4 9
1 89
VS S 5 0
1 90
VS S 5 1
1 95
VS S 5 2
1 96
G2
GN D2 G1
GN D1
V T T 2
2 04 V T T 1
2 03
V RE F _ C A
1 2 6
RE S E T #
3 0 E VE NT #
1 9 8
V DD 13
1 1 1
V DD 14
1 1 2
V DD 16
1 1 8 V DD 15
1 1 7
V DD 17
1 2 3
V DD 18
1 2 4
J DI M M1 A
DD RS K -20 4 0 1-T R 9D
A 0
9 8
A 1
9 7
A 2
9 6
A 3
9 5
A 4
9 2
A 5
9 1
A 6
9 0
A 7
8 6
A 8
8 9
A 9
8 5
A 1 0/A P
1 0 7
A 1 1
8 4
A 1 2/B C #
8 3
A 1 3
1 1 9
A 1 4
8 0
A 1 5
7 8
D Q0
5
D Q1
7
D Q2
1 5
D Q3
1 7
D Q4
4
D Q5
6
D Q6
1 6
D Q7
1 8
D Q8
2 1
D Q9
2 3
D Q1 0
3 3
D Q1 1
3 5
D Q1 2
2 2
D Q1 3
2 4
D Q1 4
3 4
D Q1 5
3 6
D Q1 6
3 9
D Q1 7
4 1
D Q1 8
5 1
D Q1 9
5 3
D Q2 0
4 0
D Q2 1
4 2
D Q2 2
5 0
D Q2 3
5 2
D Q2 4
5 7
D Q2 5
5 9
D Q2 6
6 7
D Q2 7
6 9
D Q2 8
5 6
D Q2 9
5 8
D Q3 0
6 8
D Q3 1
7 0
D Q3 2
1 2 9
D Q3 3
1 3 1
D Q3 4
1 4 1
D Q3 5
1 4 3
D Q3 6
1 3 0
D Q3 7
1 3 2
D Q3 8
1 4 0
D Q3 9
1 4 2
D Q4 0
1 4 7
D Q4 1
1 4 9
D Q4 2
1 5 7
D Q4 3
1 5 9
D Q4 4
1 4 6
D Q4 5
1 4 8
D Q4 6
1 5 8
D Q4 7
1 6 0
D Q4 8
1 6 3
D Q4 9
1 6 5
D Q5 0
1 7 5
D Q5 1
1 7 7
D Q5 2
1 6 4
D Q5 3
1 6 6
D Q5 4
1 7 4
D Q5 5
1 7 6
D Q5 6
1 8 1
D Q5 7
1 8 3
D Q5 8
1 9 1
D Q5 9
1 9 3
D Q6 0
1 8 0
D Q6 1
1 8 2
D Q6 2
1 9 2
D Q6 3
1 9 4
B A0
1 0 9
B A1
1 0 8
RAS #
1 1 0
W E #
1 1 3
CAS #
1 1 5
S 0 #
1 1 4
S 1 #
1 2 1
CK E 0
7 3
CK E 1
7 4
CK 0
1 0 1
CK 0 #
1 0 3
CK 1
1 0 2
CK 1 #
1 0 4
S DA
2 0 0 S CL
2 0 2 S A1
2 0 1 S A0
1 9 7
DM 0
1 1
DM 1
2 8
DM 2
4 6
DM 3
6 3
DM 4
1 3 6
DM 5
1 5 3
DM 6
1 7 0
DM 7
1 8 7
DQ S 0
1 2
DQ S 1
2 9
DQ S 2
4 7
DQ S 3
6 4
DQ S 4
1 3 7
DQ S 5
1 5 4
DQ S 6
1 7 1
DQ S 7
1 8 8
DQ S 0#
1 0
DQ S 1#
2 7
DQ S 2#
4 5
DQ S 3#
6 2
DQ S 4#
1 3 5
DQ S 5#
1 5 2
DQ S 6#
1 6 9
DQ S 7#
1 8 6
OD T0
1 1 6
OD T1
1 2 0
B A2
7 9
R 98
1 K _ 1% _ 0 4
C4 1 6
1u _ 6 . 3V _Y 5 V_0 4
R 97 1 K _ 1% _ 0 4
C LOSE TO SO-DI MM_1
1 . 5 V
M _ B _ B 15
1 . 5V
VTT _ ME M
3. 3 V S
DD R3 _ DR A MR S T # [3 , 9 ]
3 . 3V S [3 , 9 , 1 1, 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 6 ]
M_ B_ DQ [6 3:0 ] [4 ]
T S #_D I MM 0 _1 [2 , 9 ]
V T T_ M E M [9 , 3 3 ]
M _B _ B S 1 [4 ]
M_ B _ CL K _ DD R1 [4]
M _ B_B [15 :0 ] [4 ]
S MB_ CL K [9 , 1 4]
S MB _ DA T A [9 , 14 ]
M _ B _R A S # [4 ]
M _ B _W E # [4 ]
M _ B _C A S # [4 ]
M_ B _ CL K _ DD R#1 [4]
M _B _ B S 2 [4 ]
M _B _ C K E 0 [4 ]
M_ B _ CL K _ DD R0 [4]
M _B _ B S 0 [4 ]
M_ B _ CL K _ DD R#0 [4]
M _B _ C S #1 [4 ]
M _B _ C K E 1 [4 ]
M _B _ O DT 0 [4 ]
M _B _ O DT 1 [4 ]
M _B _ C S #0 [4 ]
M _B _D QS #[7 :0 ] [4 ]
M_ B_ D QS [7 :0 ] [4 ]
1 . 5V [3, 6 , 8 , 9 , 2 0, 2 6 , 2 8 , 31 , 3 3 ]
M _ B _ DQS 2
M _ B _ DQS 1
M _ B _ DQS 0
M _ B _ DQS 7
M _ B _ DQS 6
M _ B _ DQS 5
M _ B _ DQS 4
M _ B _ DQS 3
M _ B _ DQS #5
M _ B _ DQS #4
M _ B _ DQS #3
M _ B _ DQS #2
M _ B _ DQS #1
M _ B _ DQS #0
M _ B _ DQS #7
M _ B _ DQS #6
1 . 5V S [1 9 , 29 , 3 1 ]
Lay out Note:
S O- DIMM_1 i s plac ed far ther fr om the GMC H t han S O- DIMM_0
C4 4
1 u _6 . 3 V _ X5R _0 4
C 39
1 u _6 . 3 V _ X5R _ 04
C8 3
1u _ 6 . 3 V_X 5 R_ 0 4
1 . 5 V
C 7 6
1 u _ 6. 3V _ X5 R_ 0 4
1 . 5V
C7 5
0. 1 u _ 10 V_ X 5 R_ 0 4
S A1_ D I M1 [9 ]
S A0_ D I M1 [9 ]
MVR E F _ DI M 1
S A 0 _ DI M 1
C4 2
0. 1 u _ 10 V _ X 5 R_ 0 4
MVR E F _ DQ_ D I MM B [8]
C4 5
0 . 1u _ 1 0 V _X 5 R_ 0 4
C 88 0 . 1u _ 1 0V _X 5 R_ 0 4
C3 8
0 . 1u _ 1 0V _X 5 R_ 0 4
C4 1 5
0 . 1u _ 1 6V _Y 5 V _0 4
C 35
0 . 1 u_ 1 0 V _ X5 R _0 4
C7 8
10 u _ 10 V_ Y 5V _ 0 8
C3 7 9
1 0u _ 1 0V _Y 5 V _0 8
C 3 80
1 0 u _1 0 V_ Y 5 V _ 0 8
C 8 5
0 . 1 u _ 10 V _ X 5R _ 04
C3 6
0. 1u _ 1 0V_ X 5 R_ 0 4
C7 3
1 u_ 6 . 3 V _ X5 R _0 4
C2 6 1 u _ 6. 3 V _ X 5 R_ 0 4
C1 1 0
1 u_ 6 . 3 V_ X5 R _0 4
C8 1
0 . 1 u_ 1 0 V _ X5 R_ 0 4
C 89 1 u_ 6 . 3 V _ X5 R _0 4
C1 1 2
10 u _ 6 . 3V_ X 5 R_ 0 6
C 4 1
0 . 1 u _1 0 V _ X 5R _ 04
Sheet 10 of 43
DDR3 SO-DIMM_1
Schematic Diagrams
B - 12 LVDS, Inverter
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LVDS, Inverter
Sheet 11 of 43
LVDS, Inverter

D P _ TX P 2 [2 ]
DP _ T XN 2 [2]
M UX_ 1P
R 60 7
1 M_ 0 4
R 37 0
1 0 0K _ 0 4
DP _ A UXN [2 ]
Q4 9
*M TN 7 00 2 ZHS 3
G
D
S
D P _ A UXP [2 ]
M UX_ 1N
Q 43
*AO 34 1 5
G
D S
E M B _H P D
I N V _BL O N
L V DS -L0 N
L VDS -L 2 P
L VDS -L 2 N
L V DS -L0 P
J _L C D2
8 7 21 6 -3 00 6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
1 0
10
1 1
11
1 2
12
1 3
13
1 4
14
1 5
15
1 6
16
1 7
17
1 8
18
1 9
19
2 0
20
2 1
21
2 2
22
2 3
23
2 4
24
2 5
25
2 6
26
2 7
27
2 8
28
2 9
29
3 0
30
VL E D
P _ DD C_ DA T A
C 52 0
0 . 1 u_ 1 6 V _Y 5V _0 4
B R I GHT N E S S
L V DS -L1 P
L V DS -L1 N
2A
L V DS -LC LK P
L V DS -LC LK N
P _ DD C_ CL K
V I N
C 5 19
4 . 7 u _1 0 V _ Y 5 V_ 08
Q 45
*AO 34 1 5
G
D S
MU X _0 P
MU X _0 N
J _ L CD1
* 8 72 1 6-4 0 0 6
1
3
5
7
9
1 1
1 3
1 5
1 7
1 9
2 1
2 3
2 5
2 7
2 9
3 1
3 3
3 5
3 7
3 9
2
4
6
8
1 0
1 2
1 4
1 6
1 8
2 0
2 2
2 4
2 6
2 8
3 0
3 2
3 4
3 6
3 8
4 0 G
1
G
1
G
2
G
2
3 . 3 VS [3, 9 , 1 0 , 12 , 1 3 , 14 , 1 5, 16 , 1 7, 1 8 , 1 9, 2 0 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 6]
BRI G HT NE S S [ 27 ]
L V DS -U CL K N [1 6 ]
S Y S 1 5V [3 1, 3 2 , 3 4]
VI N [3 0, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 6, 3 7 , 3 8]
3 . 3 V [2 , 3 , 8 , 13 , 1 4, 15 , 1 7, 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 6, 2 8 , 3 0, 3 1 , 3 3, 3 4 , 3 5]
L V DS -L 1 N [1 6 ]
L V DS -L 1 P [1 6 ]
V L E D
I N V _ B LO N
L VDS -L 0 P
L VDS -L 0 N
L VDS -L 1 N
INVERTER CONNECTOR
L VDS -L CL K P
L VDS -L CL K N
L VDS -L 1 P
R2 8 0
*1 M_ 0 4
L V DS -U CL K P [1 6 ]
L V D S -L2 P [1 6 ]
L V D S -L2 N [16 ]
U1 6 B
7 4L VC 08 P W
4
5
6
1
4
7
C 2 14
* 0 . 1u _ 10 V_ Y 5 V_ 0 4
R2 66 *1 0 0K _0 4
MU X _2 N
M UX_ 1N
M UX_ 1P
U1 6 D
7 4L VC 08 P W
12
13
1 1
1
4
7
11/03
L VDS -L 2 N
I N V _B L O N
MU X _2 P
U1 6C
74 L VC0 8 P W
9
1 0
8
14
7
U1 6 A
7 4L VC 08 P W
1
2
3
1
4
7
P _ DD C_ DA T A
L VDS -L 2 P
B R I GH TN E S S
D P _ TX P 3 [2 ]
DP _ T XN 3 [2]
3 . 3 V
3. 3 V
3. 3 V 3. 3 V
P _ DD C_ CL K
L V D S -L CL K N [1 6]
L VDS -L 0 P [1 6 ]
LV D S -L 0N [1 6]
L I D_ S W # [2 7, 3 0 ]
B L ON [1 6 ]
AL L _ S Y S _ P W R GD [1 5, 2 7 , 3 6]
M UX_ 0N
L V D S -L CL K P [1 6]
B K L_ E N [2 7 ]
S B _B L O N [1 8]
PLVDD
HI LVDS:3.3V 3A
HI eDP:3.3V 3A
LOW eDP;5V 3A
.
L2
* HC B 16 0 8 K F -1 21 T 25
C5 1 7
0.1
u
_
50
V
_
Y
5
V
_
06
Q4 7
P 20 0 3 E VG
4
6 2
5
7 3
1
8
Q4 8
MT N7 0 02 ZH S 3
G
D
S
11/3
N B _E NA VD D
C 58 7
* 0. 1 u _ 50 V_ Y 5 V_ 0 6
BLO N
2A
P _ D DC_ D ATA [ 16 ]
3A
RN1 2 0 _ 8P 4 R _0 4 1
2
3
4 5
6
7
8
1A
RN1 3 0 _ 8P 4 R _0 4 1
2
3
4 5
6
7
8
3 . 3 V S
P L V DD _S E L
P L VDD
V I N
R2 6 8 * 10 0 K _ 04
RN1 4 * 0_ 8 P 4 R_ 04 1
2
3
4 5
6
7
8
M UX_ 0P
40Pi n
5 V S [1 2, 1 9 , 2 0, 2 5 , 2 9, 3 0 , 3 1, 3 6 , 3 7]
L V D S -U2 N [16 ]
LV D S -U2 P [1 6 ] 3A
P _ D DC_ C LK [1 6 ]
M UX_ 2N
30Pin
R9
2 . 2K _ 0 4
R1 0
2 . 2 K _0 4
R5 8 1
*1 0 0K _0 4
30Pin & 40 Pi n Co-layout--LED
PANEL.
R2 6 7 1 0 0K _0 4
5VS
R5 7 9 0 _ 06
R 6 08
*
2
00
_
1%
_
0
4
DP _ T XN 1 [2 ]
>100 mil
>100 mil
>100mil >100 mil
BK L _E N
C5 4 3
0
.1u
_
1
6V
_
Y
5
V
_
0
4
C5 4 5
1
0u
_
10
V
_
Y
5
V
_
08
P L V DD
C 54 2
0
.1
u_
1
6
V
_Y
5
V
_
0
4
Q 42
M T N7 00 2 ZHS 3
G
D
S
R2 4 4
1 00 K _ 0 4
R5 7 8 3 3 0 K _0 4
C5 4 4 0 . 1 u _1 6 V _ Y 5 V _ 04
Q 4 1
AO 34 1 5
G
D S
N B _ E NA VD D [1 6 , 2 7]
3 . 3 V S
M UX_ 2P
Q4 4
*M T N7 00 2 Z HS 3 G
D
S
D P _ TXP 1 [2 ]
L V D S -U0 N [16 ]
LV D S -U0 P [1 6 ]
E MB _ HP D [2]
3A
LVD S -U1 P [1 6 ]
LVD S -U1 N [1 6 ]
5 VS
PLVDD_SEL
HI ? 5V 3A
LOW ? 3.3V 3A
3A
E M B _H P D
R5 8 0
*1 0 0 K _0 4
DP _ T XN 0 [2 ]
C5 1 8
0. 1 u _ 16 V_ Y 5 V_ 0 4
D P _ TXP 0 [2 ] RN1 5 * 0_ 8 P 4 R_ 04 1
2
3
4 5
6
7
8
1A
C2 1 3
0 . 1 u_ 1 6V _Y 5V_ 0 4
P L VD D_ S E L
P L V D D
3 . 3 V S
P L VDD _S E L
3. 3 V S
PANEL CONNECTOR
2A
3 . 3 V S
R5 77
*1
00
K
_
0
4
Schematic Diagrams
HDMI, CRT B - 13
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
HDMI, CRT
Sheet 12 of 43
HDMI, CRT

HDMI B_ D0BN [1 6]
HDMI B_ D1BN [1 6]
HDMI B_ D2BN [1 6]
HDMI B_ CLK BN [1 6]
HDMI B_ D1BP [1 6]
HDMI B_ D2BP [1 6]
HDMI B_ CLK BP [1 6]
HDMI B_ D0BP [1 6]
J _ CRT1
10 8AH15 F ST 04 A1CC
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
G
N
D
2
G
N
D
1
HDMI B_DATA2 N
RE D
HDMI B_DATA0 N
DDCDAT A
HDMI B_DAT A1 P
DDCL K
TM DS_ DATA0#
VS Y NC
24 mil
HDMI B_DAT A0 P
HDMI B_E XT 1_ S CL
HS Y NC
GRN
BLUE
TM DS_ DATA2
HDMI B_E XT1 _S DA
HDMI _H PD-C
TM DS_ DATA2#
HDMI _C EC
C
7
10
00
p_
50
V_
X
7R
_0
4
C
1
5
1
000
p_
50
V_
X
7R
_
04
C
11
22
0p
_50
V
_N
P
O
_0
4
C
9
2
20
p_
50
V_
N
PO
_04
HDMI B_E XT1_ S CL
HDMI B_DAT A1 N
C
1
7
*
10
p_5
0V
_
N
PO
_
04
C
18
10
p_
50
V_
N
P
O
_0
4
C
1
4
1
0p
_50
V
_N
P
O
_0
4
C
13
*10
p_
50
V_
N
P
O
_0
4
C
2
1
*1
0p
_5
0V
_N
P
O
_
04
HDMI PORT
C
19
10
p_5
0V
_
N
PO
_
04
HDMI B_DAT A0 P
HDMI B_DAT A0 N
P I N 4 9=GND
R37 2 3 3_0 4
R37 3 3 3_0 4
J _H DMI1
C12 81 7-11 9A5 -L
S HI EL D2
2
TMDS DATA1+
4
TMDS DATA1-
6
S HI EL D0
8
TMDS CLO CK+
1 0
TMDS CLO CK-
1 2
RE SE RVE D
1 4
S DA
1 6
+5 V
1 8
TMDS DATA2+
1
T MDS DAT A2 -
3
S HI E LD1
5
TMDS DATA0+
7
T MDS DAT A0 -
9
CLK S HIE L D
1 1
CE C
1 3
S CL
1 5
DDC/ CE C GND
1 7
HOT P LUG DE TE CT
1 9
G
N
D
G
N
D
1
G
N
D
G
N
D
2
G
N
D
G
N
D
3
G
N
D
G
N
D
4
CRT PORT
DDCL K
HDMI B_ DATA1N
HDMI _ HPD-C
3. 3 VS
HDMI B_ CLOCK N
HDMI B_E XT1_ S DA
PS8101 ( 6-03-08101-032) PI N TO PI N
C349
10u _1 0V_Y 5 V_0 8
U33
TP D7S 0 19
VCC_ SY NC
1
VCC_ VI DE O
2
VIDE O_ 1
3
VIDE O_ 2
4
VIDE O_ 3
5
GND
6
VCC_ DDC
7
BY P
8
DDC_OUT 1
9
DDC_ I N1
10
DDC_ I N2
11
DDC_OUT 2
12
S Y NC_ IN1
13
S Y NC_OUT 1
14
S Y NC_ IN2
15
S Y NC_OUT 2
16
C
31
2
0.22
u_
10
V_
Y
5V
_0
4
C
3
13
0.2
2u
_1
0V
_Y
5V
_
04
C
3
11
0
.22u
_1
0V
_Y
5
V_
04
3 . 3VS
5VS
3. 3VS
T MDS _CL OCK
CRT_ HS Y NC
U5
S N75 DP 139
IN_ D1+
3 9
IN_ D1-
3 8
IN_ D2+
4 2
IN_ D2-
4 1
IN_ D3+
4 5
IN_ D3-
4 4
IN_ D4+
4 8
IN_ D4-
4 7
SCL
9
SDA
8
HPD
7
OE#
2 5
DCC_E N#
3 2
RT_E N#
1 0
PC0
3
PC1
4
REXT
6
GND[6 ]
27
QE_ 2
3 5 OE_ 1
3 4
OUT_D 1+
22
OUT _D1 -
23
OUT_D 2+
19
OUT _D2 -
20
OUT_D 3+
16
OUT _D3 -
17
OUT_D 4+
13
OUT _D4 -
14
S CL _S I NK
28
S DA_S I NK
29
HP D_S I NK
30
VCC[1 ]
2
VCC[2 ]
11
VCC[3 ]
15
VCC[4 ]
21
VCC[5 ]
26
VCC[6 ]
33
VCC[7 ]
40
VCC[8 ]
46
GND[1 ]
1
GND[2 ]
5
GND[3 ]
12
GND[4 ]
18
GND[5 ]
24
GND[7 ]
31
GND[8 ]
36
GND[9 ]
37
GND[10 ]
43 GND
4 9
3. 3VS
DDCDATA
HDMI B_DAT A2 P
CRT_ VSY NC
RE D
BLUE
GRN
HS Y NC
VS Y NC
. L7 0_ 04
HDMI B_CL OCK P
HDMI B_DAT A2 N
HDMI B_CL OCK N
. L6 0_ 04
6- 19- 31001- 264
. L4 0_ 04
DAC_HS Y NC [16 ]
DAC_ VS Y NC [16 ] C
16
22p
_5
0V
_
N
PO
_
04
C
12
22
p_
50
V_
N
P
O
_0
4
C
2
0
2
2p
_5
0V
_N
P
O
_0
4
TM DS_ DATA0
5VS [1 1, 19 , 20 , 25, 2 9, 3 0, 31 , 36 ,3 7]
C30
0. 1 u_ 16V_ Y 5V_0 4
3. 3 VS [3, 9 ,1 0, 1 1, 13 , 14 , 15, 1 6, 1 7, 18 , 19 ,2 0, 2 3, 24 , 25 , 27, 2 8, 2 9, 30 , 31 ,3 6]
HDMI B_DAT A2 P
. L5 FCM1 00 5MF -60 0T 01
. L8 FCM1 00 5MF -60 0T 01
. L3 FCM1 00 5MF -60 0T 01
FOR I NTEL GRAPHI C
? ? ?
DAC_DDC ACL K [16 ]
DAC_DDC ADATA [16 ]
DCC_E N#
HDMI _CT RLCL K
HDMI _CT RLDATA
P C1
D AC_ GRE EN [16 ]
D AC_ RE D [16 ]
M_P ORTB_ HPD#_R
D AC_ BL UE [16 ]
R
1
4
1
50
_1
%
_0
4
R
13
15
0_
1%
_04
R
15
150
_1
%
_
04
P C0
P C1
R6 8 *0_ 04
R3 96 4. 02 K _1% _0 4
R5 1 *4. 7 K_ 04
R 52 4. 7 K_ 04
R 395 *4. 7 K_ 04
R 54 4. 7 K_ 04
R6 1 *4. 7 K_ 04 3 . 3VS
R5 3 *4. 7 K_ 04
3. 3VS
HDMI _CT RLCL K [1 6]
3. 3 VS
DCC _E N#
HDMI _CT RLDATA [1 6]
P C0
R70 *0_ 04
R69 *0_ 04
C31
0. 1 u_ 16V_ Y 5V_0 4
T MDS _DATA1 R72 *0_ 04
R71 *0_ 04
HDMI B_E XT1_ S DA
RD1
*BAV9 9 RE CTI F I ER
A C
A
C
HDMI _ HPD-C
RD3
*BAV9 9 RE CTI F I E R
A C
A
CRD2
*BAV99 RECT I FI E R
A C
A
C
For ESD
5 VS _ HDMI
HDMI B_E XT1_ S CL
R4 03
2.2K
_
04
R404
2.2
K
_04
10/28
R40 1 1 _0 4 5 VS _ HDMI _I N R4 00 1_ 04
5VS _HDMI 5VS
C3 39
0. 1 u_ 16 V_ Y 5V_ 04
T MDS _DATA1 #
T MDS _CLO CK#
10/29
R 55 10 0K _ 04
RN1
2. 2 K _8P 4 R_0 4 8
1
7
2
65
34
PORT C_HP D [16 ]
R65 *0_ 04
R64 *0_ 04
R66 *0_ 04
6-20-14X30-015
R67 *0_ 04
L 11
*W CM20 12 F 2S -SHORT
1
4
2
3
L9
*W CM20 12 F 2S -SHORT
1
4
2
3 HDMI B_ CLOCK P
HDMI B_ DATA1P
L1 2
*W CM20 12 F2 S -SHORT
1
4
2
3
T MDS _DATA1#
C33 8
0. 1 u_ 16V_ Y 5V_0 4
T MDS _CL OCK #
R39 8 * 10 mi l _0 4
C3 48
1 0u _1 0V_Y 5 V_ 08
5 VS
L1 0
*W CM20 12 F2 S -SHORT
1
4
2
3
T MDS _DATA1
C3 40
0. 1 u_ 16 V_ Y 5V_ 04
T MDS _CLO CK
Schematic Diagrams
B - 14 CougarPoint - M 1/9
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 1/9

RN 16
0_ 8 P 4 R_ 0 4
1
2
3
4 5
6
7
8
11/05
HD A_ BI T CL K _ MDC [2 8 ]
HD A_ S Y N C_ MD C [2 8 ]
HD A _R S T #_ M DC [2 8]
HD A_ S DO _M DC [2 8 ]
S P I _ CS 1 #
H DA_ RS T #_ R H DA_ RS T #_ R
S RT C_ R S T#
3. 3 VS
BIOS ROM
SATA HDD
R2 9 4
*3 . 3 K _ 1% _ 0 4
SPI_* = 1.5"~6.5"
H DA_ S Y NC [2 9]
H DA_ RS T # [2 9 ]
32Mbit
HD A_ S DO UT [2 9]
HD A_ BI TC L K [2 9]
3 . 3 VS _ S P I
R2 9 1
*3 . 3 K _ 1% _ 0 4
S P I _W P #
S P I _H OL D #
Flash Descriptor Security Overide
U 1 7
* P CT 2 5 VF 0 32 B
P CB F oo tp ri nt =M -S OP 8B
CE #
1
S O
2
W P #
3
VS S
4
S I
5
S CK
6
H OL D#
7
VD D
8
HDA_SDOUT
SATA ODD
VDD 3
R T C VCC
HIGH = Enable
LOW = Disable
3. 3 VS
3. 3 VS
R 4 45 *1 0 K _ 0 4
G P I O2 1
S AT A_ L E D#
R 1 83 1 0K _0 4
Zo= 5 0O? 5%
R T CVC C
1. 0 5 VS
1. 0 5 VS
20mil
10mil
20mil
P C H_ J T AG_ T MS
S P I _ CS 0 #_R
RT C_ RS T#
R TC _ X2
P C H_ J T AG_ T DI
CougarPoint - M
(HDA,JTAG,SATA)
P C H_ J T AG_ T DO
S P I _ S CL K _ R
S P I _ S I
N O REB OO T ST RA P: HD A_ SP KR Hi gh E na bl e
iTPM ENABLE/DISABLE
T PM FU NC TI ON :S PI_ SI H ig h Ena bl e
HD A_ S P K R
R T C_ VB AT 1
H DA_ S P K R
S P I _ S I _ R
11/04
R TC CL EA R
S AT A_ L E D# [2 8 ]
R5 3 8 * 1 0K _ 0 4
HD A_ S P K R [2 9 ]
H DA_ S D I N1 [ 28 ]
H DA_ S D I N0 [ 29 ]
S ATA _L E D #
R2 3 5 3 3 0 K _0 4
S P I _ S O_ R
R 47 6
1 K _ 0 4
3 . 3 VS
R 4 78
1 0 M_ 0 4
NC 1
*N C_ 0 4
R 1 68 1 0K _0 4
R 2 36
1 M _0 4
LP C _ AD0 [2 3 , 27 ]
S A T AI C OMP
S E R I RQ
J O P E N1
*OP E N_ 1 0m i l -1M M
1
2LP C _ AD1 [2 3 , 27 ]
R 19 5 *1 K _ 0 4
R 16 7 *1 K _ 0 4
X 1 3
MC -30 6 _ 32 . 7 6 8K Hz
1
4 3
2
R 1 7 2 3 7. 4 _ 1 % _0 4
LP C _ AD2 [2 3 , 27 ]
R4 7 7
2 0K _1 % _ 04
R2 3 7
2 0K _1 % _ 04
3 . 3 V [2 , 3, 8, 1 1 , 1 4, 1 5 , 1 7 , 18 , 1 9 , 20 , 2 2 , 2 3, 2 6 , 2 8, 30 , 3 1 , 33 , 3 4 , 3 5]
LP C _ AD3 [2 3 , 27 ]
3 . 3 VS [3 , 9 , 10 , 1 1 , 1 2, 1 4 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 20 , 2 3 , 2 4, 2 5 , 2 7, 28 , 2 9 , 30 , 3 1 , 3 6]
V DD3 [2 2, 24 , 2 7 , 31 , 3 2 , 3 8]
NO REBOOT STRAP
3 . 3 A_ 1. 5 A_ H DA_ I O [20 ]
5 V S [11 , 1 2 , 1 9, 2 0 , 2 5, 29 , 3 0 , 31 , 3 6 , 3 7]
LP C _ F RAM E # [23 , 2 7 ]
1 . 0 5 VS [ 14 , 1 5 , 19 , 2 0 , 3 4]
S E R I R Q [2 3 , 2 7]
S ATA TX N 0 [2 5 ]
S ATA RXP 0 [2 5]
S ATA RXN0 [2 5 ]
S ATA TX P 0 [2 5 ]
R 4 3 2 7 50 _ 1 %_ 0 4
R 1 7 1 4 9. 9 _ 1 % _0 4
BBS _ BI T 0 [1 7]
R BI A S _ S AT A 3
R T C_ VBAT _ 1
C
A
A
D 1 7
BA T5 4 CS 3
1
2
3
S P I _ S CL K
G P I O 21
P CH _I N T VR M E N
S M_ I NT R UD E R #
S P I _ S O
S P I _ S I
S P I _ CS 0 #
S A T A3 CO MP
P C H_ J T AG_ T CK _ B U F
RT C_ X1
R 20 9
1 0 0_ 1 % _ 04
R 21 8
2 1 0_ 1 % _0 6
R 23 8
2 1 0_ 1 % _0 6
R 22 3
2 1 0_ 1 % _ 06
R 21 1
1 0 0_ 1 % _0 4
R4 5 8 5 1 _0 4
R 45 9
10 0 _ 1% _ 0 4
3. 3 V
P C H_ J T AG_ T CK _ BUF
P CH_ J T AG_ T MS
P CH_ J T AG_ T DO
P CH_ J T AG_ T DI
R
T
C
I
H
D
A
S
A
T
A
L
P
C
S
P
I
J
T
A
G
S
A
T
A

6
G
U 3 7A
Co u g ar P oi n t_ Re v _ 1p 0
R T CX1
A 2 0
R T CX2
C2 0
I NT V R ME N
C1 7
I NT R U DE R #
K 2 2
HD A _ BCL K
N3 4
HD A _ S Y N C
L 3 4
HD A _ RS T #
K 3 4
HD A _ S DI N 0
E 3 4
HD A _ S DI N 1
G3 4
HD A _ S DI N 2
C3 4
HD A _ S DO
A 3 6
S A TAL E D #
P 3
F W H0 / L A D 0
C3 8
F W H1 / L A D 1
A3 8
F W H2 / L A D 2
B3 7
F W H3 / L A D 3
C3 7
L DR Q1 # / GP I O 2 3
K 3 6
F W H 4 / LF RAM E #
D3 6
L DRQ 0 #
E 3 6
R T CR S T #
D2 0
HD A _ S DI N 3
A 3 4
HD A _ DOC K _ E N# / G P I O3 3
C3 6
HD A _ DOC K _ RS T # / GP I O1 3
N3 2
S RT C RS T #
G2 2
S AT A0 R XN
AM3
S A TA0 R XP
AM1
S AT A0T XN
AP 7
S AT A0 T XP
AP 5
S AT A1 R XN
AM1 0
S A TA1 R XP
AM8
S AT A1T XN
AP 1 1
S AT A1 T XP
AP 1 0
S AT A2 R XN
AD7
S A TA2 R XP
AD5
S AT A2T XN
AH5
S AT A2 T XP
AH4
S AT A3 R XN
AB8
S A TA3 R XP
AB1 0
S AT A3T XN
AF 3
S AT A3 T XP
AF 1
S AT A4 R XN
Y 7
S A TA4 R XP
Y 5
S AT A4T XN
AD3
S AT A4 T XP
AD1
S AT A5 R XN
Y 3
S A TA5 R XP
Y 1
S AT A5T XN
AB3
S AT A5 T XP
AB1
S AT AI CO MP I
Y 1 0
S P I _ CL K
T 3
S P I _ CS 0 #
Y 1 4
S P I _ CS 1 #
T 1
S P I _ MO S I
V4
S P I _ MI S O
U 3
S A TA0 G P / GP I O 2 1
V1 4
S A TA1 G P / GP I O 1 9
P 1
J TAG _ TC K
J 3
J TAG _ TM S
H 7
J TAG _ TD I
K 5
J TAG _ TD O
H 1
S E RI RQ
V5
S P K R
T 1 0
S ATAI COM P O
Y 1 1
S AT A3 CO MP I
AB1 3
S AT A3 R COM P O
AB1 2
S AT A3 RBI AS
AH1
U S B 3 0_ S M I # [26 ]
H DA_ S Y N C_ R
3 . 3A_ 1 . 5 A_ HD A_I O
C4 6 5
1 u _6 . 3 V_ X5 R _0 6
10/29
S P I _ S O
S P I _ S C LK
S P I _ S I
S P I _ CS 0#
R 4 41 *3 3 _ 04
C2 0 6
1 u _6 . 3 V_ X5 R _0 6
3. 3 V
C4 6 8
1 8 p_ 5 0 V_ NP O _0 4
R 46 8 * 28 m i l_ 0 6
H DA_ BI T CL K _ R
R1 7 8 * 0 _0 4
HS P I _ M S O [2 7 ]
HS P I _ M S I [2 7]
HS P I _ S C L K [2 7]
C4 6 3
1 8 p_ 5 0 V_ NP O _0 4
S P I _ CS 0 #_ R
HS P I _ C E # [27 ]
R2 2 4 1 K _ 0 4
C 22 1
* 0. 1 u _ 16 V _ Y 5V_ 0 4
10/28
RT CV CC [15 , 2 0 ]
R 2 2 9
*1 0 K _ 04
3 . 3V S
3. 3 A_ 1 . 5 A _H DA_ I O
R2 6 9 *1 K _ 04
R 2 30
1 0 K _ 0 4
R5 3 9 0 _ 0 4
Bo a rd I D
Flash Descriptor
Security Overide
Low = Disabled-(Default)
High = Enabled
11/05
R N1 8
33 _ 8 P 4R _ 04
1
2
3
4 5
6
7
8
H DA_ S DO UT _ R
M E _W E [2 7 ]
D1 2 RB7 5 1S - 40 C2
A C
10/29
H DA_ S Y NC_ R
H DA_ BI T CL K _ R
H DA_ RS T#_ R
H DA_ S D OUT _ R
S A T ARXP 2 [2 5]
S A T ARXN2 [2 5 ]
R1 7 6 * 0 _0 4
S A T ATX P 2 [2 5 ]
S A T ATX N 2 [2 5 ]
R4 4 4 * 0 _0 4
X 12
*3
2
.7
68
K
H
z
1
4 3
2
2
J_RTC1
1
R N1 7
* 3 3_ 8 P 4 R_ 0 4
1
2
3
4 5
6
7
8
S P I _ S O_ R
S P I _ S I _ R
S P I _ S CL K _ R
J _R T C1
8 52 0 5 -02 7 0 1
1
2
C 4 66 1 u_ 6 . 3 V_ X5 R _0 6
Sheet 13 of 43
CougarPoint - M 1/9
Schematic Diagrams
CougarPoint - M 2/9 B - 15
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 2/9

3 G_ B_ CL K R Q#
BT _S B D#
P CI E CL K R Q0 #
R 1 5 0 *1 0 m i l _ 0 4
P CI E _ R XN 3 _ W L AN [ 22 ]
P CI E _ T XN3 _ W L A N [ 22 ]
P C I E _ RX N 4_ G L AN [2 4 ]
P C I E _ T XP 3_ W L A N [2 2 ]
P CI E _ R XP 3_ W L A N [ 22 ]
P C I E _ RX P 4 _ GL A N [2 4 ]
P CI E _T X P 4 _ GL A N [2 4 ]
P C I E _ T XN 4 _G L A N [2 4 ]
P CI E _ TX P 2 _ C
P CI E _ R XN 2 _ US B 3 0 [ 26 ]
P C I E _ T XN 2 _ US B 3 0 [2 6 ]
P CI E _ R XP 2_ U S B 3 0 [ 26 ]
P CI E _ TX N 2_ C
C 13 2 0 . 1 u _1 0 V_ X7R _ 0 4 P C I E _ T XP 2_ U S B 3 0 [2 6 ]
C 13 1 0 . 1 u _1 0 V_ X7R _ 0 4
C 14 2 0 . 1 u _1 0 V_ X7R _ 0 4
P CI E _ TX N 4_ C
P CI E _ TX P 4 _ C
C 14 3 0 . 1 u _1 0 V_ X7R _ 0 4
C 13 0 0 . 1 u _1 0 V_ X7R _ 0 4
C 12 9 0 . 1 u _1 0 V_ X7R _ 0 4
P CI E _ TX P 3 _ C
P CI E _ TX N 3_ C
S MB _D A T A
X11
X8A 02 5 0 0 0F G1 H_ 2 5 MH z
1
2
R 43 8
1 M _ 04
CL K _ B U F _ CP Y CL K _ N
C LK _E XP _P [3 ]
DR AM RS T _ CN T RL [3 , 8 ]
CougarPoint - M (PCI-E,SMBUS,CLK)
CL K _ DP _N [3 ]
CL K _ DP _P [3 ]
LA N_ CL K R E Q #
S ML 0 _ CL K
DR A MR S T _ CN T RL
S ML 0 _ DAT A
1 . 0 5VS
XT AL 2 5_ I N
T 71
C LK _P CI _ F B [ 17 ]
XT AL 2 5_ O UT
T 13
T 12
T 72
S MC _ CP U _ T HE R M
CL K _ B U F _ CP Y CL K _ P
P CI E CL K R Q2 #
P CI E CL K R Q2 # R 1 69 *1 0 K _ 04
100MHz
100MHz
3 . 3 V S
CL K _ B U F _ DO T9 6 _ N
S MD _ CP U _ T HE R M
C L K _ DP _ P _ R
C L K _ DP _ N _R
XC LK _R CO MP
L P D_ S P I _ I N T R#
1. 0 5 VS [1 3 , 15 , 1 9 , 2 0 , 34 ]
C L K _ P CI E _I C H
P CI E CL K R Q1 #
P CI E CL K R Q7 #
C L K _ P CI E _I C H#
C L K _ BUF _ C P Y C L K _ P
C L K _ BUF _ D OT 9 6 _P
C L K _ BUF _ D OT 9 6 _N
C L K _ BUF _ C P Y C L K _ N
L A N_ C LK RE Q #
R 1 75 10 K _ 0 4
90.9-O? %pul l up t o +VccI O
(1.05V, S0 rai l )cl ose t o
PCH
R4 3 7 9 0 . 9 _1 % _ 0 4
C L K _ S A T A
C L K _ S A T A#
R 2 39 *1 0 K _ 04
3 . 3 V
CL K _ B U F _ DO T9 6 _ P
33MHz
14.318MHz
96MHz
100MHz
100MHz
Only PC IECLKRQ[ 2:1]# on PCH are cor e w el l pow er ed.
Al l other PC IECLKRQx # ar e suspend w ell pow er ed.
W LA N_ CL K R E Q # [2 2 ]
C LK _E XP _N [3 ]
P E G _B _C L K RQ #
CL K _ P C I E _ GL A N # [2 4 ]
CL K _ P C I E _ MI N I [2 2]
C L K _P CI E _ M I NI # [2 2 ]
C L K _ P CI E _G L AN [2 4 ]
C L K _ BUF _ R E F 1 4
P CI E _ RXN1
S M B_ DAT A [9 , 1 0 ]
P CI E _ TX P 1
P CI E _ TX N 1
P CI E _ RXP 1
S M B_ CL K [9 , 1 0 ]
S MB _C L K
3. 3 V S [3, 9, 1 0 , 1 1 , 1 2, 1 3 , 1 5 , 1 6, 1 7 , 1 8 , 1 9, 20 , 2 3 , 2 4 , 25 , 2 7 , 2 8 , 29 , 3 0 , 3 1 , 36 ]
3. 3 V [2 , 3, 8, 1 1 , 1 3 , 1 5, 1 7 , 1 8 , 1 9, 20 , 2 2 , 2 3 , 26 , 2 8 , 3 0 , 31 , 3 3 , 3 4 , 35 ]
S M C_ CP U_ T HE R M [2 , 27 ]
P E G_ CL K R E Q #
S M D_ CP U_ T HE R M [2 , 27 ]
C4 4 7 22 p _ 5 0 V_N P O _0 4
C4 4 4 22 p _ 5 0 V_N P O _0 4
10/29
120MHz
R N9
2 . 2 K _ 8P 4R _ 04
1
2
3
4 5
6
7
8
S MB_ D A T A
S MB_ C L K
S ML 0 _ CL K
S ML 0 _ DAT A
P CI E CL K R Q2 #
CL K _ P C I E _ US B3 0 [2 6 ]
C LK _P CI E _ U S B3 0 # [2 6 ]
R 2 12 *1 0 K _ 04 P E G_ C L K RE Q #
R 5 41 *1 0 K _ 04
BT _ S BD # [2 2]
P C I E C LK RQ 2# [2 6 ]
R 2 62 *1 0 K _ 04 3G _ B_ CL K R Q#
100MHz
P CI E CL K R Q0 #
P CI E CL K R Q1 #
P E G_ C L K RE Q #
Lane 1 X
Lane 2 USB3.0
Lane 3 WLAN
Lane 4 GLAN / CARD READER
Lane 5 NEW CARD
Lane 6 X
Lane 7 X
Lane 8 X
Usage PCI-E x1
D GP U_ P R S NT #
CL K _ P C I E _ I CH
R 4 81 *1 0 K _ 04
CL K _ S AT A
CL K _ S AT A #
P E G_ B _ C L K RQ #
CL K _ B U F _ RE F 1 4 R 2 08 10 K _ 0 4
10/29
R N1 9
1 0 K _ 8P 4R _ 0 4
1
2
3
4 5
6
7
8
10/29
R 2 48 10 K _ 0 4
R 2 50 10 K _ 0 4
R 5 43 *1 0 K _ 04
BT _S B D#
LP D_ S P I _ I N T R#
R 2 19 *1 0 K _ 04
R 2 49 2. 2 K _ 0 4
R 2 56 2. 2 K _ 0 4 S MD _ CP U _ TH E R M
S MC _ CP U _ TH E R M
DR A MR S T _ CN TR L R 4 82 1K _ 0 4
CL K _ P C I E _ I CH #
P
C
I
-
E
*
C
L
O
C
K
S
F
L
E
X

C
L
O
C
K
S
S
M
B
U
S
C
o
n
t
r
o
l
l
e
r
L
i
n
k
U 3 7B
Co u g arP oi n t_ Re v _ 1 p 0
P E RN 1
B G 34
P E RP 1
BJ 34
P E RN 2
B E 34
P E RP 2
B F 34
P E RN 3
B G 36
P E RP 3
BJ 36
P E RN 4
B F 36
P E RP 4
B E 36
P E RN 5
B G 37
P E RP 5
B H 37
P E RN 6
BJ 38
P E RP 6
B G 38
P E RN 7
B G 40
P E RP 7
BJ 40
P E RN 8
B E 38
P E RP 8
B C 38
P E T N1
A V 32
P E T P 1
A U 32
P E T N2
B B 32
P E T P 2
A Y 32
P E T N3
A V 34
P E T P 3
A U 34
P E T N4
A Y 34
P E T P 4
B B 34
P E T N5
A Y 36
P E T P 5
B B 36
P E T N6
A U 36
P E T P 6
A V 36
P E T N7
A Y 40
P E T P 7
B B 40
P E T N8
AW 38
P E T P 8
A Y 38
C L K OU T _ P CI E 0N
Y 40
C L K OU T _ P CI E 0P
Y 39
A B 49
A B 47
A A 48
A A 47
Y 37
Y 36
Y 43
Y 45
V 45
V 46
C L K I N_ G ND 1_ N
B J 3 0
CL K I N _G ND 1 _ P
B G 3 0
C L K I N _D MI _ N
B F 1 8
CL K I N _ DM I _ P
B E 1 8
C LK I N_ D OT _ 96 N
G 24
C L K I N _D OT _ 9 6 P
E 2 4
C L K I N_ S AT A_ N
A K 7
CL K I N _ S A T A_ P
A K 5
XT A L 2 5_ I N
V 4 7
XT A L 25 _ OU T
V 4 9
R E F C LK 14 I N
K 4 5
C LK I N_ P C I L OO P BAC K
H 45
CL K O UT _ P E G_ A _ N
A B3 7
CL K O UT _ P E G _ A_ P
A B3 8
P E G _A _C L K RQ # / GP I O4 7
M 10
P CI E C L K RQ 0 # / GP I O7 3
J 2
M1
V 10
A8
L 12
L 14
CL K O UT F L E X 0 / GP I O6 4
K 4 3
F 4 7
H 47
K 4 9
C L K OU T _D MI _ N
A V2 2
CL K O UT _ DM I _ P
A U 2 2
P E G_ B _ C LK RQ # / GP I O 5 6
E 6
C L K OU T _ P E G_ B_ P
A B 40 C L K OU T _ P E G_ B_ N
A B 42
XC L K _ RC OM P
Y 47
C LK O U T_ D P _ P
A M 1 3 CL K O UT _ DP _ N
A M 1 2
V 40
V 42
K 12
V 38
V 37
C L K OU T _ I T P XD P _ N
A K 14
C L K OU T _ I T P XD P _ P
A K 13
S MBA LE RT # / GP I O1 1
E 1 2
S MBC L K
H 14
S M BD AT A
C 9
S M L 0A LE RT # / GP I O6 0
A 1 2
S M L0 C L K
C 8
S M L0 D AT A
G 12
S M L1 AL E R T # / P CH H OT # / GP I O7 4
C 13
S M L1 C LK / GP I O5 8
E 1 4
S ML 1 D ATA / GP I O7 5
M 16
C L _C L K 1
M 7
C L _D AT A1
T 1 1
CL _ RS T 1 #
P 1 0
T 13
CL _ RS T#1
CL _ CL K 1
CL _ DA TA1
CL _ CL K 1 [2 2 ]
CL _ RS T#1 [2 2 ]
CL _ DA TA 1 [22 ]
R 5 40 *1 0 K _ 04
X1
*X8 A 0 25 0 0 0 F G1 H _2 5 M Hz
1
23
4
R 4 63 *1 0 K _ 04
P CI E CL K R Q7 #
R1 3 2 1 0K _ 0 4
R1 3 4 1 0K _ 0 4
DG P U_ P R S N T#
R2 4 0 1 0K _ 0 4
R2 3 2 1 0K _ 0 4
R 1 5 4 *1 0 m i l _ 0 4
Sheet 14 of 43
CougarPoint - M 2/9
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 3/9

R2 7 0 1 0 K _ 04
P M_ P CH _ P W R OK [27 ]
S Y S _ RE S E T #
11/03
R 26 1 1 0K _0 4
D
M
I
F
D
I
S
y
s
t
e
m

P
o
w
e
r

M
a
n
a
g
e
m
e
n
t
U3 7 C
Co u g a rP oi n t_ Re v _ 1 p 0
DM I 0 RXN
BC 2 4
DM I 1 RXN
BE 2 0
DM I 2 RXN
BG 1 8
DM I 3 RXN
BG 2 0
DM I 0 RXP
BE 2 4
DM I 1 RXP
BC 2 0
DM I 2 RXP
BJ 1 8
DM I 3 RXP
BJ 2 0
DM I 0 TXN
AW 2 4
DM I 1 TXN
AW 2 0
DM I 2 TXN
BB1 8
DM I 3 TXN
AV1 8
DM I 0 TXP
AY 2 4
DM I 1 TXP
AY 2 0
DM I 2 TXP
AY 1 8
DM I 3 TXP
AU 1 8
DM I _ ZCO MP
BJ 2 4
DM I _ I RC OM P
BG 2 5
F DI _ RXN 0
BJ 14
F DI _ RXN 1
AY 1 4
F DI _ RXN 2
BE 1 4
F DI _ RXN 3
BH1 3
F DI _ RXN 4
BC1 2
F DI _ RXN 5
BJ 12
F DI _ RXN 6
BG1 0
F DI _ RXN 7
BG9
F DI _ R XP 0
BG1 4
F DI _ R XP 1
BB1 4
F DI _ R XP 2
BF 1 4
F DI _ R XP 3
BG1 3
F DI _ R XP 4
BE 1 2
F DI _ R XP 5
BG1 2
F DI _ R XP 6
BJ 10
F DI _ R XP 7
BH9
F DI _ F S Y NC 0
AV1 2
F DI _ F S Y NC 1
BC1 0
F DI _ L S Y NC 0
AV1 4
F DI _ L S Y NC 1
BB1 0
F DI _ I N T
AW 1 6
P MS Y NC H
AP 1 4
S L P _ S US #
G1 6
S L P _ S 3 #
F 4
S L P _ S 4 #
H4
S L P _ S 5 # / GP I O 6 3
D1 0
S Y S _ R E S E T #
K 3
S Y S _ P W RO K
P 1 2
P W R BTN #
E 2 0
RI #
A1 0
W AK E #
B9
S U S _ S T AT # / GP I O 6 1
G8
S U S C LK / GP I O 6 2
N1 4
ACP R E S E N T / GP I O 3 1
H 2 0
BAT L OW # / G P I O7 2
E 1 0
P W R OK
L 2 2
CL K R UN # / GP I O 3 2
N3
S US W ARN #/ S US P W RD NAC K / GP I O3 0
K 1 6
RS M RS T #
C 2 1
DR AMP W RO K
B1 3
S LP _L AN # / GP I O 2 9
K 1 4
AP W R OK
L 1 0
D P W R OK
E 2 2
DM I 2 RBI AS
BH 2 1
S L P _A #
G1 0
DS W VRM E N
A1 8
S US A CK #
C 1 2
R 27 8 *1 0 K _ 0 4
RS MR S T #
S US _ P W R _ ACK [2 7]
AC _P RE S E N T [17 , 2 7 ]
P CI E _W AK E # [2 2 , 24 , 2 6 ]
C 5 89 *0 . 1 u _ 16 V_ Y 5V _0 4
3. 3 V [2 , 3 , 8, 11 , 1 3 , 1 4, 1 7 , 1 8 , 19 , 2 0 , 2 2, 2 3 , 2 6 , 28 , 3 0 , 3 1, 33 , 3 4 , 3 5]
VTT _ ME M [9 , 1 0 , 3 3]
1. 0 5 VS [1 3 , 1 4, 19 , 2 0 , 3 4]
3. 3 VS [3 , 9 , 10 , 1 1 , 1 2, 13 , 1 4 , 1 6, 1 7 , 1 8 , 19 , 2 0 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 30 , 3 1 , 3 6]
RT CVC C [1 3 , 2 0]
DD R_ 1 . 0 5 VS _ P W RG D
P M_ M P W RO K
1 . 0 5 VS _ VT T_ E N
U 1 5B
7 4 L VC0 8 P W
4
5
6
1
4
7
U 15 C
7 4 L VC0 8 P W
9
1 0
8
1
4
7
U 15 A
7 4 LV C0 8 P W
1
2
3
14
7
3 . 3 V
DD R1 . 5 V_ P W RG D [3 3]
3 . 3 V 3 . 3 V
1 . 8 VS _ P W R GD [3, 33 ]
0 . 8 5 VS _ P W R GD [ 35 ]
1 . 0 5 VS _ VT T _E N [3 4 ]
1. 0 5 VS _ P W R GD [3 4]
R2 1 3 *1 0 mi l _ 04
ON
AL L _S Y S _ P W R GD [1 1 , 27 , 3 6 ]
P M_ P CH _ P W RO K [27 ]
R2 5 3
1 0 K _0 4
R 23 4 * 1 0m i l _0 4
U 1 5D
7 4 L VC0 8 P W
12
13
1 1
1
4
7
D E L AY _P W RG D [3 6]
3 . 3 V
S Y S _ P W R OK S Y S _ P W R _O K
S L P _ S 5 #
R 54 5
1 0 K _ 04
R 54 4 1 0K _0 4
S 4 _ S T AT E # [2 3]
S U S _ P W R_ AC K
S U S _ P W R _A CK R 48 3 1 0K _0 4
F D I _ TXP 7 [2 ]
AC_ P R E S E NT
R4 7 2 3 30 K _ 0 4
R4 7 9 *3 3 0 K _ 04
DSWODVREN - On Die DSW VR Enable
LOW Disabled
CougarPoint -M (DMI,FDI,GPIO)
AC _ P RE S E NT
R4 2 2 75 0 _ 1% _ 0 4
P C I E _ W AK E #
HI Enabled (DEFAULT)
P M _ CL K RU N#
3. 3 VS
1 . 0 5V S
D S W OD VR E N
S U S CL K
D P W RO K
P M _ CL K R UN # R 44 7 8 . 2 K _0 4
P M_ BAT L OW #
3. 3VS
R TC VCC
3. 3V
P M _ S L P _ LAN #
DMI _R XP 1 [ 2]
DMI _R XP 3 [ 2]
DMI _R XP 0 [ 2]
DMI _R XN1 [ 2]
DMI _R XN2 [ 2]
DMI _R XP 2 [ 2]
D MI _ T XP 0 [2 ]
DMI _R XN3 [ 2]
DMI _R XN0 [ 2]
D MI _ T XP 2 [2 ]
D MI _ T XP 3 [2 ]
P C I E _ W AK E #
DMI _T XN1 [ 2]
DMI _T XN3 [ 2]
DMI _T XN0 [ 2]
D MI _ T XP 1 [2 ]
DMI _T XN2 [ 2]
H _ P M_ S Y NC [3 ]
R S MR S T # [27 ]
P W R_ BT N# [2 7 ]
P M_ DR AM_ P W RG D [3 ]
S W I # [2 7 ]
P W R _ BT N#
P W R_ BT N#
S L P _ A#
S L P _ S U S #
S Y S _ P W RO K
S U S C # [ 27 , 3 3 ]
S U S B# [2 6 , 2 7, 3 1 ]
F D I _ LS Y NC 0 [2 ]
F D I _ F S Y N C1 [2 ]
S W I #
F D I _ LS Y NC 1 [2 ]
F D I _ F S Y N C0 [2 ]
F D I _ I NT [2 ]
F D I _ TXP 4 [2 ]
F D I _ TXP 6 [2 ]
P M_ P CH _ P W R OK _ R
F D I _ TXP 3 [2 ]
F D I _ TXP 1 [2 ]
F D I _ TXP 5 [2 ]
F D I _ TXN 0 [ 2]
F D I _ TXP 0 [2 ]
F D I _ TXP 2 [2 ]
F D I _ TXN 3 [ 2]
F D I _ TXN 6 [ 2]
F D I _ TXN 1 [ 2]
F D I _ TXN 7 [ 2]
F D I _ TXN 5 [ 2]
F D I _ TXN 2 [ 2]
F D I _ TXN 4 [ 2]
R2 5 7 * 1 0m i l _0 4
R 45 3 1 0 K _ 0 4
R S MR S T #
R 24 6 8 . 2 K _0 4
S US _ P W R _ ACK
R 25 2 *1 0 K _ 0 4
R4 2 3 49 . 9 _ 1% _ 0 4
R 48 6 1 0K _0 4
R 24 7 *1 0 K _ 0 4
P M _ BAT L OW #
DM I _2 R BI AS
R 48 5 1 0K _0 4
S W I # P M _ S LP _L AN #
D S W O DVR E N
DM I _C OM P _ R
P M_ MP W RO K
P M _ CL K R UN # [ 23 ]
Sheet 15 of 43
CougarPoint - M 3/9
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 4/9

DA C_ BL U E
NEAR PCH EMI
DA C_ R E D
DA C_ G RE E N
C 1 8 8
* 3 3p _ 5 0 V_ N P O_ 0 4
C 1 6 9
* 3 3p _ 5 0 V_ N P O_ 0 4
C 1 9 6
* 3 3p _ 5 0 V_ N P O_ 0 4
DAC _ RE D [ 12 ]
DAC _ GR E E N [ 12 ]
DAC _ B L U E [ 12 ]
Ver : 1. 0
pul l up 2. 2K
R1 5 3 *1 0 m i l _0 4
DA C_ G RE E N
DA C_ BL U E
DA C_ R E D
L VD S _ I B G
H DM I B_ D 0B N_ C
H DM I B_ D 0B P _ C
L _ C T RL _ CL K
H DM I B_ D 1B N_ C
H DM I B_ D 2B N_ C
L _ C T RL _ DA T A
R1 8 7 1 5 0_ 1 % _ 0 4
R1 9 2 1 5 0_ 1 % _ 0 4
5 V S [ 11 , 1 2 , 1 9 , 2 0 , 2 5 , 2 9, 30 , 3 1 , 3 6 , 3 7 ]
R2 0 0 1 5 0_ 1 % _ 0 4
C 1 2 7 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 2 6 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 3 7 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 3 8 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 4 1 0 . 1 u _1 0 V_ X 7 R _0 4
DA C_ I R E F
C 1 2 5 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 4 0 0 . 1 u _1 0 V_ X 7 R _0 4
C 1 2 4 0 . 1 u _1 0 V_ X 7 R _0 4
H DM I B_ C LK BN_ C
H DM I B_ C LK BP _ C
P C H_ D DP C_ H P D
R1 6 5 1K _1 % _ 0 4
R1 7 0 2 . 3 7K _ 1% _ 0 4
Connect to GND
H DM I B _ D 1 B P [1 2 ]
CougarPoint -M
(LVDS,DDI,CRT)
D
i
s
p
l
a
y

P
o
r
t

D
D
i
s
p
l
a
y

P
o
r
t

B
D
i
s
p
l
a
y

P
o
r
t

C
3 . 3 VS
3 . 3 VS
R 2 7 1 2 . 2 K _0 4
S
D
V
O
R 2 7 2 2 . 2 K _0 4
P _D D C_ C L K [1 1 ]
NB_ E NAV DD [1 1, 27 ]
P _ D DC _ D AT A [1 1 ]
H DM I _ C TR L DA T A [1 2 ]
LV DS - LC L K N [1 1 ]
L V D S -L C L K P [1 1 ]
B L ON [1 1 ]
L VD S -L 1 N [1 1 ]
L VD S -L 1 P [1 1 ]
L VD S -L 2 N [1 1 ]
L VD S -L 0 N [1 1 ]
L VD S -L 2 P [1 1 ]
L VD S -L 0 P [1 1 ]
D AC _ DD CA DAT A [1 2 ]
D AC _D D CA CL K [1 2 ]
H DM I _ C TR L CL K [1 2 ]
H DM I B _ D 0 B N [1 2 ]
DAC _ V S Y N C [ 12 ]
DAC _ H S Y N C [ 12 ]
H DM I B _ C L K BP [1 2]
H DM I B _ C L K BN [1 2 ]
H DM I B _ D 1 B N [1 2 ]
H DM I B _ D 2 B P [1 2 ]
H DM I B _ D 2 B N [1 2 ]
H DM I B _ D 0 B P [1 2 ]
3 . 3 V S [3 , 9 , 1 0 , 1 1 , 1 2, 13 , 1 4 , 1 5 , 1 7 , 1 8 , 1 9, 20 , 2 3 , 2 4 , 2 5 , 2 7 , 2 8, 29 , 3 0 , 3 1 , 3 6 ]
P O RT C _ HP D [1 2 ]
L
V
D
S
D
i
g
i
t
a
l

D
i
s
p
l
a
y

I
n
t
e
r
f
a
c
e
C
R
T
U3 7 D
Co u g a rP o i n t_ R e v _ 1 p 0
L _ BK LT C T L
P 4 5
L _ BK LT E N
J 4 7
L _ C T RL _ CL K
T 4 5
L _ C T RL _ DA T A
P 3 9
L _ D DC _ CL K
T 4 0
L _ D DC _ DA TA
K 4 7
L _ VD D_ E N
M4 5
L V D S A_ C L K #
A K 3 9
L V D S A_ C L K
A K 4 0
L V D S A_ D AT A #0
A N4 8
A M4 7
A K 4 7
A J 4 8
L V D S A_ D AT A 0
A N4 7
L V D S A_ D AT A 1
A M4 9
L V D S A_ D AT A 2
A K 4 9
L V D S A_ D AT A 3
A J 4 7
L V D S B_ C L K #
A F 4 0
L V D S B_ C L K
A F 3 9
L V D S B_ D AT A #0
A H4 5
A H4 7
A F 4 9
A F 4 5
L V D S B_ D AT A 0
A H4 3
DD P B_ 0 N
A V 4 2
DD P B_ 1 N
A V 4 5
L V D _ VR E F H
A E 4 8
L V D _ VR E F L
A E 4 7
D D P D_ 2 N
B F 4 2
D D P D_ 3 N
B J 4 2
DD P B_ 2 N
A U 4 8
DD P B_ 3 N
A V 4 7
D D P C_ 0 N
A Y 4 7
D D P C_ 1 N
A Y 4 3
D D P C_ 2 N
B A 4 7
D D P C_ 3 N
B B 4 7
D D P D_ 0 N
B B 4 3
D D P D_ 1 N
B F 4 4
D DP B_ 0 P
A V 4 0
D DP B_ 1 P
A V 4 6
DD P D _ 2 P
B E 4 2
DD P D _ 3 P
B G 4 2
D DP B_ 2 P
A U 4 7
D DP B_ 3 P
A V 4 9
L V D S B_ D AT A 1
A H4 9
L V D S B_ D AT A 2
A F 4 7
L V D S B_ D AT A 3
A F 4 3
L V D _ I BG
A F 3 7
L V D _ VB G
A F 3 6
DD P C _ 1 P
A Y 4 5
DD P C _ 0 P
A Y 4 9
DD P C _ 2 P
B A 4 8
DD P C _ 3 P
B B 4 9
DD P D _ 0 P
B B 4 5
DD P D _ 1 P
B E 4 4
C R T_ BL U E
N4 8
C R T_ D DC _ C LK
T 3 9
C R T_ D DC _ D AT A
M4 0
C R T_ G RE E N
P 4 9
C R T_ H S Y NC
M4 7
C R T_ I R T N
T 4 2
C R T_ R E D
T 4 9
C R T_ VS Y N C
M4 9
D AC _ I RE F
T 4 3
S DV O_ C T RL C L K
P 3 8
S DV O _ C TR L DA T A
M 3 9
D DP C_ C T RL C L K
P 4 6
D DP C _ C TR L DA T A
P 4 2
D DP D_ C T RL C L K
M 4 3
D DP D _ C TR L DA T A
M 3 6
D DP B _A UXN
A T 4 9
DD P C _A UXN
A P 4 7
DD P D _A UXN
A T 4 5
D D P B _ AU XP
A T 4 7
D DP C _ AU XP
A P 4 9
D DP D _ AU XP
A T 4 3
DD P B_ H P D
A T 4 0
D D P C_ H P D
A T 3 8
D D P D_ H P D
B H 4 1
S DV O_ T VC L K I N P
A P 4 5 S D VO _ T VCL K I NN
A P 4 3
S D V O _ S T AL L P
A M 4 0 S DV O_ S T AL L N
A M 4 2
S DV O_ I N T P
A P 4 0 S D VO _ I NT N
A P 3 9
R1 6 3 1 0 K _ 04
R2 1 5 1 0 K _ 04
L V D S -U 1 P [1 1 ]
L V D S -U 2 N [1 1 ]
L V D S -U 1 N [1 1 ]
L V D S -U 0 N [1 1 ]
L V D S -U CL K N [1 1 ]
L V D S -U 0 P [1 1 ]
L V D S -U 2 P [1 1 ]
L V D S -U CL K P [1 1 ]
Sheet 16 of 43
CougarPoint - M 4/9
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 5/9

BT PORT11
10/29
10/29
US B_ P P 1 [3 0 ]
US B_ P N1 [3 0 ]
US B_ P N0 [2 6 ]
FOR LAYOUT SWAP
US B_ P P 0 [2 6 ]
NEW CARD
US B_ P N5 [2 3 ]
CCD
P CL K _ T P M [2 3]
US B_ P P 5 [2 3 ]
P C L K _ TP M_ P C H R2 1 4 *2 2 _ 0 4
R2 2 5 * 1K _0 4
R 4 67 2 2 . 6 _1 % _ 0 4
MPC Swi t ch Cont rol
MPC ON - - 0
MPC OFF - - 1 DEFAULT
BBS _ BI T0 [1 3 ]
P L T _ RS T# [3 , 2 3 ]
P ME # [ 27 ]
I N T _P I RQ E #
S A T A _ O DD _ DA#
I N T _P I RQ H#
I N T _P I RQ G#
I N T _ P I RQ E #
C LK _P CI _ K B C _ R R2 6 0 2 2 _0 4
P C LK _K BC [2 7 ]
CL K _ P C I _ F B [1 4]
US B_ P P 2 [2 2 ]
US B_ P N2 [2 2 ]
P C I _ GN T #3
US B_ P N9 [3 0 ]
US B_ P P 4 [2 3 ]
US B_ P N4 [2 3 ]
3. 3V [2 , 3 , 8 , 1 1, 13 , 1 4 , 1 5 , 1 8, 1 9 , 2 0 , 2 2 , 23 , 2 6 , 2 8 , 3 0, 31 , 3 3 , 3 4 , 3 5]
3 . 3 V S [3, 9, 1 0 , 1 1 , 1 2 , 13 , 1 4 , 1 5 , 1 6, 18 , 1 9 , 2 0 , 2 3, 2 4 , 2 5 , 2 7 , 28 , 2 9 , 3 0 , 3 1, 36 ]
US B_ P P 9 [3 0 ]
R 2 43 *1 K _ 0 4
I N T _P I RQ A#
R2 2 6 * 1 K _ 04
A C_ P R E S E N T [1 5 , 27 ]
C LK _P CI _ F B _ R R2 2 7 2 2 _0 4
U S B_ BI A S
BBS_BIT1 BBS_BIT0 Boot BIOS Location
0 0 LPC
0 1 Reserved (NAND)
1 0 PCI
1 1 SPI
3G
Boot BIOS Strap
I N T _P I RQ B#
P L T _ RS T #
USB PORT2 (AJ_USB1)
I N T _P I RQ D#
I N T _P I RQ C#
P C I _ GN T #3
R4 4 6 * 1 K _ 04
D G P U_ P W M_ S E L E C T #
BBS _B I T 1
D GP U _ HO L D_ R S T #
USB PORT0 (J_USB_1)
D _G P U _ P W R _E N#
D GP U _ S E L E C T#
WLAN
USB PORT1 (J_USB3_1; USB3.0)
LOW = PCI_GNT#3 swap override
PCI_GNT#3
Flash Descriptor security override strap
HIGH = Default
BBS _ BI T1
CougarPoint -M (PCI,USB,NVRAM)
U S B_ OC #4 5
U S B_ O C#0 1 [3 0 ]
U S B_ OC #6 7
U S B_ OC #2 3
U S B_ OC #0 1
U S B_ OC #8 9
U S B_ OC #1 4
U S B_ OC #1 01 1
U S B_ OC #1 21 3
U1 3
74 A H C1 G 0 8G W 1
2
5
4
3
P L T _R S T #
R2 4 5
1 00 K _ 0 4
C2 0 7 * 0 . 1u _ 1 6 V_ Y 5 V _ 0 4
BU F _ P L T _ RS T # [2 2 , 2 4 , 26 , 2 7 ]
3 . 3 V
PI N P LT_R ST# to B uff er
R2 3 3 * 0 _0 4
I NT _ P I R QD #
DG P U _P W M_ S E LE CT #
S A T A _ OD D _D A#
U S B_ O C#1 2 13
D GP U_ S E L E C T #
I N T _ P I RQ A#
D GP U_ H OL D_ R S T #
D_ G P U_ P W R_ E N #
I N T _P I RQ C#
I NT _ P I R QB#
U S B_ O C#0 1
I NT _ P I R QG #
U S B_ O C#2 3
U S B_ O C#6 7
U S B_ O C#4 5
U S B_ O C#1 4
I N T _P I RQ H#
U S B_ O C#8 9
U S B_ O C#1 0 11
R2 2 8 10 K _ 0 4
I N T _ P I RQ E #
R N6
1 0K _8 P 4 R _ 04
8 1
7 2
6
5
3
4
R N7
1 0K _8 P 4 R _ 04
8 1
7 2
6
5
3
4
R2 4 1 *1 0 K _ 0 4
S A TA _O D D_ DA # [2 5 ]
R2 5 1 10 K _ 0 4
R N5
1 0K _8 P 4 R _ 04
8 1
7 2
6
5
3
4
R N4
1 0K _8 P 4 R _ 04
8 1
7 2
6
5
3
4
R2 6 5 10 K _ 0 4
3 . 3 V S
3 . 3 V
R
S
V
D
P
C
I
U
S
B
U 37 E
C ou g a rP o i nt _R e v _ 1 p0
R S VD 2 3
A V5
R S V D 1
A Y 7
R S V D 2
A V7
R S V D 3
A U 3
R S V D 4
BG 4
R S V D 5
A T 1 0
R S V D 6
BC 8
R S V D 7
A U 2
R S V D 8
A T 4
R S VD 1 7
BB5
R S VD 1 8
BB3
R S VD 1 9
BB7
R S VD 2 0
BE 8
R S VD 2 1
BD 4
R S VD 2 2
BF 6
R S V D 9
A T 3
R S VD 1 0
A T 1
R S VD 1 1
A Y 3
R S VD 1 2
A T 5
R S VD 1 3
A V3
R S VD 1 4
A V1
R S VD 1 5
BB1
R S VD 1 6
BA3
R S VD 2 5
A T 8
R S VD 2 4
A V1 0
R S VD 2 6
A Y 5
R S VD 2 7
BA2
R S VD 2 8
A T 1 2
R S VD 2 9
BF 3
P I R QA #
K 4 0
P I R QB#
K 3 8
P I R QC #
H 3 8
P I R QD #
G 3 8
RE Q1 # / G P I O5 0
C 4 6
RE Q2 # / G P I O5 2
C 4 4
RE Q3 # / G P I O5 4
E 4 0
GN T 1 #/ GP I O 5 1
D 4 7
GN T 2 #/ GP I O 5 3
E 4 2
GN T 3 #/ GP I O 5 5
F 4 6
P I R QE # / G P I O 2
G 4 2
P I R QF # / G P I O 3
G 4 0
P I R QG # / GP I O4
C 4 2
P I R QH # / GP I O5
D 4 4
U S BP 0 N
C2 4
U S BP 0 P
A 2 4
U S BP 1 N
C2 5
U S BP 1 P
B2 5
U S BP 2 N
C2 6
U S BP 2 P
A 2 6
U S BP 3 N
K 2 8
U S BP 3 P
H2 8
U S BP 4 N
E 2 8
U S BP 4 P
D2 8
U S BP 5 N
C2 8
U S BP 5 P
A 2 8
U S BP 6 N
C2 9
U S BP 6 P
B2 9
U S BP 7 N
N2 8
U S BP 7 P
M2 8
U S BP 8 N
L 30
U S BP 8 P
K 3 0
U S BP 9 N
G3 0
U S BP 9 P
E 3 0
U S BP 1 0 N
C3 0
US BP 10 P
A 3 0
U S BP 1 1 N
L 32
US BP 11 P
K 3 2
U S BP 1 2 N
G3 2
US BP 12 P
E 3 2
U S BP 1 3 N
C3 2
US BP 13 P
A 3 2
P M E #
K 1 0
CL K O UT _ P C I 0
H 4 9
CL K O UT _ P C I 1
H 4 3
CL K O UT _ P C I 2
J 4 8
US BR BI A S #
C3 3
U S BR BI A S
B3 3
O C 0# / G P I O 5 9
A 1 4
O C 1# / G P I O 4 0
K 2 0
O C 2# / G P I O 4 1
B1 7
O C 3# / G P I O 4 2
C1 6
O C 4# / G P I O 4 3
L 16
O C5 # / G P I O 9
A 1 6
O C 6# / G P I O 1 0
D1 4
O C 7# / G P I O 1 4
C1 4
CL K O UT _ P C I 4
H 4 0 CL K O UT _ P C I 3
K 4 2
P L T RS T #
C 6
T P 1
BG 2 6
T P 2
BJ 2 6
T P 3
BH 2 5
T P 6
A H 3 8
T P 7
A H 3 7
T P 8
A K 4 3
T P 9
A K 4 5
T P 1 6
Y 1 3
T P 1 7
K 2 4
T P 1 8
L 2 4
T P 1 9
A B 4 6
T P 2 0
A B 4 5
T P 2 1
B2 1
T P 2 2
M 2 0
T P 2 3
A Y 1 6
T P 2 5
B E 2 8
T P 2 6
BC 3 0
T P 2 7
B E 3 2
T P 2 8
BJ 3 2
T P 2 9
BC 2 8
T P 3 0
B E 3 0
T P 3 1
B F 3 2
T P 3 2
BG 3 2
T P 3 3
A V 2 6
T P 3 4
B B 2 6
T P 3 5
A U 2 8
T P 3 6
A Y 3 0
T P 3 7
A U 2 6
T P 3 8
A Y 2 6
T P 3 9
A V 2 8
T P 4 0
A W 3 0
T P 4
BJ 1 6
T P 5
BG 1 6
T P 1 5
AM 5 T P 1 4
AM 4 T P 1 3
A H 1 2 T P 1 2
H 3 T P 1 1
N 3 0 T P 1 0
C 1 8
T P 2 4
BG 4 6
U S B_ P P 1 1 [2 8 ]
US B _P N1 1 [2 8 ]
Sheet 17 of 43
CougarPoint - M 5/9
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 6/9
Sheet 18 of 43
CougarPoint - M 6/9

R 16 6 2 0 0K _0 4
S AT A_ OD D_ P W R GT
R 26 4 1 0 K _ 04 DG P U_ H P D_ I N T R#
R 47 0 1 K _ 0 4
N V_ CL E
H_ S N B_ I VB# [3 ]
S AT A_ OD D_ P R S NT #
R3 1 4 *0 _ 04
R4 8 4 *1 0 K _ 0 4
INTEGRATE CLOCK
DISABLE----R465 NO STUFF (DEFAULT)
ENABLE-----R465 STUFF
3 . 3 VS
CR I T _T E M P _ RE P #_ R
10/28
C
P
U
/
M
I
S
C
N
C
T
F
G
P
I
O
U 3 7F
C o ug a rP o i nt_ R e v _1 p 0
G P I O2 7
E 1 6
G P I O2 8
P 8
G P I O2 4 / M E M_ L E D
E 8
G P I O5 7
D 6
L AN_ P H Y _ P W R_ CT R L / GP I O 1 2
C 4
VS S _ N CT F _ 1
A4
VS S _ N CT F _ 2
A4 4
VS S _ N CT F _ 3
A4 5
VS S _ N CT F _ 4
A4 6
VS S _ N CT F _ 5
A5
VS S _ N CT F _ 6
A6
VS S _ N CT F _ 7
B3
VS S _ N CT F _ 8
B4 7
VS S _ N CT F _ 9
BD 1
VS S _ N CT F _ 1 0
B D4 9
VS S _ N CT F _ 1 1
BE 1
VS S _ N CT F _ 1 2
BE 4 9
T ACH 2 / GP I O6
H3 6
T ACH 0 / GP I O1 7
D4 0
T ACH 3 / GP I O7
E 3 8
S AT A3 G P / GP I O3 7
M 5
V3
S C LO CK / GP I O2 2
T 5
S L OA D / G P I O 38
N 2
S D AT AOU T 0 / GP I O 3 9
M 3
S D AT AOU T 1 / GP I O 4 8
V1 3
P R OC P W RG D
AY 1 1
R CI N #
P 5
P E CI
AU1 6
T HR MT RI P #
AY 1 0
G P I O8
C1 0
BM BUS Y # / GP I O0
T 7
G P I O1 5
G 2
T ACH 1 / GP I O1
A4 2
V8
I NI T 3 _ 3 V#
T 14
S T P _ P C I #/ GP I O 3 4
K 1
G P I O3 5
K 4
U 2
VS S _ N CT F _ 3 2
F 4 9
A2 0 GA TE
P 4
T ACH 4 / GP I O 6 8
C4 0
C4 1
A4 0
B4 1
VS S _ N CT F _ 1 7
BH3
VS S _ N CT F _ 1 8
BH4 7
VS S _ N CT F _ 1 9
BJ 4
VS S _ N CT F _ 2 0
BJ 4 4
VS S _ N CT F _ 2 1
BJ 4 5
VS S _ N CT F _ 2 2
BJ 4 6
VS S _ N CT F _ 2 3
BJ 5
VS S _ N CT F _ 2 4
BJ 6
VS S _ N CT F _ 2 5
C2
VS S _ N CT F _ 2 6
C4 8
VS S _ N CT F _ 2 7
D1
VS S _ N CT F _ 2 8
D4 9
VS S _ N CT F _ 2 9
E 1
VS S _ N CT F _ 3 0
E 4 9
VS S _ N CT F _ 3 1
F 1
TS _ VS S 4
AK 1 0
TS _ VS S 3
AH1 0
TS _ VS S 2
AK 1 1
TS _ VS S 1
AH8
NC _ 1
P 3 7
VS S _ N CT F _ 1 3
BF 1
VS S _ N CT F _ 1 4
BF 4 9
VS S _ N CT F _ 1 5
BG2
VS S _ N CT F _ 1 6
BG4 8
DF _T VS
AY 1
H P E C I _R
R1 3 7 * 1 0K _ 0 4
1 . 0 5 VS _ VT T
R 48 0 * 10 K _ 0 4
1 . 0 5 VS _ VT T [2, 3, 5 , 1 9 , 2 0 , 34 , 3 6 ]
3 . 3V
R 44 2 1 0 K _ 04 S AT A_ DE T #4
R 17 9 1 0 K _ 04
R1 8 1 10 K _ 0 4 T E S T _ S E T _ UP
R4 3 0 2 . 2K _0 4
R4 3 5 *0 _ 04 C RI T _ T E MP _ R E P # [2 ]
R4 6 9 1 . 5K _1 % _ 0 4
O CP P E # [ 27 ]
R4 7 4 1 . 5K _1 % _ 0 4
R4 7 1 1 . 5K _1 % _ 0 4
G P I O 12
G P I O 12
R 46 1 * 10 K _ 0 4
R4 6 5 1 K _ 04
R 25 4 1 K _ 0 4
10/28
R 54 8 *1 0 mi l _ 04
R 54 7 *1 0 mi l _ 04
R 55 0 *1 0 mi l _ 04
R 54 9 *1 0 mi l _ 04
S M I # [2 7 ]
R1 2 5 3 90 _ 1 % _0 6
DG P U_ P W RO K
R 45 5 * 1K _ 0 4
G P I O 34
S C I # [2 7 ]
GP I O 3 4
I C C_ E N #
H T HR MT RI P #_ R
C RI T _ T E M P _R E P #_ R
R 20 1 1 0 0K _0 4 F D I _ OVR VL T G
P CH _M UT E #
10/28
1 . 8 VS
H OS T_ AL E R T #1
S M I #
P L L _ OD VR_ E N
B I OS _ R E C
S C I #
BIOS RECOVERY
DISABLE----R349 NO STUFF (DEFAULT)
ENABLE-----R349 STUFF
K B C_ RS T#
S A TA _O DD _ P W R GT
P LL _ OD VR _E N
R4 2 9 1 K _ 0 4
3 . 3 VS
3 . 3 V [2 , 3 , 8 , 11 , 1 3 , 1 4, 15 , 1 7 , 1 9, 20 , 2 2 , 2 3, 2 6 , 2 8 , 3 0, 3 1 , 3 3 , 3 4, 3 5 ]
Set to Vss when LOW
Set to Vcc when HI GH
NV_CLE
DMI &FDI Ter mi nati on Vol tage
3 . 3 VS [3 , 9 , 10 , 1 1 , 1 2 , 13 , 1 4 , 1 5, 16 , 1 7 , 1 9, 20 , 2 3 , 2 4, 2 5 , 2 7 , 2 8, 2 9 , 3 0 , 3 1, 3 6 ]
1 . 8 VS [6 , 1 9, 3 3 ]
G F X_ CR B_ DE T
G P I O 70
H OS T _ AL E R T#1
T E S T _ DE T
F DI _ OV RVL T G
GF X_ CR B_ DE T
R 43 6 1 0 K _ 04
I CC _ E N#
3 . 3 VS
G P I O 71
D GP U_ P W R OK
H OS T_ AL E R T #2
S _G P I O
S _ GP I O
BI O S _ RE C
R 46 2 1 K _ 0 4
R 19 4 * 1K _ 0 4
R2 2 2 10 0 K _ 0 4
R1 8 4 *0 _ 0 4
R4 5 0 10 0 K _ 0 4
R1 8 0 1 0K _0 4
R N8
1 0 K _ 8 P 4R _ 0 4
1
2
3
4 5
6
7
8
R4 5 1 *1 0 K _ 04
3. 3 V
3 . 3V S
3 . 3V S
S ATA _D E T #4
P C H_ G P I O 57
R1 3 8 *0 _ 0 4
M F G _M OD E R4 4 9 10 K _ 0 4
3 . 3 VS
K B C_ RS T#
S MI #
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
D GP U_ HP D_ I NT R #
I N I T 3 _3 V#
S AT A_ OD D_ P R S NT # [2 5 ]
S B_ BL ON [1 1]
3 . 3 VS
Internal GFX: Low (Default)
External GFX: High K BC_ R S T # [27 ]
GA2 0 [2 7 ]
S AT A_ OD D_ P W R GT [2 5 ]
S ATA _O DD _ P RS NT #
S CI #
H_ T HR MT RI P # [3]
H_ CP UP W R GD [3 ]
H_ P E C I [3 , 2 7]
H OS T _ AL E R T#2
G A2 0
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 7/9
Sheet 19 of 43
CougarPoint - M 7/9

1. 0 5 VS
1. 05 VS [1 3 , 1 4 , 15 , 2 0 , 3 4]
R 42 1 *0 _ 0 4
3 . 3V S
1. 0 5 S _ VCC _ DM I
R 14 7 *0 _ 0 4
3 . 3 V S _ VC CA _ L VD
1 . 05 VS _ VC CAP LL _ E X P
11/ 01 R 43 9 *0 _ 0 4
20mA
U 39
* A P L 5 6 03 -3 3 B
I N
1
S E T
4
G ND
2
S H DN #
3
OU T
5
3 . 3 V S 3. 3V VCC ME 3 . 3 V
42mA
POWER
V
C
C

C
O
R
E
D
M
I
V
C
C
I
O
C
R
T
L
V
D
S
F
D
I
D
F
T

/

S
P
I
H
V
C
M
O
S
U3 7 G
Co u g ar P oi n t_ Re v _ 1 p 0
VCC CO RE [1 ]
AA2 3
VCC CO RE [2 ]
AC 2 3
VCC CO RE [3 ]
AD 2 1
VCC CO RE [4 ]
AD 2 3
VCC CO RE [5 ]
AF 2 1
VCC CO RE [6 ]
AF 2 3
VCC CO RE [7 ]
AG 2 1
VCC CO RE [8 ]
AG 2 3
VCC CO RE [9 ]
AG 2 4
VCC CO RE [1 0 ]
AG 2 6
VCC CO RE [1 1 ]
AG 2 7
VCC CO RE [1 2 ]
AG 2 9
VCC CO RE [1 3 ]
AJ 2 3
VCC CO RE [1 4 ]
AJ 2 6
VCC CO RE [1 5 ]
AJ 2 7
VC CD F T E RM [4]
AJ 1 7
VC CD F T E RM [3]
AJ 1 6
VCC I O[1 7 ]
AN 2 1
VCC I O[1 8 ]
AN 2 6
VCC I O[1 9 ]
AN 2 7
VCC I O[2 0 ]
AP 2 1
VCC I O[2 3 ]
AP 2 6
VCC I O[2 4 ]
AT 2 4
VCC I O[1 5 ]
AN 1 6
VCC I O[1 6 ]
AN 1 7
VCC I O[2 1 ]
AP 2 3
VCC I O[2 2 ]
AP 2 4
VC CAD A C
U4 8
VCC T X_ L VDS [1]
AM3 7
VCC T X_ L VDS [2]
AM3 8
V CC AL VDS
AK 3 6
V CC VRM [3]
AT 1 6
VCC VRM [2 ]
AP 1 6
VCC AP L L E X P
BJ 2 2
Vc cAF DI P L L
BG 6
VCC I O[2 8 ]
AN 1 9 VCC T X_ L VDS [4]
AP 3 7
VCC T X_ L VDS [3]
AP 3 6
VS S AD A C
U4 7
V S S AL VDS
AK 3 7
VCC I O[2 7 ]
AP 1 7
VC C3 _ 3 [6]
V3 3
VC C3 _ 3 [7]
V3 4
VCC 3 _3 [3 ]
BH 2 9
VC CD F T E RM [2]
AG1 7
VC CD F T E RM [1]
AG1 6
V CC DM I [1]
AT 2 0
VCC I O[2 5 ]
AN 3 3
VCC I O[2 6 ]
AN 3 4
VCC CO RE [1 6 ]
AJ 2 9
VCC CO RE [1 7 ]
AJ 3 1
V C CS P I
V1
VC CC LK D MI
AB3 6
VCC DM I [2 ]
AU 2 0
R 44 0 0 _ 04
C1 7 9
0 . 1 u_ 1 0 V_ X5 R _0 4
APL5603-33B 6- 02- 56033- 4C0
G9091- 330T11UF 6- 02- 90913- 4C0
160mA
R 14 8 *2 0 m i l _ 0 4
R1 6 4 * 2 0m i l _0 4
1 . 05 VS
1 . 0 5V S _V CC A P L L_ F D I
C1 5 6
0 . 1u _ 1 0 V_X5 R _0 4
C1 6 0
0 . 1u _ 1 0 V_X5 R _0 4
1. 5 V S _1 . 8 VS
1 . 5 V S _ 1 . 8V S
1. 5VS _1 . 8 VS
1. 0 5 VS
3 . 3 V S
V C CA _P L L _ E X P
VC CC L K DM I
1 . 8V S 1 . 5 V S
R 1 49 * 20 m i l _0 4
42mA
190mA
3. 3VS
1 . 0 5 VS _ V TT
All VCCORE = 1.3A
3. 3 VS
1 . 8 VS _ VCC T X_ L VD
5 VS
All VCCIO = 2.92A
266mA
266mA
R 46 0
* 10 K _ 1 % _0 4
C 4 51
0 . 0 1 u_ 1 6 V_ X7 R _ 04
11/03
C 1 58
1 u_ 6 . 3 V _ Y 5 V _ 0 4
C1 2 8
10 u _ 6 . 3V_ X5 R_ 0 6
C 45 7
*2 2 u _ 6. 3 V _ X5 R _ 0 8
C 14 7
1 0 u _6 . 3 V_ X5R _ 06
C4 5 3
1 0u _ 6 . 3 V_ X5 R _0 6
C 1 51
1 u _ 6. 3V_ Y 5 V_0 4
R 45 7
* 23 . 7 K _ 1 %_ 0 4
R 14 3 *0 _ 0 4
C4 3 9
2 2u _ 6 . 3 V_ X5 R _0 8
C 1 71
1 u _ 6. 3 V_ Y 5V _0 4
C1 7 4
1 u _6 . 3 V_ Y 5 V_ 0 4
C 1 49
1 u _ 6. 3V _ Y 5V _0 4
.
L 34
HC B 1 60 8 K F -1 2 1 T2 5
C5 3 9
*0 . 1 u _ 10 V_ X5 R_ 0 4
.
L3 1
*HC B1 0 05 K F -12 1 T 20
C 4 24
* 1 0u _ 6 . 3V _X5 R_ 0 6
C1 6 8
1 0u _ 6 . 3 V_ X5 R _0 6
C1 7 8
1 u _ 6. 3V_ Y 5 V_0 4
C4 4 6
1 u _6 . 3 V_ Y 5 V_ 0 4
C 1 52
1 u _ 6 . 3V _Y 5 V_ 04
C 14 6
1u _ 6 . 3 V _Y 5 V _ 04
C4 5 9
* 1 u_ 6 . 3 V_ X5 R _0 4
1 . 0 5 V S _ VT T
C4 5 2
0 . 1 u_ 1 0 V_ X5 R _0 4
C 1 53
0 . 0 1 u_ 1 6 V_ X7 R _ 04
C1 5 0
0 . 0 1u _ 1 6V _X7 R_ 0 4
1.43V 1.58V
4.75V
1.10V
Min
5V
1.5V
Max
1.89V
1.05V
1.8V
3.47V
1.71V
1.00V
3. 3V [2 , 3 , 8, 1 1 , 1 3 , 14 , 1 5 , 1 7 , 18 , 2 0 , 2 2, 2 3 , 2 6 , 2 8, 3 0 , 3 1 , 33 , 3 4 , 3 5]
CougarPoint power supply range
Voltage
3.3V
5V S [1 1, 1 2 , 2 0 , 2 5, 2 9 , 3 0 , 31 , 3 6 , 3 7]
60mA
3.14V
5.25V
1. 05 VS _ VT T [2 , 3 , 5 , 1 8 , 20 , 3 4 , 3 6]
2mA
160mA
1mA
1mA
R 1 59 * 20 m i l_ 0 4
1. 0 5 VS
R1 4 0 * 20 m i l _ 0 4
1 . 0 5 VS
3. 3VS [3 , 9, 10 , 1 1 , 1 2, 1 3 , 1 4 , 15 , 1 6 , 1 7 , 18 , 2 0 , 2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 30 , 3 1 , 3 6]
1. 5VS [2 9 , 3 1]
1. 8VS [6 , 1 8 , 3 3]
CougarPoint -M (POWER)
1 . 0 5 VS
1. 5VS _1 . 8 VS [2 0]
C 14 4
0 . 1 u _1 0 V_ X 5R _ 0 4
Z 2 5 0 1
R 1 41 * 0_ 0 4
VC CA_ D A C_ 3 . 3 VS
1 . 8 V S V _ N VRAM _ VCC Q 3 . 3 VS
1 . 0 5V S _V CC A P L L_ E XP
R1 5 2 *2 0 m i l _ 0 4
1 . 8V S
L 1 7
HC B1 00 5 K F -1 2 1 T2 0
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 8/9
Sheet 20 of 43
CougarPoint - M 8/9

11/ 01
11/03
3 . 3 A_ 1. 5 A_ HD A_ I O [ 13 ]
.
L1 5
HC B16 0 8 K F -1 21 T 2 5
3 . 3A_ 1 . 5 A_ HDA _I O
R 25 9 0_ 0 6
1 . 05 VS
3. 3 VS
3. 3 VS
1 . 05 VS
C 1 64
1 u _ 6. 3 V_ Y 5V_ 0 4
1. 1 VS _ VC CA_ B_ DP L
L 16
H CB1 0 0 5K F -12 1 T 20
11/01
1 . 05 VS
D 10 RB7 5 1 S -40 C 2
A C
R1 9 6 * 20 m i l _ 0 4
D 11 RB7 5 1 S -40 C 2
A C
C2 0 1 0 . 1 u _1 0 V_ X5R _0 4
1.43V
1.10V
Min
5V
1.5V
1 . 0 5 VS
1.89V
1.05V
1.58V
4.75V
3.47V
1.71V
Max
3.3V
1.00V
1.8V
L 30
* HC B1 00 5 K F -1 2 1T 2 0
5.25V
CougarPoint power supply range
Voltage
3.14V
1 . 0 5 VS
C 1 80
0 . 1 u _1 0 V_ X5 R _0 4
C1 9 3
0 . 1u _ 1 0V_ X5 R_ 0 4
1 . 0 5 VS _ VTT
RT C V CC
+VCC AP L L _C P Y _ P C H
3 . 3 VS [3 , 9 , 1 0, 1 1 , 1 2, 13 , 1 4 , 15 , 1 6 , 17 , 1 8 , 1 9, 2 3 , 2 4, 2 5 , 2 7, 28 , 2 9 , 30 , 3 1 , 36 ]
R T CVC C [1 3 , 15 ]
1 . 5 V [3 , 6 , 8 , 9, 10 , 2 6 , 28 , 3 1 , 33 ]
3 . 3 V [2 , 3 , 8, 11 , 1 3 , 14 , 1 5 , 17 , 1 8 , 1 9, 2 2 , 2 3, 2 6 , 2 8, 30 , 3 1 , 33 , 3 4 , 35 ]
5 VS [1 1 , 1 2, 1 9 , 2 5, 29 , 3 0 , 31 , 3 6 , 37 ]
P C H_ VCC DS W
5 V [2 3 , 2 6, 30 , 3 1 , 33 , 3 4 , 35 ]
DCP S US C 1 61 *1 u _ 6. 3 V_ X5R _ 04
3mA
VC C3 _ 3
3. 3V
+VC CR T CE XT
3 . 3 A_ 1. 5 A_ HD A_ I O
C 4 49
* 2 2u _ 6 . 3V _X5 R_ 0 8
1 . 5 VS _ 1 . 8V S
C 4 41
2 2 u _6 . 3 V_ X5R _ 08
+V1 . 0 5S _S A T A3
1 . 0 5 VS
80mA
97mA
1mA
80mA
1 . 0 5 VS _ VTT [2, 3 , 5 , 1 8 , 19 , 3 4 , 36 ]
5 VS
C1 7 3
1 u_ 6 . 3 V_ Y 5 V_ 04
3 . 3V S
C 2 00
1 u _ 6. 3 V_ Y 5V_ 0 4
5 V
1. 05 VS
3 . 3V
+5 V_P C H_ V C C5 RE F S US
C 1 63
1 u _ 6. 3 V_ Y 5 V_ 0 4
CougarPoint - M (POWER)
Vo lt age R ai l Vol ta ge S0 I cc ma x Cur re nt ( A)
V_ CP U_I O 1. 05 1 (m A)
V5 RE F 5 1 (m A)
V5 RE F_S us 5 1 (m A)
Vc c3 _3 3. 3 0. 26 6
Vc cA DAC 3 1. 05 1 (m A)
Vc cA DPL LA 1. 05 0. 08
Vc cA DPL LB 1. 05 0. 08
Vc cC ore 1. 05 1. 3
Vc cD MI 1. 1 0. 04 2
Vc cI O 1. 05 2. 92 5
Vc cA SW 1. 05 1. 01
Vc cS PI 3. 3 0. 02 0
Vc cD SW3 _3 3. 3 2 (m A)
Vc cD FTE RM 1. 8 0. 19
Vc cS us3 _3 3. 3 0. 09 7
Vc cS usH DA 3. 3 1 (m A)
Vc cV RM 1. 5 0. 16
Vc cC lKD MI 1. 05 0. 02
Vc cS SC 1. 05 0. 09 5
Vc cD IFF CL KN 1. 05 0. 05 5
Vc cA LVD S 3. 3 1 (m A)
Vc cT X_L VD S 1. 8 0. 06
1 . 0 5 VS _ VCC AP L L_ S AT A3
1 . 0 5 VS [ 13 , 1 4 , 15 , 1 9 , 34 ]
VC CS S T
16mA
1 . 0 5 VS
1mA
1mA
97mA
A ll V CC ASW =1 .0 1A
266mA
16mA
2 66 mA
3 . 3V
All VCCIO=2.92A
55mA
1 . 0 5 VS
1 . 0 5V S _V CCA _C LK
1. 01 A
All VCCIO=2.92A
1 . 05 VS
C4 1 2
*0 . 1 u _1 0 V_ X5 R _0 4
L 33
*H CB1 0 05 K F -1 2 1 T2 0
C 18 4
0 . 1 u _1 0 V_ X5 R _0 4
C 4 60
1 u _ 6. 3 V_ Y 5V_ 0 4
C 1 87
1 u _ 6. 3 V_ Y 5 V_ 0 4
C1 5 9
*1 0 u_ 6 . 3 V_ X5 R_ 0 6
1 . 0 5 VS
L3 2
HCB1 0 0 5K F -12 1 T 20
C 4 23
2 2 u _6 . 3 V_ X5R _ 08
C 16 7
1 u _ 6. 3 V_ Y 5 V_ 0 4
C4 3 8
2 2u _ 6 . 3V _X5 R_ 0 8
C 1 83
1 u _ 6. 3 V_ Y 5 V_ 0 4
C 19 2
1 u _ 6. 3 V_ Y 5 V_ 0 4
C4 2 7
1 u_ 6 . 3 V_ Y 5 V_ 04
C4 1 3
*0 . 1 u _1 0 V_ X5 R _0 4
C 4 03
4 . 7 u _6 . 3 V_ X5R _ 06
R 25 8 *0 _ 06
C2 0 3 0 . 1 u _1 0 V_ X5 R _0 4
+C 4 36
* 2 20 u _ 6. 3 V_ 6 . 3 *4 . 2
R2 4 2 1 0 _0 4
1 . 0 5V S _V CCA _A_ D P L
C2 0 4
0 . 1u _ 1 0V_ X5 R_ 0 4
C1 9 1 0 . 1 u _1 0 V_ X5R _0 4
L 36
* HC B1 00 5 K F -1 2 1T 2 0
1 . 0 5 VS
C 15 4 *1 u _6 . 3 V_ X5R _ 04
11/03
C 1 90 *0 . 1 u _1 0 V_ X5 R _0 4
C 1 81
0 . 1 u _1 0 V_ X5R _0 4
C4 6 1
0 . 1u _ 1 0V _X5 R_ 0 4
C1 7 6
1 0u _ 6 . 3V _X5 R_ 0 6
R2 6 3 1 0 _0 4
C1 9 4
0 . 1u _ 1 0V _X5 R_ 0 4
L3 5
HCB1 0 0 5K F -12 1 T 20
R 4 24
* 0 _0 4
C4 2 6
1 u_ 6 . 3 V_ Y 5 V_ 04
C 4 22
2 2 u _6 . 3 V_ X5R _ 08
C4 6 2
0 . 1u _ 1 0V _X5 R_ 0 4
C1 8 2 * 1 u_ 6 . 3 V_X5 R_ 0 4
C 16 6
1 u _ 6. 3 V_ Y 5 V_ 0 4
+VCC A_ US BS U S
C1 5 5
1
u_
6
.3
V
_
Y
5V
_0
4
+V1 . 05 M _V CCS US
3 . 3 V
C 18 6
1 u _6 . 3 V_ Y 5 V_ 0 4
C1 9 7
0 . 1u _ 1 0V_ X5 R_ 0 4
+V5 A_P CH_ VC C5 RE F S US
1 . 5 VS _ 1 . 8V S [19 ]
3 . 3 V
3 . 3 V
POWER
S
A
T
A
U
S
B
C
l
o
c
k

a
n
d

M
i
s
c
e
l
l
a
n
e
o
u
s
H
D
A
C
P
U
R
T
C
P
C
I
/
G
P
I
O
/
L
P
C
M
I
S
C
U3 7 J
Co u g arP o i n t_R e v _1 p 0
DC P S US BY P
V1 2
VCC AS W [1 ]
AA1 9
VCC AS W [2 ]
AA2 1
VCC AS W [3 ]
AA2 4
VCC AS W [5 ]
AA2 7
VCC AS W [6 ]
AA2 9
V CCS US H DA
P 3 2
VC CS U S 3 _3 [6 ]
P 2 4
VC CI O[ 34 ]
T 2 6
VCC I O[4 ]
AD 1 7
VCC AS W [7 ]
AA3 1
VCC AS W [8 ]
AC 2 6
VCC AS W [9 ]
AC 2 7
VCC AS W [1 0 ]
AC 2 9
VCC AS W [1 1 ]
AC 3 1
VCC AS W [1 2 ]
AD 2 9
V5R E F
P 3 4
VC C3 _3 [4 ]
T 3 4
VCC RT C
A2 2
VCC S US 3 _ 3[ 10 ]
V2 4
VC CS U S 3 _3 [9 ]
V2 3
VC CS U S 3 _3 [8 ]
T 2 4
VC CS U S 3 _3 [7 ]
T 2 3
VCC I O[2 ]
AC 1 6
VCC ADP L L B
BF 4 7
VCC DI F F C L K N[1 ]
AF 3 3
V5 RE F _S US
M 26
VCC I O[3 ]
AC 1 7
DC P S US [1 ]
T 1 7
VCC S S C
AG 3 3
VCC ADP L L A
BD 4 7
VCC VRM [4]
Y 4 9
VCC ACL K
AD 4 9
DC P RT C
N 1 6
VCC AS W [4 ]
AA2 6
AF 3 4
VCC I O[7 ]
AF 1 7
DC P S S T
V1 6
VCC I O[5 ]
AF 1 3
VC CAS W [ 22 ]
T 2 1
VC CAS W [ 23 ]
V2 1
VC CAS W [ 21 ]
T 1 9
VC C3 _3 [1 ]
AA1 6
VC C3 _3 [8 ]
W 1 6
VC CS U S 3 _3 [2 ]
N 20
VC CS U S 3 _3 [3 ]
N 22
VC CS U S 3 _3 [4 ]
P 2 0
VC CS U S 3 _3 [5 ]
P 2 2
VC CI O[ 29 ]
N 26
VC CI O[ 30 ]
P 2 6
VC CI O[ 31 ]
P 2 8
VC CI O[ 32 ]
T 2 7
V_P ROC _ I O
BJ 8
VC CI O[ 33 ]
T 2 9
AG 3 4
VCC AS W [1 3 ]
AD 3 1
VCC AS W [1 4 ]
W 2 1
VCC AS W [1 5 ]
W 2 3
VCC AS W [1 6 ]
W 2 4
VCC AS W [1 7 ]
W 2 6
VCC AS W [1 8 ]
W 2 9
VCC AS W [1 9 ]
W 3 1
VCC AS W [2 0 ]
W 3 3
VCC I O[6 ]
AF 1 4
VC CVR M[1 ]
AF 1 1
VC CI O[ 12 ]
AH 1 3
VC CI O[ 13 ]
AH 1 4
VC C3 _3 [2 ]
AJ 2
VC CAP LL S AT A
AK 1
DC P S US [3 ]
AL 2 4
VCC I O[1 4 ]
AL 2 9
DCP S US [4 ]
AN 2 3
VC CS U S 3 _3 [1 ]
AN 2 4
VCC AP L LD MI 2
BH 2 3
DC P S US [2 ]
V1 9
VCC DS W 3 _ 3
T 1 6
VCC 3_ 3 [5 ]
T 3 8
1 1/01
1. 5 VS _ 1 . 8 VS
1. 5V
C2 0 2 1u _ 6 . 3 V_X5 R_ 0 4
Note: C1289- STUFFED ONLY FOR CPT INTERPOSER;
UNSTUFF FOR CPT
Schematic Diagrams
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CougarPoint - M 9/9
Sheet 21 of 43
CougarPoint - M 9/9

U37I
CougarPoint_Rev_1p0
VSS[159]
AY4
VSS[160]
AY42
VSS[161]
AY46
VSS[162]
AY8
VSS[163]
B11
VSS[164]
B15
VSS[165]
B19
VSS[166]
B23
VSS[167]
B27
VSS[168]
B31
VSS[169]
B35
VSS[170]
B39
VSS[171]
B7
VSS[173]
BB12
VSS[174]
BB16
VSS[175]
BB20
VSS[176]
BB22
VSS[177]
BB24
VSS[178]
BB28
VSS[179]
BB30
VSS[180]
BB38
VSS[181]
BB4
VSS[182]
BB46
VSS[183]
BC14
VSS[184]
BC18
VSS[185]
BC2
VSS[186]
BC22
VSS[187]
BC26
VSS[188]
BC32
VSS[189]
BC34
VSS[190]
BC36
VSS[191]
BC40
VSS[192]
BC42
VSS[193]
BC48
VSS[194]
BD46
VSS[195]
BD5
VSS[196]
BE22
VSS[197]
BE26
VSS[198]
BE40
VSS[199]
BF10
VSS[200]
BF12
VSS[201]
BF16
VSS[202]
BF20
VSS[203]
BF22
VSS[204]
BF24
VSS[205]
BF26
VSS[206]
BF28
VSS[207]
BD3
VSS[208]
BF30
VSS[209]
BF38
VSS[210]
BF40
VSS[211]
BF8
VSS[212]
BG17
VSS[213]
BG21
VSS[214]
BG33
VSS[215]
BG44
VSS[216]
BG8
VSS[217]
BH11
VSS[218]
BH15
VSS[219]
BH17
VSS[220]
BH19
VSS[222]
BH27
VSS[223]
BH31
VSS[224]
BH33
VSS[225]
BH35
VSS[226]
BH39
VSS[227]
BH43
VSS[228]
BH7
VSS[229]
D3
VSS[230]
D12
VSS[231]
D16
VSS[232]
D18
VSS[233]
D22
VSS[234]
D24
VSS[235]
D26
VSS[236]
D30
VSS[237]
D32
VSS[264]
K7
VSS[265]
L18
VSS[266]
L2
VSS[267]
L20
VSS[268]
L26
VSS[269]
L28
VSS[270]
L36
VSS[271]
L48
VSS[272]
M12
VSS[273]
P16
VSS[274]
M18
VSS[275]
M22
VSS[276]
M24
VSS[277]
M30
VSS[278]
M32
VSS[279]
M34
VSS[280]
M38
VSS[281]
M4
VSS[282]
M42
VSS[283]
M46
VSS[284]
M8
VSS[285]
N18
VSS[286]
P30
VSS[288]
P11
VSS[289]
P18
VSS[290]
T33
VSS[291]
P40
VSS[292]
P43
VSS[293]
P47
VSS[294]
P7
VSS[295]
R2
VSS[296]
R48
VSS[297]
T12
VSS[298]
T31
VSS[299]
T37
VSS[300]
T4
VSS[301]
W34
VSS[302]
T46
VSS[303]
T47
VSS[304]
T8
VSS[305]
V11
VSS[306]
V17
VSS[307]
V26
VSS[308]
V27
VSS[309]
V29
VSS[310]
V31
VSS[311]
V36
VSS[312]
V39
VSS[313]
V43
VSS[314]
V7
VSS[315]
W17
VSS[316]
W19
VSS[238]
D34
VSS[239]
D38
VSS[240]
D42
VSS[241]
D8
VSS[242]
E18
VSS[243]
E26
VSS[244]
G18
VSS[245]
G20
VSS[246]
G26
VSS[247]
G28
VSS[248]
G36
VSS[249]
G48
VSS[250]
H12
VSS[251]
H18
VSS[317]
W2
VSS[318]
W27
VSS[319]
W48
VSS[320]
Y12
VSS[321]
Y38
VSS[322]
Y4
VSS[323]
Y42
VSS[324]
Y46
VSS[325]
Y8
VSS[328]
BG29
VSS[329]
N24
VSS[330]
AJ 3
VSS[287]
N47
VSS[252]
H22
VSS[253]
H24
VSS[254]
H26
VSS[255]
H30
VSS[256]
H32
VSS[257]
H34
VSS[258]
F3
VSS[262]
K39
VSS[263]
K46
VSS[259]
H46
VSS[260]
K18
VSS[261]
K26
VSS[331]
AD47
VSS[333]
B43
VSS[334]
BE10
VSS[335]
BG41
VSS[337]
G14
VSS[338]
H16
VSS[340]
T36
VSS[342]
BG22
VSS[343]
BG24
VSS[344]
C22
VSS[345]
AP13
VSS[172]
F45
VSS[221]
H10
VSS[346]
M14
VSS[347]
AP3
VSS[348]
AP1
VSS[349]
BE16
VSS[350]
BC16
VSS[351]
BG28
VSS[352]
BJ 28
U37H
CougarPoint_Rev_1p0
VSS[1]
AA17
VSS[2]
AA2
VSS[3]
AA3
VSS[5]
AA34
VSS[6]
AB11
VSS[7]
AB14
VSS[8]
AB39
VSS[9]
AB4
VSS[10]
AB43
VSS[11]
AB5
VSS[12]
AB7
VSS[13]
AC19
VSS[14]
AC2
VSS[15]
AC21
VSS[16]
AC24
VSS[17]
AC33
VSS[18]
AC34
VSS[19]
AC48
VSS[20]
AD10
VSS[21]
AD11
VSS[22]
AD12
VSS[23]
AD13
VSS[24]
AD19
VSS[25]
AD24
VSS[26]
AD26
VSS[27]
AD27
VSS[28]
AD33
VSS[29]
AD34
VSS[30]
AD36
VSS[31]
AD37
VSS[33]
AD39
VSS[34]
AD4
VSS[35]
AD40
VSS[36]
AD42
VSS[37]
AD43
VSS[38]
AD45
VSS[39]
AD46
VSS[43]
AF10
VSS[44]
AF12
VSS[46]
AD16
VSS[47]
AF16
VSS[48]
AF19
VSS[49]
AF24
VSS[50]
AF26
VSS[51]
AF27
VSS[52]
AF29
VSS[53]
AF31
VSS[54]
AF38
VSS[55]
AF4
VSS[56]
AF42
VSS[57]
AF46
VSS[59]
AF7
VSS[60]
AF8
VSS[61]
AG19
VSS[62]
AG2
VSS[63]
AG31
VSS[64]
AG48
VSS[65]
AH11
VSS[66]
AH3
VSS[67]
AH36
VSS[68]
AH39
VSS[69]
AH40
VSS[70]
AH42
VSS[71]
AH46
VSS[72]
AH7
VSS[73]
AJ 19
VSS[76]
AJ 33
VSS[77]
AJ 34
VSS[78]
AK12
VSS[79]
AK3
VSS[80]
AK38
VSS[81]
AK4
VSS[82]
AK42
VSS[83]
AK46
VSS[84]
AK8
VSS[85]
AL16
VSS[86]
AL17
VSS[87]
AL19
VSS[88]
AL2
VSS[89]
AL21
VSS[90]
AL23
VSS[91]
AL26
VSS[92]
AL27
VSS[93]
AL31
VSS[96]
AL48
VSS[97]
AM11
VSS[98]
AM14
VSS[99]
AM36
VSS[100]
AM39
VSS[102]
AM45
VSS[103]
AM46
VSS[104]
AM7
VSS[105]
AN2
VSS[106]
AN29
VSS[107]
AN3
VSS[108]
AN31
VSS[109]
AP12
VSS[110]
AP19
VSS[111]
AP28
VSS[112]
AP30
VSS[113]
AP32
VSS[114]
AP38
VSS[116]
AP42
VSS[117]
AP46
VSS[118]
AP8
VSS[119]
AR2
VSS[120]
AR48
VSS[121]
AT11
VSS[122]
AT13
VSS[123]
AT18
VSS[124]
AT22
VSS[125]
AT26
VSS[126]
AT28
VSS[127]
AT30
VSS[128]
AT32
VSS[131]
AT42
VSS[132]
AT46
VSS[133]
AT7
VSS[134]
AU24
VSS[135]
AU30
VSS[136]
AV16
VSS[137]
AV20
VSS[138]
AV24
VSS[139]
AV30
VSS[140]
AV38
VSS[141]
AV4
VSS[142]
AV43
VSS[143]
AV8
VSS[144]
AW14
VSS[145]
AW18
VSS[146]
AW2
VSS[147]
AW22
VSS[148]
AW26
VSS[149]
AW28
VSS[150]
AW32
VSS[151]
AW34
VSS[152]
AW36
VSS[153]
AW40
VSS[154]
AW48
VSS[155]
AV11
VSS[156]
AY12
VSS[157]
AY22
VSS[158]
AY28
VSS[40]
AD8
VSS[42]
AE3
VSS[45]
AD14
VSS[115]
AP4
VSS[0]
H5
VSS[58]
AF5
VSS[32]
AD38
VSS[4]
AA33
VSS[74]
AJ 21
VSS[75]
AJ 24
VSS[41]
AE2
VSS[129]
AT34
VSS[130]
AT39
VSS[101]
AM43
VSS[95]
AL34 VSS[94]
AL33
CougarPoint -M (GND)
Schematic Diagrams
New Card, Mini PCIE B - 23
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
New Card, Mini PCIE

R4 8 9 0 _ 04
P C I E _ W A K E # [15 , 2 4 , 26 ]
1 . 5 V [3 , 6, 8, 9 , 1 0 , 20 , 2 6 , 28 , 3 1 , 33 ]
1 . 5 V S [19 , 2 9 , 31 ]
3. 3 VS [3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 29 , 3 0 , 31 , 3 6 ]
3. 3 V [2 , 3, 8 , 1 1 , 13 , 1 4 , 1 5, 1 7 , 1 8, 1 9 , 2 0, 2 3 , 2 6, 2 8 , 3 0, 31 , 3 3 , 34 , 3 5 ]
V DD 3 [1 3 , 2 4, 27 , 3 1 , 32 , 3 8 ]
B T _S BD #
C4 7 2
0 . 1 u_ 1 6V _Y 5 V _0 4
3 I N1 [2 7]
3 . 3V
R4 9 9 * 10 K _ 0 4
R5 0 1 0 _0 4
NEW CARD(Port 3)
10/29
10/29
R5 5 2 *0 _ 0 4
VD D3
B T _S B D# [1 4 ]
R6 0 5 *0 _ 04
R5 5 3 *0 _ 04
11/01
CL _D AT A 1 [1 4]
CL _R S T #1 [1 4]
R 4 98 * 0_ 0 4
R 2 04 * 0_ 0 4
R 1 99 * 0_ 0 4
CL _C L K 1 [1 4]
B T_ S B D #
CL _ DA T A_ 1
CL _ RS T #_ 1
R4 9 1 *1 0 m i l _ 04
MINI CARD WLAN
R3 5 7 * 1 0m i l _ 0 4
B T _E N [27 , 2 8 ]
B UF _ P L T _R S T # [17 , 2 4 , 26 , 2 7 ]
3. 3 V
3 . 3 V
R 4 90 1 0 K _ 04
CL K _ P CI E _ M I NI # [1 4 ]
W L AN_ CL K R E Q# [1 4 ]
CL _ CL K _ 1
P CI E _T X N3 _ W L A N [1 4 ]
W L A N_ D E T# [2 7 ]
CL K _ P CI E _M I NI [1 4 ]
P C I E _ RX N3 _ W L A N [14 ]
P CI E _ T XP 3_ W L A N [1 4]
P CI E _R XP 3_ W L A N [1 4 ]
US B _ P N 2 [ 17 ]
3 . 3V
3 . 3V
W L AN_ E N [27 , 2 8 ]
US B _ P P 2 [1 7 ]
20 mil
B T _D E T # [2 7 , 2 8]
KEY
J _M I NI 1
MP CE C- S 00 F 1 -T P 0 0
CO E X1
3
CO E X2
5
CL K RE Q#
7
GN D0
9
RE F C L K -
1 1
RE F C L K +
1 3
W A K E #
1
GN D1
1 5
P E T n0
2 3
P E T p0
2 5
GN D2
2 1
GN D3
2 7
P E Rn 0
3 1
P E Rp 0
3 3
GN D4
2 9
Re s erv ed 0
1 7
Re s erv ed 1
1 9
W _ DI S A BL E #
2 0
GN D1 2
3 7
3. 3V A U X_3
3 9
3. 3V A U X_4
4 1
GN D1 3
4 3
Re s erv ed 2
4 5
Re s erv ed 3
4 7
Re s erv ed 4
4 9
Re s erv ed 5
5 1 L E D_ W L A N#
4 4 L E D _W W A N#
4 2
GN D6
1 8
UI M_ V P P
1 6 UI M _ RE S E T
1 4
3. 3 VA U X_ 0
2
UI M_ CL K
1 2 UI M _ DA T A
1 0 UI M _P W R
8 1 . 5V _ 0
6
GN D5
4
P E RS E T #
2 2
3. 3 VA U X_ 1
2 4
GN D7
2 6
1 . 5V _ 1
2 8
S M B _ CL K
3 0
S M B_ DA T A
3 2
GN D8
3 4
U S B _D -
3 6
U S B_ D+
3 8
GN D9
4 0
L E D _W P A N#
4 6
1 . 5V _ 2
4 8
G ND1 0
5 0
3. 3 VA U X_ 2
5 2
GN D1 1
3 5
R3 5 6 * 1 0m i l _ 0 4
B T _E N [27 , 2 8 ]
US B_ D #
US B_ D R4 9 4 *0 _ 04
3 . 3 V
W L AN_ L E D# [2 7 , 28 ]
8 0C LK [27 ]
Sheet 22 of 43
New Card, Mini
PCIE
Schematic Diagrams
B - 24 CCD, 3G, TPM
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
CCD, 3G, TPM

UI M _R S T
KEY
J _ 3 G1
88 9 10 -5 2 04 M-0 1
C OE X1
3
C OE X2
5
C LK R E Q#
7
G ND0
9
R E F CL K -
11
R E F CL K +
13
W AK E #
1
G ND1
15
P E T n 0
23
P E T p 0
25
G ND2
21
G ND3
27
P E R n0
31
P E R p0
33
G ND4
29
R es e rv e d0
17
R es e rv e d1
19
W _ DI S A BL E #
2 0
G ND1 2
37
3 . 3 VAUX_ 3
39
3 . 3 VAUX_ 4
41
G ND1 3
43
R es e rv e d2
45
R es e rv e d3
47
R es e rv e d4
49
R es e rv e d5
51 L E D_ W L AN#
4 4 LE D _ W W AN#
4 2
GN D6
1 8
U I M_ VP P
1 6 UI M _ R E S E T
1 4
3. 3VA U X_ 0
2
U I M_ CL K
1 2 U I M_ DAT A
1 0 UI M _P W R
8 1 . 5V_ 0
6
GN D5
4
P E RS E T #
2 2
3. 3VA U X_ 1
2 4
GN D7
2 6
1 . 5V_ 1
2 8
S MB_ CL K
3 0
S M B_ DAT A
3 2
GN D8
3 4
U S B_D -
3 6
US B_ D+
3 8
GN D9
4 0
LE D _ W P AN#
4 6
1 . 5V_ 2
4 8
G ND1 0
5 0
3. 3VA U X_ 2
5 2
G ND1 1
35
C2 3 5
0. 1 u _ 16 V_ Y 5 V_ 04
UI M_ DA TA
UI M_ VP P
UI M_ RS T
UI M_ P W R
3 G_ 3 . 3V
UI M_ CL K
C2 6 7
1 0u _ 10 V_ Y 5 V_ 0 8
3 G_ 3 . 3 V
3 G_ 3 . 3 V
3 G _E N [2 7]
3 G_ DE T # [2 7 ]
3G _3 . 3 V
60m ils
U S B_P P 4 [1 7 ]
U S B_P N 4 [17 ]
R 51 5
1 0 _0 6
U I M_ DAT A
Q 33
M TN 7 00 2 Z HS 3 G
D
S
R5 2 0
1 0 0K _ 0 4
3G _3 . 3 V
Q3 5
MT N 70 0 2Z HS 3 G
D
S
>48 mil
R5 1 9
3 30 K _ 04
R5 0 9 *0 _ 06 3G POWER
From H8 default HI
>48 mil
3 . 3 V
C5 0 7
0 . 1 u _1 6 V _ Y 5 V_0 4
Q3 0
AO 34 1 5
G
D S
C4 83
0. 1 u _1 6 V_ Y 5 V_ 04
C 50 0
1 0 u_ 1 0V _Y 5V_ 0 8
C2 1 2
0. 1 u _ 16 V_ Y 5 V _ 04
SIM CONN
UI M _C U I M_ D
+
C2 8 6
2 20 u _4 V_ V_ A
MINI CARD 3G(Port 6)
+
C2 87
22 0 u_ 6 . 3 V_6 . 3 *6 . 3 *4 . 2
UI M _P W R
C 4 70
* 2 2p _ 50 V _ NP O _0 4
R 5 04
*1 0m i l _0 4
C 46 9
* 22 p _ 50 V_ NP O _0 4
3 . 3VS [3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 14 , 1 5 , 16 , 1 7 , 18 , 1 9, 20 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 1, 3 6 ]
R 48 8
* 1 0m i l _ 0 4
C4 7 1
*2 2 p_ 5 0V_ N P O_ 0 4
5 V [2 0 , 2 6, 3 0 , 3 1, 3 3 , 3 4, 3 5 ]
3 . 3V [2 , 3, 8, 1 1 , 13 , 1 4 , 15 , 1 7 , 18 , 1 9, 20 , 2 2, 2 6 , 2 8, 3 0 , 3 1, 3 3 , 3 4, 3 5 ]
(TOP VIEW)
LOCK
OPEN
J _ S I M 1
C1 7 70 6 61 -1
U I M_ DAT A
C 7
U I M_ VP P
C 6
U I M_ GN D
C 5
U I M_ P W R
C 1 U I M_ RS T
C 2 U I M_ CL K
C 3
3 G_ P W R_ E N [2 7 ]
C2 4 2
0 . 1u _ 1 6V_ Y 5 V_ 0 4
R5 0 3 *4 . 7K _ 0 4 UI M_ P W R U I M_ DAT A
C 4 89
* 22 p _ 50 V _ NP O _0 4
UI M _C LK
S I M LO CK
U I M_ VP P
C2 0 9
0. 1 u _ 16 V_ Y 5 V_ 04
US B_ P P 5 [1 7]
U S B_P N5 [17 ]
C4
1 u_ 6 . 3 V_Y 5 V_0 4
From H8 default HI
48 mil
5 V
J _ CC D1
8 5 2 05 -0 50 0 1
1
2
3
4
5
C2
*1 u _6 . 3 V _ Y 5 V_ 04
CCD _D E T #
5
MJ_CCD1
R1 1
*1 00 K _ 0 4
1
CCD
5 V_C CD
C CD_ E N [27 ]
C 30 2
* 18 p _5 0 V_ NP O _0 4
XTALI
C3 05
* 18 p _ 50 V_ NP O _0 4
TPM 1.2
L P C_ AD 1 [1 3 , 27 ]
P L T _R S T # [3 , 17 ]
L P C_ AD 3 [1 3 , 27 ]
L P C_ F R AME # [1 3 , 27 ]
L P C_ AD 2 [1 3 , 27 ]
S E R I RQ [1 3 , 27 ]
L P C_ AD 0 [1 3 , 27 ]
P C LK _ T P M [17 ]
P M _C L K RUN # [15 ]
S 4 _ S TA TE # [15 ]
C2 8 5
*0 . 1 u_ 1 6V _Y 5V_ 0 4
3 . 3VS
C5 0 8
*0 . 1 u_ 1 6 V_Y 5V_ 0 4
C2 9 4
*0 . 1 u_ 1 6V_ Y 5V_ 0 4
T P M3 0 0 5
C2 8 2
*0 . 1 u_ 1 6V _Y 5V_ 0 4
T P M_ B AD D
T P M 30 0 2
TPM
U 2 8
* S L B96 3 5T T
L AD3
17
L AD0
26
L AD1
23
L AD2
20
VD D1
1 0
XT AL I
1 3
VD D3
2 4 VD D2
1 9
L F RAM E #
22
L CL K
21
L RE S E T #
16
S E R I RQ
27
C LK R UN #
15
G ND_ 1
4
G ND_ 2
1 1
G ND_ 3
1 8
G ND_ 4
2 5
GP I O
6
G P I O2
2
X T AL O
1 4
T E S T I
8
T E S T BI / BADD
9
P P
7
N C_ 1
1
N C_ 2
3
N C_ 3
12
L P CP D #
28
VS B
5
TP M _P P
T P M 30 0 1
T P M3 0 0 4
T P M 30 0 3
XTALO
C3 00
*1 u_ 1 6 V_X5 R_ 0 6
LPCPD#inactive to LRST#inactive 32~96us
A sserted before entering S3
LPCreset timing:
CC D_ DE T # [2 7 ]
T P M _P P
R3 48 *1 0 K _1 % _0 4
R3 52 *1 0 K _1 % _0 4
R3 41 *1 0 K _0 4
3 . 3VS
T P M _BAD D
X7
* MC-1 4 6 _3 2 . 7 68 K Hz 1 4
3 2
HI: 4E/ 4FH
LOW: 2E/ 2FH
HI: ACCESS
LOW: NORMAL( Int er nal PD)
TPM_PP
TPM_BADD
6- 22-32R76-0B4
C5
1 u_ 6 . 3 V_Y 5 V _0 4
3. 3 VS
C 6
0 . 1 u_ 1 6V _Y 5V_ 0 4
P C LK _ T P M1
R3 4 9
*3 3 _0 4
P C LK _ T P M
C2 92
*1 0 p_ 5 0V _ N P O_ 06
U 4 1
G 5 24 3 A
VI N
4
VI N
5
E N
3
VOU T
1
G ND
2
6- 22- 32R76-0BG
6- 22- 32R76-0B2
XTA L I
Co-l ayout X7, X8
XTA L O
X8
*1 T J S 12 5 DJ 4 A42 0 P _ 32 . 7 68 K H z
1 4
3 2
Sheet 23 of 43
CCD, 3G, TPM
Schematic Diagrams
Card Reader/LAN JMC251C B - 25
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Card Reader/LAN JMC251C

LAN_ SCL
LAN_ SDA
S
D
_
C
LK
_C
R42 5 * 4. 7K _ 04
R42 6 * 4. 7K _ 04
U35
*AT2 4C0 2BN
S CL
6
A0
1
A1
2
A2
3
W P
7
S DA
5
VCC
8
GND
4
3. 3V_ LAN
S D_BS
ISO
N
_
25
1C
S D_D1
P R1 15
*0 _0 4
D
V
D
D
4 IN 1 SO CKET SD/MM C/MS/ MS Pr o
R43 1 *0_ 06
VDD3
VDD3
C45 0
0 . 1u _16 V_Y 5 V_ 04
C19 5
* 10u _6 . 3V _X5R_ 06
P i n #2 P i n #2
For JMC251 C
3. 3 V_ LA N
S
D
_D
1
.
L3 7
S WF 25 20 CF -4R7M-M
DVDD
Pi n# 33 Pi n#3 3
RE GLX
(>20mil)
For JMC251/261 only
Switch ing Regulator
close to PIN33
C17 7
10 u_ 6. 3 V_ X5 R_0 6
C44 8
0. 1 u_ 16 V_ Y 5V_0 4
(>20 mil)
DVDD
R 2 07
* 28m i l _0 6
ne ar P i n# 41
R1 90 *10 0K _0 4
C4 80
*0 . 1u _1 6V _Y 5 V_ 04
LAN_ MDI P2 [2 5]
LAN_ MDI N2 [2 5]
LAN_ MDI N3 [2 5]
LAN_ MDI P3 [2 5]
C4 81
*0 . 1u _1 6V_Y 5 V_ 04
BUF _ PL T_ RST # [17 , 22 ,2 6, 2 7]
I S ON_2 51 C
3 . 3V S [3, 9 , 10 , 1 1, 1 2, 13 , 14 , 15, 1 6, 1 7, 18 , 19 ,2 0, 2 3, 25 , 27 , 28, 2 9, 3 0, 31 , 36 ]
D VDD [25 ]
C44 5
0. 1u _1 6V_Y 5 V _0 4
C43 5
0. 1u _1 6V_Y 5 V _0 4
C13 4
0. 1u _1 6V_Y 5 V _0 4
C15 7
0. 1u _1 6V_Y 5V_0 4
C43 7
0. 1 u_ 16 V_ Y 5V_0 4
C18 9
*0. 1 u_ 16 V_ Y 5V_0 4
C14 5
0. 1 u_1 6V_ Y 5V _0 4
C13 6
*1 0u_ 6. 3 V_ X5 R_0 6
C13 5
*0. 1 u_ 16V_ Y 5V _0 4
Pi n#7
Pi n#5 2
P l ac e a l l c a pac i to rs c l o sed to c hi p.
T he s ubsc ri pt i n eac h CA P i nc i c ate s the pi n
numb er o f J M C 251/J M C261 t hat s ho ul d be
c l o s ed to .
A
V
D
D
12
_13
Pi n# 7 Pi n#5 5
Pi n#4 3
Re se r v ed
Pi n#4 3
Pi n# 62
Re ser ve d
Pi n# 21 Pi n#5 9 Pi n#5 9 Pi n# 2
C14 8
0. 1u _1 6V_Y 5V_0 4
C13 3
*10 u_ 6. 3V_ X5R _06
3. 3 V_ LA N
3. 3 V_ LA N
AVDD1 2_ 52
AVDD1 2_ 7
C13 9
0. 1u _1 6V_Y 5V_0 4
Pi n#1 3
AVDD1 2_ 13
LA
N
X
IN
SD_ CLK
LAN_ MDI N2
A VDD12 _55
A VDD12 _52
MDI O8
A VDD12 _62
LAN_ MDI P3
LAN_ MDI P2
PCIe D ifferential
Pairs = 100 Ohm
MDI O14
(LQFP 64)
J MC251C
U36
J MC25 1-LGBZ0C
R
E
X
T
1
A
V
D
D
33
2
X
IN
3
X
O
U
T
4
G
N
D
10
LX
3
3
AV
D
D
1
2
7
CPP E N
2 3
C
LK
N
5
C
LK
P
6
A
V
D
D
12
13
R
XP
8
GND
2 2
T
X
N
11
T
X
P
12
P W RCR
3 0
RST N
2 4
W AK E N
2 7 MP D
2 8
ISO
N
4
5
LAN_L ED 2
2 6
C
R
_C
D
1
N
1
6
CR_CD0 N
1 7
R
X
N
9
MDI O8
51
LA
N
_
LE
D
0
47
M
D
IO
7
15
MDIO 6
2 0
G
N
D
4
4
M
D
IO
5
4
1
M
D
IO
4
40
M
D
IO
3
39
VD
D
IO
4
3
M
D
IO
2
38
M
D
IO
1
37
M
D
IO
0
36
MDI O9
50 MDI O1 0
49
M
D
IO
1
1
48
MDI O1 2
1 9
VDDRE G
3 2
M
D
IO
1
3
14
MDI O1 4
1 8
CR _ LE D
2 5
TE S T
2 9
V DDI O
2 1
G
N
D
3
4
V CC3V
3 1
F
B1
2
35
LA
N
_
LE
D
1
46
VD
D
O
4
2
VDD
52
VI P _1
53
VI N_1
54
AVDD12
55
VI P _2
56
VI N_2
57
GND
58
AVDD33
59
VI P _3
60
VI N_3
61
AVDD12
62
VI P _4
63
VI N_4
64
VC C_CARD
S
D
_
BS
3. 3 V_ LA N
LAN_ MDI P0 [2 5]
LAN_ MDI N1 [2 5]
LAN_ MDI P1 [2 5]
LAN_ MDI N0 [2 5]
JMC251C
VDD REG
D
VD
D
10/29
S D_BS
(>20mil)
P i n #3 1
3. 3 V S
C44 2
0. 1u _1 6V_ Y 5V_0 4
C44 3
*10 u_ 6. 3V_ Y 5V_0 6
P i n #3 2 P i n# 32
(>20mi l)
VDDREG
C 198
0 . 1u _1 6V _Y 5 V_04
C1 99
1 0u _6 . 3V_X5R_ 06
R 42 7 *2 0m i l _0 4
Pi n# 31
11/02
5 V [2 0, 23 , 26 , 30, 3 1, 3 3, 34 , 35 ]
(>20mil)
LAN_S CL
R 13 6 *0 _0 4
P CI E_ TXP4 _GL AN [1 4]
CL K_ P CI E_ GLAN [14 ]
CLK _ PCI E _GL AN# [14 ]
P CI E _TXN4_ GLAN [14 ]
MS _I NS #
AV
D
D
1
2_
7 RE XT_C
3. 3 V_ LAN
LA
N
X
O
U
T
R14 2
12 K_ 1% _0 4
M
D
IO
1
3
P CI E_ R XP _4 _GL AN
P CI E _R XP 4_GL AN [1 4]
M
D
IO
7
C4 34 0. 1 u_ 10 V_ X7 R_0 4 PCI E _ RXN4 _GLAN [14 ]
C4 33 0. 1 u_ 10 V_ X7 R_0 4
(>20mil)
P CI E_ R XN_ 4_ GLAN
6- 22- 25R00- 1B4
6- 22- 25R00- 1B5
V DD3
3 . 3VS
R
14
5
*20
m
il_
04
LAN_S DA
CPP E N
S D_CL K
MDI O10
R1 91 *20 mi l _ 04
R49 3 1 0K _0 4
S
D
_D
0
P CI E_ WA K E # [15 , 22, 2 6]
LAN_ PCI E _W AK E#
R434 1 0K _0 4
P CI E_ WAK E #
3. 3 V_ LAN
C16 5
0. 1 u_ 16 V_ Y 5V_0 4
C17 0
2. 2 u_ 6. 3V _ Y 5V_0 6
S DXC_P OWE R
MPD
C4 78
* 0. 1u _1 6V_Y 5 V_0 4
Near Ca rdr ead er CON N
VCC_CARD
AVDD1 2_ 55
S D_D3
LA
N
_
LE
D
1
AVDD1 2_ 62
3.3V
_
LA
N
S D_CL K
3 . 3V_L AN
AVDD 12_ 7
MDI O9
MS _I NS #
M
D
IO
1
1
R
EG
L
X
3 . 3V_L AN
SD_ CD#
VDD3
S
D
_D
2
LAN_P CI E _W AK E # [27 ]
MS _I NS #
R
1
46
*2
0m
il_0
4
11/02
VDD3 [13, 2 2, 2 7, 31 , 32 ,3 8]
LAN_P CI E _W A KE #
C48 2
0. 1u _1 6V_Y 5 V_0 4
C47 9
0. 1u _1 6V_Y 5 V_0 4
P C9 8
* 82 p_5 0V_ NPO_ 04
U20
*A X 6 6 1 0
GND
1
VCNTL
6
VOUT
3
VI N
5
VOUT
4
VF B
2
P OK
7
E N
8
VI N
9
P R 1 16
* 1. 27 K _1 %_0 4
P C99
*0
.1
u_
16
V_
Y
5V
_0
4
J _ CARD-RE V1
MDR01 9-C0 -1 04 2
DAT2 _S D
P 2
VS S_ MS
P 21
CD/ DAT3 _S D
P 3
CMD_ SD
P 4
VS S_ S D
P 5
VDD_S D
P 6
CL K_ S D
P 7
VS S_ S D
P 8
DAT0 _S D
P 9
DAT1 _S D
P 10
W P _S D
P 11
VS S_ MS
P 12
VCC_MS
P 13
S CLK _ MS
P 14
DAT3 _MS
P 15
I NS _MS
P 16
DAT2 _MS
P 17
S DI O/ DAT0_ MS
P 18
DAT1 _MS
P 19
BS _MS
P 20
CD_ SD
P 1
GND
P2 3 GND
P2 2
P C1 02
*1 u_ 10 V_ Y 5V_ 06
DVDD
PR1 14
*2. 4 9K _1 %_ 04
VDD3
S D_D2
1.2V
1A
2A
GS7113
6- 02- 07113- 320
AX6610
6- 02- 06610- 320
S D_W P
V CC_CARD
R49 6
*7 5_ 04
Card Reader
Power
VCC_ CAR D
VCC_ CAR D
10/2 9
S D_D0
S D_D0
1 . 5V [3 , 6, 8 , 9 , 10 , 20, 2 6, 2 8, 31 , 33 ]
MDI O12
SD
X
C
_
PO
W
E
R
10/29
LAN_ MDI N3
R4 48 *2 0mi l _0 4
D
V
D
D
S
D
_D
3
C43 1
2 2p _50 V_NP O_0 4
C432
22p _5 0V_N PO_ 04
L ANXOUT
R 144 *2 0mi l _04
LANX IN
X10
FS X5L_ 25 MHZ
1 2
R428 *1 M_04
S D_D1
C44 0 0 . 1u _16 V_Y 5 V_ 04
D VDD
D VDD
D VDD
MP D
R 21 7 * 4. 7K _0 4
VDD3
R 21 6 1 0K _0 4
3 .3 VS
X9
* FS X5 L_ 25 MHz
1 2
3 4
S D_CD #
D1 6
RB7 51 S-4 0C2
A C
S D_D2
R 156 *2 0mi l _04
C
R
_C
D
1
N
S D_CL K
C4 54
*1 0p _5 0V_NP O_0 6
S D_D3
VCC_ CARD
R 162 *2 0mi l _04
LA
N
_
LE
D
0
SD_ WP
R15 8 1 K_ 04
Card Reader Pull High/Low
Resistors
R49 7 *4 . 7K _0 4
3 .3 V S
S D_W P
V CC_ CARD
S D_C D#
11/02
Sheet 24 of 43
Card Reader/LAN
JMC251C
Schematic Diagrams
B - 26 LAN (JMC251C), SATA HDD, ODD
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LAN (JMC251C), SATA HDD, ODD

R3 7 8 *0 _ 04 L MX2+
R3 7 6 * 0 _0 4
S A TA_ T XP 0
S A TA_ T XN0
H DD _N C1
H DD _N C2
H DD _N C3
H DD _N C0
SATA HDD
P I N G N D1 ~2 =G N D
C
4
7
4
0
.1u
_
1
6V
_
Y
5
V
_
0
4
C
4
7
3
0
.1u
_
1
6V
_
Y
5
V
_
0
4
3 . 3 VS [3 , 9 , 10 , 1 1 , 12 , 1 3 , 14 , 1 5 , 16 , 1 7 , 18 , 1 9 , 2 0, 2 3 , 2 4, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 6]
3 . 3 V [2 , 3, 8 , 1 1 , 1 3, 1 4 , 1 5, 1 7 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 2 6 , 2 8, 30 , 3 1 , 33 , 3 4 , 35 ]
J _ HD D1
A LL T OP -C 16 6 N5 -1 2 20 5 -L
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
C
2
1
0
10
u
_
10
V
_
Y
5
V
_
08
1 . 5 V [3 , 6, 8 , 9 , 1 0 , 20 , 2 6 , 28 , 3 1 , 33 ]
C
4
7
5
1u
_
6
.3V
_Y
5
V
_
0
4
5VS
C
4
7
6
*0
.1
u
_1
6
V
_
Y
5
V
_0
4
D VDD [24 ]
1A
L MX2-
SATA ODD
C4 3 0 0 . 0 1u _ 1 6V_ X7 R_ 0 4
C4 2 8 0 . 0 1u _ 1 6V_ X7 R_ 0 4
Zero Power ODD
5 VS _ ODD
C4 2 5 0 . 0 1u _ 1 6V_ X7 R_ 0 4
C4 2 1 0 . 0 1u _ 1 6V_ X7 R_ 0 4
S AT A_ OD D_ DA# [1 7 ]
S AT A_ OD D_ P RS N T # [1 8 ]
S AT A_ OD D_ P W R GT [1 8]
C4 10
0. 1 u _ 16 V_ Y 5 V_ 0 4
C4 0 4
10 u _ 10 V_ Y 5 V_ 0 8
C4 0 8
1 u_ 6 . 3 V_Y 5 V_0 4
C4 1 1
0 . 1u _ 1 6V_ Y 5V_ 0 4
+C3 9 3
*1 0 0 u_ 6 . 3 V_B 2
R3 8 5 * 0 _0 4
S AT AR XN 2 [13 ]
S AT AR XP 2 [1 3 ]
S AT AT XN2 [1 3]
S AT AT XP 2 [13 ]
W240HU ALLTOP-C166N5-12205-L
W250HU 1-162-100561
L 25
* W CM 20 1 2 F 2 S -S HO RT
1
4
2
3
C 54
0 . 0 1u _ 1 6V_ X7 R_ 0 4
R3 8 0 *0 _ 04
R3 7 7 * 0 _0 4
L MX4+
L MX3-
L MX3+
N MC T_ 4
L AN_ MD I P 0
L AN_ MD I P 3
L AN_ MD I N3
L AN_ MD I N2
L AN_ MD I P 2
L MX4- DL MX4 -
L AN_ MD I P 1
L AN_ MD I N1
L AN_ MD I N0
DL MX1 +
5 VS [1 1 , 12 , 1 9 , 2 0, 2 9 , 3 0, 3 1 , 3 6, 3 7 ]
DL MX3 +
DL MX4 +
L MX1+
DL MX2 -
DL MX3 -
DL MX1 -
L 26
*W CM 2 01 2 F 2 S -S HO RT
1
4
2
3
GIGA LAN (JMC251C)
L MX1-
G ND
L 2 9
G S T 50 0 9 LF
T CT 1
1
2
T D1 +
3
T D1 -
T CT 2
4
5 T D2 +
6
T D2 -
T CT 3
7
8 T D3 +
9
T D3 -
T CT 4
1 0
1 1 T D4 +
1 2
T D4 -
1 3
M X4 -
1 4 M X4 +
MCT 4
1 5
1 6
MX3 -
1 7 M X3 +
MCT 3
1 8
1 9
M X2 -
2 0 MX2 +
MCT 2
2 1
2 2
MX1 -
2 3
MX1 +
MCT 1
2 4
DVD D
R 75
* 0_ 0 4
R4 0 2 75 _ 1 %_ 0 4
R3 9 9 75 _ 1 %_ 0 4
R3 9 4 75 _ 1 %_ 0 4
R3 9 7 75 _ 1 %_ 0 4
L AN_ M DI N0 [2 4 ]
L AN_ M DI P 0 [2 4 ]
L AN_ M DI P 1 [2 4 ]
P J S -0 8S L 3 B
J _R J 1
DD-
8 DD+
7
DB-
6
DC-
5 DC+
4
DB+
3 DA-
2 DA+
1
s h i e l d
GN D1
s h i e l d
GN D2
L AN_ M DI P 2 [2 4 ]
L AN_ M DI N1 [2 4 ]
NM CT _R
L AN_ M DI N3 [2 4 ]
L AN_ M DI P 3 [2 4 ]
L AN_ M DI N2 [2 4 ]
N MC T_ 3
N MC T_ 2
C 5 22
0 . 1 u _1 6 V_ Y 5 V_ 04
S A TA_ R XN 0
R3 8 7 * 0 _0 4
N MC T_ 1
S A TA_ R XP 0
+ C2 08
*1 00 u _ 6. 3 V_ B_ A
C3 4 3
*0 . 0 1 u_ 1 6 V_X7 R_ 0 4
C3 4 2
*0 . 0 1u _ 1 6V_ X7 R_ 0 4
S A TAT XN0 [1 3 ]
S A TAT XP 0 [1 3]
C3 4 1
*0 . 0 1u _ 16 V_ X7 R_ 04
U 4 2
G5 2 43 A
VI N
4
VI N
5
E N
3
VO UT
1
GN D
2
L 27
* W CM 20 1 2 F 2 S -S HO RT
1
4
2
3
C4 8 4 0 . 0 1 u_ 1 6 V_X7 R_ 0 4
C4 8 5 0 . 0 1 u_ 1 6 V_X7 R_ 0 4
L 28
*W CM 2 01 2 F 2 S -S HO RT
1
4
2
3
W240HU PJS-08SL3B
W250HU PJS-08SO1B-1
J _ OD D1
C 18 5 5 3-1 1 3 05 -L
G ND 1
S 1
A+
S 2
A-
S 3
G ND 2
S 4
B-
S 5
B+
S 6
G ND 3
S 7
DP
P 1
V_ 5 0
P 2
V_5 0 _ 1
P 3
M D
P 4
G ND 4
P 5
G ND 5
P 6
R3 7 5 * 0_ 0 4
C4 8 7 0 . 0 1 u_ 1 6 V_X7 R_ 0 4
C4 8 6 0 . 0 1 u_ 1 6 V_X7 R_ 0 4
1.5A
S A TAR XP 0 [ 13 ]
R 5 55 1 0 0K _ 0 4
S A TAR XN0 [1 3]
C 3 35
1 0 0 0p _ 2 K V_ X7 R_ 1 2
DL MX2 +
R3 7 4 * 0_ 0 4
3 . 3VS
C 5 21
* 0 . 01 u _ 16 V_ X7R _ 04
5 VS
Sheet 25 of 43
LAN(JMC251C),
SATA HDD, ODD
Schematic Diagrams
USB 2.0 Connector B - 27
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
USB 2.0 Connector

W240HU: 6-21-B4A10-009
/2nd: 6-21-B4A00-009
W250HUQ: 6-21-B4A20-009
J _ USB3_ 1
317DE04PS A7A2C
V+
1
G
N
D
1
G
N
D
1
DATA_ L
2
DATA_ H
3
GND
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
R197 0_ 04
C162 0. 1u_ 16V_Y 5V_ 04
R558 0_ 06
R203 0_ 04
+
C495 100u_ 6. 3V_ B_ B
US BVCC
US B30VCC
US B_ P P0 17
US B_ P N0 17
Diff . trace 90ohm
PCH USB 2.0 Coonnector
USB_ PN0_ A US B_ PN0_ A_ R
US B_ PP 0_ A_ R L64
* WCM2012F2S -S HORT
1
4
2
3
US BVCC 30
USB_ PP 0_A
Sheet 26 of 43
USB 2.0 Connector
Schematic Diagrams
B - 28 KBC-ITE IT8518
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
KBC-ITE IT8518

C2 1 1
0 . 1u _ 1 6V_ Y 5V_ 0 4
W25 0H U
R3 28 *0 _ 0 4
W E B_ E MAI L # [3 0 ]
AP _ K E Y # [3 0 ]
R 33 3
0 _ 04
10/29
K BC_ S P I _ CE #
K B C_ HO LD #
K B-S O 15
K BC_ S P I _ S C LK
RN1 1
2 . 2 K _8 P 4 R_ 0 4
8 1
7 2
6
5
3
4
K B-S I 3
K B-S I 1
K B-S O 11
K B-S O6
K B-S I 7
K B-S O 15
K B-S O5
K B-S O4
K B-S O7
K B-S O0
K B-S I 0
R 3 66 47 _ 0 4
R 3 55 15 _ 1 %_ 0 4
K B-S O 13
K B-S I 2
K B-S O2
K B-S O3
K B-S O8
K B-S O 10
NC 2 * NC_ 0 4
R 3 42 15 _ 1 %_ 0 4
K B-S O 14
K B-S O9
K B-S O 12
K B-S I 4
K B-S O1
R 3 59 47 _ 0 4
K B-S I 5
K B-S I 6
CC D_ DE T #
P CL K _ K BC
E C_ VC C BAT _ DE T
J _ K B1
*8 5 20 1 -2 40 5 1
2 4
2 3
2 2
1 4
1 2
1 1
2 1
8
2 0
1 9
6
5
1 8
4
1 7
1 0
9
7
3
2
1
1 6
1 5
1 3
VD D3
K B C_ AVDD
VD D3
VD D3
8 0C LK
J _8 0 DE BU G1
*8 8 26 6 -0 50 0 1
1
2
3
4
5
VD D3
3. 3 VS
VD D3
8 0D E T # 8 0D E T #
3 I N1
L E D_ AC I N [28 ]
K BC _M UT E # [ 29 ]
RN1 0
1 0 K _8 P 4 R_ 0 4
8 1
7 2
6
5
3
4
W L AN_ L E D# [2 2, 2 8 ]
BAT_ VO LT [3 8]
S C I # [18 ]
S M I # [18 ]
3. 3 VS [3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8, 19 , 2 0, 23 , 2 4 , 25 , 2 8 , 29 , 3 0 , 31 , 3 6 ]
CP U_ F ANS E N [3 0]
VDD 3 [13 , 2 2 , 24 , 3 1 , 32 , 3 8 ]
S U S B# [15 , 2 6 , 31 ]
S U S C# [1 5, 3 3 ]
AL L _S Y S _ P W RG D [1 1 , 1 5, 3 6 ]
CCD _ DE T # [2 3]
L I D_ S W # [1 1 , 30 ]
P W R_ BT N# [1 5 ]
VC HG-S E L [3 8 ]
T HE R M_ VOL T [2 ]
C 26 2
*1 5 p _5 0 V_ NP O _0 4
X4 *M C-1 4 6_ 3 2 . 76 8 K Hz
1 4
3 2
R3 2 7 *1 0 M_ 0 6
MC-146&CM200S
Co-layout
C2 6 5
*1 5 p _5 0 V_ NP O_ 0 4
R 29 3 *1 0 K _ 04
BT _ E N [2 2 , 28 ]
X5 * CM -20 0 S _ 32 . 7 6 8K H z
1 4
3 2
R 29 2 1 0K _0 4
VD D3
K BC_ S P I _ S C LK
CK 3 2 K E
K B-S O 11
K B-S O 6
K B-S I 7
K B-S I 0
K B-S I 3
K B-S I 1
K B-S O 4
K B-S O 7
K B-S O 0
K B-S O 5
K B-S O 8
K B-S O 10
K B-S O 2
P C LK _ K BC _R
K BC_ S P I _ S O
K B-S O 3
K B-S I 2
K BC_ S P I _ S I
K B-S I 4
K B-S O 1
K B-S O 13
K B-S O 12
C2 5 8 0 . 1 u_ 1 6V _Y 5V _0 4
K B-S I 5
K B-S I 6
K B-S O 14
K B-S O 9
K BC_ S P I _ C E #
CK 3 2 K
L CD _BR I GH T NE S S
K/B MATRIX
FLASH
LPC
SMBUS
PS/2
PWM
UART
DAC
CLOCK
IT8518
CIR
ADC
WAKE UP
PWM/COUNTER
LPC/WAKE UP
EXT GPIO
GP INTERRUPT
WAKE UP
GPIO
U2 3
I T8 5 1 8E
W R S T #
14
L P C CL K
13
L AD 0
10
L AD 1
9
L AD 2
8
L AD 3
7
L F R AME #
6
( P D )L P C P D#/ W UI 6 /G P E 6
17
S E RI RQ
5
E C S MI #/ G P D4 ( P U )
15 E C S CI #/ G P D3 ( P U )
23
G A2 0/ G P B5
1 26
K B RS T #/ GP B6 ( P U )
4
K S I 0 / S T B#
58
K S I 1 /AF D #
59
K S I 2 / I NI T #
60
K S I 3/ S LI N #
61
K S I 4
62
K S I 5
63
K S I 6
64
K S I 7
65
K S O 0/P D 0
36
K S O 1/P D 1
37
K S O 2/P D 2
38
K S O 3/P D 3
39
K S O 4/P D 4
40
K S O 5/P D 5
41
K S O 6/P D 6
42
K S O 7/P D 7
43
K S O8 /AC K #
44
K S O 9/ BUS Y
45
K S O 1 0/P E
46
K S O1 1 /E RR #
51
K S O1 2 / S LC T
52
K S O1 3
53
K S O1 4
54
K S O1 5
55
V
C
C
1
1
V
S
T
B
Y
2
6
V
S
T
B
Y
50
V
S
T
B
Y
9
2
V
S
T
B
Y
11
4
V
S
T
B
Y
1
2
7
V
S
T
B
Y
1
21
V
B
A
T
3
A
V
C
C
7
4
P S 2C LK 0 / G P F 0 ( P U )
85
P S 2D AT0 / G P F 1 ( P U )
86
P S 2C LK 1 / G P F 2 ( P U )
87
( P D )T MR I 0/ W UI 2 /GP C 4
12 0
( P D )T MR I 1/ W UI 3 /GP C 6
12 4
L P C RS T #/W UI 4 / GP D 2 ( P U )
22
( P D )W UI 5 /G P E 5
35
P W RS W /G P E 4 ( P U )
1 25
R I 1 #/W U I 0 /GP D 0( P U )
18
R I 2 #/W U I 1 /GP D 1( P U )
21
( P D ) RI NG #/ P W RF AI L #/L P CR S T#/G P B7
11 2
T XD/ G P B1 ( P U )
1 09 R XD/GP B 0( P U )
1 08
( P D )C TX/G P B2
12 3
P S 2D AT1 / G P F 3 ( P U )
88
P S 2C LK 2 / G P F 4 ( P U )
89
P S 2D AT2 / G P F 5 ( P U )
90
( P D )T AC H0 /GP D 6
47
( P D )T AC H1 /GP D 7
48
P W M0 / GP A0 ( P U )
24
P W M1 / GP A1 ( P U )
25
P W M2 / GP A2 ( P U )
28
P W M3 / GP A3 ( P U )
29
P W M4 / GP A4 ( P U )
30
P W M5 / GP A5 ( P U )
31
P W M6 / GP A6 ( P U )
32
P W M7 / GP A7 ( P U )
34
AD C0 /GP I 0
66
AD C1 /GP I 1
67
AD C2 /GP I 2
68
AD C3 /GP I 3
69
AD C4 /GP I 4
70
AD C5 /GP I 5
71
AD C6 /GP I 6
72
AD C7 /GP I 7
73
V
S
S
1
V
S
S
12
V
S
S
2
7
V
S
S
49
V
S
S
1
22
V
S
S
1
1
3
A
V
S
S
7
5
C K 3 2K E
2
C K 3 2K
12 8
D AC3 /GP J 3
79 D AC2 /GP J 2
78 G P J 1
77 G P J 0
76
( P D )E GCS #/G P E 2
83
( P D )E GCL K /G P E 3
84
( P D )E G AD/G P E 1
82
G I NT / GP D5 ( P U )
33
L 8 0 LL AT /GP E 7 ( P U )
20
V
S
S
9
1
D AC5 /GP J 5
81 D AC4 /GP J 4
80
P W URE Q #/GP C 7( P U )
16
( P D )C RX/GP C 0
11 9
( P D )K S O1 6 /GP C 3
56
( P D )K S O1 7 /GP C 5
57
( P D )GP H 0/ I D 0
93
( P D )GP H 1/ I D 1
94
( P D )GP H 2/ I D 2
95
( P D )GP H 3/ I D 3
96
( P D )GP H 4/ I D 4
97
( P D )GP H 5/ I D 5
98
( P D )GP H 6/ I D 6
99
( P D )GP G 1/ I D 7
10 7
S M CL K 0 /GP B3
1 10
S M DAT 0 /GP B4
1 11
S M CL K 1 /GP C 1
1 15
S M DAT 1 /GP C 2
1 16
S M CL K 2 /GP F 6 ( P U )
1 17
S M DAT 2 /GP F 7 ( P U )
1 18
F L F R AME #/GP G 2
10 0
F L AD0 /S C E #
10 1
F L AD 1/ S I
10 2
F L AD2 /S O
10 3
F L AD3 /GP G 6
10 4
F L CL K /S CK
10 5
( P D )F LR S T #/W U I 7 / GP G 0/T M
10 6
( P D )L 80 H LAT /G P E 0
19
LOW ACTIVE
C 30 3 *3 3p _ 5 0V _N P O_ 0 4
3 G_ P W R _E N [2 3]
K BC_ S P I _ CE # C 28 4 *3 3p _ 5 0V _N P O_ 0 4
C 29 0 *3 3p _ 5 0V _N P O_ 0 4
K BC_ S P I _ S CL K
K BC_ S P I _ S O
C 29 7 *3 3p _ 5 0V _N P O_ 0 4
K BC_ S P I _ S I
. L 21 HCB 10 0 5K F -12 1 T 20
MO DE L_I D
X V 1. 0
RB
C2 1 9 *0 . 1u _ 1 0V_ X5 R_ 0 4
W 24 0H U
R3 1 2 *1 0_ 0 4
11/02
R A
3 G_ DE T#
1 0K
BAT_ VO LT
80 CL K
RB
RA
C2 1 7 1 u _6 . 3 V_ Y 5 V_ 04
.
L1 9
HCB1 0 0 5K F -12 1 T 20
BAT _ VOL T
E C _V S S
P C LK _ K BC
L CD _B RI GH T NE S S
K BC _W RE S E T #
C2 4 6 *1 0 p _5 0 V_ NP O _0 6
S M D_ BAT
M ODE L_ I D
R 29 9
1 0 0K _ 0 4
C2 5 2
0 . 1u _ 1 6V_ Y 5V_ 0 4
S M C_ BAT
HIGH ACTIVE
C CD_ D E T#
BAT _ DE T
VDD 3
3G _ E N [2 3 ]
AC_ I N#
J _K B2
8 5 2 01 -2 4 05 1
2 4
2 3
2 2
1 4
1 2
1 1
2 1
8
2 0
1 9
6
5
1 8
4
1 7
1 0
9
7
3
2
1
1 6
1 5
1 3
K B C_ S P I _ S I _ R
K B C_ HO LD #
K B C_ S P I _ CE #_ R
VDD 3
K B C_ F L AS H
K B C_ S P I _ S CL K _ R
U 3 1
M X25 L 3 20 6 E
P C B F o otp ri nt =AC A-S P I -0 0 4-T 0 3
CE #
1
S O
2
W P #
3
VS S
4
S I
5
S CK
6
H OL D#
7
VD D
8
Co-lay SPI ROM
K B C_ S P I _ S O_ R
ME _W E [1 3 ]
K B C_ AGN D
S MD _ BAT
K BC _AG ND
S MC _ BAT
CH G_ E N [38 ]
S W I # [1 5 ]
K BC _R S T # [1 8 ]
DD _ ON [26 , 3 1 , 32 ]
CC D_ E N [23 ]
RS MRS T # [1 5 ]
3I N 1 [2 2 ]
8 0 CL K [22 ]
BK L _ E N [1 1 ]
W L AN_ DE T# [2 2 ]
L P C _AD 0 [1 3 , 23 ]
T P _ DAT A [30 ]
L P C _AD 1 [1 3 , 23 ]
L P C _AD 2 [1 3 , 23 ]
S E RI R Q [13 , 2 3 ]
BUF _ P L T_ R S T# [1 7 , 2 2, 2 4 , 2 6]
L P C_ F RA ME # [1 3, 2 3 ]
S M D_ BAT [38 ]
S M C_ BAT [38 ]
S MD_ C P U_ T HE R M [2 , 1 4]
T P _ CL K [30 ]
L P C _AD 3 [1 3 , 23 ]
3 G_ DE T # [2 3 ]
P W R_ S W # [3 1]
P CL K _ K BC [1 7]
H _P E CI [3 , 18 ]
AC_ I N# [26 , 3 8 ]
S MC_ C P U_ T HE R M [2 , 1 4]
LE D _ P W R [2 8]
BRI G HT NE S S [1 1 ]
BAT _ DE T [3 8 ]
W 25 0H UQ
W 27 0H UQ
L E D_ CAP # [2 8 ]
LE D _ BAT_ F U LL [2 8]
L E D_ NU M# [2 8 ]
W 24 0HU /W 27 0HU
W L AN_ E N [2 2, 2 8 ]
CP U _F AN [3 0]
L E D _BAT _ CH G [28 ]
C 26 4
0 . 1 u_ 1 6 V_Y 5 V_0 4
HS P I _M S I [1 3 ]
K B C_ BE E P [2 9]
GA2 0 [1 8 ]
HS P I _C E # [1 3]
HS P I _S C L K [1 3]
HS P I _M S O [1 3 ]
R2 8 8 *1 0 m i l _ 0 4
BT _D E T # [22 , 2 8 ]
8 Mb it
T OT AL _C UR [3 8 ]
K B C_ F L AS H
K BC_ W R E S E T #
R3 4 6 4 . 7 K _ 04
R3 6 0 1 K _ 0 4
U 3 0
* S S T 2 5VF 0 8 0 B S O8
CE #
1 S O
2
W P #
3
VS S
4
S I
5
S CK
6
H OL D#
7
VD D
8
K B C_ S P I _ S O_ R K BC_ S P I _ S O
K BC_ S P I _ S I K B C_ S P I _ S I _ R
KBC_SPI_*_R = 0.1"~0.5"
K B C_ S P I _ S CL K _ R
K B C_ S P I _ CE #_ R
LE D_ S CR OL L # [2 8 ]
AP _ K E Y #
M ODE L_ I D
W E B_ W W W # [3 0 ]
C 23 8
0 . 1 u_ 1 6 V_Y 5 V_0 4
R3 3 6 *0 _ 0 4
11/01
R3 35 *0 _ 04
R3 3 0 0_ 0 4
P M E # [17 ]
C 2 88
0 . 1u _ 1 6V_ Y 5V_ 0 4
P MP C H_ P W R OK _ R
10K
R 30 0 *0 _ 0 4 AC_ P RE S E NT [15 , 1 7 ]
1 J_KB1
L AN_ P C I E _W AK E # [24 ]
24
C 2 56
0 . 1 u _1 6 V_ Y 5 V_ 04
X
R3 29 0 _0 4
C2 3 4
0 . 1u _ 1 6V_ Y 5V_ 0 4
R3 06 *0 _ 0 4
11/ 03
R3 15 *0 _ 0 4
R6 06 0 _0 4
H_ P RO CH OT _ E C [3 ]
C2 6 6
10 u _ 10 V_ Y 5 V_ 0 8
C 2 50 0 . 1 u _1 6 V_ Y 5 V_ 04
R 30 3 *0 _ 0 4
P M_ P C H_ P W RO K [1 5 ]
CE L L _C ON TR OL [3 8 ]
3 G_ DE T #
VDD 3
C 23 3
*0 . 1 u _1 6 V_ Y 5 V_ 04
AP _ K E Y #
OC P P E # [1 8]
P ME #_ R
P M _P C H_ P W R OK [1 5 ]
VC ORE _ O N [3 6 ]
C 2 22
0 . 1 u _1 6 V_ Y 5 V_ 04
11/04
R3 5 3
1 00 K _ 0 4
11/29
R3 31 0 _0 4
R 32 0 0 _0 4 8 0 P ORT _ DE T #
S U S _P W R_ ACK [1 5 ]
R3 2 6 *0 _ 04 NB _E N AVDD [1 1, 1 6 ]
C2 3 2
*0 . 1 u_ 1 6 V_Y 5 V_0 4
Sheet 27 of 43
KBC-ITE IT8518
Schematic Diagrams
LED, MDC, BT B - 29
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
LED, MDC, BT

1
H1 3
MT H 31 5 D1 1 1
3
4
5 6
9 2
1
H5
MT H3 1 5 D1 11
3
4
5 6
7
8
9 2
1
H6
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9 2
S ATA_ L E D# [1 3 ]
1
H2 4
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9 2
1
H1 1
MT H 31 5 D1 1 1
3
4
5 6
7
8
9 2
1
H1 5
MT H3 1 5 D1 11
3
4
5 6
7
8
9 2
LE D _ BAT _F U LL
LE D _ BAT _C HG
LE D _ P W R
LE D _ ACI N
J _ TP 1
*8 5 20 1 -06 0 5 1
1
2
3
4
5
6
G ND
1 . 5 V
W L AN_ L E D# [2 2 , 27 ]
L 4 1 *2 8 m i l _ 06
R 51 2 * 0 _0 4
S 1
S MD 80 X8 0
1
1
S 2
S MD8 0 X80
1
1
1
H9
MT H3 1 5 D1 11
3
4
5 6
7
8
9 2
1
H7
MT H3 1 5 D1 1 1
3
4
5 6
7
8
9 2
1
H2 5
MT H 31 5 D1 1 1
3
4
5 6
7
8
9 2
1
H2 2
MT H3 1 5 D1 11
3
4
5 6
7
8
9 2
1
H1 6
MT H 31 5 D1 1 1
3
4
5 6
7
8
9 2
L E D _AC I N [2 7 ]
BT _E N #
R4 73
*2 8 m i l _ 0 6
C4 64
*1 0u _ 6 . 3V_ X5 R_ 0 6
3 V_ BT 3 . 3V
50 mil 50 mi l
3V _BT
BT _ E N#
US B_ P N 11 [1 7 ]
BT _D E T # [2 2, 2 7 ]
Port 11
US B_ P P 1 1 [1 7 ]
J _ BT 1
*8 7 2 12 -0 6 G0
1
2
3
4
5
6
Bluetooth(Port8)
BT _ E N
Q 24
*M T N7 0 02 ZHS 3 G
D
S
3. 3 V
R 32 3
*1 0 K _ 04
C2 5 9
*1
8
0p
_
5
0V
_
N
P
O
_
04
L E D_ P W R [27 ]
6-52-52001- 027
6-52-52001- 027 6- 52-52001- 027 6-52-52001-027
R 36 2
2 2 0_ 0 4
J _M DC 1
*8 8 0 18 -1 2 0G
GN D
1
Aza l i a _ S DO
3
GN D
5
Aza l i a _ S Y N C
7
Aza l i a _ S DI
9
Aza l i a _ RS T #
1 1
Aza l i a _ BCL K
1 2 GN D
1 0 GN D
8 3 . 3V M a i n / a u x
6 RE S E R VE D
4 RE S E R VE D
2
R3 6 1
2 20 _ 0 4
H DA_ S DI N 1_ R
HD A_ S Y N C_ MD C [1 3 ]
HD A_ S DO _M DC [1 3 ]
R3 2 2 *3 3 _ 04
HD A_ S DI N 1 [1 3 ]
HD A_ RS T #_M DC [1 3 ]
NUM
LOCK
LED
CAPS
LOCK
LED
LED
BAT LED
SCROLL
LOCK
LED
POWER ON
LED
3 1
WLAN
LED
2 4
S
G Y
D 1 5
K P B-30 2 5 Y S G C
13
24
BT
LED
H 10
H 6_ 3 D4 _ 4
R 3
2 2 0_ 0 4
D4
R
Y
-
S
P
17
0
Y
G
3
4
-5
M
A
C
Q1
DT C1 1 4 E UA
C
E
B
Q 3
*D TC 11 4 E UA
C
E
B
D3
R
Y
-S
P
1
7
0
Y
G
3
4-
5M
A
C
R6
2 20 _ 04 R 5
2 2 0 _0 4
R4
22 0 _0 4
S
G
Y
D 1
K P B-3 0 2 5Y S GC
13
24
S
G Y
D 1 4
K P B-30 2 5 Y S GC
13
24
D5
R
Y
-S
P
17
0
Y
G
3
4
-5M
A
C
R7
22 0 _ 04
3. 3VS 3 . 3VS 3. 3 VS
3 . 3 VS 3 . 3 VS
W LA N_ E N [2 2 , 2 7]
BT_ E N [2 2, 2 7 ]
B T_ E N
L E D _C AP # [2 7] L E D_ S CR OL L # [2 7 ] LE D _ NUM # [27 ]
3. 3 V [2 , 3 , 8 , 11 , 1 3, 14 , 1 5, 17 , 1 8, 19 , 2 0, 22 , 2 3, 2 6 , 3 0, 3 1 , 3 3, 3 4 , 3 5]
3. 3 VS [ 3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4, 15 , 1 6, 17 , 1 8, 19 , 2 0, 23 , 2 4, 2 5 , 2 7, 2 9 , 3 0, 3 1 , 3 6]
HDD/ODD
LED
3 . 3V S
D2
R
Y
-S
P
17
0
Y
G
3
4
-5
M
A
C
R2
22 0 _0 4
MJ _MDC1
12
1
11
L E D_ BAT _ F UL L [27 ]
2
20 MI L
10mil
C2 55
*2 2p _ 5 0V_ N P O_ 0 4
GN D
C 2 37
* 0 . 1u _ 1 6V_ Y 5 V_ 0 4
3. 3V
3. 3 V
H DA_ BI T CL K _ MDC [1 3]
MD C_ 3 . 3 V
1. 5 V [3 , 6, 8 , 9 , 1 0, 2 0 , 2 6, 3 1 , 3 3]
R 1
*1 0 mi l _0 4
L E D _BA T_ CH G [2 7 ]
M5
M-MA RK 1
M 8
M -MAR K 1
M6
M-MA RK 1
M1
M-M ARK 1
M 3
M -MAR K 1
M 7
M -MAR K 1
M2
M-M ARK 1
M4
M-M ARK 1
10/29
H1 2
H6 _ 3 D4 _4
H2
C1 1 1D 1 11 N
H 14
H 6_ 3 D4 _ 4
H3
C1 11 D 11 1 N
H4
C1 1 1D 1 11 N
R 36 3
2 2 0_ 0 4
R 51 3 * 0 _0 4
H 1
C 1 11 D 11 1 N
H 20
H 4_ 7 B6 _0 D 3_ 7
H 1 8
H 4 _7 B6 _ 0D 3_ 7
H1 7
H6 _ 0 D3 _7
H2 3
C6 7 D6 7
H8
C6 7 D6 7
H 19
H 4_ 0 B7 _0 D3 _ 7
H2 1
H4 _ 0 B7_ 0 D3 _ 7
R3 6 4
2 20 _ 0 4
Sheet 28 of 43
LED, MDC, BT
Schematic Diagrams
B - 30 Audio Codec ALC269
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Audio Codec ALC269

R5 2 9 0 _ 04
MI C1 _ L
C5 1 4 4 . 7 u_ 6 . 3 V_X5 R_ 0 6
M I C2 _L
I NT _M I C
C5 1 1 4 . 7 u_ 6 . 3 V_X5 R_ 0 6
M I C2 _R
R345 & R350
AL269 2.2K_04
VT1802P 4.7K_04
R343 & R351
AL269 1K_04
VT1802P 75_04
MI C 1 -VR E F O -L
MI C 1 _R
R3 4 3 1K _ 0 4
MI C1 -R [3 0]
MI C1 -L [3 0 ]
R3 4 5 2. 2 K _ 0 4
MI C 1 -VR E F O -R
R3 5 1 1K _ 0 4
R3 5 0 2. 2 K _ 0 4
MI C 1 _L
ALC269 20K_1%_04
VT1802P 5.1K_1%_04
MI C1 _ R
C118
AL269 680p
VT1802P 330p
S P K O UT R- [ 30 ]
S P K OU TR + [3 0]
LD O_ CAP
C4 9 8
10 u _ 10 V_ Y 5 V_ 0 8
C2 7 0
0 . 1u _ 1 6V _Y 5V _0 4
C2 7 1
0 . 1 u_ 1 6 V_Y 5 V _0 4
C 4 99
*1 0 u_ 1 0V _Y 5V _0 8
P V DD1 _ 2
AU DG
H DA_ RS T#
H E ADP H ON E -R [3 0 ]
C2 8 1
0 . 1u _ 1 6V_ Y 5V _ 0 4
C 29 9
0 . 1 u _1 6 V_ Y 5 V_ 04
C 51 3
10 u _ 10 V_ Y 5 V_ 0 8
R5 2 7 * 0_ 0 4
C 28 0
1 0 u_ 1 0 V _Y 5 V_0 8
C 2 83
0 . 1 u _1 6 V_ Y 5 V_ 04
3 . 3V S
3 . 3 VS _ A UD
DVD D_ I O
3 . 3 VS _ A UD
1 . 5VS
B E E P _R
J_SPKL1
2 1
C4 97
0. 1 u _ 16 V _ Y 5 V_ 0 4
C4 9 6
1 0u _ 1 0V _ Y 5V_ 0 8
ALC269 2.2u
VT1802P NC
C3 0 4 2 . 2 u _6 . 3 V_ X5 R _0 6
C3 0 1 0 . 1 u _1 6 V_ Y 5 V_ 04
ALC269 2.2u; VT1802P 10u
OP VE E -AL C 26 9
CB P -AL C2 6 9
MI C2 _ R
MI C2 _ L
S P K OU T L-
MI C1 -L _ R
MI C1 -R _R
3 . 3 VS [3 , 9 , 1 0, 1 1 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 17 , 1 8 , 19 , 2 0 , 23 , 2 4 , 25 , 2 7 , 28 , 3 0 , 3 1, 3 6 ]
S E NS E _ A
5 VS [ 11 , 1 2 , 19 , 2 0 , 25 , 3 0 , 31 , 3 6 , 37 ]
1 . 5 VS [1 9 , 3 1]
AU DG
E AP D_ M OD E
Ve ry cl os e t o Au di o C od ec
75 Co mponent .
La yo ut N ot e:
DM I C-D AT
Cl osed to SB.
DM I C-C LK
H P _S E NS E
M I C_ S E NS E
S P K OU T L+
C2 7 2 2 . 2 u_ 6 . 3 V_X5 R_ 0 6
R 52 3 20 K _ 1 %_ 0 4
A Z_ S Y NC _R
R 36 9 2 0 K _1 % _ 04 C 50 2 0 . 1 u_ 1 6 V_Y 5 V_0 4
R 35 4 33 _ 0 4
R 36 8 3 9 . 2K _ 1 % _0 4
DIGITAL ANALOG
U2 9
A LC 26 9 Q-V B5-G R
D
V
D
D
1
1
GP I O 0
2
GP I O 1
3
P D#
4
S DAT A-O UT
5
BI T -CL K
6
D
V
S
S
2
7
S DAT A-I N
8
D
V
D
D
-IO
9
S Y N C
1 0
RE S E T #
1 1
P CBE E P
1 2
S en s e A
1 3
L I NE 2 -L
1 4
L I NE 2 -R
1 5
M I C2 -L
1 6
MI C2 -R
1 7
S en s e -B
1 8
J DRE F
1 9
M ON O-OU T
2 0
M I C1 -L
2 1
MI C1 -R
2 2
L I NE 1 -L
2 3
L I NE 1 -R
2 4
A
V
S
S
1
2
6
VRE F
2 7
LD O_ CA P
2 8
MI C 2- VRE F O
2 9 M I C1 -V R E F O-R
3 0
M
IC
1
-V
R
E
F
O
-L
3
1
HP -O UT -L
3 2
A
V
S
S
2
3
7
OP VE E
3 4
CBN
3 5
CB P
3 6
HP -OUT -R
3 3
P
V
D
D
1
39
S P K -L +
4 0
S P K -L -
4 1
P
V
S
S
1
42
P
V
S
S
2
4
3
S P K -R+
4 5 S P K -R-
4 4
P
V
D
D
2
4
6
S P DI F C 2 / E AP D
4 7
S P DI F O
4 8
A
V
D
D
2
3
8
A
V
D
D
1
2
5
G
N
D
4
9
C2 7 9
2 . 2 u_ 6 . 3 V_X5 R_ 0 6
C 50 3 0 . 1 u_ 1 6 V_Y 5 V_0 4
C 30 7 4 . 7 u_ 6 . 3 V_ X5 R_ 0 6
C 30 6 4 . 7 u_ 6 . 3 V_ X5 R_ 0 6
AU DG
AUD G
AUD G
HD A_B I TC L K [1 3 ]
H DA_ R S T # [ 13 ]
H DA_ S DI N 0 [13 ]
HD A_ S Y N C [1 3 ]
HD A_S DOU T [1 3 ]
MI C2 -VR E F O
A Z_ S D I N0 _ R
S P DI F O
MI C1 -VR E F O-R
EMI Require
HE AD P HO NE -L
HE AD P HO NE -R
CB N- AL2 6 9
R130
AL269 4.7K_04
VT1802P 2.2K_04
Q2 5
MT N7 0 0 2ZH S 3
G
D S
E AP D _M OD E
C5 1 2 *1 0 0 p_ 5 0 V _N P O_ 0 4
R 5 67 0 _0 4
MON O-O UT
C2 9 1 2 2 p_ 5 0 V _N P O_ 0 4
C 5 09
1 0 u _1 0 V _ Y 5 V_ 0 8
L 40
H CB1 0 0 5K F -12 1 T 20
1 2
C 51 0
0 . 1 u_ 1 6 V_Y 5 V_0 4
C4 9 4
1u _ 6 . 3V_ Y 5V_ 0 4
5 V S _ AU D
AUD G
VT1802P
ALC269 VB
AU DG
5 VS
AUDIO CODEC
LI N E 2 -L
LI N E 2 -R
S E NS E -B
S P K OU TL -_ L
C 2 93
* 1 u_ 6 . 3 V_Y 5 V_0 4
S P K O UT L-
S P K OU TL +_ L
L2 4
F CM 10 0 5 K F -12 1 T 03
1 2 S P K O UT L+
C2 8 9
*1 8 0p _ 5 0V_ N P O_ 0 4
C2 9 5
*1 8 0p _ 5 0V_ N P O_ 0 4
L 2 3
F C M1 0 05 K F -1 2 1T 0 3
1 2 7/ 16
J _ S P K L 1
85 2 0 4-0 2 0 01
1
2
I NT _ MI C
MI C 2 -VR E F O
1
C 1 18
6 8 0 p_ 5 0 V_X7 R_ 0 4
2
J_INTMIC1
J _ I NT MI C 1
8 8 2 66 -0 2 00 1
1
2
R 13 0 4. 7 K _ 0 4
R 12 8 1K _ 0 4
LI N E 1 -L
MI C 1-V RE F O -L
LI N E 1 -R
Q 39
*2 N7 0 02 W
G
D
S
AUD G
HE A DP H ONE - L
3 . 3 VS
HE A DP H ONE - R
R 5 68
* 2 20 K _ 0 4
Q 3 8
* AO3 4 1 5
G
D
S
R5 7 1
*1 0 K _ 04
AUD G
C 53 8
* 10 u _ 6. 3 V_ X5R _ 06
R5 7 0
*1 0 K _0 4
Headphone Anti-Pop Circuit
E A P D_ MO DE
R 5 69
* 4 . 7K _ 0 4
Q4 0
*2 N 70 0 2 W
G
D
S
3 . 3V S
VR E F -A L C 26 9
PD#
AZ_RST#
20ms
5V S
Speaker 4 ohm- -- --- > 40mil s
SPKOUTR+,R- ,L+,L- Tr ace wi dth
Speaker w ir e length l ess than 8000mi ls , I t don't need LC Fi lter .
3.3VS_AUD
Speaker 8 ohm- -- --- > 20mil s
MI C _ S E NS E [3 0 ]
C2 9 8 2 . 2 u _6 . 3 V_ X5 R _0 6
H E ADP H ON E -L [30 ]
B E E P _C BE E P C
A
A
D 13
BAT 5 4 CW G H
1
2
3
C3 09
1u _ 6 . 3V_ Y 5V_ 0 4
R 3 6 5
4. 7 K _ 0 4
R3 6 7 4 7K _ 0 4
C3 08
10 0 p _5 0 V_ NP O _0 4
HD A_ RS T #
Q 2 7
*B S S 1 3 8_ N L G
D
S
FOR VOLUMN
ADJUST
H DA_ S P K R [ 13 ]
K B C _B E E P [ 27 ]
D1 9 R B7 51 S -4 0 C2
A C
R 51 4 *1 0 0K _ 0 4
Q 32
* MT N7 0 0 2Z HS 3 G
D
S
R 51 8
1 0 K _0 4 D1 8 R B7 51 S -4 0 C2
A C
5 VS
5 V S
K BC _ MU TE # [27 ]
J D RE F
HD A_ RS T #
P D#
D2 1 * R B7 5 1 S -40 C 2
A C
5 VS
R5 1 0 *2 8 mi l _0 6
.
L 3 9
H CB1 6 08 K F -1 2 1 T2 5
HP _ S E N S E [3 0 ]
Sheet 29 of 43
Audio Codec
ALC269
Schematic Diagrams
USB, Fan, TP, Multi-Conn B - 31
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
USB, Fan, TP, Multi-Conn

AP _ K E Y #
80 mil
Port 1
W240HU 317DE04PSA7A2C
W250HU 1-284-800281-1
AU S B_ P N1 _ R
AU S B_ P P 1_ R
L I D_ S W #
D D_ ON # [3 1 , 3 3]
M_ BT N#
F O N#
W E B_ E MA I L#
W E B_ W W W #
R 13 1 *2 8 mi l _ 06
C4 93
*0 . 1u _ 1 6V_ Y 5V_ 0 4
C 11 4
4 7 p_ 5 0 V_N P O_ 0 4
U3 8
AX99 5 S A
VOUT
3
G ND
5
VI N
2 F ON
1
VS E T
4 G ND
6 G ND
7 G ND
8
R1 0 7 *0 _ 0 4
C2 0 5
0 . 1u _ 16 V_ Y 5 V_ 0 4
R 34 0 2 2 0_ 0 4
L 6 2
H CB1 6 08 K F -1 2 1T 2 5
+
C 48 8
1 0 0u _ 6 . 3V_ B_ B
J _ S W 2
* 50 5 0 0-0 1 0 41 -0 01 L
1
2
3
4
5
6
7
8
9
1 0
C5 0 1 0 . 1 u_ 1 6 V_Y 5V _0 4
C2 9
0 . 0 1u _ 1 6V_ X7 R_ 04
J _ US B_ 1
3 1 7 DE 0 4P S A7A2 C
V+
1
G
N
D
1
G
N
D
1
DAT A_ L
2
DAT A_ H
3
GN D
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
R 33 9 2 2 0_ 0 4
R1 1 3 *0 _ 0 4
R 12 7
1 0 K _ 04
Q 9
* MT N7 0 02 ZH S 3 G
D
S
C 49 2
0 . 1 u_ 1 6 V_Y 5V _0 4
C 27
0. 0 1 u _1 6 V_ X7 R_ 0 4
J _ AUD I O1
8 72 1 3-1 4 0 0G
1
2
3
4
5
6
7
8
10
11
12
13
14
9
C 49 1
1 0 u_ 6 . 3V _X5 R_ 0 6
C 45 6
1 0 u_ 6 . 3 V_X5 R_ 0 6
U4 0
RT 9 7 15 BGS
VO UT 1
6
VO UT 3
8
VI N2
3
VI N1
2
VO UT 2
7
G ND
1
E N#
4
F LG #
5
R 20 2 4 . 7K _0 4
J _ F AN 1
8 5 20 5 -03 7 0 1
1
2
3
C 1 13
1 u _ 6. 3 V_ Y 5 V_ 0 4
C 94
0 . 1 u _1 6 V_Y 5 V_0 4
L 1 3 *W C M2 0 12 F 2 S -S HO RT
1
4
2
3
C 11 5
4 7 p _5 0 V_N P O_ 0 4
J _ S W 1
8 8 48 6 -0 80 1
1
2
3
4
5
6
7
8
R5 2 4 *0 _0 4 J _ T P 2
8 5 2 01 -0 4 05 1
1
2
3
4
R 12 9
1 0 K _ 04
C2 2 3 0 . 0 1 u_ 1 6V_ X7 R_ 0 4
5 VS
3. 3 VS
5VS _ F AN
5V S _F AN
5 VS
5 VS _ TP
5 VS
3 . 3 V 3. 3 VS
VI N
3 . 3 V 3 . 3VS
U S BVC C
US BVCC
5 V
G_ US BVC C
CP U _ F AN [2 7 ]
5 V
AUD G
M_ BTN # [31 ]
TP _ CL K [2 7 ]
TP _ DA TA [2 7 ]
C P U_ F AN S E N [2 7]
W E B_ W W W # [27 ]
LI D _S W # [1 1 , 2 7]
W E B_ E MAI L # [27 ]
US B_ OC #01 [1 7 ]
AP _ K E Y # [2 7]
AP _ ON [3 1 ]
M I C1 -L [2 9]
HP _ S E NS E [2 9 ]
M I C_ S E NS E [29 ]
HE A DP HO NE -L [2 9 ]
HE A DP HO NE -R [2 9 ]
M I C1 -R [2 9]
U S B_P P 9 [17 ]
US B_ P N 9 [1 7 ]
S P K OU TR - [2 9 ]
S P K OU TR + [2 9 ]
5 V [2 0, 2 3 , 2 6, 3 1 , 3 3, 3 4 , 3 5]
U S B_ P P 1 [1 7]
U S B_ P N1 [1 7]
VI N [1 1, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 6, 3 7 , 3 8]
3 . 3 V [2 , 3 , 8 , 11 , 1 3 , 14 , 1 5, 17 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 2 6 , 2 8, 3 1 , 3 3, 3 4 , 3 5]
5 VS [1 1, 1 2 , 1 9, 2 0 , 2 5, 2 9 , 3 1, 3 6 , 3 7]
U S BVCC [2 6]
3 . 3 VS [3, 9 , 1 0 , 11 , 1 2 , 13 , 1 4 , 15 , 1 6, 17 , 1 8, 1 9 , 2 0, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 1 , 3 6]
CO-LAY USB 3.0 J_USB2
Audio B'd CONN
FAN CONTROL
CLICK B'd CONN
F L G#
100 MIL
POWER SWITCH B'd CONN
3
JFAN
1
C5 4 6
*0
.1
u
_1
6
V
_
Y
5V
_
0
4
USB 2.0
C 5 47
*
0.
1u
_
16
V
_
Y
5
V
_
04
I f systemhas AP ON f uncti on, uses J _SW1
I f systemhas no AP ON f uncti on, uses J _SW2
M_ BT N#
AP _K E Y #
CLOSE TO J_SW1
AP _ ON
LI D _ S W #
W E B_ W W W #
20 mi l
W E B_ E MAI L #
20 mi l
1.1A 60mils
S P K _ H P #
H E ADP H ONE -LL
M I C_ S E NS E
H E ADP H ONE -RR
H P _S E NS E
S P K O UT R+
S P K O UT R-
Sheet 30 of 43
USB, Fan, TP,
Multi-Conn
Schematic Diagrams
B - 32 5VS, 3VS, 1.05VS, 1.5VS_CPU
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
5VS, 3VS, 1.05VS, 1.5VS_CPU

P R2 3 4 *1 0 K _ 0 4
5 VS _ E N 1
5VS
NMOS
P C9 6
0 . 1u _ 1 6V_ Y 5V _0 4
VI N
P R2 2 6 1 K _ 0 4
P J 1 5
* OP E N _5 A
1 2
C 22 4
0 . 0 1 u_ 1 6 V_X7 R_ 0 4
P R 23 2
*1 0 0 K _ 04
10A
C 2 25
0 . 0 1 u_ 1 6 V_ X7 R _0 4
10/29
5 V_ E N1
ON
DD_ON" L" TO
" H" FROM EC S US B
ON
ON
PJ15 MUST SHORT
D D_ O N
1
.5
V
S
_
C
P
U
_L
O
S U S B
1 . 5 VS _ CP U E N
NMOS
ON
1.5VS_CPU
3 . 3 VS _ E N1
S US B
1 . 5 VS _ E N
P R2 3 3
*1 00 K _ 0 4
NM OS
ON
3A
3A
1.5VS
Power Plane
3A
3A
3.3V
5V
Power Plane
3.3VS
1.5
V
S
_
L
O
ON
C 5 05
0 . 0 1 u _1 6 V_ X7 R _0 4
ON
NMOS
DD _ ON#
D D_ ON
3.3
V
S
_
L
O
ON
P R 23 1
1 0 0K _ 0 4
ON
3 . 3 V_E N1
DD _O N#
S US B
NMOS
P R2 2 7 1 K _ 0 4
10/28
P C2 1 7
0 . 1u _ 1 6V _Y 5V _0 4
11/02
NMOS
C 5 04
0 . 0 1 u_ 1 6 V_ X7 R _0 4
P Q 6 5B
M TN N2 0 N0 3 Q8
6
5
4
P C1 10
0 . 1 u _5 0 V_ Y 5 V_ 0 6
P Q4 8 B
* MT N N2 0N 0 3Q 8
6
5
4
P Q 20 B
MT N N2 0 N0 3 Q8
6
5
4
S US B [3 , 6, 3 3 , 3 4]
P C2 2 1
4 70 p _ 50 V_ X7 R_ 04
P R7 2
* 2 20 _ 0 4
P R 22 0
1 00 K _ 0 4
P J 1 9
* 4 0m i l
1
2
P R2 2 5
1 M_ 0 4
P R 2 23
1 M_ 0 4
P C4 6
*2 20 0 p _5 0 V_ X7R _ 04
P R 10 2
1 00 _ 0 4
P C2 16
1 0 u _6 . 3 V_ X5R _ 06
P Q4 8 A
*M TN N2 0 N0 3 Q8
1
3
7
2 8
P Q 6 6A
M T NN2 0 N0 3 Q8
1
3
7
2 8
P R 22 1
1 0 0K _ 0 4
P J 2 0
*4 0m i l
1
2
P Q 2 1B
M TN N2 0 N0 3 Q8
6
5
4P C1 8 0
*0 . 1 u_ 1 0 V_ X7 R _0 4
P C 1 79
* 10 u _ 6. 3V_ X5 R_ 0 6
P Q 16
MT N 70 0 2 ZHS 3
G
D
S
P U 7
P 2 8 08 B0
VA
1
VI N
2
M_ BT N#
3
I NS T AN T- ON
4
GN D
5
P W R _S W #
6
DD_ O N_ L ATC H
7
VI N 1
8
P Q6 4 B
MT NN 20 N 03 Q 8
6
5
4
P C 2 22
4 7 0p _ 5 0 V_X7 R_ 0 4
R3 7 1 1 K _0 4
P R2 1 8
1M _ 04
P R 10 9
1 M_ 0 4 P R7 1
*1 M_ 0 4
P Q2 1A
M T NN 20 N0 3 Q8
1
3
7
2 8
P C9 5
2 20 0 p _5 0 V_ X7 R _0 4
P Q6 4 A
MT NN 2 0N 0 3Q 8
1
3
7
2 8
P R 22 4
1 0 K _ 04
S
D
G
P Q6 7 A
M TD N7 0 0 2ZH S 6 R
2
6
1
P C2
0 . 1u _ 5 0V _Y 5V _0 6
P Q1 1
* MT N7 0 0 2Z HS 3
G
D
S
P R 21 9
1 0 0_ 0 4
P C 89
4 7 0p _ 5 0V_ X7 R_ 0 4
S
D
G
P Q6 7 B
MT D N7 0 02 ZH S 6 R
5
3
4
P Q6 6 B
M TN N2 0 N0 3 Q8
6
5
4
P R1 1 1
1 M_ 0 4
P Q 63
MT N 70 0 2 ZHS 3
G
D
S
P R1 2 3 1 0K _ 0 4
P C2 1 2
47 0 p _5 0 V_ X7R _ 04
P C 1 11
0 . 1 u _5 0 V_ Y 5 V_ 0 6
P C 9 4
1 0 u _6 . 3 V_ X5R _ 06
P R 22 2
1 0 K _0 4
P Q 20 A
M TN N2 0 N0 3 Q8
1
3
7
2 8
P Q6 5 A
M T NN 20 N 03 Q8
1
3
7
2 8
3. 3 V 3 . 3 VS
5 V
S Y S 1 5V
S Y S 1 5V
3 . 3 VS
VDD 3 S Y S 15 V VDD 3
VDD 5
S Y S 5 V
5 V
3 . 3V
1 . 5 V
VD D3
V A
1 . 5 VS
S Y S 15 V
1 . 5 V
VI N VI N 1
1 . 5 V_ CP U
S Y S 1 5 V
S Y S 5 V
5 VS S Y S 1 5 V VD D5
D D_ O N [26 , 2 7 , 32 ] S U S B# [1 5 , 2 6 , 27 ]
3 . 3VS [3, 9, 1 0 , 1 1, 1 2 , 1 3 , 14 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0, 3 6 ]
VDD 5 [26 , 3 2 ]
VDD 3 [13 , 2 2 , 2 4, 2 7 , 3 2, 38 ]
DD _ ON # [3 0 , 3 3 ]
P W R_ S W # [2 7 ] M_ BT N # [3 0 ]
AP _ O N [30 ]
VI N1 [3 2 ]
3 . 3 V [2 , 3 , 8, 1 1 , 1 3 , 14 , 1 5 , 17 , 1 8 , 1 9, 2 0 , 2 2, 23 , 2 6 , 28 , 3 0 , 3 3, 3 4 , 3 5]
VI N [1 1, 30 , 3 2 , 33 , 3 4 , 3 5, 3 6 , 3 7, 3 8 ]
1 . 5V [3, 6 , 8 , 9 , 1 0, 2 0 , 2 6, 28 , 3 3 ]
1 . 5 VS [1 9 , 29 ]
5 V [2 0, 2 3 , 2 6, 30 , 3 3 , 34 , 3 5 ]
5 VS [1 1 , 1 2, 1 9 , 2 0 , 25 , 2 9 , 30 , 3 6 , 3 7]
S Y S 1 5V [32 , 3 4 ]
1 . 5V_ C P U [3 , 6 ]
S U S B [3 , 6, 33 , 3 4 ]
VA [3 8 ]
11/03
P C2 19
0 . 1 u _1 6 V_ Y 5 V_ 0 4
R 60 4 1 K _ 0 4
C5 0 6
0. 0 1 u _1 6 V_ X7 R _0 4
DD _O N#
C2 4 7
0. 0 1 u _1 6 V_ X7R _ 04
Sheet 31 of 43
5VS, 3VS, 1.05VS,
1.5VS_CPU
Schematic Diagrams
VDD3, VDD5 B - 33
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
VDD3, VDD5

11/05
P
C
7
1
0.
1u
_
1
0V
_
X
5
R
_
0
4
P D 6
C
S
O
D
1
40
S
H
A
C
US B_AC _ I N [3 8 ]
VD D5 [2 6, 3 1 ]
VD D3 [1 3, 2 2 , 2 4 , 27 , 3 1 , 38 ]
VI N [1 1, 3 0 , 3 1, 3 3 , 3 4, 35 , 3 6 , 37 , 3 8 ]
E N_ AL L
5A
5A
Rb
Ra
E N_ 3 V
E N_ 5 V
E
N
_3
V
5
V
DD _O N_ E N _VD D
E N_ 3 V
M990125
E N_ 5 V
P R2 1 3
2 . 2_ 0 6
VDD5 VDD3
+
P C 6 3
2 2 0 u_ 6 . 3 V_6 . 3 *6 . 3 *4 . 2
P R7 5
3 0K _ 1 % _0 6
P R2 1 4 * 0 _0 4
P C2 0 1
1 0 0 0p _ 5 0V _X7 R_ 0 4
P Q 60
P 1 2 03 BV
4
6
2
5 7
31
8
P D 8
* RB0 5 4 0S 2
A C
P C7 2
0
.1
u
_1
6
V
_
Y
5V
_0
4
P C2 0 4 0 . 1u _ 1 0V _X7 R_ 0 4
P C 64
4 . 7 u_ 2 5 V_X5 R_ 0 8
P Q1 8
M
T
N
70
0
2
Z
H
S
3
G
D
S
P R2 0 9
* 6 80 K _ 1 % _0 4
P R2 12
* 0 _0 4
P R2 0 1 *1 0 K _ 04
P J 10
*5 m m
1 2
P L 9
4 . 7 UH _ 6. 8 * 7. 3 *3 . 5
1 2
P Q 1 4
MT N7 0 02 ZH S 3
G
D
S
P C5 8
0 . 1u _ 1 6V_ Y 5V _0 4
P J 1 1
*4 0 m il
1
2
P C6 8
2 20 0 p _5 0 V_ X7 R _0 4
P R 19 8
1 00 K _ 0 4
P C1 9 9
1 u _ 10 V_ Y 5V_ 0 6
P D1 9 R B0 54 0 S 2
A C
P D 7
*R B0 54 0 S 2
A C
P C6 1
1 0 0 0p _ 5 0V_ X7 R_ 0 4
P C2 0 6
0 . 1 u _5 0 V_ Y 5 V_ 0 6
P C1 9 5
1 u _ 10 V_ Y 5 V_ 0 6
P C6 9
2 20 0 p _5 0 V_ X7 R _0 4
P R7 6
13 K _ 1 %_ 0 6
P U1 1
uP6182
V
R
E
F
3
E
N
1
1
V
F
B
1
2
T
O
N
S
E
L
4
L
D
O
5
1
7
L GA TE 1
1 9
P HAS E 1
2 0
V
F
B
2
5
U GAT E 2
10
V
C
L
K
18
BO OT 2
9
E
N
2
6
VO 2
7
L DO 3
8
P H AS E 2
11
L GAT E 2
12
E
N
0
1
3
S
K
IP
S
E
L
14
G
N
D
1
5
V
IN
16
UGA TE 1
2 1
BOO T1
2 2
P OK
2 3
VO1
2 4
G
N
D
P
A
D
25
P R 86 * 0 _0 4
P C6 2
10
0
p
_5
0
V
_
N
P
O
_0
4
P D5
*
S
K
3
4
S
A
A
C
P C2 10
0 . 0 1 u_ 5 0 V_ X7 R_ 0 4
P D2 0 R B0 54 0 S 2
A C
P D 9
*S
K
3
4
S
A
A
C
P R2 10
* 0 _0 4
P C2 0 0
4. 7 u _ 25 V_ X5R _ 08
P C 20 3
0 . 1 u_ 1 0 V_X7 R_ 0 4
P D2 4
R B0 5 40 S 2
A C
P C2 09
0 . 0 1 u_ 5 0 V_ X7 R_ 0 4
+
P C6 5
2
2
0u
_
6
.3
V
_6
.3
*6
.3
*4
.2
P R2 1 5 0 _ 0 4
P R7 7 0 _ 0 4
P Q 13
P 1 2 03 BV 4
6
2
57
3 1
8
P D2 2 R B0 54 0 S 2
A C
P C 7 4
4 . 7 u _2 5 V_ X5 R _0 8
P J 8
*5 m m
1 2
P C1 9 8
1 00 0 p _5 0 V_ X7 R _0 4
P C2 0 7
4 . 7 u _2 5 V_ X5R _ 08
P R1 9 7
1 00 K _ 0 4
P R9 0
10 K _ 0 4
P R1 9 4
20 K _ 1 %_ 0 4
P L1 0
4 . 7 UH_ 6 . 8 *7 . 3 *3 . 5
1 2
P R1 9 6
1 9. 1 K _ 1 % _0 6
P R2 11
0 _ 0 4
P C2 0 8
1 u_ 1 0 V_ Y 5 V_ 06
P R 82 0 _ 0 4
P R1 95 * 0 _0 4
P C2 0 5
4 . 7u _ 2 5V _X5 R_ 0 8
P Q1 2
P 1 2 0 3B V
4
6
2
57
3 1
8
P Q 56
P 1 2 03 BV
4
6
2
5 7
31
8
P D2 3 R B0 54 0 S 2
A C
P
R
8
4
10
0
K
_
0
4
S Y S 15 V
S Y S 5V
VD D3
VRE F
VI N
S Y S 3 V
VI N
VRE G 3
S Y S 10 V
VD D5
VRE G5 VI N1
VR E G5
VR E G5
S Y S 5V
VR E F
VR E G5
S Y S 5V
VI N
DD _ ON [2 6 , 2 7, 3 1 ]
VR E G5
VI N 1 [ 31 ]
S Y S 15 V [3 1 , 3 4]
P R 2 28
* 0 _0 4
P Q7 3
MT N7 0 02 ZH S 3
G
D
S
P D2 1
C
S
O
D
1
40
S
H
A
C
Sheet 32 of 43
VDD3, VDD5
Schematic Diagrams
B - 34 Power 1.5V/0.75V/1.8VS
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.5V/0.75V/1.8VS

1 . 8 VS _ P W R GD [3 , 1 5 ]
P C6 6
8 2p _ 5 0V _N P O _0 4
P U 5
AX6 615ESA
GN D
1
VC NT L
6
VO UT
3
VI N
5
VO UT
4
V F B
2
P OK
7
E N
8
VI N
9
P
C
5
9
1
0
u
_6
.3
V
_
X
5
R
_
0
6
P R1 0 5 1 0 0K _0 4
P J 7
* OP E N _ 3A
1 2
P C 8 5
0
.1
u
_1
6
V
_
Y
5
V
_
0
4
P R7 8
1 . 27 K _ 1 % _ 04
P Q 15
M TN 7 00 2 ZH S 3
G
D
S
P C9 0
0
.1u
_
1
6
V
_Y
5V
_0
4
P C 91
1 u_ 1 0 V_ Y 5 V_ 0 6
P
C
57
0
.1
u_
1
6
V
_
Y
5
V
_
04
P
C
6
7
10
u
_
6.
3V
_
X
5
R
_0
6
P C 8 3
1
0
u_
6
.3
V
_
X
5
R
_
0
6
V1 . 8 1 . 8 VS
P R7 9
1K _ 1 % _ 0 4
3 . 3 V
5V
5 V
S U S B [3 , 6 , 3 1, 34 ]
1 . 8 VS _ P W R GD
P R9 2
1 0 0 K _ 0 4
3 . 3 V
E N1 . 8 VS
1.8VS
3A
2A
P R1 1 0 10 K _ 0 4
GS7113
6- 02- 07113- 320
AX6610
6- 02- 06610- 320
3 . 3 V
P Q 5 0
*M DU 26 5 4
4
6
2
57
3 1
8
5 V [2 0 , 2 3 , 2 6, 3 0 , 3 1 , 3 4, 3 5 ]
1 . 5 V [3 , 6 , 8 , 9 , 1 0, 2 0 , 2 6 , 2 8, 3 1 ]
VT T _ ME M [ 9, 1 0 ]
1 . 8 VS [6 , 1 8, 1 9 ]
VI N [1 1 , 3 0, 3 1 , 3 2 , 3 4, 3 5 , 3 6 , 3 7, 3 8 ]
3 . 3 V [2 , 3 , 8 , 11 , 1 3 , 1 4, 15 , 1 7 , 1 8, 19 , 2 0 , 2 2, 2 3 , 2 6 , 2 8, 3 0 , 3 1 , 3 4, 3 5 ]
DD R1 . 5 V_ P W R GD [1 5 ]
P Q5 2
MD U2 6 57
4
6
2
57
3 1
8
+
P C 1 69
*
5
60
u
_
2
.5V
_6
.3
*6
S U S B
1.70V
1.60V
1
0 1
0
0
1.55V
0
V olta g e
1
1.65V
1. 5_ CTRL0 1. 5V _CTRL 1
1
VT TE N
P C 70 0 . 1 u _ 10 V_ X7 R_ 0 4
P Q5 7
*M T N7 0 0 2ZH S 3
G
D
S
P R8 1 0 _ 0 6
P J 12
*4 0 m i l
1
2
P R 1 1 7 10 0 K _ 0 4
P C1 9 4
1 0 u_ 1 0 V_ Y 5 V_ 0 8
1 . 5 V
P C5 5
10 u _ 1 0V _Y 5 V_ 08
P R8 9 2 . 2 _ 0 4
P R 2 05 0 _0 6
P Q5 1
M DU 26 5 4
4
6
2
57
3 1
8
P C 7 6
1
u
_
1
0V
_
Y
5
V
_
0
6
P C5 6
1 0 u _ 10 V_ Y 5V _0 8
P C1 8 8
0
.1
u
_5
0
V
_
Y
5
V
_
0
6
P D4
RB0 5 4 0S 2
A C
P
C
7
9
*
10
0
0
p
_5
0
V
_
X
7
R
_
0
4
P R 9 9 1 0K _ 1 % _ 0 6
P U 4
u P 6 1 63
VT T GN D
1
VL DO I N
2 3
VT T
2 4
VT T S NS
2
GN D
3
MO DE
4
VT T RE F
5
V CC 5
14
P G OO D
13
S 5
11
S 3
10
VD DQ S E T
9
VD DQ S NS
8
CO MP
6
CS
16
P GN D
18
D RV L
19
L L
20
DR VH
21
VBS T
22
P V CC 5
15
C S _ GN D
17
N
C
7
N
C
1
2
G
N
D
2
5
P
R
2
0
8
*1
0
_0
6
P C8 4
* 0 . 1u _ 1 6 V_ Y 5 V_ 0 4
P C 51
0
.1
u
_5
0
V
_
Y
5
V
_
0
6
P R 83 6 . 1 9K _ 1 % _ 0 6
P Q2 3
MT N7 0 0 2 ZHS 3 G
D
S
P R8 0
0_ 0 6
P R1 0 1
* 10 K _ 1 % _ 04
P
C
7
5
*1
0
0
0
p_
5
0
V
_
X
7
R
_
0
4
S U S B
P Q 2 4
* MT N 70 0 2 Z HS 3
G
D
S
P L 7
1 . 0 UH _ 11 . 5 *1 0 . 2 *3 . 0
1 2
P R 2 02 *0 _ 0 6
P C4 8
0
.1
u_
1
6
V
_
Y
5
V
_
04
P R 1 92
3 . 3 _ 06
P C1 9 1
4
.7u
_
2
5
V
_
X
5R
_
0
8
P R 2 03 *0 _ 0 6
P R2 0 6 0 _ 0 6
P C8 0
1u
_
1
0
V
_
Y
5V
_0
6
VDD Q
P R 1 1 8 4 7 K _ 04
P J 1 8
*OP E N_ 2 A
1 2
5 V
5 V
5 V
5 V
VDD Q
5 V
V T T _ ME M
VD DQ
5 V
DD _ ON # [3 0 , 3 1 ]
5 V
VT T_ M E M
S US C # [1 5 , 27 ]
+
P C 1 84
56
0
u
_
2.5
V
_
6
.6
*6
.6
*5
.9
VI N
+
P C 1 86
*
1
5u
_
2
5
V
_
6.3
*
4.4
_
C
S US B
V
D
D
Q
S
E
T
P R7 3
*5
.1
_0
6
P C 52
*
1
00
0
p
_X
7R
_
06
30A
VTT_MEM
1.5V
P R1 0 3 1 0 0K _ 0 4
P R9 1
0 _ 0 6
P C 1 92
4
.7
u
_
2
5V
_
X
5
R
_0
8
P R 9 8 1 0 K _ 1 % _0 6
P C8 2
0. 1 u _ 1 6V_ Y 5 V_0 4
P C 4 9
0.1
u
_
1
6V
_
Y
5
V
_
0
4
P R 1 9 3 * 2 2_ 0 4
P Q2 2
MT N7 0 0 2 ZHS 3
G
D
S
P C 60 0 . 1 u _1 0 V_ X7 R_ 0 4
P C 5 4
* 1 0u _ 1 0V _Y 5 V_ 08
P Q 1 9
M T N7 0 0 2Z HS 3
G
D
S
P GO OD _ 61 6 3
P
D
17
C
S
O
D
14
0
S
H A
C
11/09
P J 6
* OP E N _ 1 2A
1 2
Sheet 33 of 43
Power 1.5V/0.75V/
1.8VS
Schematic Diagrams
Power 1.05VS B - 35
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 1.05VS

10 / 1
0.85V_ON [35]
PQ68
MTN7002ZHS3
G
D
S
PR56
100K_04
PC31
0. 1u_16V_Y5V_04
PR55
100K_04
5V
1.05VS_ VTT [2,3,5,18,19,20,36]
5V
PJ 16
*OPEN_ 5A
1 2
PR229
100K_04
3.3V
11/03
PJ 9
*40mil
1 2
PR87 0_04
PR85 0_04
VCCIO_SENSE [5]
Q19
MTN7002ZHS3
G
D
S
11/05
10/ 1
R573 10K_ 04
11/03
S
D
G
PQ75B
MTDN7002ZHS6R
5
3
4
S
D
G
PQ75A
MTDN7002ZHS6R
2
6
1
PJ 3
*1mm
1
2
PC53
*
1
0
0
0
p
_
X
7
R
_
0
6
PR74 *
5
.1
_
0
6
R123
*100_04
R420
1M_04
C405
*1
0
u
_
1
0
V
_
Y
5
V
_
0
8
C414
2200p_50V_X7R_04
C399
0
.1
u
_
1
6
V
_
Y
5
V
_
0
4
SYS15V
1. 05VS
1. 05VS_VTT_EN [15]
1.05VS_VTT
10A N M OS
1.05VS_VTT
O N
PQ10
2N3904
B
E
C
0. 85VS [6,35]
3. 3V [2,3,8,11,13, 14,15,17, 18,19,20,22,23, 26,28,30, 31,33,35]
VIN [11,30,31, 32,33,35, 36,37,38]
5V [20, 23,26,30, 31,33,35]
1. 05VS [13,14, 15,19,20]
PQ54
ME4626-G
4
6
2
57
3 1
8
1.05VS_PWRGD
PQ74
P1203BV
4
6 2
5
7 3
1
8
PD3
C
S
O
D
1
4
0
S
H
A
C
5V
PJ 17
*OPEN-12mm
1 2
PR107 10K_04
PC77
0. 1u_16V_Y5V_04
1.05VS
PC73
1u_10V_Y5V_06
PR96
100K_1%_04
PR88
40.2K_1%_04
P
D
1
8
*
S
K
3
4
S
A
A
C
PR104 *90.9K_04
16A
PR95
0_04
1.05VS
P
C
1
8
9
0
.1
u
_
1
6
V
_
Y
5
V
_
0
4
PC86
20p_ 50V_NPO_04
PU6
SC412A/ uP6127
LX
1
BST
2
VCC
3
DL
4
G
N
D
5
R
T
N
6
N
.C
7
N
.C
8
FB
9
VOUT
10
PGD
11
EN
12
IL
IM
1
3
N
.C
1
4
N
.
C
1
5
D
H
1
6
PAD
17
PD10
RB0540S2
A
C
P
C
1
9
0
4
.7
u
_
2
5
V
_
X
5
R
_
0
8
PL8
1. 0UH_ 11.5*10.2*3.0
1 2
PR108
100K_04
3. 3V
PR94 8.2K_1%_04
+
P
C
1
8
2
5
6
0
u
_
2
.5
V
_
6
.6
*
6
.6
*
5
.9
1.05VS_PWRGD [15]
PC81
47p_50V_NPO_04
PC88
*0. 1u_16V_Y5V_04
5V
VI N
+
P
C
1
8
3
5
6
0
u
_
2
.
5
V
_
6
.
6
*6
.
6
*5
.
9
P
C
5
0
0
.
1
u
_
5
0
V
_
Y
5
V
_
0
6
5V
P
C
4
5
0
.1
u
_
5
0
V
_
Y
5
V
_
0
6
V1. 05
P
C
1
8
7
4
.7
u
_
2
5
V
_
X
5
R
_
0
8
PQ17
MTN7002ZHS3
G
D
S
R182
*28mil _06
PC87
0.01u_16V_X7R_04
1.05VS_EN
SUSB [3,6, 31,33]
PQ53
ME4894-G 4
6
2
57
3 1
8
PQ55
*ME4626-G
4
6
2
57
3 1
8
3. 3VS [3,9,10, 11,12,13,14,15, 16,17,18, 19,20,23,24,25, 27,28,29, 30,31,36]
SYS15V [31,32]
Sheet 34 of 43
Power 1.05VS
Schematic Diagrams
B - 36 Power 0.85VS
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power 0.85VS

1 1/0 4
PQ36A
PD1503YVS
7
8
12
PC140
0. 1u_16V_Y5V_04
PR150
22_04
PR157
100_04
PC124
0.01u_16V_X7R_04
P
R
1
7
3
3
3
K
_
1
%
_
0
4
PR151
1K_1%_04
PR33
9.3K_1%_04
PC42
*
0
.1
u
_
1
6
V
_
Y
5
V
_
0
4
P
C
1
5
3
4
.
7
u
_
2
5
V
_
X
5
R
_
0
8
PR146
10K_1%_04
PR137
0_04
PJ 5
*OPEN-5mm
1 2
PR159
10K_04
PD1
RB0540S2
A
C
PC41
0. 1u_25V_X7R_06
P
C
1
3
1
0
.0
1
u
_
5
0
V
_
X
7
R
_
0
4
PR147
9.3K_1%_04
PR155 *0_04
PR34
12K_1%_04
PR64
0_04
PU9
uP6122
B
O
O
T
1
U
G
2
P
O
K
3
S
S
4
E
A
P
5
SET3
6
SET2
7
SET1
8
SET0
9
FB
10
C
O
M
P
1
1
V
ID
0
1
2
V
ID
1
1
3
E
N
/P
S
M
1
4
C
S
N
1
5
CSP
16 RT
17 VCC
18 LG
19 PHASE
20 GND
21
PR144
10K_1%_04
PR62
0_04
PR36
15K_1%_04
P
C
1
5
4
0
.
1
u
_
5
0
V
_
Y
5
V
_
0
6
PR63
12K_1%_04
P
C
1
5
5
4
.
7
u
_
2
5
V
_
X
5
R
_
0
8
PC40
0
.1
u
_
1
6
V
_
Y
5
V
_
0
4
PR35
10K_1%_04
PC129
0.022u_16V_X7R_04
PQ36B
PD1503YVS
4
3
56
PR145
10K_1%_04
PR65 1. 3K_1%_04
PR149
0_ 04
PC25
47p_50V_NPO_04
PR148
100_04 P
C
3
4
0
.
1
u
_
5
0
V
_
Y
5
V
_
0
6
PL4
1. 0UH_6.8*7.3*3.5
1 2
PR158
100K_1%_04
VIN
5V
V0.85 0.85VS
3. 3V
0. 85VS [6]
5V [20,23,26, 30,31,33,34]
VI N [11,30,31, 32,33,34,36,37, 38]
VCCSA_VI D1 [6]
VCCSA_VI D0 [6]
0.85VS_PWRGD [15]
P
C
1
9
7
0
.
1
u
_
5
0
V
_
Y
5
V
_
0
6
VIN
P
C
4
7
0
.
1
u
_
5
0
V
_
Y
5
V
_
0
6
P
C
1
7
3
0
.1
u
_
5
0
V
_
Y
5
V
_
0
6
VCCSA_SENSE [6]
CSN
0
0.8V
0
P
O
K
0.9V
1
1 VCCSA_VID1
0.725V
VCCSA_VID0 1
0.675V
1 0
0
C
S
P
CSN
CSP CSP
6A
0.85V_ON [34]
+
PC168
2
2
0
u
_
6
.
3
V
_
6
.3
*
6
.3
*
4
.2
1 1/0 5
P
C
2
7
1
u
_
1
0
V
_
Y
5
V
_
0
6
FOR EMI
3.3V [2,3, 8,11,13,14,15, 17,18,19,20,22, 23,26,28,30,31, 33,34]
Sheet 35 of 43
Power 0.85VS
Schematic Diagrams
Power V-Core1 B - 37
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power V-Core1

P C5
0
.1u
_
1
0
V
_
X
7
R
_
0
4
P U 1
NC P 6 13 1 S
T S E NS E
2
VRH OT #
3
S CL K
5
AL E RT #
6
VR_ R DY
7
VR_ R DY A
8
VCC
1 0 E NA BL E
9
S DI O
4
F
B
A
1
6
D
IF
F
O
U
T
A
1
7
T
R
B
S
T
A
1
8
C
O
M
P
A
1
9
CS N3
3 7
C S P 3
3 6
CS N1
3 5
C S P 1
3 4
DR ON
3 3
P W M1 /AD DR
3 2
P W M 3 / VBO OT
3 1
P W M 2/ I S HE D
3 0
C
S
S
U
M
A
2
4
IO
U
T
A
2
3
C
S
C
O
M
P
A
2
2
D
R
O
O
P
A
2
1
IL
IM
A
20
V
S
P
A
15
C S P 2
3 8 CS N2
3 9
IO
U
T
4
3
C
S
S
U
M
4
4
C
S
C
O
M
P
4
5
D
R
O
O
P
46
IL
IM
4
7
C
O
M
P
4
8
F
B
4
9
T
R
B
S
T
5
0
V
S
N
51
RO S C
1 1
VRM P
1 2
C
S
P
A
2
5
C
S
N
A
2
6
I M AX
2 9
P W M A/I M AXA
2 8
C
S
R
E
F
4
2
N
C
2
4
1
N
C
1
4
0
E
P
A
D
5
3
VS P
1
T S E NS E A
1 3
VBOO T A
2 7
V
S
N
A
1
4
D
I
F
F
O
U
T
5
2
P R 1 91 1 0 0_ 0 4
P R 1 5
1 3 0 _1 % _ 0 4
P C 19
0 . 0 2 2 u_ 1 6 V_ X7R _ 04
P R 16
1 0 K _ 04
P R 12 6 0 _0 4
P R 3 2 1 0 _ 04
P C1 1 3
1 0 0p _ 5 0V _N P O _0 4
P R 2 6
1 6 5K _1 % _ 0 6
P R 1 90 1 0 0_ 0 4
RT 2
10 0 K _ NT C _ 06 _ B
1 2
P R 12 4 0 _0 4
P R2 2
1 0 _ 04
P C 15 1 20 0 P
P C 7
5 6 0 0 p_ 5 0 V_ X7R _ 04
P R 1 41 13 7 K _ 1 % _0 6
P C 13
33 0 0 P _ 50 V_ X7 R_ 0 4
P R 1 33
1 6 5 K _ 1 %_ 0 6
P R1 0
5
4
.9
_
1%
_
0
4
P R1 8 8 1 0 0_ 0 4
P R1 3 5
1 1 5 K _ 1 %_ 0 6
P R4 3 5. 49 K _ 1 % _ 04
P C1 0
6 8 P _ 5 0V _N P O_ 0 4
P R1 3 1
1 0 0 _1 % _ 0 4
P C2 2 0 . 0 4 7u _ 1 0 V_X7 R _0 4
P R 3 8
4 1 . 2 K _ 1% _ 0 4
P C 1 7 27 0 P _ 5 0V _X7 R _0 4
P R1 5 3 0_ 0 4
P
R
1
69
8
.2
5
K
_1
%
_
0
4
P
R
1
8
7
8
.25
K
_
1
%
_
04
A_GND
P R1 3 0 1 K _ 0 4
5VS
A_GND
1.05VS_VTT
P C2 1
1 0 00 p _ 50 V_ X7 R_ 0 4
A_GND
A_GND
A_GND
A_GND
A_GND
A _GND
A_GND
A_GND
A_GND
A _GND
A_GND
A_GND
VIN
5VS
A_GND
A _GND
A_GND
VC OR E _ VS S _ S E N S E [5 ]
VC OR E _ VC C_ S E N S E [5 ]
A _GND
VR _O N
H_ C P U_ S VI D CL K [5 ]
H_ C P U_ S VI D AL RT # [5 ]
H_ C P U_ S VI D DA T [5 ]
C S P 3 [3 7]
C S P 1 [3 7]
H _ P RO CH OT # [3 ]
D E L AY _ P W RG D [1 5 ]
C S N3 [3 7 ]
CS N3 [3 7 ]
CS N1 [3 7 ]
C S P 1 [3 7 ]
C S N1 [3 7 ]
C S P 3 [3 7 ]
C S NA [3 7]
VS S _ GT _ S E NS E [6 ]
VC C_ G T _S E NS E [6 ]
VR 1_ P W MA [3 7 ]
C S P A [ 37 ]
C S P A [3 7 ]
DR ON [3 7 ]
VR1 _ P W M 1 [3 7]
CS P P 3
CS N 3
A LL _ S Y S _P W RG D [1 1 , 1 5, 27 ]
T
R
B
S
T
CSN1
P R1 4 3
1 13 K _ 1 % _ 04
P R 39 0 _ 0 4
3.3VS
5VS
P J 1 4
*6 m i l
1
2
P R 1 2
* 7 5_ 0 4
S
D
G
P Q6 9 B
*M T DN 7 00 2 ZH S 6R
5
3
4
P R 6 * 1 0K _0 4
P R3
* 1 00 K _ 0 4
P R 5
* 10 K _ 0 4
P C 1
*0 . 1 u _ 16 V_ Y 5V _0 4
A_GND
P J 1
*6 m i l
1
2
3 . 3V S
VC O RE _ ON [ 27 ]
VR _ ON
P W M 2_ 6 1 3 1
10/29
20100805
5VS
S
D
G
P Q6 9 A
* MT DN 7 00 2 ZH S 6 R
2
6
1
T
R
B
S
T
P J 2 *6 m i l
1 2
1 . 0 5VS _V TT [ 2, 3 , 5 , 1 8 , 1 9, 2 0 , 3 4 ]
P R 2 30 0 _ 0 4
P J 1 3
*6 m i l
1
2
V CO RE [5 , 37 ]
V I N [1 1 , 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 3 7 , 38 ]
V_ GT [3 7 ]
5 VS [1 1 , 12 , 1 9 , 2 0 , 25 , 2 9 , 3 0 , 31 , 3 7 ]
3 . 3 VS [3 , 9 , 1 0, 1 1 , 1 2 , 1 3, 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 1 9, 2 0 , 2 3 , 2 4, 2 5 , 2 7 , 28 , 2 9 , 3 0 , 31 ]
1 . 0 5 VS [1 3 , 1 4 , 15 , 1 9 , 2 0 , 34 ]
V_GT
F
B
F
B
F
B
F
B
VCORE
CS P P 1
CSS UMA
VR1_PWMA
I MAX_ 6 1 31
H_ CP U_ S VI D AL RT #
CSC OMPA
VBO OT A
Qu ad VCC AXG
V ID1=1. 15V
I cc Max =2 6A
R _LL =3. 9m ohm
OCP~31A
C SPPA C SPPA C SPPA
PUT COLSE
TO V_GT
I nduct or
B~4350
B~4 35 0
PUT COLSE
TO VCORE
HOT SPOT
Qu ad 4 5W C PU
VID 1=0. 9V
Ic cMax =94A
R_LL =1.9m ohm
OC P~120A
PUT COLSE
TO V_GT
HOT SPOT
B~3964
OPTI ON:
DI SALBE
V_GT
VCORE_1
VR1 _ P W M 3 [3 7]
CS N 2 _5 VS
PUT COLSE
TOVCORE
Phase 1
I nduct or
IC C_MAX _21h
=R*10uA*256A/ 2V
B ~3964
H_C PU_SVIDALRT#
H_ CP U_ S VI D DAT
VS S _ S E N S E _ 6 1 31
V
C
C
_
S
E
N
S
E
_6
1
3
1
H_ CP U_ S VI D CL K
VRM P _ VI N
H_C PU_SVIDCLK
IL
IM
VR 1_C SRE F
C SNA
6131_VCC
VR1 _ P W M 3
P R 1 54
2 0 . 5 K _ 1% _ 1 / 1 6W _0 4
P R1 3 9
7 . 5 K _ 1 %_ 0 4
P R 17
1 K _ 1 % _ 04
D
IF
F
O
U
T
P C1 1 5
1 0 0p _ 5 0 V_ NP O _ 04
P R1 3 2
1 5K _ 1 % _ 0 4
P C 3
1 u_ 6 . 3 V_ X5R _ 0 4
P C2 3 0 . 0 4 7u _ 1 0 V_X7 R _0 4
P R 1 25 2 . 2 _0 6
P R 3 1 13 7 K _ 1 % _0 6
P R1 9 1 . 2 1 K _ 1 %_ 0 4
P R7 *1 0 m il _ 0 4
P C1 1 8
0 . 1 u _1 0 V_ X5 R_ 0 4
P C 2 0
1 0 0 0p _ 5 0V _X7 R _0 4
P R3 7
11 3 K _ 1 % _0 4
P C 1 14
0
.1
u
_1
0
V
_
X
7
R
_
0
4
P R 1 42 1 0 _ 04
I MONA
P C1 1 7
0. 1 u _ 1 0V _X5 R_ 0 4
P C 1 6 47 0 p _ 50 V_ X7 R_ 0 4
P R1 4 1 0K _0 4
P R 12 7 0 _0 4
IL
IM
A
TSENSEA TSENSEA TSENSEA
P C 14 2 70 p _ 5 0V _X7 R_ 0 4
IM
O
N
R
T
3
1
0
0K
_N
T
C
_0
6
_
B
1
2
P R1 5 6
1 0K _0 4
TSENSE TSENSE TSENSE TSENSE TSENSE
P R2 4
7 5 K _ 1 % _0 4
P R2 1
4 . 0 2K _1 % _ 0 4
FBA
P C 8
1 0 00 p _ 5 0V _X7 R_ 0 4
TS E NS E A
C
O
M
P
P R 1 1
1 0 K _0 4
P C 1 2
22 p _ 50 V_ N P O_ 0 4
P R 41
* 0 _0 4
H_C PU_SVIDDA T
V R_ ON
P R2 3
1 K _ 0 4
P R 28 1 2 . 1K _1 % _ 0 4
C
S
C
O
M
P
I MO N
VR_ O N_ E N ABL E _ 61 3 1
P R 12 8 0 _0 4
P R1 8
*1 4 K _ 1 % _0 4
P R 1 40
2 4 K _ 1 %_ 0 4
P R 4 2 5. 49 K _ 1 % _ 04
P R2 0
2 4. 9K _ 1 % _ 04
VR_R DY
P R 1 29 3 . 0 1 K _ 1 %_ 0 4
V
S
N
A
_
6
1
3
1
RT 4
1 00 K _ N T C_ 0 6_ B
1 2
IM
O
N
A
DR ON
P R 8 0 _ 04
CSS UM
P R2 7 7 5 K _ 1 %_ 0 4
P R 9 * 1 5m i l _ 06
P R 25
1 0 _0 4
P C 11 6
3 3 00 p _ 5 0V _X7 R_ 0 4
P C 1 1
6 80 p _ 5 0V_ X7 R_ 0 4
VR_R DY A
P R1 5 2
1 0K _0 4
V
S
P
A
_6
1
3
1
DIF FOU TA
P C 6
0 . 0 1u _ 5 0 V_ X7 R _0 4
COMPA
P R4 0
10 K _ 0 4
P R1 3 4
2 4 . 3 K _ 1% _ 0 4
RO S C
P C9
10 0 0 p _5 0 V_ X7 R_ 0 4
R
T
1
1
0
0
K
_
N
T
C
_
06
_
B
1
2
TS ENSE
P R 18 9 10 0 _ 04
Sheet 36 of 43
Power V-Core1
Schematic Diagrams
B - 38 Power V-Core2
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power V-Core2

P Q3 1
*M DU 26 5 4
G
D
S
50A
+
P C2 2 3
*3
3
0
u
F
_2
5
V
11/04
P C 11 9
0 . 2 2 u _1 0 V_ X7 R _0 6
25A
P
D
2
C
S
O
D
1
4
0
S
H
A
C
P C 37
*1 0 0 0p _ X7R _ 06
P R 61
*5 . 1 _ 06
VR E G_ S W 1 _ HG
+P C 1 70
*
33
0
U
_
2
.5
V
_
D
2
+P C 1 77
*
33
0
U
_
2
.5
V
_
D
2
11/03
+P C 1 71
*
3
30
U
_
2
.5
V
_
D
2
11/09
VCO RE [5 , 3 6 ]
VGFX_CORE
25A
P R 1 38
4 9. 9 _ 1 %_ 0 4
VG F X_ C OR E [6 ]
V_ GT [3 6 ]
VC OR E [5 , 36 ]
VI N [1 1, 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 36 , 3 8 ]
5 VS [1 1, 1 2 , 1 9, 2 0 , 2 5 , 29 , 3 0 , 31 , 3 6 ]
VR EG_SWA_HG
VR EG_SWA
VR E G_ S W 3 _ HG
V_GT
VCO RE
VC OR E
CS P 3 [3 6 ]
P R 7 0 *1 5 m il _ 06
CS N 3 [3 6 ]
VCORE_2
VGFX_CORE
+P C 1 74
5
6
0u
_
2
.5
V
_6
.6
*6
.6
*5
.9
+
P C1 3 0
1
5
u_
2
5
V
_
6.3
*
4.4
P R 6 8 *1 5 m il _ 06
+P C 17 6
5
6
0u
_
2
.5V
_
6
.6
*6
.6
*5
.9
P R 6 7 *1 5 m il _ 06
P Q 4 1
M DU 26 5 4
G
D
S
P R2 9
2 . 2 _ 06
P Q3 3
*M DU2 6 5 7
G
D
S
P R6 0 *1 5 m il _ 0 6
+P C 1 75
5
6
0u
_
2
.5
V
_6
.6
*6
.6
*5
.9
P
C
3
8
2
.2
u
_6
.3
V
_
X
5
R
_
0
6
P
C
2
4
2
.2u
_
6
.3
V
_X
5
R
_0
6
P R5 9 * 15 m i l_ 0 6
P L 5
0 . 3 6u H _1 2 . 9 *1 4 *3 . 8
1 2
P C 15 2
*4
.7
u_
2
5
V
_
X
5R
_
08
P Q4 5
MD U2 6 54
G
D
S
P C1 6 1
0
.1
u
_5
0
V
_
Y
5
V
_0
6
P L 3
0 . 3 6u H _1 0 *1 0 *3 . 5
1 2
+P C 17 2
5
6
0u
_
2
.5V
_6
.6
*6
.6
*5
.9
P R 5 4
4 9. 9 _ 1 %_ 0 4
+
P C1 3 3
1
5
u_
2
5
V
_
6.3
*4
.4
P
C
1
25 2
.2
u
_6
.3
V
_
X
5
R
_
0
6
P Q 2 9
M DU 26 5 7
G
D
S
P C1 2 0
*
4.7
u
_
25
V
_
X
5
R
_
0
8
P C3 0
0 . 2 2 u_ 1 0 V_ X7 R _0 6
P Q 4 3
M DU 26 5 4
G
D
S
+P C 17 8
5
6
0u
_
2
.5V
_6
.6
*6
.6
*5
.9
P R5 8 * 15 m i l_ 0 6
P Q 3 8
M DU 26 5 4
G
D
S
HG
S W
GND
P AD
L G VCC
EN
PW M
BS T
1
2
3
4 5
6
7
8
9
NC P 5 91 1 P U8
P R 5 2
2 . 2 _ 06
P Q4 4
*M DU2 6 5 4
G
D
S
P C1 2 6
0.
1u
_
5
0V
_
Y
5
V
_
0
6
P C1 2 1
*
4.7
u
_
25
V
_
X
5
R
_
0
8
P Q4 0
MD U2 6 57
G
D
S
+P C1 47
*
3
30
u
_
2.5
V
_
9
m
_6
.3
*6
P C1 4 9
*
4.7
u
_
25
V
_
X
5
R
_
0
8
HG
S W
GND
P AD
L G VCC
EN
PW M
BS T
1
2
3
4 5
6
7
8
9
NC P 5 91 1 P U3
P R1 36
2 . 2 _ 06
+
P C 12 3
15
u
_
25
V
_
6
.3
*4
.4
P R 6 9 *1 5 m il _ 06
P C 12 8
*4
.7
u_
2
5
V
_
X
5R
_
08
P C 18
0 . 2 2 u _1 0 V_ X7 R _0 6
P C 1 22
0
.1
u
_5
0
V
_
Y
5
V
_0
6
P C 12 7
*4
.7
u_
2
5
V
_X
5R
_
08
P R 3 0
4 9. 9 _ 1 %_ 0 4
HG
S W
GND
P AD
L G VCC
EN
PW M
BS T
1
2
3
4 5
6
7
8
9
NC P 5 91 1 P U2
P Q 4 6
M DU 26 5 4
G
D
S
VGFX_CORE
+P C 16 4
3
30
u
F
_
2
.5V
_9
m
_
6.3
*
6
5VS
5VS
VIN
VIN
D RON [3 6 ]
VIN
5VS
C S P 1 [36 ]
VR 1_ P W M 1 [3 6 ]
C S N1 [3 6 ]
VR 1_ P W M 3 [3 6 ]
DR ON [3 6 ]
D RON [3 6 ]
CS P A [3 6]
CS NA [3 6 ]
VR 1_ P W M A [3 6 ]
VR EG_SW3_OUT
VR E G_ S W 1 _ OU T
VR EG_SW3_LG
VC ORE
VC ORE
VR E G_ S W 1 _ L G
VR EG_SWA_LG
P Q3 9
*M DU 26 5 7
G
D
S
P L 6
0 . 3 6u H _1 2 . 9 *1 4 *3 . 8
1 2
P Q3 0
*M DU 26 5 7
G
D
S
P Q 3 2
M DU 26 5 7
G
D
S
P D1 1
S K 3 4 S A
A
C
P D 15
S K 34 S A
A
C
25A
P R 57
* 5. 1 _ 0 6
P C 36
* 10 0 0 p_ X7 R_ 0 6
P R 66
* 5. 1 _ 0 6
P C 43
* 10 0 0 p_ X7 R_ 0 6
P Q2 8
*M DU 26 5 4
G
D
S
Sheet 37 of 43
Power V-Core2
Schematic Diagrams
Charger, DC In B - 39
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Charger, DC In

P Q3 5 A
AP 6 9 01 G S M
7
8
1
2
P C3 9
0 . 1 u _5 0 V_ Y 5 V_ 06
P R 1 75
0 . 0 2 _1 % _ 32
P C 1 41
0 . 1 u _5 0 V_ Y 5 V_ 06
P C1 4 6
0 . 1 u _5 0 V_ Y 5 V_ 06
P Q 2 5
M E P 4 43 5 Q8
4
6 2
5
7 3
1
8
P C1 4 2
1 0 0 p_ 5 0V _N P O_ 0 4
P
C
18
10
.1
u_
5
0
V
_Y
5
V
_
0
6
P C 13 7
0 . 1 u_ 5 0 V_Y 5 V_0 6
S G ND 6
P
R
1
8
4
1
0
K
_1
%
_
04
S GND 6
S G ND 6
S GN D6
S GN D6
VDD 3
VA
VA
S GN D6
S GN D6
VA
V_ BAT
VI N
VA
V_ BAT
VD D3
VI N
VA
S G ND6
VDD 3
S G ND 6
V_B AT
VDD 3
AC_ I N# [2 6 , 2 7]
CH G_ E N [2 7 ]
VDD 3
S MC _B AT [2 7 ]
B AT_ D E T [2 7]
S MD _B AT [2 7 ]
BA T_ DE T
W250HU
W240HU
BA T_ VO LT
S M C_ BAT
S M D_ BAT
S M D_ BAT _ R
S
D
G
P Q7 1 A
MT DN 7 00 2 ZHS 6 R
2
6
1
P Q2 6
MT N7 0 0 2Z HS 3
G
D
S
CT L1
VD D3 [1 3, 2 2 , 2 4, 2 7 , 3 1, 3 2 ]
11/04
P L 1 3 F CM 10 0 5K F -12 1 T 03 1 2
11/05
P R2 3 5
4 7 0K _ 0 4
11/03
P C1 5 0
0. 1 u _ 50 V_ Y 5 V_ 0 6
P L 1 4 F CM 10 0 5K F -12 1 T 03 1 2
11/04
P L 1 2 F CM 10 0 5K F -12 1 T 03 1 2
S
D
G
P Q 7 1B
M T DN7 0 0 2ZH S 6 R
5
3
4
11/05
S M C_ BAT _ R
U S B_ AC_ I N [32 ]
P L 1 1 F CM 10 0 5K F -12 1 T 03 1 2
R6 09
*5 . 1_ 1 % _0 6
P C2 6
0
.0
1u
_
5
0V
_X
7
R
_0
4
P Q3 4
M T N7 0 02 ZH S 3 G
D
S
C E L L_ C ON TR OL [2 7]
P R1 7 8
1 7. 4 K _ 1 % _0 4
C E L LS
P Q 4
DT A1 14 E U A
C E
B
P R4 4
10 0 K _ 04
P R4 6
1M _ 04
P R4 5
1M _0 4
S GN D6
T OT A L _C UR [2 7 ]
S
D
G
P Q 7 0A
M TD N7 0 0 2ZH S 6 R
2
6
1
S GND 6
11/05
VA [3 1 ]
VO LT _ S E L
C E L LS
BAT _ VOL T _ R V _BAT
C5 88
*1 00 0 p _5 0 V_ X7 R _0 4
VI N [11 , 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 6 , 3 7]
J BAT T A2
BT D-0 5 TI 1 G
1
2
3
4
5
T O TA L _ CU R
C UR _ S E NS E
P
C
1
65
*
0
.1u
_
5
0V
_
Y
5
V
_
0
6
CT L 1
VO L T_ S E L
0.5V/1A
0. 5V/ 1A
#ChargeVolt age 12.6V
#Tot al Power 60W
#ChargeCur r ent 3.0A
CHARGER
BAT _V OL T [2 7 ]
VC HG -S E L [2 7]
BA T_ DE T_ R
P
C
11
2*0
.3
3
u_
5
0
V
_
08
PI N17t h CONNECT
TOBATCONN.
PIN25th
FOR2S CONNECT TOGND
FOR3S CONNECT N.C.
FOR4S CONNECT TOVREFPIN
P R 16 8
1 0 2K _ 1 % _0 4
6- 21- D34B0-105
CHARGE
CURRENT
ADJ
P R 16 3
7 6 . 8K _1 % _ 04
P R1 6 1
2M _1 % _ 0 4
P
C
16
6
*0
.1
u
_5
0
V
_
Y
5
V
_0
6
P D1 2
RB 05 4 0 S 2
A C
P R 18 1
1 0K _1 % _ 04
P R 17 6
4 9 . 9K _1 % _ 04
P R 5 1
3 0 0K _1 % _ 04
P C1 5 6
0 . 1u _ 5 0V _Y 5V _0 6
P
R
1
0
_
04
P C2 8
0 . 1u _ 5 0V_ Y 5V_ 0 6
D 7
B AV99 R E CT I F I E R
A
C
AC
P
C
1
34
0
.1
u
_5
0
V
_
Y
5
V
_0
6
P C1 43
1 u _ 25 V_ 0 8
P R1 20
1 0 K _ 1 %_ 0 4
P
C
40
.1
u_
5
0V
_Y
5
V
_
0
6
P R1 6 4
0_ 0 4
P R5 0
10 0 K _ 04
P
R
1
8
3
2
0
K
_1
%
_
04
P
R
12
1
20
0
K
_
1%
_
0
4
P L 1 HC B45 3 2 K -80 0 _ 18
D 6
A
C
AC
P R4 7 * 0_ 0 4
P C 10 9
0
.1
u_
5
0
V
_Y
5V
_
0
6
P Q 6
M T N7 00 2 ZHS 3
G
D
S
P
C
1
584
.7
u
_2
5
V
_
X
5R
_
08
D 9
A
C
AC
P Q 35 B
AP 6 9 0 1G S M
4
3
56
P
C
13
5
0
.1
u_
5
0V
_Y
5
V
_
0
6
P Q4 2
DT C1 1 4E UA
C
E
B
P R1 8 6
1 30 K _ 1 %_ 0 4
P R4
0 . 0 2 _1 % _ 32
P R 16 7
2 2 K _1 % _ 04
P J 4
*O P E N-1 m m
1
2
P C 44
0 . 1 u_ 5 0 V_Y 5 V_0 6
D 8
A
C
AC
P R1 7 4
2 2 K _1 % _ 04
P
R
1
2
2
10
0
K
_
1
%
_
0
4
J AC K 1
50 9 3 2-0 0 3 01 -0 0 1
G ND 2
G ND 1
2
1
S
D
G
P Q 7 0B
M T DN7 0 0 2ZH S 6 R
5
3
4
P C1 4 8
1 0 0 0p _ 50 V_ X7 R_ 04
P
C
1
5
74
.7u
_
2
5V
_
X
5
R
_
0
8
P
C
15
94
.7
u_
2
5V
_X
5
R
_0
8
P L2
4. 7 UH _ 6. 8 * 7. 3 *3 . 5
P R1 7 1
1 K _ 1% _ 0 4
P Q3 7
ME P 4 4 3 5Q 8
4
6 2
5
7 3
1
8
P C1 3 2 0 . 1u _ 5 0V _Y 5V _0 6
P C3 2
0 . 1u _ 5 0V _Y 5V _0 6
P R5 3
60 . 4 K _ 1% _ 0 4
P
C
13
84
.7
u_
2
5
V
_X
5R
_0
8
P C1 4 4
1 0 0 0p _ 50 V_ X7 R_ 04 P
C
1
36
0
.1
u
_5
0
V
_
Y
5
V
_0
6
P
C
13
94
.7
u_
2
5
V
_X
5
R
_0
8
P
C
3
34.
7u
_
25
V
_
X
5
R
_
0
8
P
C
3
54
.7
u
_2
5
V
_
X
5R
_
08
P R 1 79 *2 8 mi l _ 06
P
C
15
14
.7
u_
2
5
V
_X
5
R
_0
8
P C 16 0 0 . 1 u_ 5 0V _Y 5V _0 6
P Q8
AO3 4 0 9
G
D S
P C1 4 5 * 22 p _5 0 V_ NP O _0 4
BA T_ VO LT _ R
P D1 3
UDZ1 6 B
A C
P C 16 2
0 . 0 1u _ 50 V_ X7 R_ 04
TOTAL
POWER
ADJ
P
R
1
7
2
*0
_0
4
P R 17 0
1 K _ 1% _ 0 4
P R1 7 7
10 K _ 1 %_ 0 4
P R4 9
2 0 0K _ 0 4
P C1 0 7
0
.1u
_
5
0V
_
Y
5
V
_
06
P C1 6 3
*0 . 1 u _5 0 V_ Y 5 V_ 06
P R1 6 0
1 0K _ 0 4
P
R
2
0
_
0
4
P R1 8 0
0 _0 4
P R1 8 2
10 K _ 0 4
J BAT T A1
*BT D -05 T C1 B
1
2
3
4
5
TRERMAL PAD
P U1 0
MB3 9 A13 2
VC C
1
-I N C1
2
+I NC 1
3
AC I N
4
AC OK
5
-I N E 3
6
AD J 1
7
-IN
E
1
9
O
U
T
C
1
10
O
U
T
C
2
1
1
+
IN
C
2
12
-IN
C
2
1
3
A
D
J
2
14
C
O
M
P
2
1
5
BAT T
1 7 ADJ 3
1 8 C S
1 9 RT
2 0 VR E F
2 1 GN D
2 2 C TL 1
2 3
C
E
L
LS
25
P
G
N
D
2
6
O
U
T
-2
27
V
B
2
8
L
X
29
O
U
T
-1
3
0
C
B
31
C OM P 1
8
C
O
M
P
3
16
VI N
2 4
C
T
L2
3
2
S GN D
3 3
P R1 8 5
1 0K _ 1 % _0 4
P
R
1
6
2
3
9.2
K
_
1
%
_
0
4
P R 4 8
0 _ 0 4
P C1 08
0
.1
u
_5
0
V
_
Y
5
V
_0
6
Sheet 38 of 43
Charger, DC In
Schematic Diagrams
B - 40 Click Board
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Click Board

CLED_BAT_FULL
CLED_BAT_CHG
CLED_PWR
CLED_ACIN
CLED_BAT_FULL
6- 20- 94A50- 104
6- 21- 91A20- 106 6- 21- 91A20- 106
6- 21- 91A00- 106 6- 21- 91A00- 106
6- 53- 3050B- 042 6- 53- 3050B- 042 6- 53- 3050B- 042
6- 20- 94A70- 104
6- 20- 94AA0- 104
1
6- 53- 3050B- 042
BAT LED
P OWER ON
L ED
2
CLED_ACI N
6- 52- 55002- 04E
6- 52- 55002- 042
CLED_BAT_CHG
CH6
HO-165X94_5NP
CH5
C95D95
CJ _TP3
*85201-06051
1
2
3
4
5
6
1
CH1
MTH237D91
2
3
4
5 6
7
8
9
CR3
*220_04
CC2
*0. 1u_16V_Y5V_04
CSW2
TJ G-533-S-T/R
3
1
4
2
56
CC1
0.1u_16V_Y5V_04
CR1
*220_04
CLICK BOARD
CSW3
*TJ G-533-S-T/ R
3
1
4
2
56
CSW4
*TJ G-533-S-T/ R
3
1
4
2
56
CC3
*0.1u_16V_Y5V_04
1
CH4
MTH237D91
2
3
4
5 6
7
8
9
CJ _TP2
85201-06051
1
2
3
4
5
6
CJ _TP1
85201-04051
1
2
3
4
CSW1
TJ G-533-S-T/R
3
1
4
2
56
S
G Y
CD26
*KPB-3025YSGC
13
24
CR4
*220_04
1
CH2
MTH237D91
2
3
4
5 6
7
8
9
S
G
Y
CD27
*KPB-3025YSGC
13
24
CR2
*220_04
CGND
CGND
1
CH3
MTH237D91
2
3
4
5 6
7
8
9
CGND
CGND
CGND CGND
CGND
CGND CGND CGND CGND
C5VS
CGND CGND
CGND
CGND
CGND
CVDD3
CGND
CGND
C5VS
CGND CGND CGND CGND
CTPBUTTON_R CTPBUTTON_L CTPBUTTON_R CTPBUTTON_L
RIGH T
KEY
LIFT
KEY
LIF T
KEY
1
RIG HT
KE Y
CSW1~4
3
4
6- 52- 55002- 04E
6- 52- 55002- 042
2
CTP_DATA CTP_CLK
CTPBUTTON_R
CTP_CLK CTP_DATA
CTPBUTTON_L
CLED_PWR
11/04 11/ 04
Sheet 39 of 43
Click Board
Schematic Diagrams
Audio Board/USB B - 41
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Audio Board/USB

A MI C1 -R
AS P K OU TR -
AS P K OU T R+_R
AS P K OU T R-_ R
AS P K O UT R+
AU S B_ P N2
AS P K OU TR +
AM I C1 -L
AM I C1 -R
AM I C_ S E N S E
AS P K OU TR -
AU S B_ P P 2
AH P _ S E NS E
AH E ADP HON E -R
AS P K _H P #
AH E ADP HON E -L
AS P K _H P #
AU S B_ P P 2
AH P _ S E NS E
AU S B_ P P 2 _R
AU S B_ P N2 _ R AU S B_ P N2
AU 1
R T9 7 1 5BG S
VO UT 1
6
VO UT 3
8
VI N 2
3
VI N 1
2
VO UT 2
7
G ND
1
E N#
4
F L G#
5
AL 7
F CM 1 00 5 K F -1 21 T 0 3
1 2
AC4
1 00 p _ 50 V_ NP O _0 4
AC1 4 0 . 1 u_ 1 6V _Y 5V_ 0 4
AL 61
*AW C M2 0 12 F 2 S -1 61 T 0 3
1
4
2
3
AC 2
10 0 p_ 5 0 V_N P O_ 0 4
AH 1
C 5 9D 59
AH3
C5 9 D5 9
AJ _ AUD I O1
8 72 1 3 -14 0 0 G
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
AL3 F C M1 0 05 K F -1 2 1 T0 3
AL 6 F C M1 0 05 K F -1 2 1T 0 3
1
AH4
MT H2 7 6 D1 11
2
3
4
5 6
7
8
9
AC7
0. 1 u _ 16 V_ Y 5 V_ 04
AR8
*1 K _ 1 %_ 0 4
A R5 68 _ 0 4
AL2 F C M1 0 05 K F -1 2 1 T0 3
+AC1
1 00 u _ 6. 3 V_ B_ A
AC1 3 0 . 1 u_ 1 6V _Y 5V_ 0 4
AL5
H CB1 6 08 K F -1 2 1T 2 5
AR 11 *1 0m i l _0 4
A R3 68 _ 0 4
AC9
1 0u _ 1 0V_ Y 5V_ 0 8
AJ _ US B1
U S 04 0 3 6BC A0 81
V+
1
G
N
D
1
G
N
D
1
DAT A_ L
2
DAT A_ H
3
GN D
4
G
N
D
2
G
N
D
2
G
N
D
4
G
N
D
4
G
N
D
3
G
N
D
3
AC1 1
1 00 0 p _5 0 V_ X7 R _0 4
AR9
*1 K _ 1% _ 0 4
R
L
AJ _ H P 1
2 S J -T3 5 1 -S 2 3
2
6
5
3
1
4
AC3
10 0 p _5 0 V_ NP O_ 0 4
1
AH 2
M TH 2 76 D1 1 1
2
3
4
5 6
7
8
9
AC 1 0
1 0 0p _ 5 0V_ N P O_ 0 4
AC6
0. 1 u _ 16 V_ Y 5 V_ 04
1
AL 4 F C M1 0 05 K F -1 2 1T 0 3
AC5
0. 1 u _ 16 V_ Y 5 V_ 04
AC8
18 0 p_ 5 0 V_N P O_ 0 4
J_SPK1
AC1 5 0 . 1 u_ 1 6V _Y 5V_ 0 4
AC1 7
18 0 p _5 0 V_ NP O_ 0 4
2
AC1 6 0 . 1 u_ 1 6V _Y 5V_ 0 4
AJ _ S P K R 1
8 5 20 4 -0 20 0 1
P CB F o o tp ri n t = 8 52 0 4 -02 R
1
2
AR 10 *1 0m i l _0 4
R
L
AJ _ M I C1
2 S J -T3 5 1 -S 2 3
2
6
5
3
1
4
AL 8
F CM 1 00 5 K F -1 21 T 0 3
1 2
A_ U S BVCC
A _AU DG
A_ 5 V
A _U S BVCC
A_U S BVCC 2
AG ND AG ND AGN D
AGN D
A_AU DG
AG ND AGN D AGN D AG ND
AGND
A_ 5 V
A _AU DG AG ND
AGN D
AG ND
BLACK
BLACK
AUDIO JACK
MIC IN
HEADPHONE
USB PORT
60 mil
A_A UDG AGN D
6- 20- B2800- 106
6-20- B2800-106
6- 21-B49B0- 104
6- 21-B49C0- 104
6-20- 53A00-114
PI N SWAP
TO M/B
6-02-09715-920
50mils
50mi ls
6- 20- 43110- 102
6- 20- 43150- 102
A_A UDG
A MI C1 -L
AMI C _S E N S E
AHE AD P HO NE -L
AHE AD P HO NE -R
Sheet 40 of 43
Audio Board/USB
Schematic Diagrams
B - 42 Power Switch & LID Board
B
.
S
c
h
e
m
a
t
i
c

D
i
a
g
r
a
m
s
Power Switch & LID Board

6-52-56000- 020
6-52-56001- 028
6-52-56001- 023
POWER
SWITCH
LED
POWER BUTTON
FORE5128Q FORE4120Q/E5120Q
20 mil
6-52-56001- 022
4
PSW1~8
1
2
6-53-3150B-245
3
FORE4120Q/E5120Q
FORE5128Q
6-53-3050B-240
6-53-3050B-241
S M_ BT N# S W E B_ W W W # S W E B_ E M AI L # S AP _ O N
POWER SW & LED & HOT KEY
POWER BUTTON WEB_WWW#
PSW1~8
2
WEB_EMAIL#
4
3 1
AP_KEY#
6- 53-3050B-241
6- 53-3150B-245
6- 53-3050B-240
6- 53-3050B-241
6- 53-3150B-245
HOT KEY
6-53-3150B-245
6- 53-3050B-240
6- 53-3050B-241
6- 53-3150B-245
6- 53-3050B-240 6-53-3050B-240
6-53-3050B-241
11/04
S M _BT N#
S L I D_ S W #
S AP _ ON
S W E B_ W W W #
S W E B_ E M AI L#
S L I D_ S W #
S AP _ O N
S W E B _W W W #
S W E B _E M AI L #
S M _BT N #
S L I D _S W #
S M_ BT N#
S C 3
0 . 1 u _1 6 V_ Y 5 V_0 4
S M H5
H 7_ 0 D2 _ 3
S MH 2
H7 _ 0 D2 _3
1
S M H4
M TH 2 37 D1 1 8
2
3
4
5 6
7
8
9
1
S M H1
MT H 23 7 D8 7
2
3
4
5 6
7
8
9
S M AI L _S W 1
T J G-5 3 3-S -T/ R
3
1
4
2
56
S J _ S W 2
8 8 48 6 -0 80 1
1
2
3
4
5
6
7
8
S D3
* HT -1 50 NB -DT
A
C
S C 4
0 . 1 u_ 1 6V _Y 5V_ 0 4
S P W R _ S W 2
* TJ G-5 3 3 -S -T/ R
3
1
4
2
56
S AP _ S W 1
T J G-5 33 -S -T /R
3
1
4
2
56
S C 5
0 . 1 u_ 1 6 V_Y 5 V_0 4
S J _ S W 1
* 50 5 0 0-0 1 0 41 -0 0 1L
1
2
3
4
5
6
7
8
9
1 0
S C 1
* 10 0 p_ 5 0 V_N P O_ 0 4 S D 1
HT -1 50 N B-DT
A
C
S R 2
2 2 0 _0 4
S D2
*BAV9 9 RE C TI F I E R
C
AC
A
S R4
0_ 0 4
S C2
0 . 1u _ 1 0V_ X7 R_ 04
S R 1 1 00 K _ 1 %_ 0 4
S R5
*4 7 K _ 04
S U 1
MH 2 48 -AL F A-E S O
VCC
1
OU T
2
G
N
D
3
S W W W _ S W 1
T J G -5 33 -S -T / R
3
1
4
2
56
S C6
0. 1 u _ 16 V_ Y 5 V_ 0 4
S R3
*1 0 0 K _1 % _ 04
1
S M H3
M TH 23 7 D8 7
2
3
4
5 6
7
8
9
S M GN D S M GN D
S P W R _ S W 1
T J G-5 33 -S -T / R
3
1
4
2
56
S MGN D S M GN D S M GND S M GN D
S MGN D
S _ VI N
S MG ND
S MGN D
S _ 3 . 3V
S M GN D
S M GN D
S _ 3. 3VS
S _ VI N
S M GN D
S _ 3. 3 VS
S M GN D
S _ 3 . 3V
S MG ND
S _ 3 . 3V
S M GND
S M GND
S _ 3. 3V
S MG ND
S MGN D
S _3 . 3 VS
S M GND
S M GN D
S M GN D S M GND
S MG ND S MGN D S MG ND
20 mi l
1 0 pin & 8 pi n co- la y
2 0mi l
S MGN D
1
SU1, SU2
2
6-20-94K10-108
3
6-52-56001- 023
6-02- 00268- LC1
6-02- 00248- LC2
LID SWITCH IC
2 0m il
6-52-56001- 022
6-52-56000- 020
6-52-56001- 028
Sheet 41 of 43
Power Switch & LID
Board
BIOS Update
C - 1
C
:
B
I
O
S

U
p
d
a
t
e
Appendix C:Updating the FLASH ROM BIOS
To update the FLASH ROM BIOS you must:
Download the BIOS update from the web site.
Unzip the files onto a bootable CD/DVD/USB Flash Drive.
Reboot your computer from an external CD/DVD/USB Flash Drive.
Use the flash tools to update the flash BIOS using the commands indicated below.
Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
After rebooting the computer you may restart the computer again and make any required changes to the default BIOS
settings.
Download the BIOS
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel.
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model
(see sidebar for important information on BIOS versions).
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the
downloaded files.
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software).
Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the + and - keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
BIOS Version
Make sure you down-
load the latest correct
version of the BIOS ap-
propriate for the com-
puter model you are
working on.
You should only
download BIOS ver-
sions that are
V1.01.XX or higher as
appropriate for your
computer model.
Note that BIOS versions
are not backward com-
patible and therefore
you may not down-
grade your BIOS to an
older version after up-
grading to a later ver-
sion (e.g if you upgrade
a BIOS to ver 1.01.05,
you MAY NOT then go
back and flash the BIOS
to ver 1.01.04).
BIOS Update
C - 2
C
:
B
I
O
S

U
p
d
a
t
e
Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message Starting MS-DOS. You will then be prompted to give Y or N responses to the programs
being loaded by DOS. Choose N for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\>(C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat

4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F9) and select Yes to confirm the selection.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.

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