Color Television Chassis

Q523.1U
LA

ME7

H_16770_000.eps
190207

Contents Page Contents Page

1. Technical Specifications, Connections, and Chassis DFI Panel: Display Interfacing (AB9) 71 73-74
Overview 2 DFI Panel: FPGA Ambilight (AB10) 72 73-74
2. Safety Instructions, Warnings, and Notes 6 Small Signal Board(B1-B11) 75-115 119-124
3. Directions for Use 7 SSB: SRP List 116-118
4. Mechanical Instructions 8 Side I/O Panel (D) 125 126
5. Service Modes, Error Codes, and Fault Finding 18 Keyboard Control Panel (E) 127 128
6. Block Diagrams, Test Point Overview, and Interface Panel (FA) 129 129
Waveforms Front IR / LED Panel (J) 130 131
Wiring Diagram 42” LCD 39 8. Alignments 133
Wiring Diagram 42” LCD + AmbiLight 40 9. Circuit Descriptions, Abbreviation List, and IC Data
Wiring Diagram 47” LCD 41 Sheets 136
Wiring Diagram 47” LCD + AmbiLight 42 Abbreviation List 154
Wiring Diagram 47” LCD + DFI + AmbiLight 43 IC Data Sheets 157
Wiring Diagram 52” LCD 44 10. Spare Parts List 165
Block Diagram Supply 42” 45 11. Revision List 185
Block Diagram Supply 47” Sanken 46
Block Diagram Video 47
Block Diagram Audio 48
Block Diagram Control & Clock Signals 49
Testpoint Overview SSB 50-55
I2C IC Overview 56
Supply Lines Overview 57
7. Circuit Diagrams and PWB Layouts Drawing PWB
Display Supply (42”): Mains Filter & Standby(A1)58 61-62
Display Supply (42”): Supply (A2) 59 61-62
Display Supply (42”): DC / DC (A3) 60 61-62
DFI Panel: DC - DC (AB1) 63 73-74
DFI Panel: Video Flow (AB2) 64 73-74
DFI Panel: Clock (AB3) 65 73-74
DFI Panel: Supply (AB4) 66 73-74
DFI Panel: FPGA: Power & Control (AB5) 67 73-74
DFI Panel: FPGA: DFI (AB6) 68 73-74
DFI Panel: DDR A (AB7) 69 73-74
DFI Panel: DDR B (AB8) 70 73-74

©
Copyright 2007 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by EL 0770 BU CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 16773
 EN 2 1. Q523.1U LA Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter: 1.1.3 Multimedia
1.1 Technical Specifications
1.2 Connections Supported file formats : JPEG
1.3 Chassis Overview : MP3
: Slideshow (.alb)
Notes:
• Figures can deviate due to the different set executions. USB input : USB2.0
• Specifications are indicative (subject to change).
1.1.4 Miscellaneous
1.1 Technical Specifications
Power supply:
1.1.1 Vision - Mains voltage (VAC) : 110 - 240 ±10%
(4xPFL7422D/37 and
47PFL5432D/37)
Display type : LCD
: 110 ±10%
Screen size : 42" (107 cm), 16:9
(4xPFL7432D/37,
: 47" (120 cm), 16:9
: 47PFL9732D/37 and
: 52" (132 cm), 16:9
52”)
Resolution (H × V pixels) : 1920(× 3) × 1080
- Mains frequency (Hz) : 50 / 60
Light output (cd/m2) : 500
Viewing angle (H × V degrees) : 176 × 176
Tuning system : PLL Ambient conditions:
Color systems : ATSC - Temperature range (°C) : +5 to +45
: NTSC
Video playback : NTSC Power consumption (values are indicative)
Cable : Unscrambled digital - Normal operation (W) : 226 (42")
cable - QAM : 295 (47", all sets)
Tuner bands : UHF, VHF, S, Hyper : 310 (47PFL9732D/37
and 52")
Supported video formats - Stand-by (W) : <1
- All sets : 480i @ 60 Hz
: 480p @ 60 Hz Dimensions (W × H × D) (inch) : 42.1 × 27 × 4.6 (42")
: 720p @ 60 Hz : 45.6 × 29.6 × 4.6
: 1080i @ 60 Hz (47")
: 1080p @ 60 Hz : 49.2 × 27.1 × 4.4
- 47PFL9732D/37+ 52” : 576i @ 50 Hz (47PFL5432D/37)
: 576p @ 50 Hz : 50.8 × 32.9 × 4.6
: 720p @ 50 Hz (52")
: 1080i @ 50 Hz
: 1080p @ Weight (lb.)
24,25,50 Hz - 42PFL7422D/37 : 58.2
- 42PFL7432D/37 : 60.8
Supported computer formats - 47PFL7422D/37 : 67.5
- All sets : 640 × 480 @ 60 Hz - 47PFL7432D/37 : 69.7
: 800 × 600 @ 60 Hz - 47PFL5432D/37 : 67.5
: 1024 × 768 @ 60 Hz - 47PFL9732D/37 : 70.5
: 1366 × 768 @ 60 Hz - 52PFL7422D/37 : 87.1
- 47PFL9732D/37+ 52” : 1280 × 1024 @ 60 Hz - 52PFL7432D/37 : 89.5
: 1920 × 1080i @ - 52MF437B/37 : 87.1
60 Hz - 52MF437S/37 : 87.1
: 1920 × 1080p @
60 Hz

1.1.2 Sound

Maximum power (WRMS) : 2×8

 Technical Specifications, Connections, and Chassis Overview Q523.1U LA 1. EN 3

1.2 Connections

H_16770_076.eps
220307

Figure 1-1 Connection overview

Note: The following connector color abbreviations are used Wh - Audio - L 0.5 VRMS / 10 kohm kq
(acc. to DIN/IEC 757): Bk = Black, Bu = Blue, Gn = Green,
Gy = Grey, Rd = Red, Wh = White, Ye = Yellow. HDMI 1, 2 & 3: Digital Video, Digital Audio - In

1.2.1 Side Connections 19 1

18 2
E_06532_017.eps
USB2.0 250505

Figure 1-3 HDMI (type A) connector

1 2 3 4
E_06532_022.eps 1 - D2+ Data channel j
300904 2 - Shield Gnd H
3 - D2- Data channel j
Figure 1-2 USB (type A) 4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
1 - +5V k
7 - D0+ Data channel j
2 - Data (-) jk
8 - Shield Gnd H
3 - Data (+) jk
9 - D0- Data channel j
4 - Ground Gnd H
10 - CLK+ Data channel j
11 - Shield Gnd H
Head phone (Output) 12 - CLK- Data channel j
Bk - Head phone 32 - 600 ohm / 10 mW ot 13 - n.c.
14 - n.c.
Cinch: Video CVBS - In, Audio - In 15 - DDC_SCL DDC clock j
Rd - Audio R 0.5 VRMS / 10 kohm jq 16 - DDC_SDA DDC data jk
Wh - Audio L 0.5 VRMS / 10 kohm jq 17 - Ground Gnd H
Ye - Video CVBS 1 VPP / 75 ohm jq 18 - +5V j
19 - HPD Hot Plug Detect j
S-Video (Hosiden): Video Y/C - In 20 - Ground Gnd H
1 - Ground Y Gnd H
2 - Ground C Gnd H Service Connector (UART)
3 - Video Y 1 VPP / 75 ohm j 1 - Ground Gnd H
4 - Video C 0.3 VPP / 75 ohm j 2 - UART_TX Transmit k
3 - UART_RX Receive j
1.2.2 Rear Connections
Aerial - In
Cinch: Audio - Out - - F-type (US) Coax, 75 ohm D
Rd - Audio - R 0.5 VRMS / 10 kohm kq
Wh - Audio - L 0.5 VRMS / 10 kohm kq AV3: Cinch: Audio - In
Rd - Audio - R 0.5 VRMS / 10 kohm kq
Digital Audio In: Cinch: S/PDIF - In Wh - Audio - L 0.5 VRMS / 10 kohm kq
Bk - Coaxial 0.2 - 0.6VPP / 75 ohm jq
AV3: Cinch: Video YPbPr - In
Digital Audio Out: Cinch: S/PDIF - Out Gn - Video Y 1 VPP / 75 ohm jq
Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq Bu - Video Pb 0.7 VPP / 75 ohm jq
Rd - Video Pr 0.7 VPP / 75 ohm jq
Cinch: Audio - In
Rd - Audio - R 0.5 VRMS / 10 kohm kq
EN 4 1. Q523.1U LA Technical Specifications, Connections, and Chassis Overview

AV2: Cinch: Video CVBS - In, Audio - In Wh - Audio L 0.5 VRMS / 10 kohm jq
Rd - Audio R 0.5 VRMS / 10 kohm jq Ye - Video CVBS 1 VPP / 75 ohm jq
Wh - Audio L 0.5 VRMS / 10 kohm jq
Ye - Video CVBS 1 VPP / 75 ohm jq AV1: Cinch: Video YPbPr - In
Gn - Video Y 1 VPP / 75 ohm jq
AV1: S-Video (Hosiden): Video Y/C - In Bu - Video Pb 0.7 VPP / 75 ohm jq
1 - Ground Y Gnd H Rd - Video Pr 0.7 VPP / 75 ohm jq
2 - Ground C Gnd H
3 - Video Y 1 VPP / 75 ohm j
4 - Video C 0.3 VPP / 75 ohm j 1.3 Chassis Overview

AV1: Cinch: Video CVBS - In, Audio - In

Rd - Audio R 0.5 VRMS / 10 kohm jq

A DISPLAY SUPPLY PANEL

INTERFACE PANEL FA

KEYBOARD CONTROL
PANEL E

B SMALL SIGNAL IR & LED PANEL J

BOARD
SIDE I/O PANEL D
H_16770_077.eps
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Figure 1-4 PWB/CBA locations 42" sets (with AmbiLight)

DISPLAY SUPPLY
PANEL

KEYBOARD CONTROL
PANEL E

B SMALL SIGNAL
BOARD
IR & LED PANEL J
SIDE I/O PANEL D
H_16770_078.eps
130707

Figure 1-5 PWB/CBA locations 47" sets (all sets without DFI panel) and 42" sets (without Ambilight)
 Technical Specifications, Connections, and Chassis Overview Q523.1U LA 1. EN 5

DFI PANEL AB
DISPLAY
A SUPPLY PANEL

SIDE I/O PANEL D

KEYBOARD CONTROL
PANEL E

SMALL SIGNAL
B BOARD
IR & LED PANEL J
H_16790_057.eps
230807

Figure 1-6 PWB/CBA locations 47 and 52" sets (optional with DFI panel)
 EN 6 2. Q523.1U LA Safety Instructions, Warnings, and Notes
2. Safety Instructions, Warnings, and Notes
Index of this chapter:
2.1 Safety Instructions
2.2 Warnings
2.3 Notes
2.1 Safety Instructions
Safety regulations require the following during a repair:
• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:
• Route the wire trees correctly and fix them with the
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage.
• Check the strain relief of the Mains/AC Power cord for
proper function.
• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 Mohm and 12 Mohm.
4. Switch “off” the set, and remove the wire between the
two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.
2.2 Warnings
• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
• Be careful during measurements in the high voltage
section.
• Never replace modules or other components while the unit
is switched “on”.
• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
2.3 Notes
2.3.1 General
• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode (see chapter 5) with a Phillips bar
signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated
otherwise) and picture carrier at 475.25 MHz for PAL, or
61.25 MHz for NTSC (channel 3).
• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.
• Manufactured under license from Dolby Laboratories.
“Dolby”, “Pro Logic” and the “double-D symbol”, are
trademarks of Dolby Laboratories.
2.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kohm).
• Resistor values with no multiplier may be indicated with
either an “E” or an “R” (e.g. 220E or 220R indicates 220
ohm).
• All capacitor values are given in micro-farads (μ= ×10-6),
nano-farads (n= ×10-9), or pico-farads (p= ×10-12).
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
• The correct component values are listed in the Spare Parts
List. Therefore, always check this list when there is any
doubt.
2.3.3 BGA (Ball Grid Array) ICs
Introduction
For more information on how to handle BGA devices, visit this
URL: www.atyourservice.ce.philips.com (needs subscription,
not available for all regions). After log-in, select “Magazine”,
then go to “Repair downloads”. Here you will find Information
on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile,
which is coupled to the 12NC. For an overview of these profiles,
visit the website www.atyourservice.ce.philips.com (needs
subscription, but is not available for all regions)
You will find this and more technical information within the
“Magazine”, chapter “Repair downloads”.
For additional questions please contact your local repair help
desk.
2.3.4 Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
•Use only lead-free soldering tin Philips SAC305 with order
code 0622 149 00106. If lead-free solder paste is required,
please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
 Directions for Use
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.
2.3.5 Alternative BOM identification
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production center (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.
MODEL : 32PF9968/10 MADE IN BELGIUM
220-240V ~ 50/60Hz
128W
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF
S BJ3.0E LA
E_06532_024.eps
130606
Figure 2-1 Serial number (example)
3. Directions for Use
You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com
Q523.1U LA 3. EN 7
2.3.6 Exchanging a Defective PDP
If a PDP has defective or “dead” pixels, do the following:
1. Locate the defective pixels.
2. Indicate their positions by means of a marker (with
erasable ink!).
3. Indicate the positions of the defective pixels in the Defects
Description Form (DDF), which is published in the PDP
manuals.
4. After this, remove the PDP and return it to your Service
organization.
If a PDP has to be removed from the TV set, always keep in
mind that the PDP parts can easily be damaged by ESD, so
take the following protective measures:
• Do not damage the flex foils (they are located on the left,
right, upper and lower sides of the PDP).
• Do not scratch the glass plate.
• Avoid fingerprints.
2.3.7 Board Level Repair (BLR) or Component Level Repair
(CLR)
If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
2.3.8 Practical Service Precautions
• It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
• Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.
 EN 8 4. Q523.1U LA Mechanical Instructions

4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal • Follow the disassemble instructions in described order.
4.4 Set Re-assembly They apply to the 47PFL7432D/37 (47" with AmbiLight).

4.1 Cable Dressing

H_16770_079.eps
220307

Figure 4-1 Cable dressing 42" sets (with AmbiLight)

 Mechanical Instructions Q523.1U LA 4. EN 9

H_16770_080.eps
220307

Figure 4-2 Cable dressing 47" sets (all sets without DFI panel) and 42" sets (without Ambilight)

H_16790_060.eps
220807

Figure 4-3 Cable dressing 47 and 52" sets (optional with DFI panel)
 EN 10 4. Q523.1U LA Mechanical Instructions

4.2 Service Positions 4.2.2 Aluminium Stands

For easy servicing of this set, there are a few possibilities

created:
• The buffers from the packaging (see figure “Rear cover”).
• Foam bars (created for Service).
• Aluminium service stands (created for Service).

4.2.1 Foam Bars

Required for sets

1 42"
E_06532_039.eps
290507

Figure 4-5 Aluminium stands

The MkII aluminium stands with order code 3122 785 90690,
can also be used to do measurements, alignments, and
duration tests. The stands can be (dis)mounted quick and easy
by means of sliding them in/out the “mushrooms”. The stands
are backwards compatible with the earlier models.
Important: For (older) FTV sets without these “mushrooms”, it
is obligatory to use the provided screws, otherwise it is possible
E_06532_018.eps
171106
to damage the monitor inside!

Figure 4-4 Foam bars

4.3 Assy/Panel Removal
The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See figure “Foam 4.3.1 Rear Cover
bars” for details. Sets with a display of 42" and larger, require
four foam bars [1]. Ensure that the foam bars are always Warning: Disconnect the mains power cord before you remove
supporting the cabinet and never only the display. Caution: the rear cover.
Failure to follow these guidelines can seriously damage the
display! Refer to figure “Rear Cover Removal” for details.
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen.
 Mechanical Instructions Q523.1U LA 4. EN 11

2 2
2 2 2
2
2 3
2

2
2 3 2

1 2 2
2 2 2 2

2
2

2 2

H_16770_081.eps
130707

Figure 4-6 Rear Cover Removal

1. Remove the stand.

2. Remove the mushrooms [1].
3. Remove the screws [2].
4. Open the covers [3] on the back cover.

Refer to figures “Cover Removal” for details.

4
H_16770_084.eps
220307

Figure 4-8 Cover Removal - 42" sets with AmbiLight

1. Unplug connectors necessary for removing the backcover.

4.3.2 Side I/O Board

H_16770_082.eps
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Refer to figure “Side I/O Board” for details.
1. Unplug connectors [1].
Figure 4-7 Cover Removal
2. Remove screw [2].
3. Push brackets [3], lift the PWB and slide it to the left out of
1. Unplug connector [4].
its casing.
When defective, replace the whole unit.
Note:
42" Sets with AmbiLight have an extra cover. Refer to figure
“Cover Removal - 42" sets with AmbiLight” for details.
 EN 12 4. Q523.1U LA Mechanical Instructions

1 2
3 2

H_16770_087.eps
220307

H_16770_085.eps
220307 Figure 4-11 Keyboard Control Board -2-

Figure 4-9 Side I/O Board 4.3.4 IR & LED Board

4.3.3 Keyboard Control Board Refer to figure “IR & LED Board” for details.
1. Release clip [1], lift the board and take it out.
Refer to figures “Keyboard Control Board -1-” and “Keyboard 2. Unplug connector [2].
Control Board -2-” for details. When defective, replace the whole unit.
1. Remove the screws [1].
2. Lift the clamps [2].
3. Take the PWB out of its casing.
4. Unplug the connector [3] and remove the board.
When defective, replace the whole unit.

H_16770_088.eps
220307

Figure 4-12 IR & LED Board

4.3.5 Speakers

Refer to figure “Speakers” for details.

H_16770_086.eps 1. Unplug connectors [1].
220307 2. Remove screws [2].

Figure 4-10 Keyboard Control Board -1-

 Mechanical Instructions Q523.1U LA 4. EN 13

1
2
2

1 2
1
1 1

H_16770_089.eps
130707
1 1
Figure 4-13 Speakers

4.3.6 Platform Supply Panel - 42" sets

2
2
Refer to figure “Platform Supply Panel - 42" sets” for details.
1. Remove the fixation screws [1].
1
2. Unplug connectors [2].
3. Take the board out.
1
H_16770_090.eps
220307
1

Figure 4-15 Platform Supply Panel - 47" sets

1 2
2 4.3.8 Small Signal Board (SSB)

Caution: it is mandatory to remount all different screws at their

original position during re-assembly. Failure to do so may result
in damaging the SSB.
Refer to figures “Small Signal Board -1-” and “Small Signal
1 1 Board -2-” for details.
1. Remove the tapping screws [1].
2. Unplug the connectors [2].
3. Unplug the LVDS connector [3]. Caution: be careful, as
this is a very fragile connector!
4. Remove the parker screws [4].
2
5. Remove the tapping screws [5].
6. Carefully lift the SSB at the top and take it out of the set.
1 1

1 1
2
3 2 2

1 2

1 1
H_16770_091.eps
220307

1 1
Figure 4-14 Platform Supply Panel - 42" sets
1

4.3.7 Platform Supply Panel - 47" sets

H_16770_092.eps
Refer to figure “Platform Supply Panel - 47" sets” for details. 220307
1. Remove the fixation screws [1].
2. Unplug connectors [2]. Figure 4-16 Small Signal Board -1-
3. Take the board out.
 EN 14 4. Q523.1U LA Mechanical Instructions

8. Lift the central sub-frame from the set. Refer to figure

Central Sub-frame lift for details.
9. Lift the LCD panel from the front cabinet.
4 4 4 5 5

H_16770_093.eps
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Figure 4-17 Small Signal Board -2-

4.3.9 AmbiLight Unit

The AmbiLight Units are located in the back cover. Refer to

figure “AmbiLight Unit” for details.
1. Remove the screws [1].
2. Unplug the connectors [2].
3. Slide the unit sideways and take it out of the backcover.

1 2

H_16770_094.eps
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Figure 4-18 AmbiLight Unit

When defective, replace the whole unit.

4.3.10 LCD Panel

Refer to figures “LCD Panel -1-” and “LCD Panel -2-” for details.
1. Remove the vertical brackets [1] by removing the screws
[2].
2. Unplug the connectors [3].
3. Unplug the LVDS connector [4] from the LCD panel.
Important: Be careful, as this is a very fragile connector!
4. Unplug the connectors [5] from the speakers.
5. Remove fixation screw [6] from the side I/O panel.
6. Unplug connector from LED I/R panel as earlier described
[7].
7. Remove fixation screws [8] and lift the complete central
sub-frame [6] from the set.
 Mechanical Instructions Q523.1U LA 4. EN 15

2 2

1 1

2 2

H_16770_095.eps
130707

Figure 4-19 LCD Panel -1-

8 8 8 8

8 8

8 8

3 3

8 5 5
8 7

8 8 8 8 6
H_16770_096.eps
120707

Figure 4-20 LCD Panel -2-

EN 16 4. Q523.1U LA Mechanical Instructions

H_16770_097.eps
130707

Figure 4-21 Central Sub-frame

 Mechanical Instructions Q523.1U LA 4. EN 17

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse

order.

Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure “Cable
dressing”.
• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted
correctly.
 EN 18 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter: Specifications
5.1 Test Points
5.2 Service Modes Table 5-1 SDM default settings
5.3 Stepwise Start-up
5.4 Service Tools
Default
5.5 Error Codes
Region Freq. (MHz) system
5.6 The Blinking LED Procedure
5.7 Protections Europe, AP(PAL/Multi) 475.25 PAL B/G
5.8 Fault Finding and Repair Tips Europe, AP DVB-T 546.00 PID DVB-T
5.9 Software Upgrading Video: 0B 06 PID
PCR: 0B 06 PID
Audio: 0B 07
5.1 Test Points NAFTA, AP-NTSC, 61.25 (ch 3) NTSC M
LATAM
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. Several key ICs are
capable of generating test patterns, which can be controlled via • Tuning frequency 61.25 MHz for NTSC: The TV shall tune
ComPair. In this way it is possible to determine which part is to physical channel 3 only if channel 3 is an analog channel
defective. or if there is no channel 3 installed in the channel map. If
there is a digital channel installed in channel 3, then the
Perform measurements under the following conditions: frequency to which the set will tune, would be as specified
• Service Default Mode. in the channel map and could be different from the one
• Video: Color bar signal. corresponding to the physical channel 3.
• Audio: 3 kHz left, 1 kHz right. • All picture settings at 50% (brightness, color, contrast).
• All sound settings at 50%, except volume at 25%.
• All service-unfriendly modes (if present) are disabled, like:
5.2 Service Modes – (Sleep) timer.
– Child/parental lock.
Service Default mode (SDM) and Service Alignment Mode – Picture mute (blue mute or black mute).
(SAM) offers several features for the service technician, while – Automatic volume levelling (AVL).
the Customer Service Mode (CSM) is used for communication – Auto switch “off” (when no video signal was received
between the call centre and the customer. for 10 minutes).
– Skip/blank of non-favorite pre-sets.
This chassis also offers the option of using ComPair, a – Smart modes.
hardware interface between a computer and the TV chassis. It – Auto store of personal presets.
offers the abilities of structured troubleshooting, error code – Auto user menu time-out.
reading, and software version read-out for all chassis.
(see also paragraph “ComPair”). How to Activate SDM
For this chassis there are two kinds of SDM: an analog SDM
5.2.1 Service Default Mode (SDM) and a digital SDM. Tuning will happen according table “SDM
Default Settings”.
Purpose • Analog SDM: use the standard RC-transmitter and key in
• To create a pre-defined setting, to get the same the code “062596”, directly followed by the “MENU” button.
measurement results as given in this manual. Note: It is possible that, together with the SDM, the main
• To override SW protections detected by stand-by menu will appear. To switch it “off”, push the “MENU”
processor and make the TV start up to the step just before button again.
protection (a sort of automatic stepwise start up). See • Digital SDM: use the standard RC-transmitter and key in
paragraph “Stepwise Start Up”. the code “062593”, directly followed by the “MENU” button.
• To override SW protections detected by Mips. See also Note: It is possible that, together with the SDM, the main
paragraph “Error codes”. menu will appear. To switch it “off”, push the “MENU”
• To start the blinking LED procedure (not valid for button again.
protections detected by stand-by software). • Analog SDM can also be activated by shortening for a
moment the two solder pads [1] (see figure “Service mode
pads”) on the SSB, with the indication “SDM”. Activation
can be performed in all modes, except when the set has a
problem with the Stand-by Processor.
 Service Modes, Error Codes, and Fault Finding
1 error is displayed at the upper left (for an error explanation
2 •
H_16770_100.eps
130707
Figure 5-1 Service mode pads
After activating this mode, “SDM” will appear in the upper right
corner of the screen (if you have picture).
How to Navigate
When you press the “MENU” button on the RC transmitter, the
set will toggle between the SDM and the normal user menu
(with the SDM mode still active in the background).
How to Exit SDM
Use one of the following methods:
• Switch the set to STAND-BY via the RC-transmitter.
• Via a standard customer RC-transmitter: key in “00”-
sequence.
5.2.2 Service Alignment Mode (SAM)
Purpose
• To perform (software) alignments.
• To change option settings.
• To easily identify the used software version.
• To view operation hours.
• To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: key in the code “062596”
directly followed by the “INFO” button. After activating SAM
with this method a service warning will appear on the screen,
you can continue by pressing the red button on the RC.
Contents of SAM:
• Hardware Info.
– A. SW Version. Displays the software version of the
main software (example: Q531U-1.2.3.4 =
AAAAB_X.Y.W.Z).
• AAAA= the software name.
• B= the region: A= AP, E= EU, L= LatAm, U = US.
For AP sets it is possible that the Europe software
version is used.
• X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
compatible with one another) and Y.W.Z is the sub
version number (a higher number is always
compatible with a lower number).
– B. SBY PROC Version. Displays the software version
of the stand-by processor.
– C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is
initialized after corruption, this production code has to
be re-written to NVM. ComPair will foresee in a
possibility to do this.
Q523.1U LA 5. EN 19
• Operation Hours. Displays the accumulated total of
operation hours (not the stand-by hours). Every time the
TV is switched “on/off”, 0.5 hours is added to this number.
• Errors. (Followed by maximal 10 errors). The most recent
see paragraph “Error Codes”).
Reset Error Buffer. When you press “cursor right” and
then the “OK” button, the error buffer is reset.
• Alignments. This will activate the “ALIGNMENTS” sub-
menu.
• Dealer Options. Extra features for the dealers.
• Options. Extra features for Service. For more information
regarding option codes, see chapter 8.
Note that if you change the option code numbers, you have
to confirm your changes with the “OK” button before you
store the options. Otherwise you will lose your changes.
• Initialize NVM. When an NVM was corrupted (or replaced)
in the former EMG based chassis, the microprocessor
replaces the content with default data (to assure that the
set can operate). However, all preferences and alignment
values are gone now, and option numbers are not correct.
Therefore, this was a very drastic way. In this chassis, the
procedure is implemented in another way: The moment the
processor recognizes a corrupted NVM, the “initialize
NVM” line will be highlighted. Now, you can do two things
(dependent of the service instructions at that moment):
– Save the content of the NVM via ComPair for
development analysis, before initializing. This will give
the Service department an extra possibility for
diagnosis (e.g. when Development asks for this).
– Initialize the NVM (same as in the past, however now it
happens conscious).
Note: When you have a corrupted NVM, or you have replaced
the NVM, there is a high possibility that you will not have picture
any more because your display option is not correct. So, before
you can initialize your NVM via the SAM, you need to have
picture and therefore you need the correct display option. To
adapt this option, you can use ComPair (the correct HEX
values for the options can be found in the table below) or a
method via a standard RC (described below).
Changing the display option via a standard RC: Key in the
code “062598” directly followed by the “MENU” button and
“XXX” (where XXX is the 3 digit decimal display option code as
mentioned in the first column of the next table). Make sure to
key in all three digits, also the leading zero’s. If the above action
is successful, the front LED will go out as an indication that the
RC sequence was correct. After the display option is changed
in the NVM, the TV will go to the Stand-by mode. If the NVM
was corrupted or empty before this action, it will be initialized
first (loaded with default values). This initializing can take up to
20 seconds.
• Store. All options and alignments are stored when
pressing “cursor right” (or the “OK” button) and then the
“OK”-button.
• SW Maintenance.
– SW Events. Not useful for Service purposes. In case
of specific software problems, the development
department can ask for this information.
– HW Events. Not useful for Service purposes. In case
of specific software problems, the development
department can ask for this information.
• Operation hours PDP. Here you are able to reset the
operations hours of the plasma display. This has to be
done in case of replacement of the display. Not applicable
to LCD sets.
• Test settings. for development purposes only.
• Upload to USB. Here you are able to upload several
settings from the TV to a USB stick which is connected to
the Side I/O. The items are “Channel list”, “Personal
settings”, “Option codes” and “Display-related alignments”.
First you have to create a directory “repair\” in the root of
the USB stick.To upload the settings you have to select
each item separately, press “cursor right”, confirm with
“OK” and wait until “Done” appears. Now the settings are
 EN 20 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding
stored onto your USB stick and can be used to download
onto another TV or other SSB. Uploading is of course only
possible if the software is running and if you have picture.
This method is created to be able to save the customer’s
TV settings and to store them into another SSB.
• Download from USB. Here you are able to download
several settings from the USB stick to the TV. Same way of
working as with uploading. To make sure that the download
of the channel list from USB to the TV is executed properly,
it is necessary to restart the TV and tune to a valid preset if
necessary.
How to Navigate
• In SAM, you can select the menu items with the “CURSOR
UP/DOWN” key on the RC-transmitter. The selected item
will be highlighted. When not all menu items fit on the
screen, move the “CURSOR UP/DOWN” key to display the
next/previous menu items.
• With the “CURSOR LEFT/RIGHT” keys, it is possible to:
– (De) activate the selected menu item.
– (De) activate the selected sub menu.
• With the “OK” key, it is possible to activate the selected
action.
How to Exit SAM
Use one of the following methods:
• Press the “MENU” button on the RC-transmitter.
• Switch the set to STAND-BY via the RC-transmitter.
5.2.3 Customer Service Mode (CSM)
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Helpdesk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this
mode are not possible.
When in this chassis, CSM is activated, a color bar test pattern
will be visible for 5 seconds. This test pattern is generated by
the Pacific3. So if you see this test pattern you can determine
that the back end video chain (Pacific3, LVDS and display) is
working.
Remark: Because of the possible addition of the DFI function,
the Pacific IC is not any longer the last hardware block in front
of the display. This means that switching on the Pacific
testpattern, resulting in no or bad picture, can be caused by a
bad DFI or Display. To distinguish between these two, the DFI
testpattern will be switched on for three seconds, three
seconds after the Pacific testpattern is started.
This will result in following sequence:
• CSM entry code given
• 3 sec Pacific test pattern
• 3 sec DFI test pattern
• CSM menu entered
Also new in this chassis: when you activate CSM and there is
a USB stick connected to the TV, the software will dump the
complete CSM content to the USB stick. The file (Csm.txt) will
be saved in the root of your USB stick. This information can be
handy if you don’t have picture.
Other new item in this chassis is when CSM is activated the
complete error-buffer content will be shown via the blinking
LED procedure.
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
How to Navigate
By means of the “CURSOR-DOWN/UP” knob on the RC-
transmitter, you can navigate through the menus.
Contents of CSM
• Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV-set. Note that if an NVM is replaced or is initialized after
corruption, this set type has to be re-written to NVM.
ComPair will foresee a possibility to do this.
• Production Code. Displays the production code (the serial
number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, this production code has to be
re-written to NVM. ComPair will foresee a possibility to do
this.
• Code 1. Gives the latest five errors of the error buffer. As
soon as the built-in diagnose software has detected an
error the buffer is adapted. The last occurred error is
displayed on the leftmost position. Each error code is
displayed as a 2-digit number. When less than 10 errors
occur, the rest of the buffer is empty (00). See also
paragraph “Error Codes” for a description.
• Code 2. Gives the first five errors of the error buffer. See
also paragraph “Error Codes” for a description.
• Options 1. Gives the option codes of option group 1 as set
in SAM (Service Alignment Mode).
• Options 2. Gives the option codes of option group 2 as set
in SAM (Service Alignment Mode).
• 12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
corruption, this identification number has to be re-written to
NVM. ComPair will foresee a possibility to do this. This
identification number consists of 14 characters and is built
up as follows:
- 7 last characters of the 12NC of the SSB itself
- the serial number of the SSB, which consists of 7 digits.
Both can be found on a sticker on the PWB of the SSB
itself. The format of the identification number is then as
follows: <last 7 characters of 12NC of SSB><serial number
of SSB> (total 14 characters).
• Installed date. Indicates the date of the first installation of
the TV. This date is acquired via time extraction from a PBS
(Public Broadcast Channel).
• Pixel Plus. Gives the last status of the Pixel Plus setting,
as set by the customer. Possible values are “ON” and
“OFF”. See DFU on how to change this item.
• DNR. Gives the last status of the DNR setting, as set by the
customer. Possible values are “OFF”, “MINIMUM”,
“MEDIUM” and “MAXIMUM”. See DFU on how to change
this item.
• Noise Figure. Gives the noise ratio for the selected
transmitter. This value can be defined as “BAD”,
“AVERAGE”, “GOOD “or “DIGITAL”. In case of a digital
channel, this item will never indicate: “BAD”, “GOOD” or
“AVERAGE” but only displays “DIGITAL”.
• 12NC Display. 12NC of the display.
• Head phone Volume. Gives the last status of the head
phone volume, as set by the customer. The value can vary
from 0 (volume is minimum) to 100 (volume is maximum).
See DFU on how to change this item.
• Surround Mode. Indicates the by the customer selected
sound mode (or automatically chosen mode). Possible
values are “STEREO” and “VIRTUAL DOLBY
SURROUND”. It can also have been selected
automatically by signalling bits (internal software). See
DFU on how to change this item.
• AVL. Indicates the last status of AVL (Automatic Volume
Level) as set by the customer: See DFU on how to change
this item.
• Delta Volume. Indicates the last status of the delta volume
for the selected preset as set by the customer: from “-12”
to “+12”. See DFU on how to change this item.
 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 21

• Volume. Indicates the last status of the volume for the • Pacific 3 Flash SW. Displays the Pacific 3 software
selected preset as set by the customer: from “0” to “100”. version.
See DFU on how to change this item. • NVM version. Displays the NVM version as programmed
• Balance. Indicates the last status of the balance for the by factory.
selected preset as set by the customer: from “-10” to “+10”. • Display parameters. for development purposes only.
See DFU on how to change this item. • Private PQ parameters. for development purposes only.
• Preset Lock. Indicates if the selected preset has a child • Public PQ parameters. for development purposes only.
lock: “LOCKED” or “UNLOCKED”. See DFU on how to • Ambilight parameters. for development purposes only.
change this item. • Acoustics parameters. for development purposes only.
• Lock after. Indicates at what time the channel lock is set: • DFI software (if applicable). Displays the DFI EPLD
“OFF” or e.g. “18:45” (lock time). See DFU on how to software.
change this item. • DFI ambilight software. Not applicable for US.
• TV ratings lock. Indicates the “TV ratings lock” as set by
the customer. Change via “MENU”, “TV”, “CHANNELS”, How to Exit CSM
“TV RATINGS LOCK”. Possible values are: “ALL”, Press “MENU” on the RC-transmitter.
“NONE”, “TV-Y”, “TV-Y7”, “TV-G”, “TV-PG”, “TV-14” and
“TV-MA”.
• Movie ratings lock. Indicates the “Movie ratings lock” as
set by the customer. Change via “MENU”, “TV”,
“CHANNELS”, “MOVIE RATINGS LOCK”. Possible values
are “ALL”, “NR”, “G”, “PG”, “PG-13”, “R”, “NC-17” and “X”.
• V-Chip TV status. Indicates the setting of the V-chip as
applied by the selected TV channel. Same values can be
shown as for “TV RATINGS LOCK”.
• V-Chip movie status. Indicates the setting of the V-chip
as applied by the selected TV channel. Same values
can be shown as for “MOVIE RATINGS LOCK”.
• Region rating status (RRT). Displays the Rating Region
Table.
• Region rating enabled. Indicates if the ratings are
enabled.
• Table channel changed. Indicates if the table has been
changed at broadcast side.
• On timer. Indicates if the “On timer” is set “ON” or “OFF”
and when it is set to “ON”, also start time, start day and
program number is displayed. See DFU on how to change
this item.
• Location. Gives the last status of the location setting as
set via the installation menu. Possible values are “SHOP”
and “Home”. If the location is set to “SHOP”, several
settings are fixed. So for a customer location must be set
to “HOME”. Can be changed via the installation menu (see
also DFU).
• HDMI key validity. Indicates if the HDMI keys (or HDCP
keys) are valid or not. In case these keys are not valid and
the customer wants to make use of the HDMI functionality,
the SSB has to be replaced.
• TV System. Gives information about the video system of
the selected transmitter. In case a DVBT signal is received
this item will also show ATSC.
– BG: PAL BG signal received
– DK: PAL DK signal received
– L/La: SECAM L/La signal received
– I: PAL I signal received
– M: NTSC M signal received
– ATSC: ATSC signal received
• 12NC one zip SW. Displays the 12NC number of the one-
zip file as it is used for programming software in production.
In this one-zip file all below software version can be found.
• Initial main SW. Displays the main software version which
was initially loaded by the factory.
• Current main SW. Displays the built-in main software
version. In case of field problems related to software,
software can be upgraded. As this software is consumer
upgradeable, it will also be published on the Internet.
Example: Q531U_1.2.3.4.
• Flash utilities SW. Displays the software version of the
software which contains all necessary components of the
download application. To program this software, EJTAG
tooling is needed. Example: Q531U_1.2.3.4.
• Standby SW. Displays the built-in stand-by processor
software version. Upgrading this software will be possible
via ComPair or via USB.(see chapter Software upgrade).
Example: STDBY_3.0.1.2.
• MOP SW. Displays the MOP software version.
 EN 22 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

5.3 Stepwise Start-up
The stepwise start-up method, as known from FTL/FTP sets
(EMG based sets) is not valid any more. There are two possible
situation: one for protections detected by stand-by software
and one for protections detected by main software.
When the TV is in a protection state due to an error detected by
stand-by software (and thus blinking an error) and SDM is
activated via short-circuiting the pins on the SSB, the TV starts
up until it reaches the situation just before protection. So, this
is a kind of automatic stepwise start-up. In combination with the
start-up diagrams below, you can see which supplies are
present at a certain moment. Important to know here is, that if
e.g. the 3V3 detection fails (and thus error 8 is blinking) and the
TV is restarted via SDM, the Stand-by Processor will enable
the 3V3, but will not go to protection now. The TV will stay in
this situation until it is reset (Mains/AC Power supply
interrupted). Caution: in case the start up in this mode with a
faulty FET 7U01 is done, you can destroy all IC’s supplied by
the +3V3, due to over voltage. It’s recommended to measure
first the FET 7U01 on short-circuit before activate SDM via the
service pads.
When the TV is in protection state due to an error detected by
main software (Mips protection) and SDM is activated via short
cutting the service pads on the SSB, the TV starts up and
ignores the error.
In this chassis only error 63 (power-ok) is a Mips protection and
already displays the failure via blinking LED.
The abbreviations “SP” and “MP” in the figures stand for:
• SP: protection or error detected by the Stand-by
Processor.
• MP: protection or error detected by the Mips Main
Processor.

Off

Mains
off Mains
on

- WakeUp requested WakeUp

- Acquisition needed requested

- No data Acquisition
Semi
St by required
- tact SW pushed
Active
- last status is hibernate St by - St by requested
after mains ON - tact SW pushed
- Tact switch Pushed
- last status is hibernate
after mains ON

Tact switch
pushed WakeUp
requested
(SDM)
GoToProtection
Hibernate
GoToProtection

Protection
On

In US region, hibernate state and tact switch are not available. H_16770_116.eps
Here the local keyboard tact switch acts as standby button. 270307

Figure 5-2 Transition diagram

 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 23

Off/Stby to Semi

Off Stand by or
Protection
Mains is applied

Standby Supply starts running.

action holder: MIPS All standby supply voltages become available .

action holder: St-by

st-by µP resets If the protection state was left by short circuiting the
autonomous action SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
All I/O lines have a High default state:
- Switch PNX85xx in reset (active LOW). not be entered.
- Keep the Audio-reset high.
- NVM power line is high, no NVM communication possible.

- Switch Audio-Reset high.

Initialise I/O pins of the st-by µP, start keyboard scanning, RC It is low in the standby mode if the standby
detection. Wake up reasons are off. mode lasted longer than 10s.

PDPGO line is high (either HW wise in a non FHP set or

because of the stby µP reset in an FHP set) which will start the
FHP PDP.

Switch ON Platform and display supply by switching LOW the Display supply is switched on
POD-MODE and the ON-MODE I/O lines. through the ON-mode I/O line

The availability of the supplies is checked through detect +5V, and +12V are switched on
signals going to the st-by µP. These signals are available
for +12V and +5V (combined as AND function, called
detect-5V-12V) and for +1V2 and +3V3 (combined as
AND function, called detect-1V2-2V5-3V). A low to high Wait 50ms and then start polling the detect-
transition of the signals should occur within a certain time 5V-12V every 40ms.
after toggling the standby line. If an observer is detected
before the time-out elapses, of course, the process
should continue in order to minimize start up time.

detect-5V-12V received within

No “5V 12V supply” error
2900 ms after POD-mode I/O
line toggle?

Yes

activate +5V/+12V supply

SP
detection algorithm. See CHS protections.

Enable the +1V2 supply (ENABLE-1V2)

50ms is used in the Jaguar platform.

Wait 100ms 100ms is recommended by the
PNX85xx spec.

No separate enable is present

Enable the supply for
for the +1V8 supply in the
+1.8V and +3.3V (ENABLE-3V3)
TV520.

Only one detect line is present

Start polling the detect-1V2-2V5-3V3
in the TV520: it detects +1V2
every 40ms
and +3V3

Detection
received within
No 1V2 2V5 3V3 DCDC error
250 ms after enable-3V3
toggle?

Yes

Activate supply detection algorithms for DC-

SP
DC outputs

Wait 20ms

The supply fault line is an OR

SUPPLY-FAULT I/O line
No Supply fault error function of DCDC, DCDC5050
is High?
and POD/CI supply switch.
H_16770_109a.eps
230707

Figure 5-3 “Off” to “Semi Stand-by” flowchart (part 1)

EN 24 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

The supply fault line is an OR

SUPPLY-FAULT I/O line
No Supply fault error function of DCDC, DCDC5050
is High?
and POD/CI supply switch.

Yes
No
Enable the supply fault detection
SP
algorithm

Set I²C slave address This will allow access to NVM and
of Standby µP to (A0h) NAND FLASH and can not be done
earlier because the FLASH needs to
be in Write Protect as long as the
supplies are not available.
Switch LOW the RESET-NVM_WP-NANDFLASH line. Add a 2ms delay before
trying to address the NVM to allow correct NVM initialization.

Detect EJTAG debug probe

(pulling pin of the probe interface to
ground by inserting EJTAG probe)
An EJTAG probe (e.g. WindPower ICE probe) can
be connected for Linux Kernel debugging purposes.

EJTAG probe
Yes
connected ?

No
No

No Cold boot?

Yes

Release AVC system reset

Release AVC system reset Release AVC system reset
Feed initializing boot script
Feed warm boot script Feed cold boot script
disable alive mechanism

Boot process of the PNX5050 also starts at this point. For full details,
see PNX5050 System Design document of Peter Deckmyn.

Bootscript ready
No
in 1250 ms?

Yes

Set I²C slave address

of Standby µP to (60h)

RPC start (comm. protocol)

Flash to Ram image

No
transfer succeeded
within 30s?
Code = 5
Yes

Switch AVC PNX85xx SW initialization

Code = 53 No
in reset (active low) succeeded
within 20s?

Wait 10ms Yes

Enable Alive check mechanism

Switch the NVM reset
line HIGH.

MIPS reads the wake up reason Wait until AVC starts to

from standby µP. communicate
Disable all supply related protections and
switch off the +2V5, +3V3 DC/DC converter.

In case of an LCD set, check the

Power-OK display line
Wait 5ms

switch off the remaining DC/DC Log power-ok error and enter
Power-ok display high ? No
converters protection

Yes
Switch POD-MODE and ON-MODE
3-th try?
I/O line high.
Reset the Pacific by pulling LOW the Pacific
hardware reset line during 100ms.
No MP H_16770_109b.eps
230707

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 2)

 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 25

switch off the remaining DC/DC Log power-ok error and enter
Power-ok display high ? No
converters protection

Yes
Switch POD-MODE and ON-MODE
3-th try?
I/O line high.
Reset the Pacific by pulling LOW the Pacific
hardware reset line during 100ms.
No MP
Yes
Release Pacific reset
and wait 200ms
Blink Code as
error code

Ping the Pacific through I²C

SP
Pacific acknowledges ? No Third Pacific boot retry?

Yes
Yes
Init Pacific according use case :
- lvds or CMOS input and output
- panel config… Log Pacific error
to be discussed with Stefan / SW if we will put this here or in
the display excel overview of Stefan or in …..

Enable the Pacific output by sending the PanelConfig.PanelOn This is needed here because the Pacific has to
to the Pacific in case of a DFI set deliver an output clock towards the DFI. Otherwise
the DFI cannot deliver ambilight functionality in the
lampadaire mode. The presence of the DFI can be
determined via the display option.
Start 4 seconds preheating timer in case of
an LPL scanning backlight LCD set .
- Channeldecoder type TDA10060
cannot be reloaded without reset
of the channeldecoder.
- Channeldecoder type TDA10048
Initialize audio according FMS information:
can be reloaded without reset.

Channel decoder Download firmware into the channel

No Yes
TDA 10048? decoder

No

Downloaded
Third try? No
successfully ?

Yes Yes

initialize tuner , Master IF and channel

Log channel decoder error
decoder according FMS information

Initialize source selection according FMS

and CHS information

Wait until Cpipe delivers a stable output

clock EPLD
and
Pacific
should
Reset EPLD be reset
when a
stable
input
clock
Wait 100ms become
s
available
at their
Reset Pacific clock input.

Initialize video processing IC 's according FMS information:

- PNX5050 in /82
- scaler EPLD

initialize AutoTV by triggering CHS AutoTV Init interface

See appropriate CHS documents for further details.

Initialize Pacific or EPLD related Ambilight

settings (if applicable)

Initialize Ambilight with Lights off .

Do not enter semi- standby state in case of an LPL

scanning backlight LCD set before 4s preheating timer has
elapsed.

Semi-Standby H_16770_109c.eps
110507

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 3)

EN 26 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

action holder: AVC

action holder: St-by

autonomous action

Semi Standby

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

Assert RGB video blanking

and audio mute

Rewrite Pacific register 0x03 (output format) :

this command is sometimes not processed properly by the
Pacific at initialisation time , resending it here solves the issue.

Switch on the display by sending the

PanelConfig.PanelOn (I²C) command to the Pacific
Initialize audio and video
processing IC's and functions
according needed use case.
wait 250ms (min. = 200ms)

Switch off the dimming backlight feature and

make sure PWM output is set to 100%

Switch on LCD backlight

The higher level requirement is that

audio and video should be demuted
without transient effects and that the
audio should be demuted maximum 1s
before or at the same time as the
unblanking of the video.
Wait until valid and stable audio and video , corresponding to
the requested output is delivered by the AVC AND the
backlight PWM has been on for 1second.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)

Restore dimming backlight feature, PWM output and unblank

the video.

Active H_16770_110.eps
290307

Figure 5-6 “Semi Stand-by” to “Active” flowchart non DFI (50/60 Hz) preheat
 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 27

action holder: AVC

action holder: St-by

autonomous action

Semi Standby

Wait until previous on-state is left more than 2

seconds ago. (to prevent LCD display problems)

Assert RGB video blanking

and audio mute

Setting the display related timings of the DFI is not needed: The
display related timings are hardcoded in the DFI

Rewrite Pacific register 0x03 (output format) with TcuUpdate: this

command is sometimes not processed properly by the Pacific at
initialisation time , resending it here solves the issue.

Switch on the display panel and the lvds via

the OutputEnable DFI command

Initialize audio and video

processing IC's and functions
wait 250ms (min. = 200ms) according needed use case.

Switch off the dimming backlight feature and

make sure PWM output is set to 100%

Switch on LCD backlight

The higher level requirement is that

audio and video should be demuted
without transient effects and that the
audio should be demuted maximum 1s
before or at the same time as the
unblanking of the video.
Wait until valid and stable audio and video , corresponding to
the requested output is delivered by the AVC AND the
backlight PWM has been on for 1second.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)

Restore dimming backlight feature, PWM output and unblank

the video.

Active H_16770_111.eps
290307

Figure 5-7 “Semi Stand-by” to “Active” flowchart DFI (100/120 Hz) preheat
EN 28 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

action holder: AVC

Active
action holder: St-by

autonomous action

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground

(I/O: audio reset)
And wait 5ms

switch off LCD backlight

Mute all video outputs

Wait 250ms (min. = 200ms)

Switch off the display by sending the

PanelConfig.PanelOff (I²C) command to the Pacific

switch off ambient light

Semi Standby H_16770_112.eps

260307

Figure 5-8 “Active” to “Semi Stand-by” flowchart

 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 29

Semi Stand by
action holder: MIPS

action holder: St-by

autonomous action

If ambientlight functionality was used in semi -standby

(lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing , the lights will
switch off abruptly when the supply is cut.

transfer Wake up reasons to the Stand by µP.

Switch Memories to self-refresh (this creates a more

stable condition when switching off the power).

Switch AVC system in reset state

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off

the +1V8 and the +3V3 DC/DC converter

Wait 5ms

switch off the +1V2 DC/DC converters

Switch OFF all supplies by switching HIGH the POD -

MODE and the ON-MODE I/O lines.
Important remark:
For PDP this means
release reset audio 10 sec after
CPUGO becomes low.
entering standby to save power

Stand by H_16770_114.eps
260307

Figure 5-9 “Semi Stand-by” to “Stand-by” flowchart

EN 30 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

action holder: MIPS MP SP

action holder: St-by

autonomous action Log the appropriate error and

set stand-by flag in NVM

Redefine wake up reasons for protection

state and transfer to stand-by µP.

Switch off LCD lamp supply

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of

min. 0.5ms to max. 50ms after LVDS switch off.

Ask stand-by µP to enter protection state

Switch AVC in reset state

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off

the +1V8 and the +3V3 DC/DC converter.

Wait 5ms

switch off the +1V2 DC/DC converter

Switch OFF all supplies by switching HIGH the POD -

MODE and the ON-MODE I/O lines.

Flash the Protection-LED in order to indicate

protection state*. (*): This can be the standby LED or the ON LED
depending on the availability in the set under
discussion .

Protection H_16770_115.eps
290307

Figure 5-10 “Protection” flowchart

 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 31

5.4 Service Tools Note: For UART it is also allowed to use a standard “Jack-
to-Jack” cable.
5.4.1 ComPair
Note: If you encounter any problems, contact your local
support desk.
Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following: 5.4.2 LVDS Tool
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way. Support of the LVDS Tool has been discontinued.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
5.5 Error Codes
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.
3. ComPair speeds up the repair time since it can 5.5.1 Introduction
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available. The error code buffer contains all detected errors since the last
4. ComPair features TV software upgrade possibilities. time the buffer was erased. The buffer is written from left to
right, new errors are logged at the left side, and all other errors
Specifications shift one position to the right.
ComPair consists of a Windows based fault finding program When an error occurs, it is added to the list of errors, provided
and an interface box between PC and the (defective) product. the list is not full. When an error occurs and the error buffer is
The (new) ComPair II interface box is connected to the PC via full, then the new error is not added, and the error buffer stays
an USB cable. For the TV chassis, the ComPair interface box intact (history is maintained).
and the TV communicate via a bi-directional cable via the To prevent that an occasional error stays in the list forever, the
service connector(s). error is removed from the list after more than 50 hrs. of
operation.
When multiple errors occur (errors occurred within a short time
How to Connect
span), there is a high probability that there is some relation
This is described in the ComPair chassis fault finding database.
between them.
TO TV

TO
UART SERVICE
TO
I2C SERVICE
TO
UART SERVICE
Basically there are three kinds of errors:
CONNECTOR CONNECTOR CONNECTOR
• Errors detected by the Stand-by software. These errors
will always lead to protection and an automatic start of the
ComPair II
Multi blinking LED for the concerned error (see paragraph “The
RC in function
RC out
Blinking LED Procedure”). In these cases SDM can be
Optional Power Link/ Mode
Switch Activity
used to start up (see chapter “Stepwise Start-up”). Note
I2C RS232 /UART
that it can take up to 90 seconds before the TV goes to
protection and starts blinking the error (e.g. error 53)
PC • Errors detected by main software that lead to
protection. In this case the TV will go to protection and the
front LED should also blink the concerned error. See also
paragraph “Error Codes” -> “Error Buffer” -> “Extra Info”.
ComPair II Developed by Philips Brugge
• Errors detected by main software that do not lead to
protection. In this case the error will be logged into the
Optional power
HDMI
I2C only
5V DC error buffer and can be read out via ComPair, via blinking
LED method, or in case you have picture, via SAM.
G_06532_036.eps
240807

5.5.2 How to Read the Error Buffer

Figure 5-11 ComPair II interface connection

Use one of the following methods:

Caution: It is compulsory to connect the TV to the PC as
• On screen via the SAM (only if you have a picture). E.g.:
shown in the picture above (with the ComPair interface in
– 00 00 00 00 00: No errors detected
between), as the ComPair interface acts as a level shifter. If
– 06 00 00 00 00: Error code 6 is the last and only
one connects the TV directly to the PC (via UART), ICs will be
detected error
blown!
– 09 06 00 00 00: Error code 6 was first detected and
error code 9 is the last detected error
How to Order • Via the blinking LED procedure (when you have no
ComPair II order codes: picture). See next paragraph.
• ComPair II interface: 3122 785 91020. • Via ComPair.
• ComPair32 CD (update): 3122 785 60160. • Via CSM. when CSM is activated the blinking LED
• ComPair I2C interface cable: 3122 785 90004 (to be used procedure will start and the CSM content will be written to
with chassis L01, A02, A10, EMx, TPM1.xA, etc ...). a USB stick (if present).
• ComPair I2C interface extension cable: 3139 131 03791 (to
be used with chassis L01, A02, A10, L04, LC4, LC7.1,
5.5.3 How to Clear the Error Buffer
LC7.2).
• ComPair UART interface cable: 3122 785 90630 (to be
used with chassis LC4, EJ3, BJ2, BL2, BP2, ...). Use one of the following methods:
• ComPair RS232 cable: 3104 311 12742 (to be used with • By activation of the “RESET ERROR BUFFER” command
chassis Q52x). in the SAM menu.
• ComPair I2C interface cable (3.5 mm Jack-to-SVHS plug): • With a normal RC, key in sequence “MUTE” followed by
9965 100 07325 (to be used with chassis LC7.5). “062599” and “OK”.
Note: For I2C it is compulsory to use this particular cable. • If the content of the error buffer has not changed for 50+
• ComPair UART interface cable (3.5 mm Jack-to-Jack): hours, it resets automatically.
3138 188 75051 (to be used with chassis LC7.5).
 EN 32 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

5.5.4 Error Buffer
In case of non-intermittent faults, clear the error buffer before
you begin the repair (before clearing the buffer, write down the
content, as this history can give you significant information).
This to ensure that old error codes are no longer present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
code and not the actual cause (e.g., a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
• Via error bits in the status registers of ICs.
• Via polling on I/O pins going to the stand-by processor.
• Via sensing of analog values on the stand-by processor or
the PNX85xx.
• Via a “not acknowledge” of an I2C communication
Take notice that some errors need more than 90 seconds
before they start blinking or before they will be logged. So in
case of problems wait 2 minutes from start-up onwards, and
then check if the front LED is blinking or if an error is logged.

Table 5-2 Error code overview

Error Description Error/Prot Detected by Device Result

3 I2C3 E MIPS PNX85xx Error logged
5 PNX85xx doesn’t boot E Stby P PNX85xx Error blinking
6 5V, 12V supply P Stby P / Protection + Error blinking
8 1V2, 1V4, 2V5, 3V3 supply P Stby P / Protection + Error blinking
9 Supply fault P Stby P / Protection + Error blinking
11 I2C-MUX1 E MIPS PCA9540 Error logged
12 I2C-MUX2 E MIPS PCA9540 Error logged
23 HDMI multiplexer E MIPS AD8190 Error logged
24 I2C switch E MIPS PCA9540 Error logged
26 Master IF E MIPS TDA9898/9897/9890 Error logged
28 MOP FPGA 1080P E MIPS EP2CXXF484C7N Error logged
34 Tuner E MIPS / Error logged
37 Channel decoder E MIPS TDA10060 Error logged
46 Pacific E MIPS / Error blinking + Error logged
53 PNX 8535 doesn’t boot (SW cause) E Stby P PNX85xx Error blinking
63 Power OK P MIPS / Error logged in case of a PDP set
Protection in case of an LCD set
65 DFI E MIPS / Error blinking + Error logged

Extra Information
• Rebooting. When a TV is constantly rebooting due to
internal problems, most of the time no errors will be logged
or blinked. This rebooting can be recognized via a ComPair
interface and Hyperterminal (for Hyperterminal settings,
see paragraph “Stand-by software upgrade). You will see
that the loggings which are generated by the main software
keep continuing. In this case (rebooting) diagnose has to
be done via ComPair.
• Error 3 (I2C bus 3 blocked). At the time of release of this
manual, this error was not working as expected (error 3 is
logged and can be read out). Current situation: when this
error occurs the TV will constantly reboot due to the
blocked bus. The best way for further diagnosis here, is to
use ComPair(e.g. read out the NVM content). Instead of
error “3” it’s possible you will see error “2” in the error
buffer.
• Error 5 (PNX85xx doesn’t boot). This error will point to a
severe hardware problem around the PNX85xx(supplies
not OK, PNX 8535 completely dead, I2C link between PNX
and Stand-by Processor broken, etc...).When error 5
occurs it is also possible that I2C2 bus is blocked (NVM).
I2C2 can be indicated as the following in the schematics:
SCL-UP-MIPS, SDA-UP-MIPS, SCL-SLAVE, SDA-
SLAVE, SCL-2 or SDA-2.
• Error 11 (I2C MUX1). Indicates a blocked (short-circuited)
I2C-MUX1 bus. At the time of release of this manual, this
error was not working as expected. Current situation: when
this error occurs the TV will constantly reboot due to the
blocked bus. The best way for further diagnosis here, is to
use ComPair (e.g. read out the NVM content).
• Error 12 (I2C MUX2). Indicates a blocked (short circuited)
I2C-MUX2 bus. At the time of release of this manual, this
error was not working as expected. Current situation: when
this error occurs the TV will constantly reboot due to the
blocked bus. The best way for further diagnosis here, is to
use ComPair (e.g. read out the NVM content).
• Error 24 (I2C switch). Indicates a problem with the I2C
switch.
• Error 28 (MOP). Here you can activate the SDM/CSM
mode and check for error 28 via the blinking LED
procedure. Otherwise use ComPair for further diagnosis
(e.g. read out the NVM content).
Note that it can takes several minutes before error 28 will
be logged.
• Error 37 (Channel decoder). When this error occurs there
probably will be no picture and sound available, the best
way for further diagnosis is to use ComPair (e.g. read out
the NVM content). As a side effect of error 37 it’s possible
that error 4 (no existing error) is also logged.
• Error 46 (Pacific 3). When there is an actual problem with
or around the Pacific during start-up you will have no
picture and error 46 will be blinked via the blinking LED
procedure. For further diagnosis you can always dump the
CSM content on USB stick (see CSM) or use ComPair.
• Error 53. This error will indicate that the PNX85xx has
started to function (by reading his boot script, if this would
have failed, error 5 would blink) but initialization was never
completed because of hardware peripheral problems
(NAND flash,...) or software initialization problems.
Possible cause could be that there is no valid software
loaded (try to upgrade to the latest main software version).
Note that it takes 90 seconds before the TV blinks error 53
in this case.
• Error 63 (POWER OK). When this error occurs, it means
that the POWER-OK line did not became “high”. This error
is only applicable for TV’s with a LCD display. For PDP
displays there will be no protection during a POWER-OK
line failure, but error 63 will be logged in the error buffer.
Caution: in case a PDP TV ends up into power-ok
protection, it can indicate that the display option code is set
 Service Modes, Error Codes, and Fault Finding
to “LCD”. To change the display option code to “PDP” you
need to activate SDM via the service pads. Then change
the display option code blindly via a standard RC: key in the
code “062598” directly followed by the “MENU” button and
“XXX” (where XXX is the 3 digit decimal display option
code as mentioned in figure “Display option code
overview”.
• Error 65 (DFI error). When this error occurs it means that
there is a problem with the I2C communication towards the
MOP on the DFI panel.
5.6 The Blinking LED Procedure
5.6.1 Introduction
The blinking LED procedure can be split up into two situations:
• Blinking LED procedure in case of a protection. In this case
the error is automatically blinked. This will be only one
error, namely the one that is causing the protection.
Therefore, you do not have to do anything special, just read
out the blinks. A long blink indicates the decimal digit, a
short blink indicates the units.
• Blinking LED procedure in the “on” state. Via this
procedure, you can make the contents of the error buffer
visible via the front LED. This is especially useful for fault
finding, when there is no picture.
5.7.2
When the blinking LED procedure is activated in the “on” state,
the front LED will show (blink) the contents of the error-buffer.
Error-codes > 10 are shown as follows:
1. “n” long blinks (where “n” = 1 - 9) indicating decimal digit,
2. A pause of 1.5 s,
3. “n” short blinks (where “n”= 1 - 9),
4. A pause of approx. 3 s,
5. When all the error-codes are displayed, the sequence
finishes with a LED blink of 3 s,
6. The sequence starts again.
Example: Error 12 8 6 0 0.
After activation of the SDM, the front LED will show:
1. 1 long blink of 750 ms (which is an indication of the decimal
digit) followed by a pause of 1.5 s,
2. 2 short blinks of 250 ms followed by a pause of 3 s,
3. 8 short blinks followed by a pause of 3 s, 5.8
4. 6 short blinks followed by a pause of 3 s,
5. 1 long blink of 3 s to finish the sequence,
6. The sequence starts again.
5.8.1
5.6.2 How to Activate
Use one of the following methods:
• Activate the SDM or CSM. The blinking front LED will
show the entire contents of the error buffer (this works in
“normal operation” mode).
• Transmit the commands “MUTE” - “062500” - “OK” 5.8.2
with a normal RC. The complete error buffer is shown.
Take notice that it takes some seconds before the blinking
LED starts.
• Transmit the commands “MUTE” - “06250x” - “OK”
with a normal RC (where “x” is a number between 1 and
5). When x= 1 the last detected error is shown, x= 2 the
second last error, etc.... Take notice that it takes some 5.8.3
seconds before the blinking LED starts.
5.7 Protections
5.7.1 Software Protections
Most of the protections and errors use either the stand-by
microprocessor or the Mips controller as detection device.
Since in these cases, checking of observers, polling of ADCs,
Q523.1U LA 5. EN 33
filtering of input values are all heavily software based, these
protections are referred to as software protections.
There are several types of software related protections, solving
a variety of fault conditions:
• Protections related to supplies: check of the 12V, +5V,
+1V2, +1V4, 2V5 and +3V3.
• Protections related to breakdown of the safety check
mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
guaranteed any more.
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal
playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are
actively monitored to be able to optimize the start-up speed,
and to assure good operation of all components. If these
monitors do not respond in a defined way, this indicates a
malfunction of the system and leads to a protection. As the
observers are only used during start-up, they are described in
the start-up flow in detail (see paragraph “Stepwise Start-up”).
Hardware Protections
The only real hardware protection in this chassis is in case of
an audio problem, the audio protection circuit will switch off
immediately the supply of the SSB. The supply will buzz during
the protection and +12VS drops to approx. 5.5 V, +5V Stand-
by to approx. to 1.9 V. Other indication of the audio protection
is that the red LED lights up only half.
Repair Tips
• It is also possible that you have an audio DC protection
because of an interruption in one or both speakers (the DC
voltage that is still on the circuit cannot disappear through
the speakers). Caution: (dis)connecting the speaker wires
during the ON state of the TV at high volume can damaged
the audio amplifier.
Fault Finding and Repair Tips
Read also paragraph “Error Codes” - “Extra Info”.
Ambilight
Due to the degeneration process off the ambilights, it is
recommended to change both ambilight units in case one unit
needs to be repaired.
Audio Amplifier
It is recommended to replace all components at once 7D06,
7D09, 3D01, 3D25 when a defect FET 7D10 need to be fixed.
For the left channel (defect FET 7D35) of the audio amplifier
replace all components like 7D31, 7D34, 3D11, 3D28
CSM
When you activate CSM and there is a USB stick connected to
the TV, the software will dump the complete CSM content to the
USB stick. The file (Csm.txt) will be saved in the root of your
USB stick. If this mechanism works you can conclude that a
large part of the operating system is already working (Mips,
USB...)
 EN 34 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding
5.8.4 DC/DC Converter
Introduction
• The best way to find a failure in the DC-DC converters is to
check their starting-up sequence at power-on via the mains
cord, presuming that the stand-by μP is operational.
• If the input voltage of DC-DC converters is around 12.7V
(measured on decoupling capacitors 2U03/2U93/2U6S
and 2U6R) and the enable signals are low (active) then the
output voltages should have their normal values.+12V and
+5V-POD supplies start-up first (enabled by POD-MODE
signal from the stand-by microprocessor). There is a
supplementary condition for +12V to start-up: if +5V-POD
doesn’t start up due to a local defect then +12V will not be
available, as well.+5V-ON supply is enabled by the ON-
MODE signal (coming also from the stand-by
microprocessor) and is coming up a little bit later (20ms)
due to the slower rise time needed to charge the USB
decoupling capacitor 2N31. +1V2 supply starts-up when
+12V appears, then at least 100ms later, +1V8, +2V5 and
+3V3 will be activated via ENABLE-3V3 signal from the
stand-by microprocessor.If +12V value is less than 10V
then the last enumerated voltages will not show-up due to
the under-voltage detection circuit 6U10 + 7U10 and
surrounding components. Furthermore, if +12V is less than
8V then also +1V2 will not be available. The third dc-dc
convertor that delivers +1V4 out of +12V is started up when
the ENABLE-1V2 becomes active (low) and +12V is
present. The +Vtun generator (present only for the analog
version of China platforms) will generate +33V for the
analog tuner as soon as the 12V/3.3V DC-DC converter
will start to operate.
• The consumption of controller IC 7U00 is around 19mA
(that means almost 200mV drop voltage across resistor
3U01) and the consumption of controller IC 7U64 is around
12mA.
• The current capability of DC-DC converters is quite high
(short-circuit current is 7 to 10A), therefore if there is a
linear integrated stabilizer that, for example delivers 1.8V
from +3V3 with its output overloaded, the +3V3 stays
usually at its normal value even though the consumption
from +3V3 increases significantly.
• The +1V8 and +2V5 supply voltages are obtained via linear
stabilizer made with discrete components that can deliver
a lot of current, therefore in case +1V8 or +2V5 are short-
circuited to GND then +3V3 will not have the normal value
but much less.
• The SUPPLY-FAULT signal (active low) is an internal
protection (error 9) of the DC-DC convertor and will occur
if the output voltage of any DC-DC convertor is out of limits
(10% of the normal value).
Fault Finding
• Symptom: +1V2 not present (even for a short while
~10ms)
1. Check 12V availability (resistor 3U01, MOS-FETs
7U03 and 7U08), value of +12 V, +12 V switch (7U14
+ 7U16 and surrounding components) and +5V-POD.
2. Check the voltage on pin 9 (1.5V),
3. Check for +1V2 output voltage short-circuit to GND that
can generate pulsed over-currents 7...10 A through
coil 5U02.
4. Check the over-current detection circuit (2U20 or 3U40
interrupted).
• Symptom: +1V4 not present (even for a short while
~10ms) while +12V is ok (also across input capacitors
2U6S and 2U6R).
1. Check resistor 3U7B and power MOS-FETs 7U61-1/2
2. Check the voltage on pin 4(4V)
3. Check enable signal ENABLE-1V2 (active low)
4. Check for +1V4 output voltage short-circuit to GND that
can generate pulsed over-currents 7...10A through coil
5U60
5. Check the over-current detection reference (2U65 +
3U7C) and the boot components (2U66 + 6U60).
• Symptom: +1V2 present for about 100ms, +1V8, +2V5
and +3V3 not rising
1. Check the ENABLE-3V3 signal (active LOW),
2. Check the voltage on pin 8 (1.5V),
3. Check the under-voltage detection circuit (the voltage
on collector of transistor 7U10-1 should be less than
0.8V),
4. Check for output voltages short-circuits to GND (+3V3,
+2V5 and +1V8) that can generate pulsed over-
currents 7...10A through coil 5U01,
5. Check the over-current detection circuit (2U18 or 3U31
interrupted).
• Symptom: +1V2 OK, +2V5 and +3V3 present for about
100ms. Possible cause: SUPPLY-FAULT line stays low
even though the +3V3 and +1V2 is available - the stand-by
μP is detecting that and switching off all supply voltages.
1. Check the drop voltage across resistor 3U01 or 3U7B
(they could be too high, meaning a defective controller
IC or MOS-FETs),
2. Check if the boost voltage on pin 4 of controller IC
7U00 is less than 14V (should be 19V),
3. Check if +1V2 or +3V3 are higher than their normal
values - that can be due to defective DC feedback of
the respective dc-dc convertor (ex.3U47, 3U77, 3U7L,
3U7J or 3U70).
• Symptom: +1V2, +1V4, +1V8, +2V5 or +3V3 shows a high
level of ripple voltage (audible noise can come from the
filtering coils 5U01, 5U02 or 5U60). Possible cause:
instability of the frequency and/or duty cycle of a dc-dc
converter or stabilizer.
1. Check the resistor 3U32 and 3U7D, capacitors 2U17
and 2U19, input and output decoupling capacitors.
2. Check a.c. feedback circuits
(2U23+2U24+3U55+3U63 for +1V2,
2U6D+2U6E+2U6G+3U6A+3U7E for +1V4 and
2U07+2U08+3U17+3U24 for +3V3), compensation
capacitors 2U25, 2U34, 2U36, 2U37, 2U40, 2U43,
2U68 and 2U6B.
• Symptom: +1V2, +1V4, +2V5 and +3V3 ok, no +Vtun
(analog sets only). Possible cause: the “+VTUN
GENERATOR” circuit (7U24+7U26+surroundings
components) is defective: check transistor 7U24 (it has to
have gate voltage pulses of about 10V amplitude and drain
voltage pulses of about 35V amplitude) and surroundings
components. A high consumption (more than 6mA) from
+Vtun voltage can cause also +Vtun voltage to be too low
or zero.
Note: when a pair of power MOSFETs(7U01+7U06,
7U03+7U08 or 7U61-1/2) becomes defective the controller IC
7U00 or 7U64 should be replaced as well.
5.8.5 Display Option code
Attention: In case you have replaced the SSB, always check
the display option code in SAM, even if you have picture. With
a wrong display option code it is possible that you will have
picture, but in certain conditions you can have unwanted side-
effects.
5.8.6 Exit “Factory Mode”
When an “F” is displayed in the screen's right corner, this
means that the set is in “Factory” mode, and it normally
happens after a new SSB has been mounted.
To exit this mode, push the “VOLUME minus” button on the
TV’s keyboard control for 5 seconds and restart the set.
5.8.7 Sanken display supply
The 47” sets in this chassis come with a Sanken buy-in supply.
The result of a failing Sanken display supply, e.g. one of the
 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 35

following voltages is missing: +400V, +12V or +24V, will lead to
protection (blinking error 63). The TV is switched off.
When the primary circuit of the platform supply fails, there is a
high possibility that the main fuse of the Sanken display supply
will break. In this case the Sanken supply must not be replaced
completely, just replace the Sanken main fuse and repair the
platform supply. For safety reasons, make sure to use the
correct fuse type.
5.8.8 SSB service supply connector
Connector 1B40 can be used to apply external supply (+12V
and +5V). In this way you don’t need 110 V AC mains supply
for troubleshooting on the SSB. e.g. component level repair.
5.8.9 Tuner
For access to the components located under the tuner itself,
you need to desolder the ground connections and bend the
tuner up. To maintain a good performing tuner one should
make a new ground connection to the SSB, for instance by use
of a wire.
5.8.10 Upgrade EDID NVM
5.9 Software Upgrading
5.9.1 Introduction
The set software and security keys are stored in a NAND-
Flash, which is connected to the PNX85xx via the PCI bus.
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a
stand alone set, without the need of an E-JTAG debugger. A
description on how to upgrade the main software can be found
in chapter 3 “Directions For Use”.
Important: When the NAND-Flash must be replaced, a new
SSB must be ordered, due to the presence of the security
keys!!! (copy protection keys, MAC address,...).
Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software (see chapter 3 for instructions).
3. Perform the alignments as described in chapter 8 (section
“Reset of Repaired SSB”).
4. Check in CSM if the HDMI keys are valid.
For the correct order number of a new SSB, always refer to the
Spare Parts list!

To upgrade the EDID NVM you must short circuit pin 7 of the 5.9.2 Main Software Upgrade
EDID NVM to ground. Therefore some test points are foreseen
(figure “EDID-NVM pins”). See ComPair for further instructions. The software image resides in the NAND-Flash, and is
formatted in the following way:

1 1
1

H 16770 098 eps

Figure 5-12 EDID-NVM pins

Table 5-3 NAND Flash content

One Zip
NAND Flash content FUS UPG Upgrade All UPG Flash Utils UPG
Partition Content erase program erase program erase program
JFFS2 partition 1 (application Channel table, EPG data x x x
read write data)
JFFS2 partition 0 (Application HDMI keys, back up display file x x
read only once data)
JFFS2 partition 0 (Application wizard pictures, display file, cabinet file, x x x
read only upgradable data) upgrade assistant
SQUASHFS partition Main software (Mips) Linux structure (root x x x x
file system)
BFFS partition 2 (DVD OK) Default software upgrade application x x x x
TriMedia software boot batch file 2
BFFS partition 1 (DVD cursor Back up software upgrade application boot x x x x
down) batch file 1 Linux kernel JETT: needed for
ComPair
BFFS partition 0 Jaguar Boot loader boot batch file 0 x x
Block 0 μBTM partition table N

• The overview of the Nand Flash content shows the content • Remark: the above does not mean that you can reprogram
of the different partitions. It also shows which part of the your HDMI keys with the UpgradeAll upg file from the one
one-zip file erases and programs which part of the Nand zip file. This can only be done in a secure environment (e.g.
Flash. the factory).
 EN 36 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

• The UpgradeAll upg file is only used in the factory. 2. Copy the stand-by software (part of the one-zip file) into
• The FlashUtils upg file is only used by service centers this directory.
which are allowed to do component level repair on the 3. Insert the USB stick into the TV.
SSB. 4. Start the download application manually (see paragraph
“Manual start of the Software Upgrade Application”.
Automatic Software Upgrade 5. Select the appropriate file and press the red button to
In “normal” conditions, so when there is no major problem with upgrade.
the TV, the main software and the default software upgrade
application can be upgraded with the AUTORUN.UPG(FUS Upgrade via PC and ComPair interface
part of the one-zip file: e.g. 3104 337 03801 _FUS _Q531U_ It will be possible to upgrade the Stand-by software via a PC
0.37.0.0_commercial.zip). This can also be done by the and the ComPair interface. Check paragraph “ComPair” on
customers themselves, but they will have to get their software how to connect the interface. To upgrade the Stand-by
from the commercial Philips website or via the Software Update software, use the following steps:
Assistant in the user menu (see DFU). The AUTORUN.UPG 1. Disconnect the TV from the Mains/AC Power.
file must be put in the root of your USB stick. 2. Short circuit the SPI pins on the SSB (see figure “Service
How to upgrade: mode pads” earlier in this chapter).
1. Copy “AUTORUN.UPG” to the root of your USB stick. 3. Keep the SPI pins shortened while connecting the TV to
2. Insert USB stick in the side I/O while the set is in ON the Mains/AC Power.
MODE. The set will restart and the upgrading will start 4. Release the short circuit after approx. two seconds.
automatically. As soon as the programming is finished, 5. Start up HyperTerminal (can be found in every Windows
you'll get the message that you can remove your USB stick application via Programs -> Accessories ->
and restart the set. Communications -> HyperTerminal). Use the following
settings:
Manual Software Upgrade – COM1
In case that the software upgrade application does not start – Bits per second = 38400 (9600)*
automatically, you can also start it manually. – Data bits = 8
How to start the software upgrade application manually: – Parity = none
1. Disconnect the TV from the Mains/AC Power. – Stop bits = 1
2. Press the “OK” button on a Philips DVD RC-6 remote – Flow control = None
control (it is also possible to use the TV remote in “DVD” 6. Press “Shift U” on your PC keyboard. You should now see
mode). Keep the “OK” button pressed while reconnecting the following info:
the TV to the Mains/AC Power. – PNX2015 Loader V1.0
3. The software upgrade application will start. – 19-09-2003
– DEVID=0x05
– Erasing
Attention!
– MCSUM=0x0000
In case that you have started the download application
– =
manually, the “AUTORUN.UPG” will not be recognized.
7. If you do not see the above information restart the above
What to do in this case:
procedure, and check your HyperTerminal settings and the
1. Create a directory “UPGRADES” on your USB stick.
connections between PC and TV.
2. Rename the “AUTORUN.UPG” to something else, e.g. to
8. Via “Transfer” -> “Send text file...”, you can send the proper
“software.upg”. Don't use long or complicated names, keep
upgrade file to the TV (e.g. *.hex).
it simple. Make sure that AUTORUN.UPG is no longer
9. After successful programming, you must see the following
present in the root of your USB stick.
information (this can take several minutes!):
3. Copy the renamed upg file into this directory.
– DCSUM=0xC67E
4. Insert USB stick in the side I/O.
– :Ok
5. The renamed upg file will be visible and selectable in the
– MCSUM=0xC67E
upgrade application.
– Programming
– PCSUM=0xC67E
Back up Software Upgrade Application
– Finished
If the default software upgrade application does not start (could 10. If you do not see this information, restart the complete
be due to a corrupted boot 2 sector) via the above described
procedure.
method, you can try to activate the “back up software upgrade
11. Close HyperTerminal.
application”. 12. Disconnect and connect Mains/AC Power again.
How to start the “back up software upgrade application”
(*) When having problems with upgrading, use the values
manually:
between brackets.
1. Disconnect the TV from the Mains/AC Power.
2. Press the “CURSOR DOWN” button on a Philips DVD RC-
5.9.4 Content and Usage of the One-Zip Software File
6 remote control (it is also possible to use the TV remote in
“DVD” mode). Keep the “CURSOR DOWN” button pressed
while reconnecting the TV to the Mains/AC Power. Below you find a content explanation of the One-Zip file, and
3. The software upgrade application will start. instructions on how and when to use it (or not).

1. Ambilight_PRFAM_x.x.x.x.zip. Not to be used by Service

5.9.3 Stand-by Software Upgrade
technicians.

There are two methods now to upgrade stand-by software:

2. Cabinet_ACOUS_x.x.x.x.zip. Not to be used by Service
technicians.
Upgrade via USB
In this chassis it is possible to upgrade stand-by software via a 3. Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by
USB stick. The method is similar to upgrading main software Service technicians. For ComPair development only.
via USB.
Use the following steps: 4. Display_DISPT_x.x.x.x.zip. Not to be used by Service
1. Create a directory “UPGRADES” on your USB stick. technicians.
 Service Modes, Error Codes, and Fault Finding Q523.1U LA 5. EN 37

5. EDID_Q531X_x.x.x.x.zip. Contains the EDID content of

the different EDID NVM’s. See ComPair for further
instructions. For sets with three HDMI connectors:
- For HDMI 1 NVM, use “*port 1*.bin
- For HDMI 2 NVM, use “*port 2*.bin
- For HDMI 3 NVM, use “*port 3*.bin

6. EJTAGDownload_Q531X_x.x.x.x.zip. Only used by

service centers which are allowed to do component level
repair.

7. Factory_Q531X_x.x.x.x_commercial.zip. Only for

production purposes, not to be used by Service
technicians.

8. FlashUtils_Q531X_x.x.x.x_commercial.zip. Not to be
used by Service technicians.

9. FUS_Q531X_x.x.x.x_commercial.zip. Contains the

“AUTORUN.UPG” which is needed to upgrade the TV main
software and the software download application.

10. MOP_IACXX_x.x.x.x.zip. Not to be used by Service

technicians. A programmed MOP device can be ordered
via your regional Service organization.

11. OpenSourceFile_Q531X_x.x.x.x.zip. Not to be used by

Service technicians.

12. Pacific3_P3FW0_x.x.x.x.zip. Not to be used by Service

technicians. A programmed PACIFIC device can be
ordered via your regional Service organization.

13. PQPrivate_U5207_x.x.x.x.zip. Not to be used by Service

technicians.

14. PQPublic_U5207_x.x.x.x.zip. Not to be used by Service

technicians.

15. ProcessNVM_Q531X_x.x.x.x.zip. Default NVM content.

Must be programmed via comPair.

16. StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains

the Stand-by software in “upg” and “hex” format.
- The “StandbySW_xxxxx_prod.upg” file can be used to
upgrade the Stand-by software via USB.
- The “StandbySW_xxxxx.hex” file can be used to upgrade
the Stand-by software via ComPair.
-The files “StandbySW_xxxxx_exhex.hex” and
“StandbySW_xxxxx_dev.upg” may not be used by Service
technicians (only for development purposes).

17. UpgradeAll_Q531X_x.x.x.x_commercial.zip. Only for

production purposes, not to be used by Service
technicians.
Caution: Never try to use this file, because it will overwrite
the HDCP keys!!!
EN 38 5. Q523.1U LA Service Modes, Error Codes, and Fault Finding

Personal Notes:

E_06532_012.eps
131004
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 39

6. Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 42” LCD
WIRING 42” LCD (STYLING ME7)

LCD DISPLAY
(1004)

8316

LVDS
51P

8402
4P
1M09
14P
1319

8150
12P
1317

1P11
8P
8411

A DISPLAY SUPPLY

8738

41P 4P 8P 5P 2P3
1G50 1735 1P11 1M59 1P02

B SSB

1M36
11P
8136

INVERTER INVERTER

1M20
7P
1H01

CN101
4P
1P02
2P3

12P
CN1
14P

CONTROL
8319

1308
2P3

E KEYBOARD
8408

(1010)
INLET

D SIDE I/O
(1015)

1M01
3P
1309
8195

4P
8201

8101
8120 7P 3P
1M20 1M01

1304
11P
IR/LED/LIGHT
RIGHT SPEAKER LEFT SPEAKER J SENSOR
(5214) (5213) (1012)

H_16770_066.eps
120707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 40

Wiring Diagram 42” LCD + AmbiLight

WIRING 42” LCD + AMBI LIGHT (STYLING ME7)

LCD DISPLAY
(1004)
8682

8609
8659
8316

LVDS
INTERFACE
51P FA (1070)
7P

8402
4P 1N82
1M09
14P 7P
1319 1M82

8150
12P 4P 5P
1317 1N09 1N59
8509 4P 5P
1M09 1M59

1P11
8P
8411

AMBI-LIGHT UNIT (IN BACK COVER)

AMBI-LIGHT UNIT (IN BACK COVER)
1M09

A DISPLAY SUPPLY
4P

8559

1M82
1M59

7P
8738
5P

1M59
1M82

41P 4P 8P 5P 2P3

5P
7P

1G50 1735 1P11 1M59 1P02

B SSB

1M36
11P

1M09
8136

4P
INVERTER
INVERTER

(1176)
(1175)

1M20
7P
1H01

CN101
4P
1P02
2P3

12P
CN1
14P

CONTROL
8319

1308
2P3

E KEYBOARD
8408

(1010)
INLET

D SIDE I/O
(1015)

1M01
3P
1309
8195

4P
8201

8101
8120 7P 3P
1M20 1M01

1304
11P
IR/LED/LIGHT
RIGHT SPEAKER LEFT SPEAKER J SENSOR
(5214) (5213) (1012)

H_16770_065.eps
120707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 41

Wiring Diagram 47” LCD

WIRING 47” LCD (STYLING ME7)

LCD DISPLAY
(1004)

8316

LVDS
51P

12P
1317/1321

1M09
4P
14P

8150
1316/1319

8402
1P11
8P
8411

DISPLAY SUPPLY
(1050) 8738

41P 4P 8P 5P 2P3
1G50 1735 1P11 1M59 1P02

INVERTER B SSB INVERTER

1M36
11P
8136

1M20
7P
1H01

CN101
4P
1P02
2P3

12P
CN1
14P

CONTROL
8319

1308
2P3

E KEYBOARD
8408

(1010)
INLET

D SIDE I/O
(1015)

1M01
3P
1309
8195

4P
8201

8101
8120 7P 3P
1M20 1M01

1304
11P
IR/LED/LIGHT
RIGHT SPEAKER LEFT SPEAKER J SENSOR
(5214) (5213) (1012)

H_16770_067.eps
120707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 42

Wiring Diagram 47” LCD + AmbiLight

WIRING 47” LCD + AMBI LIGHT (STYLING ME7)

LCD DISPLAY
(1004)
8682

8609
8659

8316

LVDS
51P

12P
1317/1321

1M09
4P
14P

8150
1316/1319

8402
1P11
8P
8411

AMBI-LIGHT UNIT (IN BACK COVER)

AMBI-LIGHT UNIT (IN BACK COVER)
1M09
4P

DISPLAY SUPPLY

1M82
1M59

(1050)

7P
8738
5P

1M59
1M82

41P 4P 8P 5P 2P3

5P
7P

1G50 1735 1P11 1M59 1P02

B SSB

1M36
11P

1M09
8136

4P
INVERTER
INVERTER

(1176)
(1175)

1M20
7P
1H01

CN101
4P
1P02
2P3

12P
CN1
14P

CONTROL
8319

1308
2P3

E KEYBOARD
8408

(1010)
INLET

D SIDE I/O
(1015)

1M01
3P
1309
8195

4P
8201

8101
8120 7P 3P
1M20 1M01

1304
11P
IR/LED/LIGHT
RIGHT SPEAKER LEFT SPEAKER J SENSOR
(5214) (5213) (1012)

H_16770_068.eps
120707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 43

Wiring Diagram 47” LCD + DFI + AmbiLight

WIRING 47” LCD + DFI + AMBI LIGHT (STYLING ME7)
8682

8316
8590

AB DFI PANEL
LCD DISPLAY

1M90
(1130)

6P
(1004)

1F50
41P

1M09
4P
8609
AMBI-LIGHT UNIT (IN BACK COVER)

1M12
4P
LVDS LVDS

1F51
51P 51P

51P

1M59
12P

5P
8659
1317/1321
14P 6P

1M09
4P
1316/1319 1M90

8402
8252

1F52
41P
8251

1P11

8250

1M82
8P
8411

7P
1M59
5P
DISPLAY SUPPLY
(1175)

(1050) 8738

1M09
4P
41P 4P 8P 5P 2P3
1735 1P11 1M59
1M09

1G50 1P02
4P

AMBI-LIGHT UNIT (IN BACK COVER)

B SSB

1M36
11P
8136
1M59
5P
1M82
7P

INVERTER INVERTER

1M20
7P
1H01

CN101
4P
1P02
2P3

12P
CN1
14P

CONTROL
8319

1308
2P3

(1176)

E KEYBOARD
8408

(1010)
INLET

D SIDE I/O
(1015)

1M01
3P
1309
8195

4P
8201

8101
8120 7P 3P
1M20 1M01

1304
11P
IR/LED/LIGHT
RIGHT SPEAKER LEFT SPEAKER J SENSOR
(5214) (5213) (1012)

H_16771_009.eps
060907
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 44

Wiring Diagram 52” LCD

WIRING 52” LCD (STYLING ME7)

LCD DISPLAY
(1004)

INVERTER INVERTER
LVDS
51P

CN101
12P
8316

12P
1317/1321
CN1
14P

14P

8150
8319

8402
1316/1319

1P11
8P
8120
DISPLAY SUPPLY 8738
(1050)

41P 4P 8P 5P 2P3
1G50 1735 1P11 1M59 1P02

B SSB

1M36
11P
8136

1M20
7P
1H01
4P

CONTROL
1P02
2P3

1308
2P3

E KEYBOARD
8408

(1010)
INLET
D SIDE I/O
(1015)

1M01
3P
1309
4P
8201

8101
7P 3P
1M20 1M01

1304
11P
RIGHT SPEAKER IR/LED/LIGHT
(5214)
LEFT SPEAKER
(5213)
J SENSOR
(1012)

H_16771_004.eps
270907
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 45

Block Diagram Supply 42”

SUPPLY 37”- 42"
A1 MAINS FILTER + STANDBY A2 SUPPLY 3057 A3 DC-DC
3065

4 1 3407 5401 +12V

7402
7002
TCET1102
BIAS SUPPLY 3 2
5305
5306 2327 3000 6032 6033 3075 6024 7401
3318 6304 25V_HOT 5017 5010
400V_HOT GATE DRIVER
1308 6307 5011
1314 2003
2 MAINS GBJ6J CONTROLLER
1350 UNDERVOLTAGE
FILTER

5009
T5AH 400V_HOT LOCKOUT
1 3 2 - +
5007 5008
1M09
TO AMBI-LIGHT

6074
5028 1 MODULE
4 1 7005
+18V OR +12V 2 OR 1M09
STP15NK50
5001 AB

2059
1P22 7007
7308

6075
7001 DFI PANEL
7309 1 MC34067PG HIGH 2020 1M90
TO 1P22 15 6 SIDE 1
ON/OFF AP1 VCC

3330
DRIVE TO 1M90

3022
STANDBY AUDIO AMBI 11 OSCC 2
2 7 AB
SUPPLY 3 DFI PANEL
Standby 3007 CONTROL 5015 5012
A2 14 4
OA 1P11
7 ERROR 5025 2029 2034 +24VA OR +295V
7011 12 5016 2 8
COLD GROUND OB 7006
7012 6021 +12V
11 SOST STP15NK50 2022 +5V2
7008 7
HOT GROUND 10
SOFT FI

6076
LOW 6041
START 10 SIDE Standby 6
+
5 VREF
DRIVE
A1
A1

3024
CURRENT 7015 Boost 5 TO 1P11
9 5026 2045 2039 N.C
PROTECTION +5V2 3052
7004 4 A2
7009 7010 SSB
TS2431
OVER Light_on_of 3

3096
TO

K
VOLTAGE Power-Good = 5V DISPLAY

R
PROTECTION Power-Good 2
5002 if +12V >10V

3025
A

3097
3030
2014 DIM-control 1
TO
DISPLAY

2060

3026
3021
VS Voltage
Adj.

1319
5021 2042 2009 +24VB 1
2
6031
3 TO
4 DISPLAY
5
3076 5030 6045 +30V

1317
1
2
3 TO
6040 DISPLAY
4

2049 2018 5
5022

HOT GROUND COLD GROUND

B01A SUPPLY

6B04 2B48
SS36 5B01
1P02 1P02
+

1B32 5B00 6B07 +AUDIO-POWER

2 2 5 7
T1.6A 7B00
3B60

1 1 2B51
-

7B01 3 8
7B02
6B08 -AUDIO-POWER
2 9

10 6B06 +12VS 1B40

7B05 1 1
2B46 FOR SERVICE

3B72

3B73
11 2
TO PROVIDE
3 EXTERNAL
12 6B05 1B33 +5V-STANDBY
CONTROL 7B06 4 SUPPLY
3B50

6B15
2.5AT
2B45
3B51

3B29
7B50

K
3B61

R
CONTROL
4 1

A
7B04 AUDIO-PROT
TCET1102 B11C
3 2

H_16770_069.eps
HOT GROUND COLD GROUND 101007
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 46

Block Diagram Supply 47” Sanken

SUPPLY 47"- 52” SANKEN

1317/1321 1M12 1308 Mains connected. 1P10 Mains separated

1 1 1 1 VAC_Neutral 1 DIM-control
1 2 VAC_Live 2 Power Good
1 1P15 1M09: Mains separated 3 ON/OFF
1
1316/1319 1M90 1 +12Va 4 GND
1P10 1M09 2 +12Va 5 Boost (not used)
3 Gnd 6 nc.
4 Gnd 7 Standby
1M12: Mains separated 8 nc.
1 1 +12Va 9 +5V2
2 +12Va 10 nc.
3 Gnd 1316/1319 Mains separated
4 Gnd 1 +24V
1P11 1P15: Mains separated 2 +24V
1 +12Va 3 +24V
1P22
2 NC 4 +24V
1 1 3 Gnd 5 +24V
1M90 Mains separated 6 Gnd
1 +12Va 7 Gnd
2 +12Va 8 Gnd
3 +12Va 9 Gnd
4 Gnd 10 Gnd
5 Gnd 11 Boost
6 Gnd 12 ON/OFF
1P02 Mains connected 13 DIM-control
1 VAC_F_N 14 Gnd
2 VAC_F_L 1317/1321 Mains separated
1P22 Mains connected 1 +24V
1P02 1 +400V 2 +24V
2 GNDHOT 3 +24V
1 1P11 Mains separated 4 +24V
1 DIM-control 5 +24V
1P02 and 1P02’ permit optimal cable routing
2 Power Good 6 Gnd
in different sets. They are connected in parallel 3 ON/OFF 7 Gnd
4 Gnd 8 Gnd
1 5 Boost (not used) 9 Gnd
1P02 6 Standby 10 Gnd
7 +5V2 11 Boost
8 +12Va 12 ON/OFF
1308
1

H_16770_070.eps
230707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 47

Block Diagram Video

VIDEO
B03B MAIN TUNER B04 PNX85xx B05C FPGA 1080P: I/O BANKS B05A FPGA 1080P: B06C PACIFIC 3 B06A PACIFIC 3: LVDS
7T57 I/O BANKS
TDA9897HL/V2 7J00 7F90 7GE2 DUAL LVDS ONLY
1T04 1T06 PNX8537E EP2C8F256C7N T6TF4HFG
TD1736OF/FHFXP 4 IF-FILTP1 7 1G50
IF1-B 7T59
11 IF-OUT 1 B04K ANALOGUE AV
IF-OUT 33 EF CVBS4 B14 TxFPGAoA- RxP3oA-_B9 8 75 TXEA- 5G00 32
J3

SAW 45MHz
5 IF-FILTN1 6
IF1-A
IF
CVBS
PNX85xx A14 TxFPGAoA+ RxP3oA+_B8 10 74 TXEA+ 31

1T55
4 IF-FILTP3 3
PROCESSING MAIN
VIDEO OUT DV-R(0-7)
CYCLONE C13 TxFPGAoB- RxP3oB-_B7 13 PACIFIC3 78 TXEB- 5G01 30
MAIN HYBRID IF3-A C12 TxFPGAoB+ RxP3oB+_B6 14 PICTURE 77 TXEB+ 29
TUNER
1
5 IF-FILTN3 4 VIDEO II B13 TxFPGAoC- RxP3oC-_B5 15
ENHANCEMENT
81 TXEC- 5G02 28
IF3-B LAYER VIDEO FPGA
OUTPUT 1080P A13 TxFPGAoC+ RxP3oC+_B4 16 80 TXEC+ 27
SAW 44MHz DV-G(0-7)

CPIPE-TV
IF-OUT 4 CONFIG
IF2-B GFX LAYER B12 TxFPGAoCLK- RxP3oCLK-_B3 19 84 TXECLK- 5G03 25
STILL LVDS
3 TUN-AGC 47 TRANSMITTER TxFPGAoCLK+ RxP3oCLK+_B2 83 TXECLK+ 24
ERF-GAIN TAGC MPEG/PC A12 20
3T59
8 4-MHz 46 26 TDA-IF-IN-N IF-N M1 DV-B(0-7)
4-MHZ FREF OUT1-A D11 TxFPGAoD- RxP3oD-_B1 22 87 TXED- 5G04 22
3T58 GFX OSD
4 27 TDA-IF-IN-P IF-P M2 D10 TxFPGAoD+ RxP3oD+_B0 23 86 TXED+ 21
FM-TRAP OUT1-B LAYER AG15 DV-HS D13
7T12
16 TUN-AGC-MON B10 TxFPGAoE- RxP3oE-_G9 25 90 TXEE- 5G05 20
FM-TRAP-SWITCH TDA-IF-AGC 36 MPP-2 AH15 DV-VS
VTU AGC-DIN G13 LVDS
A10 TxFPGAoE+ RxP3oE+_G8 26 89 TXEE+ 19
9 CONNECTOR
MBVP-TV
V2 SNR/TNR TO DISPLAY
EDDI
B04Q PNX85xx: FLASH A7 TxFPGAeA- RxP3eA-_G7 28 93 TXOA- 5G06 17 OR

B03A CHANNNEL DECODER HV SCALER

7HA0 B7 TxFPGAeA+ RxP3eA+_G6 29 92 TCOA+ 16
7T18 NAND512W3A2BN6E
TDA10060HL D6 TxFPGAeB- RxP3eB-_G5 31 96 TCOB- 5G07 15
7T06
141 B04F CONTROL C6 TxFPGAeB+ RxP3eB+_G4 31 95 TCOB+ 14
AGCT-CTL
142 3 NAND B6 TxFPGAeC- RxP3eC-_G3 34 99 TCOC- 5G08 13
AGCT_CTL GPIO-0
8 MEMORY PCI XIO FLASH A6 TxFPGAeC+ RxP3eC+_G2 35 98 TCOC+ 12
115 IF-N PCI --> NAND
GPIO-2
7
CONTROLLER 128Mx8 B5 TxFPGAeCLK- RxP3eCLK-_G1 37 101 TCOCLK- 5G09 10
DTV IF-P
B04N VIDEO
RECEIVER A5 TxFPGAeCLK+ RxP3eCLK+_G0 38 100 TCOCLK+ 9
STREAMS MSP
VMPG B4 TxFPGAeD-_ RxP3eD-_R9 40 103 TCOD-_ 5G10 7
MPEG
DATA FE-DATA(0-7) A4 TxFPGAeD+ RxP3eD+_R8 41 102 TCOD+ 6
DEMUX
21
XTAL-P AND TxFPGAeE- RxP3eE-_R7 107 TCOE- 5G11 5
B3 44
1T69 DECODING B04G PNX 85xx: SDRAM
54M 7HG0 A3 TxFPGAeE+ RxP3eE+_R6 45 106 TCOE+ 4
20
XTAL-N K4D551638F

(0-12) DDR
B08D HDMI B09A USA EXTERNALS VIDEC, 3D COMB AND VBI SDRAM 1
SWITCH/ CAPTURING B04G SDRAM 8Mx16x4
ADC/MUX/SRC DDR2-D(0-15) 7GE1
1008
1B01 M25P05
AV1_PR K2 7HG1
1 ARX2+ PR DDR
K4D551638F
3 ARX2- AV1_PB P5 512K
4 ARX1+ PB
DDR2-A(0-12) DDR FLASH
6
1

ARX1- AV1_Y
2

Y
F2 SDRAM 2
7 ARX0+ 8Mx16x4
9 ARX0- (16-31)
10 ARXC+ AV1
1006
12 ARXC-
18
19

13 PCEC-HDMI
B04A AV1_Y-CVBS H2
15 ARX-DCC-SCL VIDEO
HDMI 1 16 ARX-DCC-SDA
DYNAMIC FRAME INSERTION
CONNECTOR
1007
1 AB02 VIDEO FLOW AB06 FPGA DFI AB02 VIDEO FLOW 1F52
19 ARX-HOTPLUG 7JE3 3
HOT-PLUG S VIDEO 5 AV1_C N4 7F18 32
B04H 1F50 EP2C35F484C7N
1B02 4
2
1 BRX2+ 1 +12V-SSB
3 1011 2
BRX2-
4 BRX1+ 3 LVDS
6 AV2 VIDEO AV2_Y-CVBS J1 4 CONNECTOR
BRX1-
1
2

TO DISPLAY
7 BRX0+
10 RXEA- C2
9 BRX0-
1009 11 RXEA+ C1
10 BRXC+
AV3_PR K3 12 RXEB- D4
12 BRXC- PR
13 RXEB+ D3
CYCLONE II
18

13 PCEC-HDMI FPGA
19

B04A 1
14
15 BRX-DCC-SCL AV3 PB
AV3_PB R1 RXEC- D2 DFI AB05 FPGA: POWER +
15 RXEC+ D1
16 BRX-DCC-SDA CONTROL
HDMI 2 AV3_Y G1 17 RXECLK- E2
CONNECTOR 19 BRX-HOTPLUG 7JA3 Y 7F30
18 RXECLK+ E1 EPCS16SI16N
HOT-PLUG 20 RXED- E4
B04H
1B03 21 RXED+ C3 nSCO 7
E3 SCD
1 CRX2+ 22 RXEE- F2
3 CRX2-
D SIDE FACING SIDE AV B09B 23 RXEE+
L6 DCLK 16
1F51
F1
4 CRX1+ 1302 25 RXOA- G5 C4 ASDO 15 49
SDA-I2C4-DISP
6 CRX1- 1304 1M36 26 RXOA+ G6 50
1

SCL-I2C4-DISP
2

7 CRX0+ FRONT_Y_CVBS_IN 2 2 27 RXOB- H4

FRONT_Y-CVBS J2
9 CRX0- VIDEO 28 RXOB+ G3 40
10 CRXC+ 4 4 FRONT_C P2 39 RXOC- H2
1301
12 CRXC- 1 30 RXOC+ H1
3
13
18

PCEC-HDMI FRONT_C_IN 32 RXOCLK- L2

19

B04A S VIDEO 5
15 CRX-DCC-SCL 4 33 RXOCLK+ L1
2
16 CRX-DCC-SDA 35 RXOD- J2
HDMI 3 36
19 CRX-HOTPLUG 7J28 RXOD+ J1
CONNECTOR B08F HDMI SWITCH 7J27
37 RXOE-
LVDS
HOT-PLUG AD8191ASTZ H6 CONNECTOR
B04H 38 RXOE+ H5 TO DISPLAY
ARX2+ 74
B04H DIGITAL VIDEO 40
ARX2- 73 34 RXC+ A10 SCL-I2C4-SSB
OP0 IN
41 SDA-I2C4-SSB
ARX1+ 71
33 RXC- A9 9
ARX1- 70 ON0
HDMI
AB03 CLOCK
7F51 5
ARX0+ 68 VDISP
ARX0- 67 SWITCH 37 RX0+ B7 W4 SS-OFF 1 4
OP1 EOH
ARXC+ 65 3 3
RX0- B6 HDMI-DVI RX/RX2DTL OUT
ARXC- 64 ON1 36 RECEIVER 2
50M
BRX2+ 12 DETECTION
MATRICING B12 CLK-SYSTEM-SS 1
BRX2- 11 40 RX1+ A8
OP2
BRX1+ 9
BRX1- 8 ON2 39
RX1- A7 AB07 DDR A AB08 DDR B
BRX0+ 6 7CA2 7CA0
EDD1216AJTA EDD1216AJTA
BRX0- 5 43 RX2+ B9
OP3
BRXC+ 3 DDR (0-11) (0-12) DDR
42 RX2- B8
BRXC- 2 ON3
SDRAM SDRAM 1
CRX2+ 24 2Mx16 2Mx16
CRX2- 23 DQ1(0-15) DQ2(0-15)
CRX1+ 21
CRX1- 20 44 RESET-SYS-DETECT 7CA3 7CA1
CRX0+ 18 B04E EDD1216AJTA EDD1216AJTA
CRX0- 17
CRXC+ 15 DDR MM1-A(0-11) MM2-A(0-11) DDR
CRXC- 14 SDRAM SDRAM 2
2Mx16 2Mx16
(16-31) (16-31)

H_16770_071.eps
Only for 120Hz Dynamic Frame Insertion 070907
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 48

Block Diagram Audio

AUDIO
B03B MAIN TUNER B04 PNX85xx B04Q PNX85xx: FLASH
7T57
TDA9897HL/V2 7J00
1T04 1T06 PNX8537E
TD1736F/FHFXP 4 IF-FILTP1 7
IF1-B 7T59
11 IF-OUT 1 B04K ANALOGUE AV
IF-OUT 33 EF CVBS4
5 IF-FILTN1 6 J3
IF1-A CVBS 7HA0
IF NAND512W3A2BN6E
SAW 45MHz
1T55
4 IF-FILTP3 3
PROCESSING PNX85xx B04F CONTROL
MAIN HYBRID IF3-A
TUNER
1 NAND
5 IF-FILTN3 4
IF3-B PCI XIO FLASH
SAW 44MHz PCI --> NAND
IF-OUT 4
IF2-B
128Mx8
3 TUN-AGC 47
ERF-GAIN TAGC
3T59
8 4-MHz 46 26 TDA-IF-IN-N IF-N M1
4-MHZ FREF OUT1-A
3T58
4 27 TDA-IF-IN-P IF-P M2
FM-TRAP OUT1-B
7T12
16 TUN-AGC-MON
FM-TRAP-SWITCH TDA-IF-AGC 36 MPP-2
VTU AGC-DIN
9 B04G PNX 85xx: SDRAM
V2

B03A CHANNNEL DECODER

7T18 7HG0
TDA10060HL K4D551638F
7T06
141
AGCT-CTL (0-12) DDR
142 3 SDRAM 1
AGCT_CTL GPIO-0
B04G SDRAM 8Mx16x4
115 8
GPIO-2 IF-N DDR2-D(0-15)
7
DTV IF-P
B04N VIDEO
RECEIVER DDR 7HG1
STREAMS K4D551638F
21
XTAL-P
1T69
54M 20 DATA 33 FE-DATA(0-7) DDR2-A(0-12) DDR
XTAL-N SDRAM 2
8Mx16x4
(16-31)
B08D HDMI B09A USA EXTERNALS (BACK)
1B01 1006 B04L AUDIO
1 ARX2+ AUDIO-IN1-L AJ6
3 ARX2- AUDIO IN
AV1
4 ARX1+ L+R AUDIO-IN1-R AK6
1
2

6 ARX1-
7 ARX0+
B04I PNX 85xx: B11A AUDIO LEFT / RIGHT +AUDIO-POWER
9 ARX0-
1011 AUDIO
10 ARXC+ AUDIO-IN2-L AF5
B04L AUDIO 7D10-1
12 ARXC- AUDIO IN
18

AV2
19

13 L+R AUDIO-IN2-R AG5 7D00-2 1735

PCEC-HDMI
B04A 5D00 5D10 Speaker L
9HM1 LEFT-SPEAKER 1

CONTROL
15 ARX-DCC-SCL AJ13 ADAC(1) +AUDIO-L
HDMI 1 7D10-2
16 ARX-DCC-SDA 1060
CONNECTOR LEFT-SPEAKER 2
FEEDBACK
19 ARX-HOTPLUG 7JE3 AUDIO-IN3-L AH5 DAC
7D00-3
HOT-PLUG 3 Speaker R
B04H AK12 ADAC(2) 9HM2 -AUDIO-R
1B02
1 AUDIO IN -AUDIO-POWER
BRX2+ AV3 1061 4
L+R FEEDBACK
3 BRX2-
4 AUDIO-IN3-R AJ5 I²C +AUDIO-POWER
BRX1+
Main
1

MEMORY
2

6 BRX1- ADC DEMDEC EPICS

CONTROL
7 BRX0+ 7D35-1
9 BRX0- B08C EXTERNALS (BOTTOM) B04I AUDIO
1C00
10 BRXC+ 7HM1

CONTROL
AUDIO-OUT-L 11 5DO7 5D11 RIGHT-SPEAKER
12 BRXC- 8 ADAC(5) AJ10 Main
18
19

AUDIO OUT Delayed 7D35-2

13 PCEC-HDMI DAC
B04A L+R AUDIO-OUT-R 14 12 ADAC(6) AK9 RIGHT-SPEAKER
15 BRX-DCC-SCL MUTE
HDMI 2 16 7J42
BRX-DCC-SDA A-PLOP
CONNECTOR CONTROL B04M
1C01
19 BRX-HOTPLUG 7JA3 -AUDIO-POWER
AUDIO-IN4-L AK5
HOT-PLUG
B04H AUDIO IN
1B03
L+R SPDIF DECODING,
1 AUDIO-IN4-R AH4
CRX2+ MULTICHANNEL,
3 CRX2- DOWNMIX AND SRC
B08B SPDIF
4 CRX1+ 1C03 7J30 B11C AUDIO: PROTECTION/MUTE CONTROL
1
2

6 CRX1- 7D00-1 7D70

SPI 1 4 SPDIF-IN1 AK15
7 CRX0+
DIGITAL 1
9 CRX0- AUDIO SPI-OUT 12 11 SPDIF-OUT AJ15 SPDIF OUT
10 CRXC+

CONTROL
DELAYED DC-SENCE
12 CRXC- AUDIO-PROT
18
19

B01A
13 B09B
PCEC-HDMI
B04A D SIDE FACING SIDE AV 7D00-4
15 CRX-DCC-SCL
HDMI 3 16 1302 1304 1M36
CRX-DCC-SDA
CONNECTOR 6 6 7D63÷7D64
L_FRONT_IN AUDIO-IN5-L AJ4
19 CRX-HOTPLUG 7J28
AUDIO IN MUTE
HOT-PLUG L+R CONTROL
B04H R_FRONT_IN 8 8 AUDIO-IN5-R AK4

B04A PNX85xx: STANDBY CONTROLLER

B08F HDMI SWITCH 7J27
AD8191ASTZ
ARX2+ 74
B04H DIGITAL VIDEO
ARX2- 73 34 RXC+ A10 IN B04O DIGITAL VIDEO AH16 DV-B3_AUDIO-MUTE
OP0
ARX1+ 71 OUT / LVDS
33 RXC- A9
ARX1- 70 ON0 AUDIO-MUTE
ARX0+ 68 HDMI B04A STANDBY B04B PNX85xx: DEBUG
SWITCH CONTROLLER
ARX0- 67 37 RX0+ B7 V3 9H27
OP1 P0.7 AUDIO-RESET
ARXC+ 65 HDMI-DVI RX/RX2DTL
RX0- B6
ARXC- 64 ON1 36 RECEIVER
BRX2+ 12 DETECTION
BRX2- 11 40 RX1+ A8
MATRICING B04M PNX 85xx: AUDIO B09B ANALOGUE EXTERNALS D SIDE FACING SIDE AV
OP2
BRX1+ 9 7HVA
RX1- A7
BRX1- 8 ON2 39 A-PLOP AUDIO-RESET
B08C
BRX0+ 6 7HV0
BRX0- 5 43 RX2+ B9 7HV1 TPA4411RTJ
OP3
BRXC+ 3
42 RX2- B8
BRXC- 2 ON3
CRX2+ 24 1M36 1304 1303
CRX2- 23 A-PLOP-HDPH 18 9 AUDIO-HDPH-L-AP 10 10 HEAD_PH_L 2
HEADPHONE
CRX1+ 21 DRIVER
DAC 11 AUDIO-HDPH-R-AP 11 11 HEAD_PH_R 3
CRX1- 20
AH11 ADAC(3) 13
CRX0+ 18 44 RESET-SYS-DETECT N.C. 7 7 DETECT 4 Headphone
B04E Out 3.5mm
CRX0- 17
CRXC+ 15 AH10 ADAC(4) 15
CRXC- 14

H_16770_072.eps
130707
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 49

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS
B05B FPGA 1080P: POWER + CONTROL B05C FPGA 1080P: I/O BANKS B03A CHANNEL DECODER 7H00 B04G PNX 85xx: SDRAM B08F HDMI SWITCH
PNX8537E
B04O DIGITAL VIDEO OUT / LVDS 7HG0
7F90 K4D551638F
7FA3 EP2C8F256C7N
EPCS4SI8N 7T18
TDA10060HL DDR2-D(0-15) 7HG1
7J27
K4D551638F
20 AD8191ASTZ
FPGA
6 DCLK H4 1080P DDR2-A(0-12) DDR
SCD DTV

1T69

54M
SDRAM 1/2
RECEIVER N28 8Mx16x4 HDMI
DDR2-CLK_P P2
21
SWITCH
N29 DDR2-CLK_N P3
RESET-SYS-DETECT 40
PCI-CLK-PNX5050_CLK-MOP H2 B04E
B04E RESET-SYS-DETECT 44
B04N VIDEO STREAMS B04E
J2 N9 FE-DATA(0-7)

B05D FPGA 1080P: DRAM 56 FE-CLK C5

E14 DV-CLK-PLL
7FK0
MSM56V16160
B04O DIGITAL VIDEO OUT / LVDS

DRAM SD1-DQ B04F PNX 85xx: CONTROL

512Kx16x2
PNX85xx
H16 DV-CLK DV-CLK AK17
SD1-A
B04F CONTROL A21 PCI-CLK-PNX8535
35 SD1-CLK L4

RES
B04E CONTROL B04E PNX 85xx: CONTROL B06B PACIFIC 3: DISPLAY
D SIDE FACING SIDE AV B10B USB 2.0 B10A USB 2.0 B04F PNX85xx: CONTROL INTERFACING
AK26 PCI-CLK-OUT PCI-CLK-DEBUG
B08A
7N00 PCI-CLK-PNX5050-CLK-MOP
ISP1564HL B05B

7N30 PCI-CLK-USB20 7 PCI-CLK-PNX8535

RYC8620 B04E
PCI-CLK-USB20
1 USB20-PWE1 79 PCI B10A
ENA_
HOST
USB20-OC1 78
FLGA 2 CONTROLLER PCI-AD(0-31) AJ26 RESET-SYS-DETECT
8 B03A B10A B04A B08F
OUTA 3 USB20-OC2 87
FLGB 74 6HF0
4 USB20-PWE2 88 +3V3-PER

1N01

12M
ENB_
1308 1309 1H01
5300 1 1
1 75
1

2 2 2 USB20-1-DM 83
T2 CTRL1-MIPS_LCD-PWR-ON CTRL-DISP1
3 2

3 3 3 USB20-1-DP 85 B06A
4 4 4
4

RESET-USB20 5
B04A STANDBY CONTROLLER B04A STANDBY CONTROLLER
B04B
USB 2.0 CTRL-DISP4
Y4 CTRL4-STBY_SELECT-PWM-ANA (P2.6)
CONNECTOR PSEN Y1 B06A
B04B
RESET-SYS-DETECT B04B ALE Y2 B04B
B04E
B04B EA AA4
V5 CTRL1-STBY_LAMP-ON (P0.5) LAMP-ON-OUT
B01B
B01B SUPPLY B04D PNX 85xx: MISCELLANEOUS
BACKLIGHT-CONTROL

1P11 7G53
7H22 AG1 7G58
1 BACKLIGHT-OUT
B06B 7H21 BACKLIGHT-OUT
CONTROL B01B
2 POWER-OK-DISPLAY CTRL3-STBY_POWER-OK-DISP (P2.7) Y3

1HF0

27M
3 LAMP-ON-OUT B06C PACIFIC 3
B06B
5 BACKLIGHT-BOOST AG2
N.C. 9H01 SDM AC1
6 STANDBY 7GE2
9H02 T6TF4HFG

SDM 168
POD-MODE
B04A
PACIFIC 3 164
CONTROL

9H03 SPI-PROG AE2

STANDBY
AD3 CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3 172
E KEYBOARD CONTROL 9H08

1GE0

60M
1M01
1016 ON-MODE SPI-PROG U3 ENABLE-1V2 (P0.2)
KEYBOARD 2 B04A B02A B02C B04B 7GE1
ON / OFF
CEC-HDMI AB4 U2 REGIMBEAU_CVBS-SWITCH (P0.3) 165 M25P05-AVMN6P
1011 B08D B04B B09B
CHANNEL + U1 ENABLE-3V3 (P0.4)
1012 DETECT-1V2-2V5-3V3 AB2 B02A B04B 6
CHANNEL - B04A 512K
+3V3-STANDBY 7HD0 3
1015 DETECT-5V-12V (P2.5) W1 V4 AUDIO-RESET (P0.6) B04B B04M FLASH
NCP303LSN
VOLUME + B04A 1
1014 V3 UART-SWITCH (P0.7)
3HD3

B04B B04C B08C 5

VOLUME -
1013 RST 1 RESET-STBY AA3
2
2 W3 ON_MODE (P2.3) B02B B04B B04D
MENU IN
RESET-SYS-DETECT AC3 B05B B11A
B04E
J IR/LED/LIGHT-SENSOR 1M01 3
GND
2 W2 POD-MODE (P2.4) B02A B02B B04B B04D
B04Q PNX 85xx: FLASH
B10C LED PANEL CONNECTOR N.C.
AV1-STATUS AF1
AV2-STATUS AF2 7HA3
N.C.
1M20 1M20 7H02 RESET-NVM_WP-NANDFLASH-INV
KEYBOARD KEYBOARD M25P05-AVMN6P
7 7 AF4
7HA0
6010 7011 AD1 SPI-CLK 6
512K NAND512W3A2BN6E
+5V_STANDBY 9H05
LED1 LED1 6 6 LED1 LED1-3V3 (P0.0) U5 AE4 SPI-WP 3
FLASH NAND 19
BLUE AE3 SPI-CSB 1
AD4 SPI-SDO 5 FLASH
6011 7012
+5V_STANDBY AE1 SPI-SDI 2 (128Mx8)
LED2 LED2 4 4 9H06
LED2 LED2-3V3 AA1
RED
B04C PNX 85xx: NVM / UART SWITCH
7010
3010 3 3
RC RC RC AA2 7HC3
+5V_STANDBY
IR +5V_STANDBY M24C64-WDW6P
B04B 7HC3
SENSOR
7014 U4 RESET-NVM_WP-NANDFLASH (P0.1) 8
7013 EEPROM
+5V_STANDBY (8Kx8)
LIGHT_SENSOR 1 1 LIGHT-SENSOR LIGHT-SENSOR AF3

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SSB: Test Points (Overview Top Side)

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SSB: Test Points (Part 1 Top Side)

Part 1

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SSB: Test Points (Part 2 Top Side)

Part 2

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SSB: Test Points (Overview Bottom Side)

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F73 D2 F101 A3 F225 A1 FE04 F3 FHE7 F3 FU23 E1 I204 E2 I328 D5 I452 D3 I576 F2 I700 F1 IE15 F3 IGH0 B1 IHSR C4 IN17 B4 IU44 E1
F74 E2 F102 A4 F226 A1 FE07 F3 FHE8 F4 FU24 E2 I205 D1 I329 D5 I453 E3 I577 F3 I701 F1 IE16 G3 IGH7 A1 IHSS D4 IN19 A4 IU45 E2
F75 E2 F103 A4 F227 A1 FE09 G3 FHE9 F4 FU25 E2 I206 D2 I330 D5 I454 D3 I578 F3 I702 E1 IE17 G1 IGH8 A1 IHST D5 IN30 A3 IU46 E2
F76 D2 F104 A4 F228 A1 FE10 G2 FHG0 B3 FU26 E2 I207 D2 I331 D5 I455 E3 I579 F2 I703 F1 IE24 G3 IH00 D3 IHSU D3 IN35 A4 IU47 D1
F77 E2 F105 A4 F229 A1 FE11 G2 FHK0 E4 FU27 E1 I208 D2 I332 E5 I456 C3 I580 F1 I704 B5 IE25 F1 IH01 E3 IHSV D3 IN50 B4 IU48 E2
F78 E2 F106 A4 F230 A1 FE12 F2 FHM0 E3 FU28 E2 I209 E2 I333 D5 I457 D3 I581 G3 IB10 G1 IE35 F2 IH02 E3 IHSW D3 IN51 B4 IU49 D2
F79 E2 F107 A4 F231 A1 FE13 F2 FHM1 E3 FU29 D2 I210 D1 I334 C5 I458 D3 I582 G1 IB11 C1 IE36 F3 IH03 E3 IHSX E3 IN52 B4 IU50 D2
F80 E2 F108 A4 F232 B1 FE14 F2 FHM2 D3 FU60 C2 I211 E2 I335 C5 I459 D3 I583 G3 IB12 E1 IE39 F3 IH04 E3 IHSY E3 IN53 A3 IU51 E2

Part 2 F81
F82
E2
E2
F109
F110
A4
A4
F233
F234
B1
A1
FE19
FE20
F2
E3
FHM3
FHP0
E2
E4
FU61
FU65
C2
C2
I212
I213
E2
D2
I336
I337
B5
B5
I460
I461
E2
E3
I584
I585
F3
F3
IB13
IB14
C1
E1
IE40
IE42
F2
G3
IH05
IH07
E3
D3
IHV0
IHV1
C3
D2
IN54
IT02
A3
G5
IU52
IU53
D2
D2
F83 E1 F111 A3 F235 A2 FE21 G2 FHP1 E4 FU66 C2 I214 E1 I338 B5 I462 C3 I586 F3 IB15 C1 IE43 G2 IH08 E3 IHV3 D4 IT03 F4 IU54 D2
H_16770_060b.eps F84
F85
D2
F4
F112
F113
A4
A3
F236
F237
G1
G1
FE24
FE26
G2
G2
FHP2
FHP3
E4
E3
FU6S
FU80
D2
C2
I215
I216
E1
E2
I339
I340
E5
C5
I463
I464
D4
D4
I587
I588
F3
F3
IB30
IB31
F1
E1
IE44
IE45
G3
G2
IH10
IH11
E3
E3
IHV5
IHV6
E5
E4
IT04
IT05
G5
G4
IU55
IU56
D2
D1
F86 G4 F114 A4 F238 G1 FE27 E2 FHP4 F4 FU81 C1 I217 E2 I341 C5 I465 D5 I589 F3 IB32 F1 IE47 G3 IH12 E3 IHV7 F4 IT06 G4 IU57 C1
F87 G3 F115 A3 F239 G1 FE28 F1 FHPA F3 FU82 D1 I218 D2 I342 E5 I466 D4 I590 B1 IB33 F1 IE48 G2 IH13 E3 IHV9 F5 IT07 G5 IU58 E2
F88 F4 F116 A5 F240 G1 FE29 F3 FHPB F3 FU83 E2 I219 D2 I343 E5 I467 D5 I591 B1 IB34 E1 IE50 E1 IH14 E3 IHVB F5 IT08 F4 IU59 E2
F89 G4 F117 A5 F241 G1 FE30 F2 FHPE E3 FU84 E2 I220 E1 I344 E5 I468 C3 I592 B1 IB35 E1 IE51 F2 IH15 E3 IHVC C3 IT09 G5 IU60 E2
F90 G4 F118 C5 F242 F1 FE70 F3 FHR0 E4 FU87 C1 I221 E2 I345 D5 I469 C4 I593 B1 IB36 D1 IE52 F1 IH16 E3 IHVD D3 IT10 G5 IU61 E1
F91 F4 F119 C5 F243 F2 FE71 F3 FHR1 E4 FU88 C1 I222 F5 I346 E5 I470 D3 I594 B1 IB37 D1 IE53 F1 IH17 E3 IHVE D4 IT11 G5 IU62 E1
F92 F4 F120 C5 F244 G2 FE72 G3 FHR2 E4 FU8A C2 I223 F5 I347 C5 I471 C4 I595 B1 IB38 D1 IE90 G1 IH18 E3 IHW0 D4 IT12 G5 IU63 D1
F93 G5 F121 B5 F245 G2 FE73 F3 FHR3 D4 I100 D2 I224 F5 I348 D5 I472 D5 I596 B1 IB39 D1 IE91 G1 IH19 E3 IHW8 F4 IT15 G5 IU64 C2
F94 G5 F122 B5 F246 G2 FE74 F3 FHR4 D4 I101 C2 I225 F4 I349 E5 I473 C3 I597 B1 IB40 E1 IE92 G1 IH20 E3 IHWA D3 IT16 G5 IU65 E1
F95 G5 F123 E5 F247 E3 FE75 F3 FHR5 E4 I102 C2 I226 F4 I350 D5 I474 D4 I598 B1 IB41 D1 IE93 G1 IH21 C3 IHWE D3 IT17 G5 IU66 E1
F96 F4 F124 E5 F248 F2 FE76 F3 FHR6 E4 I103 C2 I227 F4 I351 C5 I475 D4 I599 B1 IB42 E1 IE94 F3 IH25 E3 IHWJ D3 IT26 F4 IU67 E2
F97 F4 F125 D5 F249 C1 FE80 F3 FHV1 E3 I104 C2 I228 F4 I352 E5 I476 D4 I600 B1 IB43 F1 IE96 F3 IH26 E3 IHWL D3 IT27 F4 IU68 E2
F98 G5 F126 D5 F250 B1 FE81 G3 FHV2 E3 I105 C2 I229 G5 I353 E5 I477 C3 I601 B1 IB44 F1 IF50 A2 IH30 E4 IHWZ D3 IT28 F4 IU6A C2
F99 F4 F127 D5 F251 B1 FE82 G3 FHV3 E3 I106 C2 I230 G5 I354 E5 I478 E3 I602 B1 IB45 E1 IF51 A2 IH31 E3 IHY0 D3 IT29 F4 IU6E D2
I10 A2 F128 E5 F252 B1 FE83 G3 FHV4 F4 I107 C2 I231 F4 I355 E5 I479 E3 I603 B1 IB46 E1 IF52 B3 IH32 E4 IHY1 D3 IT30 F5 IU6F D2
I11 A2 F129 D5 F253 B1 FE84 G3 FJ11 E5 I108 D2 I232 F4 I356 E5 I480 E3 I604 B1 IB47 E1 IF53 A2 IH90 E3 IHY2 D3 IT31 F5 IU6J C2
I12 A2 F130 E5 F254 B1 FE90 G1 FJ12 E5 I109 D2 I233 G5 I357 E5 I481 E3 I605 B1 IB48 E1 IF54 A2 IH91 E3 IHY3 C4 IT32 F5 IU6K C2
I13 A2 F131 D5 F255 C1 FE91 G1 FJ13 E5 I110 C2 I234 G4 I358 B5 I482 E3 I606 B1 IB49 E1 IF55 A2 IH92 E3 IHY4 D4 IT33 F5 IU6L C2
I14 B3 F132 E5 F256 C1 FE92 G1 FJ14 D5 I111 C2 I235 G4 I359 E5 I483 E3 I607 B1 IB50 E1 IF73 A3 IH93 E4 IHY5 D4 IT34 F5 IU6M C2
I15 B2 F133 E5 F257 C1 FE93 G1 FJ15 C5 I112 C2 I236 G5 I360 E5 I484 C3 I608 B1 IB51 E1 IF74 B2 IHA0 C4 IHY6 D3 IT35 F5 IU6N C2
I16 B2 F134 E5 F258 B1 FE94 G1 FJ16 C5 I113 C2 I237 G5 I361 D2 I485 C3 I609 B1 IB52 E1 IF75 B2 IHA1 B4 IHY7 D3 IT36 G5 IU6P C2
I17 B3 F135 D5 F259 B1 FE95 G1 FJ17 B5 I114 D2 I238 F4 I362 F4 I486 C3 I610 B1 IB53 E1 IF76 B3 IHC0 C3 IHY8 D3 IT37 G4 IU6R C2
H_16770_060.eps I18 B3 F136 D5 F260 B1 FE96 G1 FJ30 E5 I115 C2 I239 F4 I363 D3 I487 C4 I611 B1 IB54 E1 IF78 B2 IHC1 C3 IHY9 F4 IT38 G4 IU6T C2
3104 313 6196.2 270307 I19 B3 F137 D5 F261 D1 FFA0 B2 FJ31 C5 I116 E2 I240 G4 I364 D3 I488 C4 I612 B1 IB55 E1 IF81 B3 IHC2 C3 IHYA D2 IT39 G4 IU70 C2
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 54

SSB: Test Points (Part 1 Bottom Side)

Part 1

H_16770_060a.eps
270307
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 55

SSB: Test Points (Part 2 Bottom Side)

Part 2

H_16770_060b.eps
270307
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 56

I2C IC Overview
I²C
B04E PNX85xx: CONTROL B06B PACIFIC 3: DISPLAY-INTERFACE B06A PACIFIC 3: LVDS B05C FPGA 1080P: I/O BANKS B06C PACIFIC 3 B03A CHANNEL DECODER B03B MAIN TUNER

+3V3-PER

3HPM

3HPK
AJ27 SDA3 3HPJ SDA-SSB 9T16 SDA-SSB1
I2C3-SDA
AJ28 SCL3 3HPH SCL-SSB 9T15 SCL-SSB1
I2C3-SCL

3GG2

3GG3
3F95

3F98

3T57

3T56
3T38

3T37
+3V3-STANDBY
ERR 1HP0
7H00 03
7HP5 C1 C2 198 200 70 69 23 24
3HPB 3 LVDS
PNX8537E

3HPX
3HPY
PCA9540BDP 1G50 COONECTOR
2 3HPS 9G53 3G52 1 TO DISPLAY 7F90-2 7GE2-2 7T18 7T57
PNX85xx 4 SDA-SSB-MUX1 SDA-I2C4-DISP
OR EP2C8F256C7N T6TF4HFG TDA10060HL TDA9897HL
3HPA 1
2 CHANNEL 5 3HPR SCL-SSB-MUX1 9G54 SCL-I2C4-DISP 3G53 2
I2C FPGA 1080P PACIFIC 3 CHANNEL IF
MULTIPLEXER (EPLD) DECODER PROCESSING
ERR ERR
05 53 ERR
3HPQ 2
11
+3V3-STANDBY ERR ERR ERR ERR
28 46 37 26
3HPT 1
B03B MAIN TUNER

3HPZ
3HPC
3HPU SDA-SSB-MUX2 9T85 SDA-MUX2-BUF 9T51
7
ERR
24 3HPW SCL-SSB-MUX2 9T86 SCL-MUX2-BUF 9T52 PACIFIC 3: DISPLAY-INTERFACING SUPPLY
8 B06B B01B

3T77

3T53
+5V-ON
ERR
12
7 6

3GA0
3GA3
1M59
B08F HDMI SWITCH
1T04 3F93 SDA-AMBI-3V3 7G61-2 SDA-AMBI 3B59 5B10 3
E1
SDA-SSB TD1736F
TO AMBI-LIGHT
3F94 SCL-AMBI-3V3 7G61-1 SCL-AMBI 3B58 5B12 1 NODULE
SCL-SSB MAIN E2
TUNER

3J29

3J09
ERR
50 49 34
+3V3
7J27
B04H PNX85xx: DIGITAL VIDEO IN AD8191ASTZ
B04H B08D HDMI AB02 VIDEO-FLOW AB09 DISPLAY AB06 FPGA DFI AB10 FPGA AMBILIGHT AB09 DISPLAY INTERFACING
HDMI INTERFACING
HDMI SWITCH
E10 DDC-SDA 89
DDC-SDA 1F50
ERR
C9 DDC-SCL 90 23 41 SDA-I2C4-SSB 3F19 SDA-I2C4
DDC-SCL
AIN-5V BIN-5V CIN-5V
40 SCL-I2C4-SSB 3F20 SCL-I2C4

3FPH
3F9G
3JB4

3JG2
3JA5

3JB5

3JG3
3JA6

3FA0

3F49
1B01
3JA1 16 +5V
85 PARX-DDC-SDA ARX-DDC-SDA P2 P1 P11 R11
PARX-DDC-SCL 3JA0 15
86 ARX-DDC-SCL
7F65

3F38
7F18

3F37
1M59
1B02 EP2C35F484C7N XC3S250E 3F6J 3F45

1
2
SDA-AMBI-3V3 7F09-2 3
93 PBRX-DDC-SDA 3JC5 BRX-DDC-SDA 16 4FTG256C(XILI)R B4
3JB0 CYCLONE II TO AMBI-LIGHT
94 PBRX-DDC-SCL BRX-DDC-SCL 15 3F9E SCL-AMBI-3V3 7F09-1 3B44
(FPGA) SPARTAN A5 1 MODULE
AK28 3HPG

18
SDA2 SDA-2 FPGA

19
I2C2-SDA 1B03
3HPF 98 PCRX-DDC-SDA 3JG7 CRX-DDC-SDA 16 ERR
AK29 SCL2 SCL-2
I2C2-SCL 65
PCRX-DDC-SCL 3JG6 CRX-DDC-SCL 15
99
+3V3
3x HDMI
B04A PNX85xx: STANDBY CONTROLLER

3JG5

3JH6
3JC0

3JB6
CONNECTOR

3JA8

3JA7
+3V3-STANDBY
B04A
9HP8

9HP7

5 6 5 6 5 6
B04C PNX85xx: NVM / UART SWITCH 7JA0 7JA1 7J29
3H02
3H03

M24C02 M24C02 M24C02

3H41 SDA-UP-MIPS
DDC-SDA AH3 EEPROM EEPROM EEPROM
3H38 SCL-UP-MIPS
DDC-SCL AG4 Only for 120Hz Only for 120Hz
Only for 120Hz Only for 120Hz Dynamic Frame Insertion Dynamic Frame Insertion
7H02
Dynamic Frame Insertion Dynamic Frame Insertion With AMBI-LIGHT With AMBI-LIGHT
M25P05
5 6
9HP6

9HP5

B08C EXTERNALS B08A UART

STANDBY 512 7HC3

CONTROL FLASH M24C64

EEPROM
(MAIN NVM)
7HC4
U4 P0.1 RESET-NVM_WP-NANDFLASH 8

V3 P0.7 UART-SWITCH
7HC0
74HC4066PW 7JE2
3H59 ST3232C
AB1 RXD-UP 2
RXD
4 1HE2
AC5 3H61 TXD-UP 9 3JE3
TXD 13 RXD2 3
1 3HC3 RXD R1-IN
9 R2-OUT
2 UART2
8 3HC6 TXD FOR
10
T2-IN 3JE2 TXD2 1 FACTORY
E27 RXD-MIPS 3 14
RXD T1-OUT USE ONLY
11
D28 TXD-MIPS 10
TXD
RS232
INTERFACE
1M15
3HPE 8 3JE5 9J06 RXD-SERV 3J11
AH27 SDA1 SDA-SLAVE 3
I2C1SDA R2-IN UART
AK27 SCL1 3HPD SCL-SLAVE 3JE4 9J07 3J12
I2C1-SCL 7 TXD-SERV 2 SERVICE
T2-OUT CONNECTOR

B04O
B04O PNX85xx: DIGITAL VIDEO OUT / LVDS

VID_OUT
TTL
AF15 9HWH DV-B0_UART2-RX 12 R1-OUT
B0_UART
AK16 9HWG DV-B1_UART2-TX 11
B1_UART T1-IN

UART H_16770_074.eps
LEVEL ADAPTER 070907
 Block Diagrams, Test Point Overview, and Waveforms Q523.1U LA 6. 57

Supply Lines Overview

SUPPLY LINES OVERVIEW
B01A SUPPLY B02B DC / DC B04F PNX85xx: CONTROL B05D FPGA 1080P: DRAM B11A AUDIO LEFT / RIGHT AB07 DDR A
2B48 +3V3-PER +3V3-PER +3V3 +3V3 +AUDIO-POWER +AUDIO-POWER
5B01 +5V-STANDBY +5V-STANDBY B01a +2V5 +2V5
B04p B02a AB01
6B07 B01a 5FK0 +3V3-SD1 3D04 5F27 +2V5-DDR1
+AUDIO-POWER VPP
5 7 3U94 +5VS AB06
B11a B11c
B04c,d,l,m
2B51 7U02-1 +5V-POD B09a,B10c
B04G PNX85xx: SDRAM 7D55 VP 5F28 3F4B VREF-DDR1
3 8 B02b,B04i,
B02a B11c 3F4D
+5V-ON
B02a +1V8 +1V8 B06A PACIFIC 3: LVDS
7D58
VREF-FPGA1
AB06
6B08 -AUDIO-POWER 7U02-2
2 9 B03a,B04a,b, 3HJ1 VDISP
DDR2-VREF-CTRL VDISP ON-MODE
B11a 7U04-1 B06b,B10b B06b
10 6B06 +12VS 1G50
CONTROL POD-MODE 3HJ3 DDR2-VREF-DDR -AUDIO-POWER -AUDIO-POWER
1 B01a
B02a,b, 7U04-2 41
TO 1F50
3D39
AB08 DDR B
2B46 VNN

3B72

3B73
11 ON-MODE AB02
B11c +2V5 +2V5
3U86 7U19 +3V3-STANDBY B04a,b,c,d,e,m,p, DIF
6B05 1B33 +5V-STANDBY 7D61 VN AB01
12 7B06 B06b,B08a,c,B11a,c B02b,B04i, 5V01 +2V5-DDR2
B01B,B02b,
7U17 +1V2-STANDBY B04H PNX85xx: DIGITAL VIDEO IN B06B PACIFIC 3: DISPLAY-INTERFACING
B11c
AB06

6B15
2.5AT B06b 7U20 B02a,B04p 3CD6
2B51 5V02 VREF-DDR2
VOLT.
RREF-PNX8535 RREF-PNX8535 +12V-DISP +12V-DISP

3B29
REG.
7U18 B01b +3V3-STANDBY +3V3-STANDBY 3CD8 VREF-FPGA2
B04p B02b AB06
7B50 VOLT. 5G55 VDISP

K
3128 7G54 B06a
REG.

R
CONTROL
4 1 A
B01a
+12VS +12VS B04I PNX85xx: AUDIO
7B04 VP VP +3V3-STANDBY +3V3-STANDBY
3 2
TCET1102 B11a VP VP
B02b B11C AUDIO: PROTECTION/MUTE CONTROL
VN VN B11a +3V3 +3V3
B11a 5HM0 AUDIO-VDD
AUDIO-PROT +3V3-STANDBY +3V3-STANDBY
B11C B02a
+5V-ON +5V-ON
B02b AB09 DISPLAY-INTERFACING
STANDBY VN VP VP VP
x +12V +12V B02b
B11a
B02a 5HM1 AUDIO-VEE B11a
+5V-STANDBY +5V-STANDBY VN VN +12V +12V
1P02 +12VF +12VF
B02b B11a AB01
2 B02a 5F0K +VDISP
+12V +12V 7F07 AB02
3UB3 6U63 3UB4 VPP VPP
5U09 +VTUN B02a
1 B11a 5F0L
3GC4
7U24 B04K PNX85xx: ANALOGUE AV +8V2-PAS VNN VNN
SEE ALSO BLOCK DIAGRAM SUPPLY B11a 5F0M
+3V3-PER +3V3-PER
VSW B04p 3F48 +5V
(RESERVED) LED SWITCH PANEL
B06C PACIFIC 3 J +3V3 +3V3
A
A DISPLAY B01B SUPPLY
B04L PNX85xx: AUDIO AB01
SUPPLY +3V3 +3V3 1M20
B02a TO 1M20 5 +5V-STANDBY +5V-STANDBY
1P11 1P11 B02C DC / DC 5GE2 +3V3-P3
+5VS +5VS B10C
1 1 B02b
Dim-control
BACKLIGHT-OUT
B06B
7HP0
7GE3 SSB AB10 FPGA AMBILIGHT
+3V3F +3V3F +2V5-PF
5HP1 VDDA-AUDIO IN OUT
2 2 POWER-OK-DISPLAY B02a IN OUT COM
Power-Good B04A COM B04p 5GE0 +2V5-P3
7U8C 9U8A +2V5 B04a AB01 DC/DC +3V3 +3V3
3 3 LAMP-ON-OUT 5GE1 AB01
Light_on_off +3V3 +3V3 +2V5-PLL
B06B B02a 5F31 +3V3M
7GE5 1M90
4 4 7U8B +1V5 TO 1M90
GND 1 +12VS
VOLT. IN OUT SUPPLY +2V5 +2V5
Boost
5 5 BACKLIGHT-BOOST
N.C.
REG.
B04M PNX85xx: AUDIO COM
5GE3 +1V5-P3
5U04 1U01 +12V
AB01
5F34 +2V5M
+3V3-STANDBY +3V3-STANDBY 5GE4 +1V5-PLL
6 6 STANDBY B02b 5U05 3.0AT
Standby B04D +1V2 +1V2
+12V +12V
+3V3 +3V3 5GE5 +1V5-TX AB01
B02a B02a 5U06 1U02 +12V-DC 9F52 +1V2-PF
9B06 +5V-STANDBY +12VF +12VF +5VS +5VS
5GE6 +1V5-RX
7 7 B01a B02b 5U07 3.0AT
+5v2 B02a 5F33 +1V2M
5U68
1B50

3U01
+12V
8 8 +12V-DISP
B04N PNX85xx: VIDEO STREAMS B08A UART
7U00 7U03-1
B06b,B04o 7U64 7U61-1 12V/1V2
T3A NCP5422 14 COVERTER
L6910 15 +3V3-PER +3V3-PER +3V3-STANDBY +3V3-STANDBY
15
11 +1V4 B04p B02b 5U02 +1V2
5U60 Dual
1M09 7U03-2 AB05,AB10
STEP
1 7U61-2 Out-of-Phase
+12V DOWN
Synchronous
+12V
2
TO
CONTR
14
B04O PNX85xx: DIGITAL VIDEO OUT / LVDS
B08B SPDIF Buck Controller
16
3 AMBI-LIGHT
GND +12V-DISP +12V-DISP
4 B01b +3V3 +3V3 7U01-1
GND (RESERVED) B02a 12V/3V3
VDDA-LVDS VDDA-LVDS
1 COVERTER
B04p
1M90
7U01-2 5U01 +2V5 AB05,AB07,
1
+12V
2 B03A CHANNEL DECODER B08C EXTERNALS AB08,AB10
+12V 2
3 1M90
B04P PNX85xx: POWER
+3V3-STANDBY +3V3-STANDBY
+12V +3V3 +3V3
4 DFI PANEL B02a B02B 7U08 7U09
GND +1V2 +1V2
7T20 B02a 7J50 +3V3-UART +3V3 AB03,AB05,
5 IN OUT IN OUT
GND +2V5-TUN +1V8 +1V8 AB06,AB09,
6 COM COM
IN OUT B02a AB10
GND COM
+3V3-STANDBY +3V3-STANDBY 7J51
B02b UART-SWITCH
9T14 +3V3-ATSC +12V +12V
SEE ALSO BLOCK +1V2-STANDBY +1V2-STANDBY
B02b
DIAGRAM SUPPLY
B02A DC/DC +1V2 +1V2 B02a AB02 VIDEO-FLOW
B02a +3V3 +3V3
B02a
+5V-ON 7HK0 1F50
B02b
+5V-ON
+1V8-PNX
B08D HDMI TO 1G50
1 +12V-SSB
+12VS +12VS B06A
B01a IN OUT 1B01
COM HDMI AIN-5V SSB
18 1F51
B02b,c, CONNECTOR
7U16 +12V B03B MAIN TUNER +VDISP +VDISP 1 TO

3JC8
B04a,B06b, 5HYA +3V3-PER 1B02 AB09 DISPLAY
B08c,B09a HDMI BIN-5V
+3V3 +3V3 B04e,f,k,n 18
B02a 5HK2 RREF-PNX8535 CONNECTOR
7U14

3JC7
+5V-ON +5V-ON B04h
B02b 1B03
POD-MODE 5HY1 VDDA-LVDS HDMI
18 CIN-5V AB03 PNX8535: CONTROL
5U00 +12VF 5T53 V1 B04o CONNECTOR
B02b,c +3V3 +3V3

3JH3
VDDA-AUDIO VDDA-AUDIO
3U01

5T54 V2 AB01
7U00 7U01 +5V-CON B08F
12V/3V3 B04l
NCP5422 15 COVERTER B02b,c,B3a,b, 5HY4 VDDA-DAC
+5VS +5VS
1 B02b
+3V3 B04a,e,l,m,p,q
5HY7 AUDIO-ADC
Dual
7U06
B05b,c,d,B06b,c, AB05 FPGA: POWER + CONTROL
Out-of-Phase 5U03 +3V3F B08b,f,B10a B04A PNX85xx: STANDBY CONTROLLER
Synchronous +1V2 +1V2
2 +3V3-STANDBY +3V3-STANDBY
Buck Controller B02b B08F HDMI SWITCH AB01
5F54 +1V2-FPGA
7U28 +1V8
B02a
+3V3 +3V3 B04Q PNX85xx: FLASH
AB06
+5V-CON +5V-CON 5F55 5F53
B08d +1V2-PLL
7U27 +2V5 +2V5 +3V3 +3V3 AB06
B02c B02a 5JA5 +5V-MUX
1V8
7U03 STAB. +12V 5HA0 +3V3-NAND +2V5 +2V5
+12V
B02a AB01
12V/1V2 +3V3 +3V3 5F23 +Vin-FPGA
16 COVERTER +5V-ON +5V-ON B02a
B02b AB06
7U08 5U02 +1V2 5JA3 +3V3-DIG 5F24 +2V5out-FPGA
B03a,B04e
B05B FPGA 1080P: POWER + CONTROL
5JA4 +3V3-ANA 5F25 +2V5in-FPGA
AB06
15
B04B PNX85xx: DEBUG AB06
+3V3 +3V3
+3V3-STANDBY
B02a
+5V-POD +5V-POD +3V3-STANDBY
B02b +3V3 +3V3
5FA6 +3V3-FPGA
B02b AB01
1V2-STANDBY 1V2-STANDBY
B05c B09A ANALOGUE EXTERNALS
5FA8 +Vin-FPGA
B02b B04C PNX85xx: NVM / UART SWITCH B05c +5VS +5VS
7FA4
+2V5-STAB B02b
+3V3-STANDBY +3V3-STANDBY IN OUT +12V +12V
B02b COM
5FA7 +2V5out-FPGA B02a AB06 FPGA DFI
+5VS +5VS 7FA5 B05c
B02b +1V2-STAB 2V5-DDR2 2V5-DDR2
IN OUT AB08
COM
5FB1 +1V2-FPGA B10A USB 2.0 +2V5out-FPGA +2V5out-FPGA
AB05
B05c +3V3 +3V3 +Vin-FPGA +Vin-FPGA
B04D PNX85xx: MISCELANEOUS 5FA2 +1V2-PLL B02a
AB05
B05c +1V2-FPGA +1V2-FPGA
+3V3-STANDBY +3V3-STANDBY
B02b AB05
+1V2-PLL +1V2-PLL
+5VS +5VS
B02b
B05C FPGA 1080P: I/O BANKS B10B USB 2.0 AB05
2V5-DDR1 2V5-DDR1
+5V-ON +5V-ON AB06
+3V3-FPGA +3V3-FPGA +2V5in-FPGA +2V5in-FPGA
B05b B02b AB05
B04E PNX85xx: CONTROL +2V5out-FPGA +2V5out-FPGA VREF-FPGA1 VREF-FPGA1
B05b AB07
+3V3-STANDBY +3V3-STANDBY +Vin-FPGA +Vin-FPGA VREF-FPGA2 VREF-FPGA2
B02b
B05b B10C LED PANEL CONNECTOR
AB08
+3V3-PER +3V3-PER +1V2-FPGA +1V2-FPGA +3V3 +3V3
B04p
B05b +5VS +5VS AB01
+3V3 +3V3 +1V2-PLL +1V2-PLL
B02a RES B02b 1M20 TO 1M20
B05b
+3V3 +3V3 5 J
+1V2 +1V2 B02a
B02a IR/LED

H_16770_075.eps
060907
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 58

7. Circuit Diagrams and PWB Layouts

Display Supply (42”): Mains Filter & Standby
1003 B4 1303 C4 1350 C9 2301 C4 2309 E13 2315 C12 2320 D12 2327 B10 3300 C3 3305 C4 3310 B13 3316 D6 3321 E10 3326 H9 5303 D6 5308 D12 6309 E10 6318 B13 7305 E11 9301 D14 9309 C5 9316 D5 F411 C1 F418 D2 F431 D8 I410 C3 I814 E10 I821 B4 I826 F13 I831 C13 I836 B10 I841 F11 I861 D10 I870 G9
1005 B4 1308 C1 1P02 B7 2302 C5 2310 C11 2316 D12 2321 C13 2330 E10 3301 C2 3306 A14 3311 F11 3317 D5 3322 E12 3327 G9 5304 F13 6304 B10 6314 C14 6354 C14 7306 E13 9302 C12 9310 E11 9317 D5 F412 C2 F419 D2 F432 G8 I411 C5 I815 F10 I822 E12 I827 D7 I832 C12 I837 E13 I842 F10 I862 D12
1300 E3 1311 E6 1P03 B7 2304 D11 2311 C11 2317 C12 2323 C3 2331 F10 3302 D2 3307 F10 3312 E11 3318 C10 3323 E12 3328 G9 5305 C4 6305 B11 6315 A12 6355 B13 7307 B14 9303 D5 9311 B13 9318 D7 F413 C2 F422 F9 F524 C14 I416 D4 I816 E10 I823 E12 I828 B13 I833 B13 I838 E13 I844 C4 I864 B14
1301 E4 1312 E7 1P22 B11 2305 F11 2313 F11 2318 D5 2324 C4 2332 H9 3303 E2 3308 C14 3313 F10 3319 D6 3324 E12 3329 G9 5306 C5 6307 C11 6316 A13 6360 E9 7308 G9 9304 E10 9312 F13 9319 D7 F415 D2 F423 F8 I297 D5 I419 D2 I817 D11 I824 E12 I829 A14 I834 C13 I839 E11 I846 C4 I865 G9
1302 B4 1314 C2 2300 C3 2307 D4 2314 E13 2319 B10 2325 C5 2333 G10 3304 B5 3309 E10 3314 F13 3320 D7 3325 G8 3330 B12 5307 D3 6308 E10 6317 B13 6361 E9 7309 G10 9308 D12 9315 E3 F410 C1 F416 D2 F430 C7 I299 E5 I424 E9 I820 F10 I825 E13 I830 A13 I835 B10 I840 E11 I860 F10 I866 G9

1 2 3 4 5 6 7 8 9 10 11 12 13 14

A1 MAINS FILTER + STANDBY A1

A 25V_HOT A
25V_HOT 6315 I830
399V_HOT

BZX384-C33
BZG03-C200

6316

3306

1K0
BYG10
6355
I829

BAS316
I828

6304
7307
MAINS FILTER 1P03
I836 400V_HOT

1P22 TCET1102(G)

BAS316
1

6318

3310

47K
A2

BAS316
2 1

2327

470n
2319

6305

3330

2M2
B B

1u0
1005 2 LATCH
B2P-VA-BF-BK I864
V_NOM I833
I821 1P02
1302 3304 I835

BZX384-C33
1 400V_HOT
120V for US 500V 220R 2

6317

9311
1003
B2P-VA-BF-BK

230V for EUR

470R
3318
V_NOM 272V(30V) 3308 F524
1303 3305 I846
I834

BZG03-C200
22K
220R

BYG10
500V I844

6354

6314
9309
F412

F413
F411

9302
2317

2315

330u
2321

330u
10n
1314 I410 F430
F410

C C

2311
I411

56n
5305 5306

2
T5AH 250V(EUR/AP) 3 3
1308 2
2324

470n
2301

470n
T6.3AH 250V(US) 2
3301

2300

470n

2323

470n
4M7

1 4 1 4 4 1
3300

2 6307 400V_HOT I832 I831

2302

470n
2325

470n
1 DMF3547HB60 DMF3547HB60

2310

56n
TS6B
V

1350

2304

56n
3
F415 F416
I416
F431

9308

5308

80R
9303 3 2
F418 F419
I817
I297
3302

4M7

DMF2405H60
1 5307 2

9301
DTH40383H65 4 1 I862
1 4

D I419 G5PA-1-5VDC D

3317

3319
9317
9316

3316

3320

9318
9319
1R0

1R0

1R0

1R0
4

2316

330u
2320

330u
2 5303 3
I827
2307

220p

2318

470p

I861
9310

COLD GROUND

BAS316

1N5062
3303

6361

6309
4M7

4
7305
AVS1ACP08

AVS10CB
3309

7306
1M0
I299 1311 1312 VDD
7 6 3323
E HEATSINK HEATSINK I424 MODE NC 3312 I824 E

I814
100R 3324 I837
9315 8 5 I822

I825
BAS316
VM VG 100R I823
1300

6360
1301

I839

I816 1N5062
3322 100R

6308
2 3
OSIN OSOUT
1

3321

2330

2309
COLD GROUND I840

2K7

47n

56n
100R
1

9304

2314
VSS

47n
GND screw
I838

I815

I842

I826
I841

1
I860 3311

RELAY +

RELAY -
GND4
100K

3307

3313

2331

2305

100p

5304

100u
9312

3314

4R7
22K

18K

47n
F423
F422 2313
F I820 47u 50V
F

3327 I865 7309

+5V2 BC817-25W
6K8

220R
3328

3329

2333
3K9

2n2
G G
I870

F432 I866
A2 Standby
3325
7308
BC847BW
10K
3326

2332
15K

2n2

H H

H_16800_005.eps
3101 313 6171.4 180407

1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 59

Display Supply (42”): Supply

1 2 3 4 5 6 7 8 9 10 11 12 13 1109 F12 3025 E12 6043 F13 I019 H7
1110 F13 3026 E12 6044 E13 I020 F3
1113 F12 3027 G2 6045 H8 I021 E1

SUPPLY 1114 A3 3028 G4 6069 G13 I022 F2

A2 BIAS SUPPLY
A2 1115 H9
1116 A3
1310 H11
1316 H12
3029 C6
3030 E11
3034 E12
3035 E5
6070 D10
6071 D11
6072 F10
6073 F10
I023 F2
I024 F3
I025 F1
I027 C2
9009 9003 1116
1317 H13 3036 H4 6074 D10 I028 G1
I005 I006 3.0A T 1319 H13 3037 C12 6075 D10 I029 G2
6025 3000 I096 5017 I097 6024 I099 5010 I100
A 25V_HOT
50R
6032 6033 1114

80R
A 1321 H13
1322 I11
3038 D13
3039 H3
6076 H7
7001 C4
I030 D12
I031 H9
BYG22D BYG22D BYG22D 3.0A T I098 BYG22D
4R7 400V_HOT 2000
+24VA 1M09 H9 3040 D13 7002 B9 I032 H10

2003

1m0
OR +295V 1M12 H10 3041 E13 7004 H4 I033 F4
F299
470p 1M90 I8 3042 G3 7005 C8 I034 F5

3080

3081

3082

3083

3084

3087

3088
4K7

4K7

4K7

4K7

4K7

4K7

4K7
I101 400V_HOT 1P10 H10 3043 D1 7006 D8 I036 F5
F018 F029 F021 3999 F022
1P11 H9 3044 F2 7007 C7 I037 C7

5007
1P15 H10 3045 G5 7008 E7 I038 C7

80R
1K0

9008

5009

80R
2000 A9 3046 F5 7009 G4 I039 D6
I047 I013 2001 G8 3047 H2 7010 E12 I040 H5
7013 BC857BW I048 680u
7014 3068 F140 2002 B4 3048 D1 7011 F2 I041 H5
BC847BW
+18V
2003 A3 3049 E3 7012 F3 I042 C7
3092

3093
1K0

2K2
220R
B 2002 OR +12V
B

5008
2006 C2 3050 E2 7013 B1 I045 C6

80R
3094
2K2
4 1
I062 2023 2007 E1 3051 F2 7014 B2 I046 C7
I049 3065 I014 2008 G3 3052 C12 7015 H7 I047 B2
7002 470n 2009 G11 3054 F4 7016 E13 I048 B3
1K0 I064

220R
2010 H1 3055 I5 9001 E8 I049 B2

3057
I063
2056 HIGH SIDE 2011 E8 3056 I3 9002 F13 I051 E7
I852
3 2 2012 E8 3057 B12 9003 A3 I052 D7
2n2 DRIVE F016
+18V 2013 D8 3058 E2 9008 B5 I055 E7
I849
VS-CONTROLLER

STP15NK50ZFP
15
I851 6007 I042 3014 I038 F002 399V_HOT TCET1102(G)
OR +12V 2014 F6 3059 C1 9009 A2 I057 E7
CONTROL 7005

2054

470p

2031

10n
I027
7001 2015 F4 3060 H3 9011 D8 I059 E7

BAS316
BAS316 100R

2057

6003

3063
2016 D5 3061 E6

VCC
9012 E8 I062 B10

3052

10K
2n2

15K
I011 I007

2017
3059 3002 9 I853

3015

15n
47R
2036 2017 C8 3062 C6 9013 D8 I063 B10
C EN|UA VREF 3062
C

680R
5005

9014

3022
50R
5
3003 560p

100K 15K 2018 G11 3063 C12 9014 C8 I064 B8

BZG05C15
1

22n 1600V
3098 OSCC 3K3 1n0 2019 H2 3065 B6 9015 D10 I070 D10

2080
I045
2040

2058

100p
2061

100p

5015

6013

3037
I046

80R

15K
5K6

I107 3016 6027 5003 2028

2
I116
2020 D11 3068 B12 9016 D10 I072 D10
56K OSCR I111
5001 I037 +18V 2021 F10 3069 G13 9017 E4 I073 G10

15n
2006 3005 F003 3K3 BAS316 I294 80R

1n5 2000V
3 14 S13932-04 6 1n0 50V OR +12V
OSCCC OA 3029 F146 F024 F025 F147 2022 F11 3070 D13 9019 I11 I074 G10
BC857BW

STPS8H100FP
I009 33K F012 +24VA 2023 B12 3071 E13 9020 I11 I076 G10
7007

2059
1n0 25V 16 400V_HOT

2013
OS 3K3 I109
4 OR +295V 2024 D12 3072 F13 9021 I11 I077 G10

9013

5004

6074
50R
I008 MC34067P F030 5016 5011
6 12 7 I070 2025 D13 3080 A10 9022 I11 I081 F6
100p
3004

2062
27K

EAO OB I039 2055 2052 I855

3024

16V
2032

2076
15K
3 9016 2026 G2 3081 A10 9023 H11 I084 F9

3n3

33n
BAT54 COL
80R

35V
3006

13 9

2033

2025
10K

1u0
1m8 35V
Ip PGND I108 2 2n2 2n2 2027 F2 3082 A11 9024 H11 I085 D12

2066
2020
STPS8H100FP

1u0
I110 9032 2028 C11 3083 A11 9025 H12 I088 D13
7 10

BAT54 COL
6008 F005 I088
D D

1m8
In FI 6002 2029 E10 3084 A11 9026 I11 I089 D12

6075

2044
I121
I010

1n0
I117 I085 +12V 2030 E12 3087 A11 9027 I11 I090 E13
3048

6005

2053

470p
10
2K7

11
BAS316

I052 BAS316

FLM 1/6W
SOST
LOW SIDE
GND
BAS316
6038

9011 2031 C12 3088 A12 9028 I12 I091 F13

6004
3043 5006 F028

3038
3040
DRIVE

4K7
8K2
3023 I089 2024 2032 D13 3089 H5 9029 E9 I092 E13

100R
80R

3017
I847 2033 D12 3091 D12 9030 F9 I093 E13

2081
10R F008 5012 I114 I072 F027 F017
F009 7006
I845 I001 10K
STP15NK50ZFP 100n 2034 E11 3092 B1 9031 I9 I094 F12

3070
9015

1K0
4 2016 80R 6070 6071 2064 I030 3091 2035 E7 3093 B2 9032 D13 I096 A2
I057

5013

9012
2036 C7 3094 B3 9033 I10 I097 A2

80R

100n
3009 I021 3008 3007 3058 3061 BYV28-600 2070 3n3 1R0
BYV28-600

1
I012 100n 16V
6023 7016 2037 H4 3095 H6 F002 C7 I098 A4

3018

47R
I295 7010 BC857BW
3K3 330R 10K 5M6 6020 3K3 100p 2038 F11 3096 H7 F003 C5 I099 A4

K
TS2431
2007 3020 2035 I113 5025 I002 2029 2034 F014 F023 2039 E11 3097 I7 F005 D8 I100 A5

BZG05C15
BAS316

R
3050 BAS316
2 2040 C1 3098 C1 F007 F2 I101 A4

6012
I112

1n5 2000V
3K3 BS51 80R +24VA
E 1n0
E

MRS25 1%
470n I059 1n0 50V 1n0 50V
9017 2041 G11 3999 A13 F008 D5 I107 C6

PDZ3.3-B
A
PDZ18-B

6021

BAS316
16V 400V_HOT 1M5 3019 6028 OR +295V

6044

6042
3025

1K8
2042 G11 5001 C6 F009 D6 I108 D5
6018

2012

9029

I092
15n 50V
I051
SOFTSTART STPS8H100FP I093

3
F425 3K3 3071 2043 G12 5002 F9 F012 C12 I109 D7

1600V
BAS316

2011
100K
3049

22n
6041 2044 D11 5003 C10 F014 E12 I110 D8
CONTROL BC857BW

3030

2030
18K
3035 100R
2045 E10 5004 D8 F016 C12 I111 C8

9001
5027

3026
7008

50R
I018 I145 STPS8H100FP I090

3034
470R
2046 I3 5005 C8 F017 D11 I112 E8

3041
1K0

33K
100R I055 5026 I004 2045 2039
I296

2060

9030
c002 2047 I4 5006 D10 F018 A7 I113 E8
50V
2027

50V 50V
15n

PDZ10-B
I020 I003 80R 1n0 1n0 2048 I4 5007 B8 F021 A13 I114 D8
470K
3054
2050

6043
1n0

GND3 2021 I094 2049 G11 5008 B8 F022 A13 I116 C10

15n
I025 3044 BC857BW 2050 F4 5009 B5 F023 E13 I117 D10

c003
c001
100p
CURRENT

9002
10K I022
7011
6072 1109 1113 1110 I091 2052 D7 5010 A4 F024 C13 I121 D13
3012

10K

PROTECTION

1m8 35V
HEATSINK HEATSINK HEATSINK 2053 D5 5011 D9 F025 C13 I131 I5

1m8 35V
F F

2022

2038
I023

BYV28-600 2054 C5 5012 D8 F027 D11 I132 I4

100R
3072
I024 6011 I033 2015 I036 I034 2014 I081 6073
5002 2055 D7 5013 E8 F028 D11 I133 I3
I015 2056 B6 5015 C5 F029 A8 I134 H2
3051

10K

BAS316 10n50V 470p BYV28-600

2000V I084 I016 2057 C6 5016 D5 F030 D5 I135 G3
100R
3001

100R
3046

F007 2058 C2 5017 A2 F031 H8 I136 H3

7012
2059 D8 5021 G10 F032 H8 I137 G3
2063

22n

BC847BW
BAS316
470n 16V

2060 F8 5022 G10 F033 H8 I138 H4

6010
2n2 50V

I017
2061 C2 5025 E10 F034 I7 I139 G4
100R

100R
2008

3045
100K
3027

3013

3021
10K
2026

5021 I074 2042 2009 +24VB 3069 F141 2062 D1 5026 E10 F035 I7 I140 G5
I028 I029 2063 G5 5027 E8 F036 I7 I141 H1
80R 50V +12V +3V3
1K5 2064 D12 5028 H10 F037 I7 I145 E7

1m8 35V
I073 1n0 50V 1n0

1m8 35V

BZX384-C3V3
6031
G G 2066 D11 5029 H10 F040 H12 I294 C8

2041

2043
2069 G13 5030 H8 F041 H12 I295 E5

6069

2069

100n
3028 STPS8H100FP
I139
6040 2070 E11 6002 D7 F042 I12 I296 E4
PDZ18-B

2071 I7 6003 C6 F043 I12 I845 D9

BAS316

1K0 F075
6029

6015

7009 GND4 I076 STPS8H100FP 2072 I7 6004 D5 F044 I12 I847 D1

I077 2075 I8 6005 D5 F045 H8 I849 C1

2001

470p
BC857BW I140
I135 3042 I137 5022 2049 2018
2076 D13 6006 I3 F046 I9 I850 I4
I040 I031 1115 I032
80R 50V 2080 C8 6007 C6 F075 G11 I851 C6
BZX384-C33

2K2 1n0 50V 1n0

3010 3047 6026 I138 I019 F145 2081 D13 6008 D6 F140 B12 I852 B8
I141 I134 I136 3039 6076 F032 +12V 3.0A T
6014

7004
1M09 1M12
3000 A1 6010 G4 F141 G13 I853 C12
470R 47R 1K0 BC847BW BZX384-C3V3 F031 F033 I868
BAT54 COL 1P15 3001 F5 6011 F4 F142 H6 I855 D7
5030 1 1 5028 3u3 +12V 1310
1 OR +295V +24VB 1316 1317 1319 1321 3002 C1 6012 E7 F145 H7 I856 I11
I041 F142
H 3095 2 2
H
3036

2037

3003 C1 6013 C7 F146 C12 I857 I11

10K

+24VA
47n

7015 80R 3 3 2 1 1 1 1 1
5029
3060

BC857BW
10K

+3V3
BZX384-C4V7

3004 D1 6014 H5 F147 C13 I858 I11

BYG22D
+5V2 4K7 4 4 2 2 2 2 2
3089

6045
3u3 3
10K

I869 3 3 3 3 3005 C2 6015 G5 F299 A8 I859 I11

470R
3011
2010

100u

6022

2019

B4B-PH-K B4B-PH-K B3B-PH-K

10n

4 4 4 4 3006 D2 6017 I4 F425 E5 I867 I12

5 5 5 5
3007 E1 6018 E4 I001 D9 I868 H9
3096

9023

9024

9025
LATCH 1P11 1P10 F040
A1
1K0

+30V 6 6 6 6
F045 1 1 DIM-control F041
7 7 7 7 3008 E1 6020 E4 I002 E10 I869 H9
F046 Power-Good
10u 50V
2 2 DIM-control I856 F042 8 8 8 8 3009 E1 6021 E10 I003 F10 c001 F8
2075

I850 Power-Good Light_on_off 9019

3056 I133 6006 I132 2047 3055 3 3 9 9 9 9 3010 H1 6022 H1 I004 E10 c002 F7
4 4 I857 I858 F043 10 10 10 10 3011 H1 6023 E13 I005 A2 c003 F8
I131 Boost Boost 9020 F044
220R 10n 220R 5 5 11 11 11 11
BAS316 3012 F3 6024 A4 I006 A3
3097

1K5

Light_on_off
BAS316

6 6 12 12 12 12
2046

2048

6017

2071

100n
2072

3013 G3 6025 A1 I007 C3

47n

1n0

4u7

Standby
1M90
7 7
A1 9021 I859 B12P-PH-K B12P-PH-K
13 13
3014 C7 6026 H3 I008 D2
I F034 1
+12V 8

B8B-PH-K-S
8
9
+5V2 9022
I867
B14B-PH-K
14
B14B-PH-K
14
I 3015 C7 6027 C7 I009 C1
F035 2 10 3016 C6 6028 E7 I010 D2
F036 3
F037 B10B-EH-A 3017 D7 6029 G3 I011 C1
4 +12V

9026

9027

9028
5 3018 E7 6031 G11 I012 E4
6 +24VB 3019 E6 6032 A2 I013 B8
9031 9033 1 1322
+24VA 3020 E6 6033 A3 I014 B7
HOT GROUND HOT COLD COLD GROUND B6B-PH-K
OR +295V GND screw 3021 G5 6038 D2 I015 F10
H_16800_006.eps 3022 C11 6040 G11 I016 F10
3101 313 6171.4 180407 3023 D12 6041 E11 I017 G10
3024 D12 6042 E13 I018 E2
1 2 3 4 5 6 7 8 9 10 11 12 13
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 60

Display Supply (42”): DC / DC

1 2 3 4 5 6 7 8 9 10 11 1400 E7 I617 D1
2401 B4 I618 D2

DC-DC 2402 B4 I619 D2

A3 A3 2403 D3
2404 E4
2405 C7
2406 B8
I620 D1
I621 D5
I622 B3
I623 E7
2407 C5 I624 C5
2408 D6
2409 D3
2410 D4
A 9401
A 2411 B3
3401 C3
9402 3402 E8
3403 D4
3404 E4
3405 D4

470R
3425
1 5401 2 3406 B3
7407 3407 B2
3407 3426
BC857BW 3408 B2
0R1 7402 15K 3414 3409 C7
STP55NF06FP I601 3 4 +12V
3408 I600
BC15605-00 3410 B7
22R
B +18V
OR +12V 0R1
2 3 +30V 3420 B 3411 C8
3412 D8

1m8 35V

1m8 35V
BAS316

STPS745FP
3419

6403

2402

2401
I602

1K5
3406
47R 3413 C8

6401

2411

470p
BC807-25W 3414 B10
1
0R1
7403 I604
6406 3415 3415 B9
I614 I622 3416 C10

3410

2406

220p
1K0
22R
BZX384-C18
BAS316 I603

3401
3417 C10

10K
7401
6402

MC34063AD 3418 C5

100R

100R
5402

9405

9406

3416

3417
50R
I615 3419 B2
+18V OR +12V
8 DCOL SWC 1 3409 3420 B10
I606 3421 C1
I607 10K 6407
S Q 3422 C2
C I616
C

3413

10K
BAS316 I608 3423 D2
3424 E1
R

3427

15K
47R
7 IS
I609
7405
3425 B8
I610 BC817-25W 3426 B9
3418 I624 3411 I611
3421

3422

SWE 2 3427 C8
10K

1K5

7404

BAS316
IPK

2407

6409

9407
BC847BW 3430 D4

10n
2405 1K0
OSC TIMC 3
5401 B4

470R
2409

470p

2403

100n

3412
I617 I618 I612 220p 5402 C3
+12V REFERENCE
BZX384-C15

6 6401 B3
+18V VCC REGULATOR
6404

3423

6402 C3
1K5

OR +12V
6403 B3

2410

68n
I619 I613 6404 D1
D 6405
D

9403

9404
5 CIN_NEG GND 4
6405 D3
BAS316 6406 B9
3403

3405
82K

10K
I621
I620 7406 6407 C9
BC847BW 6409 C10
2408
220R
3430

7401 C6
4u7 7402 B2
3424

10K

7403 B8
7404 C9
3402
7405 C9
3404

2404

100n
1K0

I623 100K 7406 D2

1400 7407 B8
HEATSINK
E E 9401 A2
9402 A2
9403 D9
9404 D9
9405 C3
9406 C3
9407 C10
I600 B2
I601 B3
I602 B8
I603 B9
I604 B10
F F I606 C4
I607 C7
I608 C10
I609 C9
I610 C7
I611 C8
I612 D7
I613 D5
H_16800_007.eps
3101 313 6171.4 180407
I614 B3
I615 C8
I616 C9
1 2 3 4 5 6 7 8 9 10 11
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 61

Layout Display Supply Panel (42”) (Top Side)

1003 E2 1310 D10 1400 E9 2000 B7 2020 F8 2070 A9 2311 D3 2323 E2 3018 F5 3084 A10 3308 F3 5001 E4 5011 A7 5027 E6 5401 E9 6074 D9 7305 B5 9015 D8 9309 C2 9405 E9 9508 B10 9520 C6 9540 F9 9555 B9 9567 E8
1005 E2 1311 E4 1M09 E10 2001 E7 2021 A10 2075 E9 2313 C6 2324 D2 3024 B10 3087 A10 3309 B5 5002 D8 5012 F5 5028 F10 5402 E9 6075 D9 7306 D5 9016 D8 9312 C5 9406 E9 9509 A8 9521 B6 9543 D10 9558 C8 9568 D3
1109 A10 1312 D3 1M12 F10 2002 D5 2022 A9 2080 A6 2314 C5 2325 B2 3026 B9 3088 A10 3314 C5 5003 D8 5013 F6 5029 E10 6021 A9 6307 D4 7307 F4 9029 B8 9315 C7 9500 B3 9510 E7 9525 A4 9546 A9 9559 C8 9569 F9
1110 D9 1314 F2 1M90 F9 2003 F7 2032 B10 2300 E2 2315 A2 2327 E4 3038 B10 3300 F2 3316 A1 5004 E5 5015 D5 5030 E8 6031 C9 6308 B5 7402 F8 9030 B8 9316 B1 9501 A3 9511 E5 9526 C4 9547 E10 9560 B8 9570 C8
1113 C10 1316 D10 1P02 A4 2010 D6 2038 B10 2301 D2 2316 A3 2401 F10 3050 D6 3301 E1 3317 B1 5005 F4 5016 D5 5303 A1 6040 C10 6309 B5 9001 F6 9031 D10 9317 B1 9502 A5 9512 D6 9531 A3 9548 E9 9561 B8 9571 C10
1300 C7 1317 D10 1P03 F3 2011 A5 2041 C9 2302 B2 2317 B3 2402 E10 3058 E6 3302 E1 3318 D3 5006 D8 5017 E7 5304 C5 6041 A10 6401 F9 9008 D6 9033 C10 9318 A2 9503 B5 9513 D5 9532 D10 9550 E10 9562 B8 9572 E10
1301 C1 1319 D10 1P10 A9 2012 F6 2043 B8 2304 C3 2318 B1 3000 E7 3080 A10 3303 D1 3319 B2 5007 F5 5021 C8 5305 E1 6070 A8 7001 E5 9011 F6 9301 B4 9319 A2 9504 C4 9514 E6 9533 D10 9551 A10 9563 B9
1302 E2 1321 D10 1P11 F8 2013 F5 2059 A5 2307 D1 2319 D4 3014 F4 3081 A10 3304 D2 3320 A1 5008 F5 5022 C9 5306 C2 6071 A9 7002 C7 9012 F6 9302 A3 9349 D4 9505 C4 9515 C10 9535 A9 9552 E10 9564 B9
1303 E2 1322 C10 1P15 F10 2014 C6 2060 B5 2309 C5 2320 B5 3015 F4 3082 A10 3305 E2 3330 A5 5009 E6 5025 A8 5307 D1 6072 A9 7005 F4 9013 F5 9303 C1 9401 D9 9506 D6 9516 E5 9537 A9 9553 E10 9565 B7
1308 E1 1350 A6 1P22 A5 2017 A5 2066 C9 2310 C4 2321 B3 3017 F5 3083 A10 3307 C5 3420 E8 5010 E7 5026 A8 5308 B4 6073 B9 7006 F6 9014 F4 9308 B4 9402 D9 9507 B6 9519 B6 9539 F10 9554 E9 9566 E8

H_16800_008.eps
3101 313 6171.4 180407
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 62

Layout Display Supply Panel (42”) (Bottom Side)

1114 F4 2018 C2 2030 B2 2042 C2 2053 D6 2064 B2 2332 A3 2410 E1 3008 E6 3021 C6 3035 D6 3045 D6 3056 E5 3069 E1 3095 F1 3321 C6 3401 E1 3410 E2 3419 F3 3999 A2 6011 C6 6023 B2 6038 E6 6314 F8 6402 F3 7008 E7 7308 A3 9003 F4 9025 D1 9404 E2
1115 E4 2019 E5 2031 B2 2044 D2 2054 D6 2069 A2 2333 A3 2411 F2 3009 E6 3022 B2 3036 E5 3046 C6 3057 B3 3070 B2 3096 F2 3322 B5 3402 E2 3411 E2 3421 F2 6002 E6 6012 E5 6024 F4 6042 B2 6315 F8 6403 F3 7009 D6 7309 A3 9009 F4 9026 E1 9407 E2
1116 F5 2023 B3 2033 B2 2045 A1 2055 E6 2071 F2 2403 E1 3001 D6 3010 D5 3023 B2 3037 B2 3047 E6 3059 E6 3071 B1 3097 F2 3323 B5 3403 E1 3412 E2 3422 E2 6003 E7 6013 E7 6025 E4 6043 B1 6316 F7 6404 F2 7010 B2 7401 E2 9017 E6 9027 D1 9534 E1
2006 E6 2024 B2 2034 A2 2046 E5 2056 E7 2072 F2 2404 E1 3002 E6 3011 E5 3025 B2 3039 E5 3048 E6 3060 E5 3072 B1 3098 E6 3324 B5 3404 E1 3413 E3 3423 F2 6004 D6 6014 C5 6026 E5 6044 B1 6317 F8 6405 E1 7011 D5 7403 E2 9019 D1 9028 D1 9538 A2
2007 E6 2025 B2 2035 E6 2047 E5 2057 E7 2076 B1 2405 E2 3003 E7 3012 D5 3027 D6 3040 B2 3049 D6 3061 E6 3089 D5 3306 E7 3325 A3 3405 E1 3414 E3 3424 F1 6005 E6 6015 C6 6027 E7 6045 D3 6318 F7 6406 E2 7012 D6 7404 E2 9020 D1 9032 B1 9541 F1
2008 C5 2026 D5 2036 E7 2048 E5 2058 E6 2081 B2 2406 E2 3004 E6 3013 C5 3028 D6 3041 B2 3051 D5 3062 E7 3091 B2 3310 F7 3326 A3 3406 E2 3415 E3 3425 E2 6006 E5 6017 E5 6028 E6 6069 A2 6354 F8 6407 E2 7013 E7 7405 E2 9021 D1 9304 B6
2009 C2 2027 D6 2037 D5 2049 C1 2061 E6 2305 C6 2407 E2 3005 E6 3016 E7 3029 E7 3042 E6 3052 B2 3063 B2 3092 E7 3311 C5 3327 A3 3407 F3 3416 E3 3426 E2 6007 E7 6018 D6 6029 D6 6076 F1 6355 F8 6409 E2 7014 E6 7406 F1 9022 D1 9310 B5
2015 C6 2028 D2 2039 A1 2050 C5 2062 E6 2330 B6 2408 E1 3006 E6 3019 E7 3030 B2 3043 E6 3054 C5 3065 C4 3093 E6 3312 B5 3328 A3 3408 F3 3417 E3 3427 E2 6008 E6 6020 D6 6032 F4 6304 D7 6360 A4 7004 D6 7015 F2 7407 E2 9023 D1 9311 F8
2016 D6 2029 A2 2040 E6 2052 E6 2063 C6 2331 B6 2409 E1 3007 E6 3020 E7 3034 B2 3044 D6 3055 E5 3068 B2 3094 E6 3313 C6 3329 A3 3409 E2 3418 F2 3430 E1 6010 C5 6022 E5 6033 F4 6305 E7 6361 A4 7007 E7 7016 B2 9002 B2 9024 D1 9403 E2

9538

9534

9541

H_16800_008.eps
3101 313 6171.4 180407
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 63

DFI Panel: DC - DC
1M09 E13 1U13 D14 2U06 A9 2U13 C7 2U20 D5 2U27 E8 2U34 G2 2U41 A8 3U07 B3 3U14 C3 3U21 B5 3U28 F11 3U36 D6 3U46 E8 3U62 F7 3U73 G10 5U05 C12 6U06 E7 7U05 E2 7U15-2 E10 FU03 C4 FU12 C11 IU06 B2 IU16 B6 IU28 C4 IU37 D6 IU48 E5 IU59 E10 IU68 H2
1M12 E14 2U00 B2 2U07 C7 2U14 D10 2U21 D9 2U28 F8 2U35 H11 3U00 B3 3U08 B7 3U15 B5 3U22 C6 3U30 B3 3U37 D6 3U47 E9 3U63 F8 3U74 H1 5U06 C12 6U08 F7 7U07 F7 9U01 F13 FU04 D13 IU00 A10 IU07 B3 IU17 C7 IU30 C5 IU38 D4 IU50 E7 IU60 E8 IU69 E1
1M90 D13 2U01 A5 2U08 B8 2U15 C6 2U22 D11 2U29 F6 2U36 H2 3U01 B4 3U09 B5 3U16 E8 3U23 C6 3U31 D6 3U40 D6 3U48 E7 3U64 F10 3U75 H1 5U07 C12 7U00 C4 7U08 G11 9U02 F14 FU05 D6 IU01 A7 IU08 B6 IU18 C7 IU31 C4 IU39 D4 IU51 E10 IU61 E13 IU70 D2
1U01 C11 2U02 A9 2U09 B9 2U16 C7 2U23 E8 2U30 F10 2U37 H2 3U03 A5 3U10 C6 3U17 B7 3U24 C7 3U32 D4 3U41 E10 3U50 E10 3U68 F8 5U00 A10 6U00 B3 7U01-1 A5 7U09 G12 9U03 H9 FU06 D9 IU02 A5 IU09 D4 IU20 C6 IU33 C5 IU40 D5 IU52 E8 IU62 E13
1U02 C11 2U03 A9 2U10 D9 2U17 D3 2U24 E8 2U31 D3 2U38 H13 3U04 D2 3U11 B7 3U18 E7 3U25 F10 3U33 D5 3U43 E5 3U55 E8 3U69 F9 5U01 B8 6U01 F11 7U01-2 B6 7U13-1 C3 FU00 A12 FU07 E11 IU03 B4 IU11 B3 IU21 C5 IU34 C6 IU43 D6 IU53 E8 IU63 F7
1U11 D13 2U04 A6 2U11 A11 2U18 D6 2U25 B9 2U32 H10 2U39 C12 3U05 B2 3U12 C2 3U19 C6 3U26 D6 3U34 D1 3U44 E10 3U58 E9 3U70 F10 5U02 E8 6U02 F11 7U03-1 C6 7U13-2 B2 FU01 B7 FU10 D14 IU04 E9 IU12 B2 IU26 C5 IU35 C12 IU46 D5 IU54 E7 IU64 F7
1U12 D14 2U05 B4 2U12 D10 2U19 D4 2U26 E7 2U33 F11 2U40 E9 3U06 B5 3U13 C3 3U20 C5 3U27 D7 3U35 E1 3U45 E7 3U59 E10 3U72 D9 5U04 C12 6U04 E7 7U03-2 B6 7U15-1 E10 FU02 C12 FU11 G13 IU05 B3 IU13 B5 IU27 C7 IU36 D6 IU47 E10 IU57 E10 IU65 F11

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

AB01 DC / DC AB01
IU00
IU01 5U00
+12V-DC
10u FU00
7U01-1
* *

22u 35V
A A

2U01

2U41

2U03

2U06

2U02

2U11
7 8

22u

22u

22u

22u

1u0
IU02
2 SI4936ADY

1
12V/3V3 CONVERSION
3U03 2U04

10R IU08 3n3

FU01 5U01
2U00

3U00

3U01
100n

10R
10K
10u

3U09

3U06
4 7U01-2
*

22R

22R
3U30

2U08

2U09

2U25
IU03
BC847BPN

3n3

47u

22u
7U13-2 5 5 6
B IU06 IU05 10K IU13
B

3U11
4 SI4936ADY

22R
6U00

2U05
3

1u0
IU07 3
BAS316

3U08

3U17
22R

6K8
3U05

3U15

3U21
4R7

4R7
10K

IU11 3U07 7U03-2

6 SCL-I2C4
5 6
IU12 100R GND-SIG IU16
2 7U13-1 4 SI4936ADY
5U04
BC847BPN 3
1 7U00 IU35 220R FU02
3U19 IU20 2U15 FU12 1U01

14
3U12

3U13

3U14

IU17
NCP5422ADR2G

IU18
10K

10K

22K

+12V +12VS
Φ

VCC
10R 3n3 3.0A T 5U05
FU03

3U20

3U10

2U13

2U07

100n
4 1

22R

22R

1n0
220R
C BST
GATE
H1
2
IU21 1U02 5U06 C
L1 7U03-1 +12V-DC

IU27
7 IU26 SI4936ADY 220R
1 3U22 4R7 7 8 3.0A T
IU28 16
VFB H2

2U16
10

1n0
2 GATE IU30 3U23 5U07
2

3U24

2U39
IU31 15

1K0

1u0
L2
IU09
8
1
5
IU33 4R7 IU34 1 220R TO
IU38 9
2
COMP +1
-1
6 IU36 3U26 IU37 3U27 SUPPLY
2U17

2U31
100n

1u0

IS 3K3 6K8
IU39 13 12 1M90
ROSC +2 IU40

2U18

3U31
100n
11

6K8
* -2 12V/1V2 CONVERSION 1 +12VS
GND

2
2U19

3U32

1U13
100n

39K

D 3U33 3
D

1U12
3

GND-SIG GND-SIG 4

1U11
6K8 3U36 IU43 3U37 +1V2 5
* FU06 6
3U34

330u 6.3V
* *
10K

IU46 3K3 6K8 FU05 7 8

2U21

2U12

2U14

2U22
2U10
47u

22u

22u

47u
IU70 GND-SIG GND-SIG GND-SIG FU04 FU10
3U04
* SDA-I2C4 B6B-PH-SM4-TBT(LF)
2U20

3U40

3U72

100R
100n

6K8
100R BAS316 5U02
IU69 7U05
*

3U16
BC847BW
3U43 6U04 10u *

3U41

100R
IU48 3U45 3U44 IU47

3U46

3U55

2U24
* 6

22R

22R

6K8

3n3
3K3
3U35

10K

68R IU50 10K

2U40

IU51
2
TO TO

1u0
7U15-1
3U48 BC847BS

IU52
IU53
E 68R 1 SUPPLY AMBILIGHT E

3U50
IU04

1K0
2U26

2U27

2U23

100n
1M09 1M12

1n0
IU54
+12VAL
100n 3U58 IU57 1 1
3 IU62 +12VAL

BAS316
3U18 2 2

6U06

3U47

1% 100R
IU60
10K IU59 FU07 GNDAL
3U59 3 3
7U15-2 5 +2V5 IU61 GNDAL
470R 4 4

2U28
BC847BS

1n0
2K7 5 6 6 5

BZG05C3V3

BZG05C3V3
3U62
2U29

3U63

330u 6.3V
4

IU63

1K0
1u0

3U64

2U33

6U01

6U02
B4B-PH-SM4-TBT(LF) B4B-PH-SM4-TBT(LF)

2K2
470R

9U01

9U02
220R 1%
IU64
* *

2U30

3U25
7U07

1u0
BC817-25W
F F

3U68

3U69
4K7

1% 1K0
*

BZX384-C18
BOOSTER
6U08
*
3U70 1% IU65 3U28
GND-SIG GND-SIG SENSE+2V5
470R 220R 1%
3U73 1%
SENSE+1V2-FPGA
100R

G G
2U34

100p

7U08 7U09
L78M08CDT LD1117DT33C
FU11
+12V-DC 1 3 3 2 +3V3
2U36 IN OUT IN OUT
IU68
COM COM

22u 35V

22u 35V

22u 35V
100p

2U32

2U35

2U38
3U74

1% 470R

3U75

2U37

100n
6K8

1
H GND-SIG GND-SIG GND-SIG H

9U03

GND-SIG
H_16800_010.eps
3139 123 6188.2 180407

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 64

DFI Panel: Video Flow

1F50 C1 2F06 F6 2F0F C6 2F0P B12 2F0Z D12 2F1J F12 2F1T H12 2F82 H6 2F9B B3 2FGK D3 3F57 F5 3F61 B5 3F6A D5 3F7N H11 3F8C B11 3F8M C11 3F8W E11 3F96 D3 3F9U F11 3FHJ G5 5F01 E6 5F0A D6 5F66 E11 FF00 D8 FF0D E9 FF0M D8 FF11 D1 FF1R D14 FF21 D2 FF2A E14 FF2R F8 FF35 F2 FF3E F14 FF48 F1
1F51 F15 2F07 F6 2F0G C6 2F0Q B12 2F1A D12 2F1K F12 2F47 F3 2F83 E3 2F9C B3 2FGL D3 3F58 F5 3F62 C5 3F6B D5 3F7P H11 3F8D B11 3F8N C11 3F8Y E11 3F97 F3 3F9V G11 3FHK G5 5F02 F6 5F0B B6 5F67 F11 FF01 E8 FF0E E9 FF0N D9 FF14 F1 FF1S D14 FF22 D1 FF2B E14 FF2S F8 FF36 F3 FF3F F14 FF49 D1
1F52 F9 2F08 G6 2F0H C6 2F0R B12 2F1B D12 2F1L G12 2F48 G3 2F84 E3 2F9D B3 3F50 D5 3F59 F5 3F63 G5 3F6C D5 3F7Q H11 3F8E B11 3F8P D11 3F8Z E11 3F98 F3 3F9W G11 3FHL H5 5F03 F6 5F59 B11 5F68 F11 FF02 E8 FF0F E8 FF0P D8 FF15 F14 FF1T D14 FF23 D2 FF2C E14 FF2T E8 FF37 F2 FF40 F2
2F00 E6 2F09 G6 2F0I D6 2F0S B12 2F1C E12 2F1M G12 2F49 G3 2F85 E3 2F9E C3 3F51 E5 3F5U A5 3F64 G5 3F70 C5 3F7R H11 3F8F B11 3F8Q D11 3F90 G3 3F9N E11 3F9Y G11 3FHM H5 5F04 G6 5F60 B11 5F69 G11 FF03 E8 FF0G C9 FF0Q D9 FF16 C1 FF1U D14 FF24 D1 FF2D E14 FF2U F8 FF38 F2 FF41 F2
2F01 E6 2F0A G6 2F0J D6 2F0T C12 2F1D E12 2F1N G12 2F4A G3 2F86 E3 2F9F C3 3F52 E5 3F5V B5 3F65 C5 3F71 C5 3F87 C3 3F8G B11 3F8R D11 3F91 D3 3F9P F11 3F9Z G11 3FHN H5 5F05 G6 5F61 C11 5F70 G11 FF04 E8 FF0H D8 FF0R D8 FF1C C14 FF1V D14 FF25 D2 FF2E E14 FF30 E2 FF39 F2 FF42 E1
2F02 E6 2F0B G6 2F0K D6 2F0U C12 2F1E E12 2F1P G12 2F4B G3 2F87 F3 2F9G C3 3F53 E5 3F5W B5 3F66 C5 3F7J G11 3F88 E3 3F8H C11 3F8S D11 3F92 F5 3F9Q F11 3FH7 B3 3FHP H5 5F06 B6 5F62 C11 5F71 H11 FF05 E9 FF0I D8 FF0S D9 FF1D D14 FF1W D14 FF26 E2 FF2F E14 FF31 E2 FF3A E14 FF43 E2
2F03 E6 2F0C B6 2F0L D6 2F0V C12 2F1F E12 2F1Q H12 2F79 H6 2F88 F3 2F9H C3 3F54 E5 3F5Y B5 3F67 C5 3F7K G11 3F89 E3 3F8J C11 3F8T D11 3F93 G5 3F9R F11 3FH8 B3 3FHR H5 5F07 C6 5F63 D11 5F72 H11 FF0A E9 FF0J D9 FF0T C14 FF1E D14 FF1Y D14 FF27 E2 FF2G E14 FF32 E1 FF3B E14 FF44 E2
2F04 F6 2F0D B6 2F0M B6 2F0W C12 2F1G F12 2F1R H12 2F80 H6 2F89 F3 2F9I D3 3F55 E5 3F5Z B5 3F68 D5 3F7L H11 3F8A A11 3F8K C11 3F8U D11 3F94 F5 3F9S F11 3FH9 C3 3FHS H5 5F08 C6 5F64 D11 5F78 H6 FF0B E9 FF0K D8 FF0U C14 FF1F D14 FF1Z D14 FF28 E2 FF2H E14 FF33 E2 FF3C E14 FF46 C9
2F05 F6 2F0E C6 2F0N B6 2F0Y D12 2F1H F12 2F1S H12 2F81 H6 2F9A B3 2F9J D3 3F56 F5 3F60 B5 3F69 D5 3F7M H11 3F8B B11 3F8L C11 3F8V E11 3F95 G5 3F9T F11 3FHI G3 5F00 E6 5F09 D6 5F65 E11 5F79 H6 FF0C E9 FF0L D9 FF10 D1 FF1Q D14 FF20 D1 FF29 F2 FF2Q E14 FF34 E3 FF3D F14 FF47 F1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

AB02 VIDEO-FLOW AB02

A A

3F5U 3F8A
RXEA- TX1A- TXPAN1A- TX3A- TXPAN3A-

1 5F06 4

1 5F59 4

3
RES RES RES

DLW21S

DLW21S
120R 120R

3F5W
3FH7

3F8C
100R

180R

180R
10p 2F9A 2F0C 10p 2F0P 10p
10p 2F9B 2F0D 10p 2F0Q 10p
3F5V 3F8B
RES RXEA+ TX1A+ RES TXPAN1A+ TX3A+ RES TXPAN3A+

2
120R 120R
3F5Y 3F8D
RXEB- TX1B- TXPAN1B- TX3B- TXPAN3B-

1 5F0B 4

1 5F60 4

3
B RES RES RES B

DLW21S

DLW21S
120R 120R

3FH8
100R

180R

180R
3F8F
3F60
10p 2F9C 2F0M 10p 2F0R 10p
10p 2F9D 2F0N 10p 2F0S 10p
RES 3F5Z RES 3F8E RES FI-RE51S-HF
RXEB+ TX1B+ TXPAN1B+ TX3B+ TXPAN3B+

2
120R 120R
FI-RE41S-HF 60 61
50 51 58 59
3F61 48 49 3F8G 56 57
RXEC- TX1C- TXPAN1C- TX3C- TXPAN3C-

1 5F07 4

1 5F61 4

3
RES RES 46 47 RES 54 55

DLW21S

DLW21S
120R 120R
3FH9
100R

180R

180R
3F70
44 45

3F8J
10p 2F9E 2F0E 10p 2F0T 10p 52 53
42 43 SDA-I2C4-DISP 51
10p 2F9F 2F0F 10p 2F0U 10p FF0U
3F62 3F8H SCL-I2C4-DISP 50
RES RXEC+ TX1C+ RES TXPAN1C+ TX3C+ RES TXPAN3C+ FF0T

2
41 49
120R FF46 120R
+12V-SSB

40 48
3F65 39 3F8K 47
C RXECLK- TX1CLK- TXPAN1CLK- 38 TX3CLK- TXPAN3CLK- 46 C

1 5F08 4

1 5F62 4

3
RES RES RES CTRL-DISP4

DLW21S

DLW21S
120R 37 120R 45
CTRL-SSB1
CTRL-SSB2
CTRL-SSB3
CTRL-SSB4

100R

180R

180R
3F87

3F66

3F8L
10p 2F9G 2F0G 10p 36 2F0V 10p CTRL-DISP3 44
10p 2F9H 2F0H 10p 2F0W 10p CTRL-DISP2
3F71 35 3F8M 43
RES RXECLK+ TX1CLK+ RES TXPAN1CLK+ TX3CLK+ RES TXPAN3CLK+ CTRL-DISP1

2
34 42
120R FF0G 33 120R 41
1F50 TXPAN1A- TXPAN3A- FF1C
FF16 3F67 32 3F8N 40
RXED- TX1D- TXPAN1D- TXPAN1A+ FF0H TX3D- TXPAN3D- TXPAN3A+ FF1D
1 31 39

1 5F09 4

1 5F63 4

3
RES RES TXPAN1B- FF0I RES TXPAN3B- FF1E

DLW21S

DLW21S
2 120R 30 120R 38

3F8Q
100R

180R

180R
3F91

3F69
3 10p 2F9I 2F0I 10p TXPAN1B+ FF0J 29 2F0Y 10p TXPAN3B+ FF1F 37
10p 2F9J 2F0J 10p TXPAN1C- FF0K 2F0Z 10p TXPAN3C- FF1Q
4 3F68 28 3F8P 36
FF49 RES RXED+ TX1D+ RES TXPAN1D+ TXPAN1C+ FF0L TX3D+ RES TXPAN3D+ TXPAN3C+ FF1R

2
5 27 35
FF20 120R FF0M 26 120R 34
6
FF10 TXPAN1CLK- TXPAN3CLK- FF1S
7 3F6A 25 3F8R 33
D 8 FF11 RXEE- TX1E- TXPAN1E- TXPAN1CLK+ FF0N
24 TX3E- TXPAN3E- TXPAN3CLK+ FF1T 32 D

1 5F0A 4

1 5F64 4

3
RES RES RES

DLW21S

DLW21S
9 FF21 120R FF0P 23 120R FF1U 31

3F6C
100R

180R

180R
3F8T
3F96

10 10p 2FGK 2F0K 10p TXPAN1D- 22 2F1A 10p TXPAN3D- 30

FF22 10p 2FGL 2F0L 10p TXPAN1D+ FF0Q 2F1B 10p TXPAN3D+ FF1V
11 3F6B 21 3F8S 29
FF23 RES RXEE+ TX1E+ RES TXPAN1E+ TXPAN1E- FF0R TX3E+ RES TXPAN3E+ TXPAN3E- FF1W

2
12 20 28
FF24 120R TXPAN1E+ FF0S 120R TXPAN3E+ FF1Y
13 19 27
FF25 TXPAN1F- FF00 TXPAN3F- FF1Z
14 3F50 18 3F8U 26
FF26 TX1F- TXPAN1F- TXPAN1F+ FF01 TX3F- TXPAN3F- TXPAN3F+ FF2A
15 17 25
1 5F00 4

1 5F65 4

3
RXOA- RES TXPAN2A- FF02 RES TXPAN4A- FF2B

DLW21S

DLW21S
16 FF27 120R 16 120R 24

3F8W
180R

180R
3F51

RES 2F00 10p TXPAN2A+ FF03 2F1C 10p TXPAN4A+ FF2C

17 15 23
100R

3F88

FF44 10p 2F83 2F01 10p TXPAN2B- FF04 2F1D 10p TXPAN4B- FF2D
18 3F52 14 3F8V 22
10p 2F84 TX1F+ RES TXPAN1F+ TXPAN2B+ FF05 TX3F+ RES TXPAN3F+ TXPAN4B+ FF2E

2
19 FF28 FF0A 13 21
RES RXOA+ TXPAN2C- TXPAN4C- FF2F
20 120R 12 120R 20
FF42 TXPAN2C+ FF0B TXPAN4C+ FF2G
21 3F53 11 3F8Y 19
E FF43 TX2A- TXPAN2A- TX4A- TXPAN4A- E
22 FF0C 10 FF2H 18
1 5F01 4

1 5F66 4

3
FF30 RXOB- RES TXPAN2CLK- RES TXPAN4CLK-
DLW21S

DLW21S
23 120R 9 120R 17

3F9N
180R

180R
3F54

RES 2F02 10p TXPAN2CLK+ FF0D 2F1E 10p TXPAN4CLK+ FF2Q

24 FF31 8 16
100R

3F89

10p 2F85 2F03 10p 2F1F 10p

25 3F55 7 3F8Z 15
10p 2F86 TX2A+ RES TXPAN2A+ TXPAN2D- FF0E TX4A+ RES TXPAN4A+ TXPAN4D- FF3A
2

2
26 6 14
FF32 FF33 RES RXOB+ 120R TXPAN2D+ FF0F 120R TXPAN4D+ FF3B
27 5 13
FF34 TXPAN2E- FF2T TXPAN4E- FF3C
28 4 12
FF35 TXPAN2E+ FF2R 3 TXPAN4E+ FF3D 11
29 3F56 3F9P
30 RXOC- TX2B- TXPAN2B- TXPAN2F- FF2U 2 TX4B- TXPAN4B- TXPAN4F- FF3E 10
1 5F02 4

1 5F67 4

3
RES RES TXPAN2F+ FF2S RES TXPAN4F+ FF3F
DLW21S

DLW21S
31 FF37 FF36 120R 1 120R 9

3F9R
100R

180R

180R
3F97

3F57

10p 2F87 2F04 10p 2F1G 10p FF15

32 8
10p 2F88 2F05 10p 1F52 2F1H 10p
33 3F58 3F9Q 7
FF29 RES RXOC+ TX2B+ RES TXPAN2B+ TX4B+ RES TXPAN4B+
2

2
34 FF38 6
120R 120R +VDISP
F
35
36
FF39
FF41 RXOCLK- TX2C-
3F92
TXPAN2C-
TO DISPLAY TX4C-
3F9S
TXPAN4C-
5
4 F
37 3
1 5F03 4

1 5F68 4

3
RES RES RES
DLW21S

DLW21S
38 120R 120R 2

3F9U
100R

180R

180R
3F98

3F94

FF14 FF40 10p 2F89 2F06 10p 2F1J 10p

39 1
FF47 SCL-I2C4-SSB 10p 2F47 2F07 10p 2F1K 10p
40 3F59 3F9T
FF48 SDA-I2C4-SSB RES RXOCLK+ TX2C+ RES TXPAN2C+ TX4C+ RES TXPAN4C+ 1F51
2

2
41
43 42 120R 120R
45 44
47 46 RXOD- TX2CLK-
3F93
TXPAN2CLK- TX4CLK-
3F9V
TXPAN4CLK-
TO DISPLAY
1 5F04 4

1 5F69 4

3
49 48 RES RES RES
DLW21S

DLW21S
120R 120R
100R

180R

3F9Y

180R
3F90

3F64

51 50 10p 2F48 2F08 10p 2F1L 10p

10p 2F49 2F09 10p 2F1M 10p
FI-RE41S-HF RES 3F63 RES 3F9W RES
RXOD+ TX2CLK+ TXPAN2CLK+ TX4CLK+ TXPAN4CLK+
2

2
120R 120R
G 3F95 3F9Z
G
RXOE- TX2D- TXPAN2D- TX4D- TXPAN4D-
1 5F05 4

1 5F70 4

3
RES RES RES
DLW21S

DLW21S
120R 120R
3FHK
100R

180R

3F7K

180R
3FHI

10p 2F4A 2F0A 10p 2F1N 10p

10p 2F4B 2F0B 10p 2F1P 10p
RES 3FHJ RES 3F7J RES
RXOE+ TX2D+ TXPAN2D+ TX4D+ TXPAN4D+
2

2
120R 120R

FROM SSB TX2E-

3FHL
TXPAN2E- TX4E-
3F7L
TXPAN4E-
1 5F78 4

1 5F71 4

3
RES RES
DLW21S

DLW21S
120R 120R
3FHN

3F7N
180R

180R
2F79 10p 2F1Q 10p
2F80 10p 2F1R 10p
3FHM RES 3F7M RES
TX2E+ TXPAN2E+ TX4E+ TXPAN4E+
2

2
120R 120R
H 3FHP 3F7P
H
TX2F- TXPAN2F- TX4F- TXPAN4F-
1 5F79 4

1 5F72 4

3
RES RES
DLW21S

DLW21S
120R 120R
3FHS

3F7Q
180R

180R
2F81 10p 2F1S 10p
2F82 10p 2F1T 10p
3FHR RES 3F7R RES
TX2F+ TXPAN2F+ TX4F+ TXPAN4F+
2

2
120R 120R

H_16800_011.eps
3139 123 6188.2 180407
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 65

DFI Panel: Clock

1 2 3 4 5 6 7 8 9 10 11 12
2FD1 C3
2FD2 C6

AB03 CLOCK AB03

2FD3 F3
2FD4 G5
3F26 C4
3FA9 D4
3FH0 C4
3FH1 C4
3FHV C7
3FHY C7
3FJA F2
A A 3FJB G3
3FJC F6
5F20 B6
5F21 E3
5F22 F6
5F80 B3
7F50 G3
Video-clock RESERVED 7F51 G6
7F85 C3
7F86 C6
+3V3 +3V3 9F08 G3
9F09 G3
B B IF13 F3
IF14 F2
IF29 B3

5F80

5F20
30R

30R
IFC0 C4
IFC1 C4
IF29 IFC3 IFC2 C4
IFC3 B6
7F85 7F86 IFC5 C7
DSO751SV DSO751SV

4
IFC6 C7
1 1
IFC7 G3
IFC8 G3
3FH0 IFC0 3FHV RES IFC5
C C IFC9 F3
2FD1

2FD2
100n

100n
3 CLK-OSC1A 3 CLK-OSC2B
100R 100R IFD1 G6
3FH1 IFC1 3FHY RES IFC6 IFD8 D4
2

2
27M0 CLK-OSC1B 27M0 CLK-OSC2C
100R 100R
3F26 RES IFC2
CLK-OSC1C
100R
3FA9 IFD8
CLK-OSC1D
100R

D D

+3V3
RESERVED +3V3
E E
5F21

30R

5F22
30R
2FD3
100n

IF14 3FJA IF13 IFD1

4
7F51
1K0 50M
F 3
VDD
OUT
F
EOH
1 SS-OFF
IFC9

GND
100n
2FD4

3FJC

33R

2
5

7F50
EPCS4SI8
ASDI

DCLK

CS_

8 SS-OFF
CLK-SYSTEM-SS
SCD

3FJB
GND

IFC8
VCC

4 7 CLK-VIDEO-SS
Φ

G 3
33R
9F08 RES CLK-OSC1C
G
DATA

IFC7

9F09 CLK-VIDEO
2

1F30 1F31 1F32 1F33 1F34 1F35 1F40 1F41 1F42 1F43 1F44 1F45 1F46 1F47 1F48 1F49

H H

H_16800_012.eps
3139 123 6188.2 180407

1 2 3 4 5 6 7 8 9 10 11 12
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 66

DFI Panel: Supply

2F17 B3 2F18 B4 2F19 B3 2F21 B3 7F35 A3 7F36 B3 9F13 A2 IF10 A2 IF1U A3
Personal Notes:
1 2 3 4 5

AB04 SUPPLY AB04

A 7F35 RES
A
LD3985M25
IF10
9F13 1 5 +2V5-STAB
+3V3 IN OUT

2F17 RES
RES
IF1U
3 4
INH BP

RES 2F18
100n

1u0
2F19 RES
COM

100n
2
7F36 RES
B LD1117DT25
B
3 2
+12V IN OUT
COM

2F21

100n
RES

1
C C

D D

H_16800_013.eps
3139 123 6188.2 180407

1 2 3 4 5

E_06532_012.eps
131004
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 67

DFI Panel: FPGA: Power & Control

1 2 3 4 5 6 7 8 9 10 11 12 13 14
1F00 F13 IFA2 B9
1F05 C12 IFA3 C9

AB05 FPGA: POWER + CONTROL

2FGF B5 IFA4 D9

AB05 2FGG B5
2FGH B5
2FGJ B6
2FGM B6
IFA5 C1
IFA6 I10
IFA7 G8
IFA9 G7
2FGN B6 IFB1 C9
2FGP B6 IFB2 C9
RES 2FH1 A2 IFB3 F4
A +1V2
IFA1 5F51
FF3G
+1V2-PLL
A 2FH2 A3
2FH3 A3
IFB4 F4
IFB5 F5
30R 2FH4 A3 IFB6 E6

2FHA
2FH1

2FH2

2FH3

2FH4

2FH5
5F53
2FH5 A4 IFB7 E6

30R

1u0

4u7

10n

10n

10n

10n
5F55 SENSE+1V2-FPGA 2FHA A3 cF01 B5
2FHB B3

cF01
30R
2FHC B3
2FHD B4
5F54 FF3H
+1V2 +1V2-FPGA +3V3
2FHE B4
30R 2FHF B4

330u 6.3V
2FHG B4

100u 4V

2FGM
2FHM

2FGG
2FHG

2FGH

2FGN
2FHC

2FHD

2FHH

2FGP
2FHB

2FHE

2FHK
2FGF
2FHT

2FHF
2FHL

2FGJ
2FHJ
2FJP
4u7
47u

1u0

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n
2FHH B4
B RES B 2FHJ B5

5F52
30R
5F23
+2V5
2FHK B5
30R IFA2 2FHL B2
2FHM B2
5F57 FF3J 2FHN C2
+3V3 +Vin-FPGA 7F30
2FHP C2

2FJK

2FJL
RES EPCS16SI16N

10n

10n
9

1
30R
7F31
VCC
3 2FHQ C3
2FHQ
2FHN

2FHR

2FHS
EPCS4SI8
2FHP

3
4

8
1u0

10n

10n

10n
10n

2FHR C3

2FJJ
NC 5

10n
RES VCC IFA3 2FHS C3
SCD
+2V5
5F24 Φ CS_
1 nCSO nCSO
IFB1
7
CS
6
2FHT B3
30R
2
DATA
SCD DCLK 6 DCLK DCLK 16
DCLK DATA
8 2FJ7 F13
C IFA5
RES
5F58 FF3K ASDI
5 ASDO ASDO
IFB2
15
ASDI
11
ACTIVE SERIAL DEBUG-CONNECTOR C 2FJ8 C2
2FJ9 C2
12
+2V5-STAB
30R
+2V5out-FPGA
GND NC 13
2FJA C3
2FJB C3

4
14 1F05
2FJC C3
2FJC

2FJD
2FJB

2FJE
2FJA

2FJF
2FJ8

2FJ9

GND DCLK
4u7

10n

10n

10n

10n

10n

10n

10n
1
2FJD C3

10
2
3 CONF-DONE 2FJE C3
IFA4 4 +2V5 2FJF C4
DATA0 DATA0 5 nCONFIG
nCE 2FJJ C8
5F25 6
DATA0 2FJK C11
+2V5 7
30R 8 nCSO 2FJL C11
9 ASDO 2FJM F7
RES
D +2V5-STAB
5F26 FF58
+2V5in-FPGA
10 D 2FJN G8
2FJP B3

3F14
5-147279-2

10K
30R
2FLC D2
2FLC

2FLD

2FLE

2FLF

2FLD D2
4u7

10n

10n

10n

2FLE D2
2FLF D3
2FLG H12
2FLH H12
2FLJ H12
2FLK H12
2FLL H12
3F02 G4
E RESERVED
E 3F04 G4
3F05 F10
MP-LED5 3F06 G5
IFB7 3F08 G6
3F10 G6
IFB6
+2V5 +2V5 3F11 F7
MP-LED4
3F14 D13
3F72 H11
IFB5 3F73 I10
MP-LED3
+2V5 +2V5 +2V5 3F74 I10

5F49

5F50
RES

30R

30R
RESERVED 3F75 I11
F MP-LED2
IFB4 +3V3 F 3F76 F7
3F78 F10
3F79 F10

2FJM
100K
3F11

3F76

2FJ7
10K
1u0

10n
+3V3 3F80 G11

3F05

3F78
RES

3F79
1K0

1K0

1K0
IFB3
MP-LED1 3F81 G9
3F82 G11
1F00 3F83 G7
FF59 FF3L

3F81
3F80 100R

10K
TCK 1 3F84 G11
IFA7 FF3M 2
FOR 3F85 G11
470R

470R

470R

470R

470R
3F02

3F04

3F06

3F08

3F10

3F83
3F82 100R
33K
TDO 3
nCONFIG 3F86 G10
FF3N 4

IFA9
3 BC847BS 6 FF3P TMS 3F84 100R
5
6
DEBUG 5F23 B2
5F24 C2
G 5 7F34-2
BC847BS
2 7F34-1
3F85 FF3Q
7
8
G 5F25 D2
5F26 D2
4 1 TDI
SML-310

SML-310

SML-310

SML-310

SML-310

9 5F49 F12

2FJN

1u0
100R 10
5F50 F13
6F31

6F32

6F33

6F34

6F35

FF69

3F86
5-147279-2

1K0
5F51 A2
5F52 B10

2FLG

2FLH

2FLK

2FLL
100p

100p
2FLJ

100p

100p
10n
5F53 A2
5F54 B2
5F55 A2
+3V3 +3V3
5F57 B2
5F58 C2
6F30 I11
H H 6F31 G4
6F32 G4

3F72
3K3
6F33 G5
6F34 G6
6F35 G6
7F30 B10
7F31 C8

SML-310
7F32 I11

6F30
7F34-1 G9
7F34-2 G7

3F73
10K
FF3G A3
FF3H B3
I CONF-DONE 3F74
7F32 I FF3J B3
BC847BW
IFA6 100K FF3K C3

100K

3F75
FF3L G11
FF3M G11
FF3N G11
FF3P G9
FF3Q G11
H_16800_014.eps FF58 D3
3139 123 6188.2 180407 FF59 G7
FF69 G11
IFA1 A1
1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 68

DFI Panel: FPGA: DFI

1 2 3 4 5 6 7 8 9 10 11 12 13 14
2F36 F8
2F37 F10

AB06 FPGA DFI AB06

2F38 F12
2F39 F13
2F40 I8
2F41 I10
2F42 I12
+2V5-DDR2 +2V5-DDR2
2F43 I13
3F40 E1
3F49 E1
A +1V2-PLL +2V5out-FPGA
A 3FA0 E1

V7
V16
T17
V18
E17
F18
E16
F7
F6
F5
V5
U5
Y15
Y8
W19
W13
W10
V17
V6
V3
T20
T13
T10
7F18-1 7F18-2
EP2C35F484C7N 3FA1 E3
EP2C35F484C7N

U17
E5
F17
U6
U16
E6
F16
U7
Y11
W6
V10
T9
AB2
Y12
W17
V13
T14
AB21
T19
P16
M20
3FA2 E3

GNDD_PLL4
GNDG_PLL4
GNDG_PLL2
GNDD_PLL2

GNDD_PLL3
GNDG_PLL3
GNDG_PLL1
GNDD_PLL1
GND81
GND80
GND79
GND78
GND77
GND76
GND75
GND74
GND73
GND72
GND71
GNDA_PLL1
GNDA_PLL4

GNDA_PLL2
GNDA_PLL3
3FA4 F3
+1V2-FPGA

VCCD_PLL4
VCCD_PLL3
VCCD_PLL2
VCCD_PLL1
VCCA_PLL4
VCCA_PLL3
VCCA_PLL2
VCCA_PLL1
VCCIO8_5
VCCIO8_4
VCCIO8_3
VCCIO8_2
VCCIO8_1
VCCIO7_5
VCCIO7_4
VCCIO7_3
VCCIO7_2
VCCIO7_1
VCCIO6_4
VCCIO6_3
VCCIO6_2
3FA5 F3
G11 R3
G15
GND1 GND70
N19 3FA6 F3
GND2 GND69 3FA7 H7
G7
VCCINT1 VCCIO6_1
AA22 H9
GND3 GND GND68
N16
G8
VCCINT2 VCCIO5_4
L20 H10
GND4 GND67
N7 3FA8 E3
G12
VCCINT3 VCC VCCIO5_3
J16
+2V5out-FPGA
H11
GND5 GND66
M4 3FAA F4
G16 G19 H14 K19
VCCINT4 VCCIO5_2 GND6 GND65 7F18-1 A4
H7 B22 H15 K16
H8
VCCINT5 VCCIO5_1
G14 J8
GND7 GND64
K7 7F18-10 G12
VCCINT6 VCCIO4_5 GND8 GND63 7F18-2 A8
H12 E13 J9 K3
B H13
H16
VCCINT7
VCCINT8
VCCIO4_4
VCCIO4_3
D17
C12
J14
J15
GND9
GND10
GND62
GND61
H20
G13
B 7F18-3 E2
VCCINT9 VCCIO4_2 GND11 GND60 7F18-4 E5
J10 A21 K10 G10
VCCINT10 VCCIO4_1 +2V5-DDR1 GND12 GND59 7F18-5 E8
J11 G9 K11 G4
VCCINT11 VCCIO3_5 GND13 GND58 7F18-6 E12
J12 E10 K12 F19
VCCINT12 VCCIO3_4 GND14 GND57 7F18-7 G2
J13 C11 K13 D18
VCCINT13 VCCIO3_3 GND15 GND56
K8
VCCINT14 VCCIO3_2
C6 K15
GND16 GND55
D13 7F18-8 G5
K9 A2 L10 D10 7F18-9 G8
VCCINT15 VCCIO3_1 GND17 GND54
K14 L3 L11 C15
VCCINT16 VCCIO2_3 GND18 GND53 9F00 H14
L7 J7 L12 C8
VCCINT17 VCCIO2_2 +2V5in-FPGA GND19 GND52 9F01 G1
L8 B1 L13 C5
VCCINT18 VCCIO2_1 GND20 GND51 9F02 E8
L9 T4 L15 B21
VCCINT19 VCCIO1_4 GND21 GND50
L14
VCCINT20 VCCIO1_3
P7
+Vin-FPGA
M7
GND22 GND49
B2 9F03 G1
L16 M3 M8 AB22 9F04 H7
C VCCINT21 VCCIO1_2
VCCIO1_1
AA1
GND23 GND48
GND47
AB1 C 9F05 I7

VCCINT22
VCCINT23
VCCINT24
VCCINT25
VCCINT26
VCCINT27
VCCINT28
VCCINT29
VCCINT30
VCCINT31
VCCINT32
VCCINT33
VCCINT34
VCCINT35
VCCINT36
VCCINT37
VCCINT38
VCCINT39
VCCINT40
VCCINT41
VCCINT42
9F06 I7

GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
9F07 H14
IF01 F3

AA21
IF02 E5

M14
M15

M10
M11
M12
M13
M16

AA2
N14
N15

R10
R12
R15
R16

N10
N11
N12
N13

R11
R13
R14
P10
P11
P12
P13
P14

P15

A22
T12
T15

T11
T16
M9

N9

R7
R8

N8

R9
P8
P9

A1
T7
T8
IF03 F13
IF04 I3
IF05 H5
+1V2-FPGA IF06 F3
IF15 E4
IF16 E4
D D IF26 H5
IF27 I5
IF31 I7
IF36 G8
IF38 E14
IF39 G14
1K0
1K0

7F18-4 IF40 H8
EP2C35F484C7N IF41 F10
RES

7F18-5 7F18-6
7F18-3 EP2C35F484C7N EP2C35F484C7N
EP2C35F484C7N ASDO C4 BANK2 F1
RES
3F40

RXEE+
3FA8

nCSO C3
IO1|ASDO IO23|LVDS35p
F2 RXEE- D12 BANK3 B7 MM1-D17 MM1-CLK- C18
BANK4 E14
M1
BANK1 U1 RXEB+ D3
IO2|nCSO IO24|LVDS35n
H3 PLL2-OUT 9F02 E12
CLK10|LVDSCLK5n IO16|LVDS59n
A7 MM1-D18 C17
IO1|LVDS94n IO17|LVDS80n
D14
IF38
MM1-D4
CLK-OSC1B CLK2|LVDSCLK1p IO20|LVDS12p COLOR0 IO3|LVDS48p IO25|VREFB2N1 CLK11|LVDSCLK5p IO17|LVDS59p MM1-CLK+ IO2|LVDS94p IO18|LVDS80p
CLK-OSC2B M2 U2 COLOR1 RXEB- D4 G1 MM1-A4 B11 F9 MM1-D23 MM1-D13 B20 F14 MM1-D5
E MP-LED1 M5
M6
CLK3|LVDSCLK1n
IO1|LVDS25p
IO21|LVDS12n
IO22|LVDS10p
R5
R6
COLOR8 IF02
D5
D6
IO4|LVDS48n
IO5|PLL3_OUTp
IO26|LVDS30p
IO27|LVDS30n
G2
J6
MM1-DQS3
MM1-D29
A11
E11
IO1|LVDS70n
IO2|LVDS70p
IO18|LVDS58n
IO19|LVDS58p
E8
D8
MM1-D21
MM1-D19
MM1-D14 A20
B19
IO3|LVDS93n
IO4|LVDS93p
IO19|LVDS79n
IO20|LVDS79p
F13
B16
MM1-D6
MM1-D0
E
MM1-CKE IO2|LVDS25n IO23|LVDS10n COLOR9 IO6|PLL3_OUTn IO28|LVDS29p IO3|LVDS69n IO20|LVDS57n MM1-D15 IO5|LVDS92n IO21|LVDS78n
CTRL1-IN N1 V1 3FA1 100R IF15 SS-S0 RXED+ E3 J5 MM1-D27 D11 C9 MM1-D20 MM1-D12 A19 A16 MM1-D1
IO3|LVDS24p IO24|LVDS8p IF16 IO7|LVDS47p IO29|LVDS29n IO4|LVDS69p IO21|LVDS57p IO6|LVDS92p IO22|LVDS78p
CTRL2-IN N2 V2 3FA2 100R SS-S1 RXED- E4 H1 RXOC+ MM1-D28 B10 D7 MM1-D22 MM1-A11 B18 B15 MM1-D2
IO4|LVDS24n IO25|LVDS8n IO8|LVDS47n IO30|LVDS28p IO5|LVDS68n IO22|LVDS56p IO7|LVDS91n IO23|LVDS77n
SCL-I2C4 3F49 47R P1 T5 COLOR5 RXEA+ C1 H2 RXOC- MM1-D25 A10 F8 MM1-D16 MM1-A12 A18 A15 MM1-D3
IO5|LVDS23p IO26|LVDS7p IO9|LVDS46p IO31|LVDS28n IO6|LVDS68p IO23 IO8|LVDS91p IO24|LVDS77p
SDA-I2C4 3FA0 47R P2 T6 MM2-CKE RXEA- C2 J3 MM1-D26 F11 E7 MM1-A0 VREF-FPGA1 C16 C13
IO6|LVDS23n IO27|LVDS7n IO10|LVDS46n IO32|LVDS27p IO7|LVDS67n IO24|LVDS54p IO9|VREFB4N0 IO25|VREFB4N1 VREF-FPGA1
MP-LED4 N6 T3 COLOR4 F4 J4 MM1-D24 F10 C7 VREF-FPGA1 MM1-D11 D16 F12 MM1-D7
IO7|LVDS22p IO28 IO11|VREFB2N0 IO33|LVDS27n IO8|LVDS67p IO25|VREFB3N1 IO10|LVDS89n IO26|LVDS75n
N5 U3 RXOA+ G6 J1 RXOD+ VREF-FPGA1 C10 B6 MM1-BA1 MM1-D10 E15 B14 MM1-A6
IO8|LVDS22n IO29|VREFB1N1 IO12|LVDS43p IO34|LVDS26p IO9|VREFB3N0 IO26|LVDS52n IO11|LVDS89p IO27|LVDS73n
MP-LED2 N3 W1 SCL-AMBI-3V3 RXOA- G5 J2 RXOD- MM1-D31 B9 A6 MM1-A10 MM1-D9 D15 A14 MM1-A7
IO9|LVDS20p IO30|LVDS6p IO13|LVDS43n IO35|LVDS26n IO10|LVDS65n IO27|LVDS52p IO12|LVDS85n IO28|LVDS73p
MP-LED3 N4 W2 100R 3FA6 SDA-AMBI-3V3 F3 K5 TDI MM1-D30 A9 B5 IF41 MM1-D8 C14 B13 MM1-A5
IO10|LVDS20n IO31|LVDS6n 100R 3FA5 IO14 TDI IO11|LVDS65p IO28|LVDS51n IO13|LVDS85p IO29|LVDS71n
P3 Y1 CTRL1-FPGA RXEC+ D1 K2 TCK MM1-A3 E9 A5 MM1-BA0 MM1-A8 F15 A13 MM1-DQS0
IO11|VREFB1N0 IO32|LVDS5p IO15|LVDS39p TCK IO12|LVDS62n IO29|LVDS51p IO14|LVDS84p IO30|LVDS71p IF03
COLOR-CLK P5 Y2 CTRL2-FPGA RXEC- D2 K6 TMS MM1-A2 D9 B4 MM1-RAS MM1-A9 B17 B12 CLK-SYSTEM-SS
IO12|LVDS18p IO33|LVDS5n IO16|LVDS39n TMS IO13|LVDS62p IO30|LVDS50n IO15|LVDS82n CLK8|LVDSCLK4n
MP-LED5 P6 W3 IF06 RXOB+ G3 L5 TDO MM1-A1 B8 A4 MM1-CS0 MM1-DQS1 A17 A12 CLK-OSC1A
IO13|LVDS18n IO34|LVDS2p IO17|LVDS38p TDO IO14|LVDS60n IO31|LVDS50p IO16|LVDS82p CLK9|LVDSCLK4p
COLOR6 R1 W4 3FA4 100R SS-OFF RXOB- H4 L6 DCLK MM1-DQS2 A8 A3 MM1-CAS
F COLOR7 R2
T1
IO14|LVDS17p
IO15|LVDS17n
IO35|LVDS2n
IO36|LVDS0p
Y3
Y4
CTRL3-FPGA
CTRL4-FPGA
RXOE+
RXOE-
H5
H6
IO18|LVDS38n
IO19|LVDS37p
DCLK|DCLK
DATA0|DATA0
K4
K1
DATA0
IO15|LVDS60p IO32|LVDS49p
IO33|LVDS49n
B3 MM1-WE F
COLOR2 IO16|LVDS14p IO37|LVDS0n IO20|LVDS37n nCE nCE

2F36

2F38

2F39
COLOR3 T2 W5 LCD-PWR-ON RXECLK+ E1 L1 RXOCLK+

1n0

1n0

1n0
IO17|LVDS14n IO38 IO21|LVDS36p CLK0|LVDSCLK0p

2F37
P4 U4 RXECLK- E2 L2

1n0
IO18|LVDS13p IO39|PLL1_OUTp CLK-VIDEO-PLL IO22|LVDS36n CLK1|LVDSCLK0n RXOCLK-
R4 V4 IF01 L4 nCONFIG
IO19|LVDS13n IO40|PLL1_OUTn 3FAA nCONFIG
CLK-VIDEO
33R

G G
7F18-10
7F18-7 7F18-8 EP2C35F484C7N
EP2C35F484C7N EP2C35F484C7N 7F18-9
EP2C35F484C7N MM2-A12 AA3
BANK8 Y9 MM2-DQS1
PLL2-OUT 9F03 L21
BANK5 F21 TX2B- Y18 BANK6 R19 TX3E+ MM2-A11 AB3
IO1|LVDS188n IO19|LVDS177p
W9 MM2-A4
CLK-VIDEO-SS 9F01 L22
CLK5|LVDSCLK2n IO20|LVDS107n
F22 TX2B+ TX4F- V19
IO1 IO22|LVDS130p
P17 TX3D- IF36 W12
BANK7 AB17 MM2-DQS2 MM2-CLK+ AB4
IO2|LVDS188p IO20|LVDS177n
U9
CLK4|LVDSCLK2p IO21|LVDS107p IO2|LVDS142n IO23|LVDS129n CLK13|LVDSCLK6p IO15|LVDS155p IO3|LVDS187p IO21|LVDS175p IF39
TX3F- RES L19 H18 TX1F- TX4F+ W20 P18 TX3D+ V12 AA17 MM2-RAS MM2-CLK- AA4 U10 MM2-A3
IO1|LVDS120n IO22|LVDS106n IO3|LVDS142p IO24|LVDS129p CLK12|LVDSCLK6n IO16|LVDS155n IO4|LVDS187n IO22|LVDS175n
TX3F+ L18 H17 TX1F+ TX4E- Y19 T21 TX3CLK- MM2-DQS3 AB12 U14 MM2-BA1 MM2-A7 Y5 AB8 MM2-D1
IO2|LVDS120p IO23|LVDS106p IO4|LVDS141n IO25|LVDS127n IO1|LVDS166p IO17|LVDS153p IO5|LVDS186p IO23|LVDS172p
TX2D- K21 E21 TX1CLK- TX4E+ Y20 T22 TX3CLK+ MM2-A1 AA12 Y14 MM2-D23 MM2-A6 Y6 AA8 MM2-D0
IO3|LVDS119n IO24|LVDS104n IO5|LVDS141p IO26|LVDS127p IO2|LVDS166n IO18|LVDS152p IO6|LVDS186n IO24|LVDS172n
TX2D+ K22 E22 TX1CLK+ W18 R21 TX3C- AB13 W15 MM2-D22 MM2-A8 AB5 Y10 VREF-FPGA2
IO4|LVDS119p IO25|LVDS104p IO6 IO27|LVDS126n IF40 IO3|LVDS164p IO19|LVDS152n IO7|LVDS185p IO25|VREFB8N0
TX2CLK- J21 D21 TX1C- IF05 U18 R22 TX3C+ MM2-A0 AA13 AB18 MM2-D19 MM2-A9 AA5 AB9 MM2-D3
IO5|LVDS118n IO26|LVDS103n IO7|PLL4_OUTn IO28|LVDS126p IO4|LVDS164n IO20|LVDS148p IO8|LVDS185n IO26|LVDS170p
TX2CLK+ J22 D22 TX1C+ T18 R20 MM2-D26 U13 AA18 MM2-D18 VREF-FPGA2 Y7 AA9 MM2-D2
IO6|LVDS118p IO27|LVDS103p IF26 IO8|PLL4_OUTp IO29|VREFB6N0 IO5|LVDS162n IO21|LVDS148n IO9|VREFB8N1 IO27|LVDS170n
L17 G17 TX1E- TX4B- U19 P20 VREF-FPGA2 Y13 Y16 VREF-FPGA2 MM2-A5 U8 W11 MM2-D6
H K17
H21
IO7|LVDS117n
IO8|LVDS117p
IO28|LVDS102n
IO29|LVDS102p
G18
G20
TX1E+ TX4B+ V20
U20
IO9|LVDS140n
IO10|LVDS140p
IO30|LVDS124n
IO31|LVDS124p
P19
P21
3FA7
MM2-D24
MM2-D27
AB14
AA14
IO6|VREFB7N1
IO7|LVDS160p
IO22|VREFB7N0
IO23|LVDS146p
U15
V15
MM2-CS0
MM2-BA0
MM2-D14
MM2-D13
AB6
AA6
IO10|LVDS183p
IO11|LVDS181p
IO28|LVDS169p
IO29|LVDS169n
V11
AB10
MM2-D7
MM2-D4
H
IO9|LVDS116n IO30|VREFB5N0 IO11|VREFB6N1 IO32|LVDS123n +3V3 IO8|LVDS160n IO24|LVDS146n IO12|LVDS181n IO30|LVDS168p
H22 E20 TX2A- TX4CLK- W21 P22 MM2-D25 AB15 Y17 MM2-D21 MM2-D10 V8 AA10 MM2-D5
IO10|LVDS116p IO31|LVDS100n IO12|LVDS137n IO33|LVDS123p 10K IO9|LVDS159p IO25|LVDS145p IO13|LVDS180p IO31|LVDS168n
K18 F20 TX2A+ TX4CLK+ W22 N20 nSTATUS MM2-D28 AA15 W16 MM2-D20 MM2-D11 W7 AB11 MM2-DQS0
IO11 IO32|LVDS100p IO13|LVDS137p nSTATUS IO10|LVDS159n IO26|LVDS145n IO14|LVDS180n IO32|LVDS167p
TX2F- J20 C21 TX1A- R17 N18 CONF-DONE MM2-D30 AB16 AB19 MM2-D17 MM2-D9 W8 AA11 MM2-A2
IO12|LVDS114n IO33|LVDS99n IO14|LVDS135p CONF_DONE IO11|LVDS158p IO27|LVDS144p IO15|LVDS179p IO33|LVDS167n
TX2F+ H19 C22 TX1A+ TX4D- Y21 N17 MSEL1 MM2-D31 AA16 AA19 MM2-D16 MM2-D8 V9 U11 9F07 CLK-VIDEO-PLL
IO13|LVDS114p IO34|LVDS99p IO15|LVDS133n MSEL1 IO12|LVDS158n IO28|LVDS144n IO16|LVDS179n CLK15|LVDSCLK7p
K20 C19 TX1B- TX4D+ Y22 M17 9F04 MM2-D29 W14 AB20 MM2-CAS MM2-D12 AB7 U12 9F00 CLK-VIDEO-SS
IO14|VREFB5N1 IO35|LVDS96n IO16|LVDS133p MSEL0 IO13|LVDS157p IO29|LVDS143p IO17|LVDS178p CLK14|LVDSCLK7n
TX2E- J19 C20 TX1B+ TX4C- V21 N21 TX3B- MM2-A10 V14 AA20 MM2-WE MM2-D15 AA7
IO15|LVDS111n IO36|LVDS96p IO17|LVDS132n IO34|LVDS122n IO14|LVDS157n IO30|LVDS143n IO18|LVDS178n
TX2E+ J18 D19 TX1D- TX4C+ V22 N22 TX3B+
IO16|LVDS111p IO37|LVDS95n IO18|LVDS132p IO35|LVDS122p
J17 D20 TX1D+ TX4A- U21 M19 TX3A-
IO17 IO38|LVDS95p IO19|LVDS131n IO36|LVDS121n

100n

100n
2F42
TX2C- G21 E19 PLL2-OUT TX4A+ U22 M18 TX3A+

2F43
IO18|LVDS109n IO39|PLL2_OUTp IO20|LVDS131p IO37|LVDS121p
2F40

2F41
100n

100n
TX2C+ G22 E18 TX3E- R18 M21
IO19|LVDS109p IO40|PLL2_OUTn IO21|LVDS130n CLK7|LVDSCLK3n
IF04 IF27 M22 IF31
CLK6|LVDSCLK3p
I I
9F05

9F06
RES

+3V3

H_16800_015.eps
3139 123 6188.2 180407

1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 69

DFI Panel: DDR A

1 2 3 4 5 6 7 8 9 10 11 12
2F5A B2
2F5B B2

AB07 DDR A AB07

2F5C B5
2F5D B5
2F5E B5
2F5F B5
2F5G B7
2F5H B7
A A 2F5J B7
2F5K B8
2F5L B10
2F5M B11
2F5N C10
2F5P C2
+2V5-DDR1 +2V5-DDR1

2F5A

2F5B
+2V5-DDR1 +2V5-DDR1 2F5Q G4

10n

10n

2F5M
2F5L
2F5R G4

10n

10n
2F5G

2F5H

2F5K
2F5J
10n

10n

10n

10u
2F5S G4
2F5T H3

2F5D
7CA3

2F5E

2F5F
2F5C

10n

10n

10n

10u
7CA2

18

33

15

55

61

61

55

15

33

18
EDD1216AATA-5B-E EDD1216AATA-5B-E 2F5U H3

1
B MM1-A0 29
0
VDD
Φ
VDDQ 14
17
14
17
VDDQ
Φ
VDD
0
29 MM1-A0
B 2F5W H4
2F5Y H4
MM1-A1 30 19 19 30 MM1-A1
1 DDR DDR 1 2F5Z H5
MM1-A2 31 25 25 31 MM1-A2
32
2 SDRAM NC 43 43 NC SDRAM 2
32 2F6A H5
MM1-A3 3 3 MM1-A3
MM1-A4 35 2Mx16 50 50 2Mx16 35 MM1-A4 2F6B H5
4 4
MM1-A5 36
5
53 53
5
36 MM1-A5 2F6C H6
MM1-A6 37 42 MM1-A12 MM1-A12 42 37 MM1-A6 2F6D H6
6 A A 6
MM1-A7 38 38 MM1-A7
7 3F4G 3F5B 7 2F6E G6
MM1-A8 39 2 DQ1(0) DQ1(0) 22R MM1-D3 MM1-D16 22R DQ1(16) DQ1(16) 2 39 MM1-A8
MM1-A9 40
8 0
4 DQ1(1) DQ1(1) 3F4H 22R 3F5C 22R 4
0 8
40 2F6F G6
9 1 MM1-D2 MM1-D17 DQ1(17) DQ1(17) 1 9 MM1-A9
MM1-A10 28 5 DQ1(2) DQ1(2) 3F4J 22R MM1-D1 MM1-D18 3F5D 22R DQ1(18) DQ1(18) 5 28 MM1-A10 2F6G G6
10 2 2 10
MM1-A11 41
11 3
7 DQ1(3) DQ1(3) 3F4K 22R MM1-D0 MM1-D19 3F5E 22R DQ1(19) DQ1(19) 7
3 11
41 MM1-A11 2FLM H6
8 DQ1(4) DQ1(4) 3F4L 22R MM1-D4 MM1-D20 3F5F 22R DQ1(20) DQ1(20) 8 2FLN H7
AP 4 4 AP
C MM1-BA0 26
5
10
11
DQ1(5)
DQ1(6)
DQ1(5)
DQ1(6)
3F4M
3F4N
22R
22R
MM1-D5
MM1-D6
MM1-D21
MM1-D22
3F5G
3F5H
22R
22R
DQ1(21)
DQ1(22)
DQ1(21)
DQ1(22)
10
11
5
26 MM1-BA0
C 2FLP H7
MM1-BA1 27
0
BA
6
13 DQ1(7) DQ1(7) 3F4P 22R MM1-D7 MM1-D23 3F5J 22R DQ1(23) DQ1(23) 13
6
BA
0
27 MM1-BA1
2FLR H7
1 D 7 3F4Q 3F5K 7 D 1 2FLS H8
54 DQ1(8) DQ1(8) 22R MM1-D8 MM1-D24 22R DQ1(24) DQ1(24) 54
8 8
20
L
56 DQ1(9) DQ1(9) 3F4R 22R MM1-D9 MM1-D25 3F5L 22R DQ1(25) DQ1(25) 56
L
20 2FLT H8
9 3F4S 3F5M 9
47 DM 57 DQ1(10) DQ1(10) 22R MM1-D10 MM1-D26 22R DQ1(26) DQ1(26) 57 DM 47 2FLU H8
2F5P U 10 10 U
59 DQ1(11) DQ1(11) 3F4T 22R MM1-D11 MM1-D27 3F5N 22R DQ1(27) DQ1(27) 59 2F5N 100n
VREF-DDR1 100n 11 3F4U 3F5P 11 2FLV H8
49 60 DQ1(12) DQ1(12) 22R MM1-D12 MM1-D28 22R DQ1(28) DQ1(28) 60 49
VREF 12 12 VREF VREF-DDR1 3F4A D2
62 DQ1(13) DQ1(13) 3F4V 22R MM1-D13 MM1-D29 3F5Q 22R DQ1(29) DQ1(29) 62
13 3F4W 3F5R 13 3F4B F3
MM1-CLK- 46 63 DQ1(14) DQ1(14) 22R MM1-D14 MM1-D31 22R DQ1(30) DQ1(30) 63 46 MM1-CLK-
CLK 14 14 CLK
45
CLK
65 DQ1(15) DQ1(15) 3F4Y 22R MM1-D15 MM1-D30 3F5S 22R DQ1(31) DQ1(31) 65
CLK
45 3F4C G3
15 15
220R 3F4A

44 44 3F4D F7
CKE CKE

220R
3F4F
24 16 DQS10 DQS10 3F4Z 22R MM1-DQS0 MM1-DQS2 3F5T 22R DQS12 DQS12 16 24
CS L 3F5A 3F6D 22R L CS 3F4E G7
23 DQS 51 DQS11 DQS11 22R MM1-DQS1 MM1-DQS3 DQS13 DQS13 51 DQS 23
RAS U U RAS 3F4F D10
D MM1-CLK+
22
21
CAS
WE
CAS
WE
22
21 MM1-CLK+
D 3F4G C5
VSSQ VSSQ
3F4H C5
VSS VSS
MM1-CKE 3F4J C5
34

48

66

12

52

58

64

64

58

52

12

66

48

34
MM1-CS0 3F4K C5
MM1-RAS
MM1-CAS
3F4L C5
MM1-WE 3F4M C5
MM1-CKE 3F4N C5
MM1-CS0 3F4P C5
MM1-RAS 3F4Q C5
MM1-CAS
3F4R C5
MM1-WE 3F4S C5
E E 3F4T C5
3F4U D5
3F4V D5
3F4W D5
3F4Y D5
3F4Z D5
3F5A D5
3F5B C7
3F5C C7
3F5D C7
3F5E C7
+2V5-DDR1 3F5F C7
+2V5-DDR1
F F 3F5G C7
3F5H C7

3F4D

560R
3F5J C7
3F4B

560R

3F5K C7
IFD4 FF56 3F5L C7
VREF-DDR1 VREF-FPGA1 3F5M C7
3F5N C7

2F6G
3F5P D7
2F5Q
3F4C

2F5R
560R

2F5S

2F6E

3F4E

560R
2F6F
100p

100n

100n

100p
1u0

1u0

3F5Q D7
3F5R D7
3F5S D7
3F5T D7
G G 3F6D D7
5F27 H4
5F28 H4
7CA2 B3
7CA3 B10
FF56 F6
5F27 IFD5 IFD4 F4
+2V5 +2V5-DDR1 IFD5 H4
220R cF02 H2
22u 16V

5F28
2FLM
2F6C

2F6D

2FLN

2FLR

2FLU
2F6A

2F6B

2FLP

2FLS
2F5Z

2FLV
330u 6.3V

2FLT
10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n
2F5U
2F5T
cF02

100n

RES 220R
H H
2F5W

2F5Y
10n

10n

SENSE+2V5

I I

H_16800_016.eps
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1 2 3 4 5 6 7 8 9 10 11 12
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 70

DFI Panel: DDR B

1 2 3 4 5 6 7 8 9 10 11 12
2CBC B5

AB08 DDR B AB08

2CBD B5
2CBH B7
2CBK B7
2FGA H7
2FGB H7
2FGC H8
A A 2FGD H8
2FGE H8
2FLW H6
2FLY H6
2FLZ H7
+2V5-DDR2 +2V5-DDR2 +2V5-DDR2 2V00 C2

2V39

2V42
+2V5-DDR2

10n

10n
2V01 C10

2V50

2V51
10n

10n
2CBH

2CBK
2V43

2V44
2V03 H3

10n

10n

10n

10u
2V04 H4

2V40

2CBC

2CBD
2V41
7CA1

10n

10n

10n

10u
7CA0 2V05 H4

18

33

15

55

61

61

55

15

33

18
EDD1216AATA-5B-E EDD1216AATA-5B-E

1
14 14
2V33 G4
VDD VDDQ VDDQ VDD
B MM2-A0
MM2-A1
29
30
0 Φ 17
19
17
19
Φ 0
29
30
MM2-A0
MM2-A1
B 2V34 H4
2V35 H3
MM2-A2 31
1 DDR 25 25 DDR 1
31 MM2-A2 2V39 B2
2 SDRAM SDRAM 2
MM2-A3 32 NC 43 43 NC 32 MM2-A3 2V40 B4
3 3
MM2-A4 35
4 2Mx16 50 50 2Mx16 4
35 MM2-A4
2V41 B5
MM2-A5 36 53 53 36 MM2-A5
5 5 2V42 B2
MM2-A6 37 42 MM2-A12 MM2-A12 42 37 MM2-A6
6 A A 6
MM2-A7 38
7 7
38 MM2-A7 2V43 B7
MM2-A8 39 2 DQ2(0) DQ2(0) 3CA0 22R MM2-D3 MM2-D16 3CB8 22R DQ2(16) DQ2(16) 2 39 MM2-A8 2V44 B7
8 0 3CA1 3CB9 0 8
MM2-A9 40 4 DQ2(1) DQ2(1) 22R MM2-D2 MM2-D17 22R DQ2(17) DQ2(17) 4 40 MM2-A9 2V45 G3
9 1 1 9
MM2-A10 28 5 DQ2(2) DQ2(2) 3CA2 22R MM2-D1 MM2-D18 3CC0 22R DQ2(18) DQ2(18) 5 28 MM2-A10
41
10 2
7 3CA3 22R 3CC1 22R 7
2 10
41
2V46 G4
MM2-A11 11 3 DQ2(3) DQ2(3) MM2-D0 MM2-D19 DQ2(19) DQ2(19) 3 11 MM2-A11
8 DQ2(4) DQ2(4) 3CA4 22R MM2-D4 MM2-D20 3CC2 22R DQ2(20) DQ2(20) 8 2V50 B10
AP 4 4 AP
10 DQ2(5) DQ2(5) 3CA5 22R MM2-D5 MM2-D21 3CC3 22R DQ2(21) DQ2(21) 10 2V51 B10
5 5
C MM2-BA0
MM2-BA1
26
27
0
BA
6
11
13
DQ2(6)
DQ2(7)
DQ2(6)
DQ2(7)
3CA6
3CA7
22R
22R
MM2-D6
MM2-D7
MM2-D22
MM2-D23
3CC4
3CC5
22R
22R
DQ2(22)
DQ2(23)
DQ2(22)
DQ2(23)
11
13
6
BA
0
26
27
MM2-BA0
MM2-BA1
C 2V52 H5
2V53 H5
1 D 7 3CA8 3CC6 7 D 1
54 DQ2(8) DQ2(8) 22R MM2-D8 MM2-D24 22R DQ2(24) DQ2(24) 54
20
8
56 3CA9 22R 3CC7 22R 56
8
20
2V54 H6
L DQ2(9) DQ2(9) MM2-D9 MM2-D25 DQ2(25) DQ2(25) L
9 3CB0 3CC8 9 2V55 H6
47 DM 57 DQ2(10) DQ2(10) 22R MM2-D10 MM2-D26 22R DQ2(26) DQ2(26) 57 DM 47
U 10 10 U
2V00 100n 59 DQ2(11) DQ2(11) 3CB1 22R MM2-D11 MM2-D27 3CC9 22R DQ2(27) DQ2(27) 59 2V01 100n 3CA0 C5
11 3CB2 3CD0 11
VREF-DDR2 49 60 DQ2(12) DQ2(12) 22R MM2-D12 MM2-D28 22R DQ2(28) DQ2(28) 60 49 3CA1 C5
VREF 12 3CB3 3CD1 12 VREF VREF-DDR2
62 DQ2(13) DQ2(13) 22R MM2-D13 MM2-D29 22R DQ2(29) DQ2(29) 62 3CA2 C5
13 3CB4 3CD2 13
MM2-CLK- 46 63 DQ2(14) DQ2(14) 22R MM2-D14 MM2-D31 22R DQ2(30) DQ2(30) 63 46 MM2-CLK-
45
CLK 14
65 3CB5 22R 3CD3 22R 65
14 CLK
45 3CA3 C5
CLK DQ2(15) DQ2(15) MM2-D15 MM2-D30 DQ2(31) DQ2(31) CLK
15 15 3CA4 C5
220R 3CE2

44 44
CKE CKE

3CE1

220R
24 16 DQS20 DQS20 3CB6 22R MM2-DQS0 MM2-DQS2 3CD4 22R DQS22 DQS22 16 24 3CA5 C5
CS L 3CB7 3CD5 22R L CS
23 DQS 51 DQS21 DQS21 22R MM2-DQS1 MM2-DQS3 DQS23 DQS23 51 DQS 23 3CA6 C5
RAS U U RAS
22 22 3CA7 C5
CAS CAS
D MM2-CLK+ 21
WE WE
21 MM2-CLK+ D 3CA8 C5
VSS VSSQ VSSQ VSS 3CA9 C5
MM2-CKE
3CB0 C5
34

48

66

12

52

58

64

64

58

52

12

66

48

34
MM2-CS0
MM2-RAS 3CB1 C5
MM2-CAS 3CB2 C5
MM2-WE
3CB3 D5
MM2-CKE
MM2-CS0 3CB4 D5
MM2-RAS 3CB5 D5
MM2-CAS 3CB6 D5
3CB7 D5
MM2-WE
3CB8 C7
E E 3CB9 C7
3CC0 C7
3CC1 C7
3CC2 C7
3CC3 C7
3CC4 C7
3CC5 C7
3CC6 C7
3CC7 C7
3CC8 C7
+2V5-DDR2 3CC9 C7
3CD0 C7
F F 3CD1 D7
3CD2 D7
3CD6

560R

3CD3 D7
3CD4 D7
FF91
VREF-DDR2
3CD5 D7
3CD6 F3
3CD7 G3
3CD7

560R

2V45

2V33

2V46
100p

100n

1u0

3CD8 H10
3CD9 H10
3CE1 D10
3CE2 D2
5V01 G4
G G 5V02 H4
7CA0 B3
7CA1 B10
FF91 F4
FF92 H10
5V01 ICA0 ICA0 G4
+2V5 +2V5-DDR2 +2V5-DDR2
220R
22u 16V

5V02

2FGC

2FGD
2FGA

2FGB

2FGE

3CD8
2FLW

560R
2V34

2V52

2V53

2V54

2V55

2FLZ
2FLY
330u 6.3V

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n
2V35

2V03

100n

RES 220R
2V04

100p
2V05
1n0

FF92
H VREF-FPGA2 H

3CD9

560R
I I

H_16800_017.eps
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 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 71

DFI Panel: Display Interfacing

1F04 D11 2F2A D5 2F2G F6 2F2Q F11 2F45 F12 3F15 H12 3F1Y D4 3F24 B11 3F2B E5 3F2V E5 3F3B F11 3FH5 D11 5F0L B6 5F14 F13 6F05 B12 7F08 C5 9F26 H12 9F2H B11 9F2T H3 FF07 F12 FF19 F6 IF09 D5 IF0F C4 IF0N F2 IF1A F11
1F80 G13 2F2B D3 2F2H F5 2F30 G12 2F46 D2 3F16 H12 3F1Z D6 3F25 E6 3F2C E6 3F31 E3 3F3C G11 3FJD F2 5F0M B6 5F15 F13 6F07 B6 7F09-1 F11 9F27 E13 9F2I B4 9F2U D11 FF08 F13 FF1A F6 IF0A D5 IF0G E4 IF0P G2 IF1B G11
1F81 G14 2F2C B11 2F2I B6 2F32 H9 2F53 G2 3F17 F10 3F20 C8 3F27 F5 3F2D B6 3F37 G11 3F44 F12 3FLB G2 5F10 B2 5F16 G13 6F09 D1 7F09-2 G11 9F28 F13 9F2N F11 9F2V E11 FF09 H12 FF1B B6 IF0B B11 IF0H D3 IF0S B10 IF1C G11
1F82 G14 2F2D A12 2F2K C13 2F33 F9 2F78 F2 3F18 B2 3F21 D5 3F28 F5 3F2F E5 3F38 F11 3F45 G12 5F0I B10 5F11 B2 5F17 G13 6F10 B2 7F10 B10 9F29 F13 9F2P G11 9F30 G13 FF13 H13 FF2P C2 IF0C C11 IF0K E2 IF0T B10 IF1D G11
1F83 G14 2F2E F5 2F2L C14 2F34 B8 2F95 B1 3F19 B8 3F22 D3 3F29 F5 3F2S B13 3F39 F11 3F48 D2 5F0J A10 5F12 B2 6F02 C3 7F05 C4 9F16 H12 9F2F C11 9F2R F3 9F31 G13 FF17 E6 IF07 D4 IF0D B12 IF0L F2 IF18 F11 IF93 C3
1M59 F15 2F2F F6 2F2P E11 2F35 C8 3F13 G10 3F1W C3 3F23 B12 3F2A E5 3F2T B13 3F3A G11 3FH4 D10 5F0K B6 5F13 F13 6F04 B13 7F07 B4 9F24 H3 9F2G D11 9F2S G3 FF06 F12 FF18 F6 IF08 B4 IF0E B13 IF0M F2 IF19 F11 IFD7 F2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

AB09 DISPLAY-INTERFACING AB09

I2C-BUFFER

*
A A
5F0J 2F2D
+5V
+12V RES 120R RES 100n

5F10 RES
5F0I IF0B IF0E
9F2H
220R +3V3 6F04
RES 120R

* * *
5F11 RES RES 5F0K RES 6F05

RES 100n

4K7

4K7
9F2I BAV99 COL
+12V-SSB BAV99 COL

3F24

3F23
8

2F2C
220R 7F07 220R 7F10
3F18

SI4835BDY PCA9515ADP
4K7

*
5F12 RES 5F0L FF1B 3F19

RES

RES
RES
2F95

100n

SDA-I2C4 VCC
B 220R 220R
+VDISP SDA-I2C4-SSB
47R IF0S RES RES
B

2F34
3 SDA0 SDA1 6

10p
SDA-I2C4

*
5F0M 2F2I 3F2S
SDA-I2C4-DISP
SML-310

220R 100n 47R

IF0T IF0D 3F2T
6F07 SCL-I2C4 2 SCL0 SCL1 7 SCL-I2C4-DISP
6F10

IF08 3F2D
3F20 47R

*
7F05 SCL-I2C4-SSB SCL-I2C4 5 EN 1
SI3441BDV 2K2 SML-310 NC IF0C

2F2K

2F2L
GND

10p

10p
IF93 47R

2F35

10p

4
C C
* *

3F1W

47K
6F02

BZX384-C5V6

*
7F08
*

9F2F
FF2P
*

2F2B IF0F BC847BW

*
3F48 3F22 3F1Y
+5V
9F2G
BZX384-C4V7

3 IF0A IF09

*
330R 47R IF07 47K

*
IF0H 1u0 1 3F21 3F1Z
+3V3
6F09

2F46
1u0

10K 10K
2
VDISP-SWITCH

2F2A

100n
D RES 1F04 D

*
3FH4

47R 3FH5RES
1
2
FOR
* 47R
9F2U 6 5
3
4 DEBUG
+5V
*

3F31 IF0G 3F2V 9F2V RES

LCD-PWR-ON +3V3 +3V3
47R 10K RES

+3V3

E AMBI-LIGHT BUFFER * E
3F2C
3F2A

3F2B

3F25
47R

47R

47R

4K7
*
*
*
IF0K
*
* * * *

3F2F FF17
CTRL1-FPGA CTRL-DISP1 2F2P
47R 9F27
IF0L 3F27 FF18 470p 5F13
CTRL2-FPGA CTRL-DISP2
3F39 +5V
47R IF18 120R
+3V3
IF0M 3F28 FF19 10K

2
CTRL3-FPGA CTRL-DISP3 9F28
7F09-1

3F3B
4K7
47R BC847BS 5F14

3F38
F F

2K2
IF0N 3F29 FF1A
CTRL4-FPGA CTRL-DISP4 120R

6
47R 1M59
RES 3FJD IFD7 3F17 IF19 9F2N 3F44FF06
*

CTRL-SSB1 9F2R CTRL-SSB3 9F29

2 1 1
TO

RES 100p
RES IF1A FF07
47R RES 47R 100R FF08 5F15 2

2F33

2F45

100p
2F2Q 3
2F2G
2F2H
2F2E

2F2F
RES 2F78

100p

100p

100p

100p

100p

470p
+5V 120R 4
5
AMBI
*

3F3A 9F30
*

7
LIGHT
*

IF1B 6
+3V3
10K 5F16

5
7F09-2 B5B-PH-SM4-TBT(LF)

3F3C

3F37
4K7

2K2
BC847BS 120R

SCL-AMBI-3V3 9F31
IF1C 3F45

3
9F2P
G RES 3FLB IF0P 5F17
G
*

CTRL-SSB2 9F2S 100R

RES IF1D

2F30

100p
47R 120R
RES 2F53

100p

3F13

1F80

1F81

1F82

1F83
CTRL-SSB4

RES 100p
RES 47R

2F32
3F15 RES
+5V
100R FF09
CTRL2-IN
9F16

CTRL1-IN

H SDA-AMBI-3V3
+5V
3F16 RES FF13 H
SCL-AMBI-3V3 9F24 100R
*

9F26
SDA-AMBI-3V3 9F2T

H_16800_018.eps
3139 123 6188.2 180407

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 72

DFI Panel: FPGA Ambilight

1F02 E12 7F01 C2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1F03 I5 7F60 E5
2F10 B3 7F61 H13
2F11 B4 7F62 G3

FPGA AMBILIGHT
7F65-2

AB10 AB10
XC3S250E-4FTG256C 2F12 B4 7F65-1 F7
Φ 2F13 B4 7F65-2 A7
BANK0 2F14 G9 7F65-3 A10
A7 A4 2F15 I13 7F65-4 E10
IO_L17N_0
A12 7F65-3 2F16 B3 7F65-5 A13
+3V3
5F31 FF60
+3V3M
SDA-AMBI-3V3 * 3F6J IF52
B4
IO VREF_0
IO_L17P_0
A5 * 3F9E SCL-AMBI-3V3 XC3S250E-4FTG256C 2F20 A2 9F36 H12
120R 100R D9
IO IO_L18N_0
C4 100R Φ 2F22 D2 9F37 H12
A VREF_0 IO_L18P_0
C5
BANK1 A 2F23 D3 9F40 G5

2F61

2F60

2F20

2F62

2F63

2F64

2F65

2F66

2F67

2F69

2F90

2F91

2F92
100n
A14 B3

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n
IO_L01N_0 IO_L19N_0 2F24 H13 9F41 B8

4u7
B14 COLOR7 M14 F15
IO_L01P_0 HSWAP IO IO_L15N_1
A13
IO_L03N_0 IO_L19P_0
C3 D16
IO IO_L15P_1
F14 2F25 B2 9F42 F9
C12 F12 2F26 B3 9F43 I9
VREF_0 IP_L02N_0 VREF_1 IO_L16N_1
B13 D12 R15 F13
IO_L03P_0 IP_L02P_0 IF77 IO_L01N_1 IO_L16P_1 2F27 B3 9F44 F11
E11 C9 D14
IO_L04N_0 IP_L07N_0 A15 IO_L18N_1 2F28 B3 9F45 F11
5F34 D11 C10 COLOR9 R16
IO_L04P_0 IP_L07P_0 IO_L01P_1 LDC0 2F29 B2 9F46 F11
+2V5 B11 B8 D15
IO_L05N_0 IP_L10N_0 A16 IO_L18P_1
120R VREF_0 GCLK9 IF78 P15
IO_L02N_1 HDC 7F65-5 2F31 B2 9F51 G11
C11 A8 9F41 COLOR-CLK C15 XC3S250E-4FTG256C 2F44 E14 9F52 C2
RES 5F32 FF61 IO_L05P_0 IP_L10P_0 A13 IO_L19N_1
+2V5-STAB +2V5M E10
D10
IO_L06N_0 GCLK8
E6
IF79 P16
IO_L02P_1 LDC2
C16 Φ 2F50 F14 9F53 C2
120R IO_L06P_0 IP_L16N_0 A14 IO_L19P_1 BANK3 2F51 F14 9F54 C2
F9 D5 COLOR6 M16
IO_L08N_0 IP_L16P_0 IO_L04N_1 LDC1 2F52 F14 9F55 G4

2F26
2F74

2F75

2F25

2F27

2F28

2F93

2F94

2F96

2F97
100n
A3 H13 F5 L5

10n

10n

10n

10n

10n

10n

10n

10n
GCLK5 VREF_1 IP IO IO_L15N_3
2F54 D3 FF50 F14

4u7
E9 B6 COLOR9 N16 N2 K5
IO_L08P_0 IO_L04P_1 VREF_1 IO IO_L15P_3
IP B10 L15 B16 N1
B A9
GCLK4
IO_L09N_0
C13
COLOR4
COLOR5 L14
IO_L06N_1
IO_L06P_1
E14 B2
VREF_3
IO_L01N_3
IO_L16N_3
IO_L16P_3
M1 B 2F55 B2
2F56 F14
FF51 I3
FF52 H3
K12 G12 B1 P1
GCLK7 IO_L07N_1 IO_L01P_3 IO_L18N_3 2F57 E5 FF53 H5
5F33 IF74 A10 B7 H16 C2 P2
FF62 IO_L09P_0 A11 IP IO_L02N_3 IO_L18P_3
+1V2M NC C7 COLOR3 K13 J11 R1 2F58 F11 FF54 H4
+1V2-PF GCLK6 IO_L07P_1 VREF_3 IO_L19N_3
120R
D8
IO_L11N_0 A12
J12 C1
IO_L02P_3 IO_L19P_3
R2 2F59 F3 FF55 H4
B5 +3V3M COLOR2 K14 M13 COLOR8 E4 G1 2F60 A2 FF60 A3
GCLK11 IO_L08N_1 IO_L03N_3 IP
47u 4V
2F31

2F29

2F55

2F72

2F73

2F77

2F16

2F10

2F11

2F12

2F13
100n

C8 B12 E3
4u7

10n

10n

10n

10n

10n

10n

10n

10n
IO_L11P_0 +3V3M VREF_1 IO_L03P_3 VREF_3 2F61 A2 FF61 B3
V CCO_0 F7 +3V3M COLOR1 K15 E13 E1 D2
GCLK10 IO_L08P_1 IO_L05N_3 2F62 A3 FF62 B3
F8 F10 +3V3M J16 E16 D1 F2
IO_L12N_0 IO_L09N_1 IO_L05P_3 2F63 A3 FF63 H12
E8 L12 G4 H1
IO_L12P_0 A9 IO_L06N_3
D7
IO_L14N_0 RHCLK1
NC L13 G5
IO_L06P_3 IP
J6 2F64 A3 FF64 I12
COLOR0 K16 N14 G2 K4 2F65 A3 FF65 I12
VREF0 IO_L09P_1 IO_L07N_3
E7 N15 G3 M3
IO_L14P_0 A10 IO_L07P_3 2F66 A3 FF66 I12
D6 H6 N3
C +1V2
9F52 C6
IO_L15N_0
IO_L15P_0
J13
RHCLK0
IO_L10N_1
E15 +3V3M
IO_L08N_3
LHCLK1
C 2F67 A4
2F68 E4
FF67 I12
FF68 I14
G11 +3V3M H5 F3
A7 IO_L08P_3
IF12 RES |RHCLK3
VCCO_1 K11 +3V3M LHCLK0
F4 2F69 A4 FF80 F13
9F53 7F01 M15 +3V3M H4 L2 2F70 G5 FF81 E14
+3V3 TRDY1 IO_L09N_3
RES LD1117DT12 J14 NC L3
IO_L10P_1 LHCLK3 2F71 F12 FF82 F14
IF61 +1V2-PF L4
9F54 A8 IRDY2 2F72 B3 FF83 F14
3 2 H3 M4
+2V5 IN OUT RHCLK2 IO_L09P_3 2F73 B3 FF84 F14
RES H14
IO_L11N_1 LHCLK2
COM
A5
J3
IO_L10N_3
E2 +3V3M 2F74 B2 FF85 F12
RES
2F22

2F23

2F54

G6
10n

10n

RHCLK5 LHCLK5 +3V3M 2F75 B2 IF12 C2

4u7

H15 J2 VCCO K6 +3V3M

1

IO_L11P_1 IO_L10P_3 2F76 I4 IF48 F5

M2 +3V3M
A6 LHCLK4 2F77 B3 IF49 I9
RHCLK4 TRDY2 2F90 A4 IF52 A6
J4
D H11
IRDY1
IO_L12N_1
IO_L11N_3
LHCLK7
D 2F91 A4 IF53 H2
J5 2F92 A4 IF54 I2
A3 IO_L11P_3
RHCLK7 LHCLK6 2F93 B3 IF55 I2
H12 K1
IO_L12P_1 IO_L12N_3 2F94 B4 IF56 I2
J1
A4 IO_L12P_3 2F96 B4 IF57 I2
K3
RHCLK6 IO_L13N_3
G16
IO_L13N_1
K2
IO_L13P_3
2F97 B4 IF61 C3
XCF flash- RESERVED A1 3F03 H9 IF69 H4
G15
+3V3M +2V5M IO_L13P_1 3F07 F11 IF71 G9
+3V3M
2F57 A2 3F09 F11 IF72 G9
G14 CSO-B
IO_L14N_1 3F12 G11 IF73 H9
10n A0 MOSI
2F68

G13 3F30 F8 IF74 B6

10n

IO_L14P_1 MISO
3F6Q

7F60
10K

E CCLK
E 3F32 H2 IF75 G11
18

19

20

XCF02SVOG20C
3F33 I2 IF76 H13

100R

100R

100R

100R
INT O J
MISO
3F6T 1 VCC 7F65-4
FOR 3F34 I2 IF77 A9
D0
FACTORY 3F35 I2 IF78 A9

3F41

3F42

3F43

3F46
CCLK 3F6S 100R 3 7 XC3S250E-4FTG256C
CLK CF

INIT
3F6R 100R
8
RESET CEO
13
2 Φ USE 3F36 I2
3F41 E12
IF79 B9
OE BANK2 2F44
10 9 1F02 FPGA-TDI FF81
47R CE 3F42 E13
3F9J

5 12 LED5B T8 N12 FPGA-TMS

TMS IO IO_L18N_2 1 10p 3F43 E13
6 NC 14 FPGA-TDI
TCK D5 A20 2 2F50 3F46 E13
2F59

4 15 9F42 T10 P12 FF82

10p

FPGA-TDO
47R

TDI IO IO_L18P_2 3 FPGA-TDO

17
TDO
16
M1 A21 4 FPGA-TCK 10p
3F47 F14
P13 R13 9F46 +3V3 FF80 3F6J A6
IO IO_L19N_2 5 FF83 2F51
GND 3F07 1K0 RES FF85 FPGA-TMS
VREF_2 VS1 6 +3V3M 3F6K H12
11

+2V5M R4 3F09 1K0 RES

F IO A18 7 30R 5F29 10p
F 3F6L I12
3F6Z

T13 9F45 9
47R

VREF_2 IO_L19P_2 +3V3 8 2F52 3F6M H14

2F71
INIT P4 FF84

10n
IO_L01N_2 VS2 FPGA-TCK
10p
3F7A INIT_B A19 10p
3F6Q E2
2F58 3F7S 3F47
3F9C

CSO-B P3 R14 CCLK PROG-B

10K

+2V5M 7F65-1 IO_L01P_2 IO_L20N_2 3F6R E2

10K XC3S250E-4FTG256C
3F30 CSO_B CCLK 10R 100R FF50 3F6S E3
Φ MOSI N5
IO_L03N_2 IO_L20P_2
P14 9F44 +3V3 3F6T E3

2F56
100p
IF48 10R MOSI VS0 1K0
MAIN 3F6U G2

2F14

33p
RES CSI_B A17
6F62 9F40 nCONFIG DONE T15 A1 P5 R3 3F12 RES 3F6V G3
3F6U 7F62 DONE IF71 IO_L03P_2 IP_L02N_2
+3V3M BC847BW PROG-B D3 A16 T3 3F6W G3
PROG_B DOUT IP_L02P_2
A15 B9 T7
470R SML-310 3F6W TCK BUSY IP_L08N_2 3F6Z F4
2F70
RES

A2 F6 T5
10n

TDI IO_L04N_2 VREF_2 3F7A F4

100K C14 F11 T4 R7
TDO IO_L04P_2 IP_L08P_2 3F7B G4
B15 G7 N6 R9 9F51
G TMS LED2B IO_L05N_2 IP_L11N_2
G
3F6V

100K

G8 LED1B M6
IO_L05P_2 M2
3F7C H3
+2V5M +2V5M A6 G9 P6 3F7D H2
IO_L06N_2 GCLK1
+2V5M A11 G10 R6 T9
IO_L06P_2 IP_L11P_2 IF75 3F7E H3
9F55 +2V5M F1 H2 L8
IO_L09N_2 RDWR_B 3F7F H3
+2V5M F16 H7
D6 GCLK0 3F7G H5
3F7B

L1 VCCAUX H8 M11 +3V3

10K

+2V5M GCLK13 IP_L17N_2

+2V5M L16 H9 IF72 M8
IO_L09P_2 IP_L17P_2
N11 3F7H H5
IF69 +2V5M T6 H10 M7 3F7S F11
3F7G D7
DONE +2V5M T11 GND J7 T2
3F7C RES GCLK12 3F9K 3F99 I12

5F30
FF55 J8 P8 IP T12

30R
FPGA-TDI 47R IF73 IO_L10N_2 CSO-B
D4 J9 T14 3F9A I3
+1V2M D3 4K7
100R D13 J10 3F9B I3
3F7D RES +1V2M GCLK15
FPGA-TDO FF54 +1V2M E5 J15 CLK-OSC2C N8 N7 WRITE 9F36 IF76 3F9C F5
100R IO_L10P_2
3F7E RES FF53 E12 K7 P7
H FPGA-TMS +1V2M D4
H 3F9E A8

2F24

100n
+1V2M M5 VCCINT K8 NC P10 HOLD 9F37
100R 3F7F RES GCLK14 3F9F H9
FPGA-TCK +1V2M M12 K9 N9 R10
IO_L12N_2 3F9G I9

8
3F7H

330R

+1V2M N4 K10 CLK-OSC1D 3F9F 10R 7F61

100R FF52 D1
6F63 +1V2M N13 L6 L7 +3V3M M25P20-VMN 3F9H I9
IF53 3F32 3F03 GCLK3
3FKW
3FKV

3FKY

3FKZ
100R

100R

100R

100R

LED1B L11 MISO P9 L10 +3V3M VCC 3F9J F5

Φ
IO_L12P_2 FF63 3F6K 3F6M
1K0 R8 100R VCCO_2 R5 +3V3M MOSI 5 MISO 3F9K H12
SML-310 D2 D Q
T1 HIGH=SPI flash R12 2M 2
3F9B 330R

GCLK2 +3V3M FF64 3F6L 100R 10R FF68 3F9M I9

3F9A

6F64 T16 M9 CCLK 6

IF54 3F33 LOW=XCF flash IO_L13N_2
100R
C FLASH 3FKV H4
LED2B DIN FF65
RES 3F9M 1K0 IF49 3F99 3FKW H4
330R

2F15
1F03 1

33p
1K0 SML-310 D0 CSO-B S
1 +3V3 L9
IO_L13P_2 FF66 100R 3FKY H4
IF55 3F34
6F65 FF51 2
FOR 9F43
M0 WRITE 3
W 3FKZ H4
LED3B M10
LED3B 3 DEBUG LED4B N10
IO_L15N_2 FF67
7
5F29 F13
I 1K0 SML-310 4
5 SDA-I2C4
47R
3F9G P11
IO_L15P_2
IO_L16N_2
HOLD HOLD
I 5F30 H13
5F31 A2
6F66 +3V3M VSS
IF56 3F35 6 A22
LED4B 7 SCL-I2C4 3F9H R11
IO_L16P_2
5F32 B2
9 8 47R 5F33 B2

4
1K0 SML-310 A23
2F76

10n

5F34 A2
6F67
LED5B
IF57 3F36 6F62 G2
6F63 H2
1K0 SML-310
6F64 I2
6F65 I2
H_16800_019.eps
3139 123 6188.2 180407
6F66 I2
6F67 I2

1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 73

Layout DFI Panel (Top Side)

1F00 C1 3CE2 B3 3F7A B1 5F0J A4

1F02 C2 3F05 C1 3F7B C1 5F0K A3
1F03 A1 3F14 C3 3F7G C1 5F0L A3
1F04 A4 3F15 C3 3F7H C1 5F0M A3
1F05 C3 3F16 C3 3F7J A3 5F10 A4
1F13 C4 3F18 A4 3F7K A3 5F11 A4
1F50 A4 3F19 A4 3F7L A3 5F12 A4
1F51 A3 3F1W A4 3F7M A3 5F13 C3
1F52 A1 3F20 A4 3F7N A3 5F14 C3
1M09 C4 3F22 A4 3F7P A3 5F15 C3
1M12 C3 3F23 A4 3F7Q A3 5F16 C3
1M59 C3 3F24 A4 3F7R A3 5F17 C3
1M90 C4 3F25 A2 3F80 C1 5F20 C3
2F15 C1 3F26 C2 3F82 C1 5F30 C1
2F22 C4 3F27 A2 3F84 C1 5F49 C1
2F23 C4 3F28 A2 3F85 C1 5F50 C1
2F24 C1 3F29 A2 3F86 C1 5F52 C3
2F29 C2 3F2A A2 3F87 B2 5F59 A2
2F2B A4 3F2B A2 3F88 B2 5F60 A3
2F2C A4 3F2C A2 3F89 B2 5F61 A3
2F2D A4 3F2D A4 3F8A A2 5F62 A3
2F2E A2 3F2F A2 3F8B A2 5F63 A3
2F2F A2 3F2S A2 3F8C A2 5F64 A3
2F2G A2 3F2T A2 3F8D A2 5F65 A3
2F2H A2 3F44 C2 3F8E A2 5F66 A3
2F2I A3 3F45 C3 3F8F A2 5F67 A3
2F2K A2 3F48 A4 3F8G A2 5F68 A3
2F2L A2 3F4A A1 3F8H A2 5F69 A3
2F30 C3 3F4F B1 3F8J A2 5F70 A3
2F34 A4 3F4G A2 3F8K A2 5F71 A3
2F35 A4 3F4H A1 3F8L A2 5F72 A3
2F45 C2 3F4J A1 3F8M A2 5F78 A2
2F46 A4 3F4K A1 3F8N A2 5F79 A2
2F54 C4 3F4L A1 3F8P A2 5F80 C2
2F57 C1 3F4M A1 3F8Q A2 5U00 B4
2F59 C1 3F4N A1 3F8R A2 5U01 C4
2F5P A1 3F4P A1 3F8S A2 5U02 B4
2F5Z B1 3F4Q A1 3F8T A2 6F02 A4
2F68 C1 3F4R A1 3F8U A2 6F04 A3
2F76 A1 3F4S A1 3F8V A3 6F05 A4
2F95 A4 3F4T A1 3F8W A2 6F07 A4
2FD1 C2 3F4U A1 3F8Y A3 6F09 A4
2FD2 C2 3F4V A1 3F8Z A3 6F10 A4
2FHL C4 3F4W A1 3F90 B2 6F62 C1
2FJ7 C1 3F4Y A1 3F91 B2 7F01 C4
2FJJ C3 3F4Z A1 3F92 A2 7F05 A4
2FJK C3 3F50 A2 3F93 A2 7F07 A4
2FJL C3 3F51 A2 3F94 A2 7F10 A4
2FLG C1 3F52 A2 3F95 A2 7F18 A2
2FLH C1 3F53 A2 3F96 B2 7F30 C3
2FLJ C1 3F54 A2 3F97 B2 7F31 C3
2FLK C1 3F55 A2 3F98 B2 7F60 C1
2FLL C1 3F56 A2 3F99 C1 7F61 C1
2U01 B4 3F57 A2 3F9A C1 7F62 C1
2U02 C4 3F58 A2 3F9B B1 7F65 B2
2U03 B4 3F59 A2 3F9J C1 7F85 C2
2U06 B4 3F5A A1 3F9K C1 7F86 C3
2U09 C4 3F5B B2 3F9N A3 7U01 B4
2U10 B4 3F5C B1 3F9P A3 7U03 B4
2U12 B4 3F5D B1 3F9Q A3 9F16 C3
2U13 C4 3F5E B1 3F9R A3 9F24 A2
2U14 B4 3F5F B1 3F9S A3 9F26 C3
2U16 C4 3F5G B1 3F9T A3 9F27 C2
2U21 B4 3F5H B1 3F9U A3 9F28 C3
2U22 B4 3F5J B1 3F9V A3 9F29 C3
2U25 C4 3F5K B1 3F9W A3 9F2F A4
2U32 B4 3F5L B1 3F9Y A3 9F2G A4
2U35 B4 3F5M B1 3F9Z A3 9F2H A4
2U38 A4 3F5N B1 3FA9 C2 9F2I A4
2U41 B4 3F5P B1 3FH0 C2 9F2R A2
2V34 B3 3F5Q B1 3FH1 C2 9F2S A2
3CA0 B3 3F5R B1 3FH4 A4 9F2T A2
3CA1 B3 3F5S B2 3FH5 A4 9F2U A3
3CA2 B3 3F5T B1 3FH7 B2 9F2V A4
3CA3 B3 3F5U A2 3FH8 B2 9F30 C3
3CA4 B3 3F5V A2 3FH9 B2 9F31 C3
3CA5 B3 3F5W A2 3FHI B2 9F36 C1
3CA6 B3 3F5Y A2 3FHJ A2 9F37 C1
3CA7 B3 3F5Z A2 3FHK A2 9F52 C4
3CA8 B3 3F60 A2 3FHL A2 9F53 C4
3CA9 B3 3F61 A2 3FHM A2 9F54 C4
3CB0 B3 3F62 A2 3FHN A2 9F55 B1
3CB1 B3 3F63 A2 3FHP A2
3CB2 B3 3F64 A2 3FHR A2
3CB3 B3 3F65 A2 3FHS A2
3CB4 B3 3F66 A2 3FHV C2
3CB5 B3 3F67 A2 3FHY C2
3CB6 B3 3F68 A2 3FKV B1
3CB7 B3 3F69 A2 3FKW B1
3CB8 A3 3F6A A2 3FKY B1
3CB9 A3 3F6B A2 3FKZ B1
3CC0 A3 3F6C A2 3U08 C4
3CC1 A3 3F6D B1 3U11 C4
3CC2 A3 3F6K C1 3U17 C4
3CC3 A3 3F6L C1 3U27 C4
3CC4 A3 3F6M C1 5F00 A1
3CC5 A3 3F6Q B1 5F01 A1
3CC6 A3 3F6R B1 5F02 A2
3CC7 A3 3F6S C1 5F03 A2
3CC8 A3 3F6T C1 5F04 A2
3CC9 A3 3F6U C1 5F05 A2
3CD0 A3 3F6V C1 5F06 A1
3CD1 A3 3F6W C1 5F07 A1
3CD2 A3 3F6Z B1 5F08 A1
3CD3 A3 3F70 A2 5F09 A1
H_16800_020.eps 3CD4 A3 3F71 A2 5F0A A1
3101 313 6188.2 180407 3CD5 A3 3F78 C1 5F0B A1
3CE1 A3 3F79 C1 5F0I A4
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 74

Layout DFI Panel (Bottom Side)

1U01 C1 2F5G B4 2FJA A3 3F43 C3 5F33 C3

1U02 C1 2F5H B4 2FJB B3 3F46 C3 5F34 B3
2CBC B2 2F5J B4 2FJC A3 3F47 C3 5F51 B2
2CBD B2 2F5K B4 2FJD A3 3F49 B3 5F53 B2
2CBH A2 2F5L B4 2FJE A2 3F4B A4 5F54 B2
2CBK A2 2F5M B3 2FJF A3 3F4C A4 5F55 B2
2F00 A4 2F5N B4 2FJM C4 3F4D B3 5F57 B3
2F01 A4 2F5Q A4 2FJN C4 3F4E B3 5F58 A2
2F02 A4 2F5R A4 2FJP B3 3F6J C3 5U04 C1
2F03 A4 2F5S A4 2FLC B3 3F72 A3 5U05 C1
2F04 A4 2F5T A4 2FLD B3 3F73 A3 5U06 C1
2F05 A3 2F5U B4 2FLE B3 3F74 A3 5U07 C1
2F06 A3 2F5W A4 2FLF B3 3F75 A3 5V01 B1
2F07 A3 2F5Y B4 2FLM B3 3F76 C4 5V02 B1
2F08 A3 2F60 C3 2FLN B3 3F7C C4 6F30 A3
2F09 A3 2F61 C3 2FLP B3 3F7D C4 6F31 B3
2F0A A3 2F62 C3 2FLR B3 3F7E C4 6F32 B3
2F0B A3 2F63 C3 2FLS A3 3F7F C3 6F33 B3
2F0C A4 2F64 C3 2FLT B3 3F7S B3 6F34 B3
2F0D A4 2F65 B3 2FLU B3 3F81 C4 6F35 B3
2F0E A4 2F66 C3 2FLV B3 3F83 C4 6F63 C3
2F0F A4 2F67 C3 2FLW B3 3F9C C4 6F64 C3
2F0G A4 2F69 C3 2FLY B3 3F9E C3 6F65 C3
2F0H A4 2F6A A3 2FLZ B3 3F9F C3 6F66 C3
2F0I A4 2F6B A4 2U00 C1 3F9G B3 6F67 C3
2F0J A4 2F6C A4 2U04 B1 3F9H B3 6U00 C1
2F0K A4 2F6D B4 2U05 B1 3F9M C3 6U01 C1
2F0L A4 2F6E B3 2U07 C1 3FA0 B3 6U02 C1
2F0M A4 2F6F B3 2U08 C1 3FA1 B3 6U04 B1
2F0N A4 2F6G B3 2U11 B1 3FA2 B3 6U06 B1
2F0P A3 2F70 C4 2U15 B1 3FA4 B2 6U08 B1
2F0Q A2 2F71 C3 2U17 C1 3FA5 B3 7CA0 B2
2F0R A2 2F72 C3 2U18 B1 3FA6 B3 7CA1 A2
2F0S A2 2F73 C3 2U19 C1 3FA7 A3 7CA2 A4
2F0T A2 2F74 B3 2U20 B1 3FA8 B2 7CA3 B4
2F0U A2 2F75 B3 2U23 C1 3FAA B3 7F08 A1
2F0V A2 2F77 C3 2U24 C1 3FJA C2 7F09 A1
2F0W A2 2F78 A1 2U26 B1 3FJB C2 7F32 A3
2F0Y A2 2F79 A3 2U27 B1 3FJC C3 7F34 C4
2F0Z A2 2F80 A3 2U28 B1 3FJD A1 7F35 A1
2F10 C3 2F81 A3 2U29 B1 3FLB A1 7F36 A1
2F11 C3 2F82 A3 2U30 C1 3U00 C1 7F50 C2
2F12 C3 2F83 A1 2U31 C1 3U01 B1 7F51 C3
2F13 C3 2F84 A1 2U33 B1 3U03 B1 7U00 B1
2F14 C3 2F85 A1 2U34 C1 3U04 C1 7U05 C1
2F16 C3 2F86 A1 2U36 C1 3U05 C1 7U07 B1
2F17 A1 2F87 A1 2U37 C1 3U06 B1 7U08 A1
2F18 A1 2F88 A1 2U39 C1 3U07 C1 7U09 A1
2F19 A1 2F89 A1 2U40 C1 3U09 B1 7U13 C1
2F1A A2 2F90 C3 2V00 B2 3U10 B1 7U15 C1
2F1B A2 2F91 C3 2V01 A2 3U12 C1 9F00 B3
2F1C A2 2F92 C3 2V03 B1 3U13 C1 9F01 B3
2F1D A2 2F93 C3 2V04 B1 3U14 C1 9F02 B3
2F1E A2 2F94 C3 2V05 B1 3U15 B1 9F03 A3
2F1F A2 2F96 C3 2V33 A2 3U16 B1 9F04 B3
2F1G A2 2F97 C3 2V35 B1 3U18 B1 9F05 A3
2F1H A2 2F9A A1 2V39 B2 3U19 B1 9F06 A3
2F1J A2 2F9B A1 2V40 B2 3U20 B1 9F07 B3
2F1K A2 2F9C A1 2V41 B2 3U21 B1 9F08 B2
2F1L A2 2F9D A1 2V42 B2 3U22 B1 9F09 B2
2F1M A2 2F9E A1 2V43 A2 3U23 B1 9F13 A1
2F1N A2 2F9F A1 2V44 A2 3U24 C1 9F2N A1
2F1P A2 2F9G A1 2V45 B2 3U25 C1 9F2P A1
2F1Q A2 2F9H A1 2V46 B2 3U26 B1 9F40 C4
2F1R A2 2F9I A1 2V50 A1 3U28 C1 9F41 C3
2F1S A2 2F9J A1 2V51 A2 3U30 C1 9F42 C3
2F1T A2 2FD3 C2 2V52 B1 3U31 B1 9F43 C3
2F20 B3 2FD4 C3 2V53 B2 3U32 B1 9F44 B3
2F21 A1 2FGA B3 2V54 B2 3U33 B1 9F45 B3
2F25 B3 2FGB B3 2V55 A2 3U34 C1 9F46 C3
2F26 C3 2FGC B2 3CD6 A2 3U35 C1 9F51 C3
2F27 C3 2FGD B3 3CD7 A2 3U36 B1 9U01 C1
2F28 C3 2FGE A2 3CD8 B3 3U37 B1 9U02 C1
2F2A A1 2FGF B3 3CD9 B2 3U40 B1 9U03 B1
2F2P A1 2FGG B3 3F02 B3 3U41 C1
2F2Q A1 2FGH B3 3F03 C3 3U43 B1
2F31 C3 2FGJ B3 3F04 B3 3U44 C1
2F32 A1 2FGK A1 3F06 B3 3U45 B1
2F33 A1 2FGL A1 3F07 C3 3U46 B1
2F36 B3 2FGM B3 3F08 B3 3U47 C1
2F37 B3 2FGN B3 3F09 C3 3U48 B1
2F38 B3 2FGP B3 3F10 B3 3U50 C1
2F39 B3 2FH1 B2 3F11 C4 3U55 B1
2F40 B2 2FH2 B3 3F12 B3 3U58 C1
2F41 B2 2FH3 B3 3F13 A1 3U59 C1
2F42 B2 2FH4 B3 3F17 A1 3U62 B1
2F43 B3 2FH5 B3 3F1Y A1 3U63 C1
2F44 C4 2FHA B2 3F1Z A1 3U64 C1
2F47 A1 2FHB B2 3F21 A1 3U68 B1
2F48 A1 2FHC B3 3F2V A1 3U69 C1
2F49 A1 2FHD B3 3F30 C3 3U70 C1
2F4A A1 2FHE B3 3F31 A1 3U72 C1
2F4B A1 2FHF B3 3F32 C3 3U73 C1
2F50 C3 2FHG B3 3F33 C3 3U74 C1
2F51 C4 2FHH B3 3F34 C3 3U75 C1
2F52 C3 2FHJ B3 3F35 C3 5F21 B2
2F53 A1 2FHK B3 3F36 C3 5F22 C3
2F55 C3 2FHM B2 3F37 A1 5F23 B3
2F56 C3 2FHN B3 3F38 A1 5F24 A2
2F58 B3 2FHP B3 3F39 A1 5F25 B3
2F5A A4 2FHQ B3 3F3A A1 5F26 B3
2F5B A4 2FHR B3 3F3B A1 5F27 B4
2F5C A4 2FHS B2 3F3C A1 5F28 B4
2F5D A4 2FHT B3 3F40 B3 5F29 C3
H_16800_021.eps 2F5E A4 2FJ8 A2 3F41 C4 5F31 C3
3101 313 6188.2 180407 2F5F A4 2FJ9 B3 3F42 C4 5F32 B3
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 75

SSB: Supply
1B10 E1 3B70 C4 IB52 E4
1 2 3 4 5 6 7 8 9 1B11 E7 3B71 B2 IB53 F4
1B30 A3 3B72 B9 IB54 E5
1B31 B3 3B73 B9 IB55 E6

B01A SUPPLY IB75 B01A 1B32 A1

1B33 C8
3B74 C9
3B75 B3
IB56 E6
IB60 D7
2B51 FB27
1B40 D9 3B76 B3 IB61 D8
-AUDIO-POWER
1n0 1P02 A1 3B77 B4 IB63 D9
6B08 2B30 B2 3B78 B4 IB64 B2
1B30 HOT COLD 2B31 B5 5B00 A2 IB65 E2
MBRS1100
2B48
FB34 A 2B32 C2 5B01 A7 IB68 A7
+AUDIO-POWER 2B33 C3 6B02 D8 IB69 C3
1n0 2B34 C3 6B03 E6 IB70 C4
IB68 6B07 2B35 D4 6B04 B4 IB71 C3

3
1P02 IB30 IB40
FB30 1B32 IB32 FB38 2B36 D5 6B05 C8 IB72 F9
3

UF2327L
2 MBRS1100 2B37 D4 6B06 B8 IB73 E4

5B00
FB45 5B01
1 T1.6A-250V

22u 450V

68u 450V
2B38 E3 6B07 A8 IB74 E5
2B30

220n
7 FB33
2 2B46

2B31

2B50

2B60
1 5 2B39 E3 6B08 A8 IB75 A7

10n
B2P-VA-BF-BK FB31 FB46
8 GNDSND

1m0 25V
6B04 IB34 2B40 E2 6B09 D6 IB76 C3

2
1n0 +12VS

2B47
IB10 3
3B71 DF06M IB41 6B06 2B41 E5 6B10 C5 IB77 E8

3B72

2K2
4 9
2B42 E7 6B11 C2 cB01 B8
220R 1B31 IB35 IB36 BYW29-200
10 2B43 D6 6B13 D7 cB02 D8
GNDP GNDP
B

cB01
2 GND 2B44 E5 6B14 F4 cB04 D6
GNDP
IB33 11 FB32 2B45 B8 6B15 B9
1 2B45
GNDP
12
FB37 2B46 B8 7B00 D3

BZX384-C5V6

1K0 1%
IB64 1n0 2B47 B8 7B01 E4

3B73
+5V-STANDBY
2B48 A8 7B02 D4

6B15

2B62
BS28601-00

1u0
3B75 3B76 3B77 3B78 PHD38N02LT
2B52 6B05 1B33 7B06 2B49 D8 7B04 E7
1K0 1K0 1K0 1K0 IB37 IB15 2B50 B5 7B05 C6
3B30 IB71 3B31 IB69 3B32 IB70 3B33 FB39 SS36 2.5AT 2B51 A8 7B06 B8
470p
2B52 C7 7B07 C8

3B29
7B05

2M2

47R
1K0 1K0 1K0 1K0 2
3B60 STP5NK60ZFP GND GND 2B55 F9 7B50-1 F8
3B67 3B68 3B69 3B70 GNDP IB11
7B07 2B56 D5 7B50-2 E8
TS2431
2B32 1K0 1K0 1K0 1K0 3B34 IB44
1 C 2B57 D2 9B01 F1

1K0 1%
IB42 2B58 E2 9B02 F7

3B74
100n
2M2 3 A K 1
1n5 IB43 2B59 F4 FB27 A8
RS1D
6B11

IB76

2B63
2B33 2B34 6B10 3 R 2B60 B5 FB30 A1
56p 100p BZG05C15 3B52
2B61 C8 FB31 B1
2
2B61 2B62 B9 FB32 B9
47R RES GND 2B63 C9 FB33 B9
3B35

2n2
15R

IB12 IB31 FB36 GND

7B02 3B50 GND 3B29 C9 FB34 A9
FB35 IB13
IB45 IB47 BC857BW 68R
3B30 C3 FB35 D8
2B35

18R 1%
3B36

RES
3B31 C3 FB36 D6

2m2 16V
IB46 1%

2B36

3B48

2B43

2B49
3B49
10K

47n
10p 470R 3B32 C4 FB37 B7

BZG05C6V8
47p
3B33 C4 FB38 A5

3B51

330R
6B09

3B54
1R0
D

1%
IB48 cB02 3B34 C4 FB39 C6
7B00 3B35 D3 FB45 B1
BC817-25W GND
PDZ5.6-B PDZ5.6-B IB63 3B36 D4 FB46 B1
cB04

470R
2B56

3B46

3B47
1K0
47n
IB60 3B37 D4 IB10 B3
6B13 IB61 6B02 3B38 E3 IB11 C9
RES 1n0

3B39 E3 IB12 D2
2B37
3B37

1B40
1K0

2B57 GNDV GNDP GNDP GNDP

+12VS
3B40 E3 IB13 D9
1

3B66
3B41 E3 IB14 F4

4K7
1u0 GNDV GNDV IB56 +5V-STANDBY 2
IB49 7B04 3B42 F3 IB15 C9
2B40 2B38 3B61 3
IB65 IB74 4 3B43 E4 IB30 A2

3B45
4

3K3
1u0 IB50 1u0 1K0 IB38 6 5
3B44 F4 IB31 D5

3B55

2B42

220n
1K2
BC847BPN

BZX384-C18
3B45 E5
390R

390R

IB32 A4
3B38

3B40

3B43

100K

5 7B50-2
IB55 GND
E
2B44

6B03
3B46 D5 IB33 B4

10n
2B58

2B39

3
1u0

1u0

IB54 IB77 3B47 D5 IB34 B6

7B01 TCET1102(G)
1B10 IB51 IB52 3B48 D5 IB35 B5
HEATSINK 1B11
IB73 3B49 D5 IB36 B7

3B62

3B63
10K

22K
BC857BW HEATSINK
IB37 C7
390R

390R

3B50 D6
3B39

3B41

2B41

220n

GNDV GNDV IB39 3B51 D6 IB38 E8

2B59

3B44
470n

4K7

3B52 C6 IB39 E8
IB53 IB72 IB40 A6
6
3B54 D9
GNDV 3B55 E7 IB41 B7
IB14
HOT COLD 3B65 IB42 C3
390R

3B60 C4
3B42

7B50-1 2
BC847BPN 3B61 E8 IB43 C4
10K AUDIO-PROT

3B64
9B01

2B55
1
PDZ5.6-B

15K
F

10u
3B62 E8 IB44 C5

9B02
6B14

3B63 E8 IB45 D4
3B64 F8 IB46 D3
GNDV
3B65 F9 IB47 D4
GNDP GND 3B66 E8 IB48 D4
GND 3B67 C3 IB49 E3
3B68 C3 IB50 E3
H_16770_011.eps
3104 313 6196.2 240807
3B69 C4 IB51 E3

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 76

SSB: Supply
1 2 3 4 5 6 7 8 9 10
1B20 B4

B01B SUPPLY B01B

1B21 B4
1B22 B4
1B23 B4
1B24 C4
1B25 C4
1B26 C4
A A 1B50 C6
1M59 F3
1P11 B3
2B20 B5
2B21 B5
2B22 B5
2B23 B5
2B24 C5
BACKLIGHT-OUT
2B25 C5
1B20 2B20 2B26 C5
FB20 3B20 2B27
100p 2B27 B6
1B21 2B21 2B53 F6
FB21 100R 3B21 1u0
B 1
1P11
FB22
1B22 2B22
10n

3B22 100R IB90

POWER-OK-DISPLAY
B 2B54 F6
3B20 B6
10n LAMP-ON-OUT
2 3B21 B6
TO 3
FB28 1B23 2B23
100R
3B22 B6
4 FB23 3B26
10n
DISPLAY 5 BACKLIGHT-BOOST 3B23 C6
6 100R 3B26 B6
SUPPLY 7 FB24
1B24 2B24
10n 3B23
STANDBY
3B56 F6
8 3B57 F6
1B25 2B25
FB25 100R
B8B-PH-K-S 10n 9B06 3B58 F7
+5V-STANDBY
1B26 2B26 3B59 F7
FB26
100p 9B07 +5V-POD 5B10 E5
1B50 5B11 F5
C +12V-DISP C 5B12 F5
T 3A 452 5B13 F5
5B14 F5
9B06 C6
9B07 C6
9B10 F6
9B11 F6
9B15 E5
9B16 E5
9B17 F5
9B18 F5
D D 9B19 F5
FB20 B4
FB21 B4
FB22 B4
FB23 B4
FB24 C4
FB25 C4
FB26 C4
FB28 B4
FB40 F5
FB41 F5
FB42 F6
E +5V-ON E FB43 F6
FB44 F6
9B15
IB66 F7
5B10
IB67 F7
120R IB90 B6
9B16

100R

100R
RES 3B56

RES 3B57
5B11

1M59 120R FB42 3B58 100R

9B17 SCL-AMBI
TO 1
FB40
2 5B12 3B59 100R IB66
FB43 SDA-AMBI
AMBILIGHT 3
120R FB41
4 IB67
F 5
9B18
5B13
FB44
F
2B53

2B54

9B10

9B11
100p

100p

120R
9B19
5B14

120R

G G

H H

H_16770_012.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9 10
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 77

SSB: DC / DC
2U00 A3 2U10 B10 2U20 D6 2U30 F6 2U41 E11 3U00 A3 3U10 E13 3U21 C13 3U31 D6 3U41 D10 3U51 E13 3U61 E3 3U71 G9 3UA3 B8 5U03 E11 6U10 E4 7U10-1 E3 7U27 D13 FU01 B8 FU20 F13 IU00 A11 IU12 B2 IU24 C11 IU34 C6 IU46 D6 IU59 E10 IU81 D14 IU91 F11
2U01 A5 2U11 B11 2U21 D9 2U31 F3 2U42 E11 3U01 A4 3U11 B10 3U22 C10 3U32 D4 3U42 D12 3U52 E5 3U62 E7 3U72 D10 3UA4 B5 6U00 B3 7U00 B4 7U10-2 E4 7U28 E12 FU02 B3 FU21 A8 IU02 B5 IU13 B5 IU25 C14 IU35 C4 IU48 D5 IU60 E8 IU82 D14 IU92 E12
2U02 A9 2U12 B12 2U22 D14 2U32 F13 2U43 E13 3U02 B3 3U12 C2 3U23 C6 3U33 D6 3U43 D5 3U53 E5 3U63 E8 3U73 F14 3UA5 C6 6U01 B14 7U01 A6 7U11 E5 7U29-1 B10 FU03 C4 FU22 A13 IU03 B5 IU14 B15 IU26 C5 IU36 C6 IU49 D12 IU61 E6 IU83 E12 IU93 C14
2U03 A5 2U13 C8 2U23 E8 2U33 E13 2U44 C14 3U03 B5 3U13 C3 3U24 C8 3U34 D2 3U44 D10 3U54 E6 3U64 E10 3U74 H1 3UA6 C6 6U02 B14 7U03 B7 7U13-1 B3 7U29-2 C10 FU04 C14 FU23 B15 IU05 B3 IU16 B6 IU27 C8 IU38 C4 IU50 E8 IU62 E3 IU84 F14 IU94 F12
2U04 B6 2U14 B15 2U24 E9 2U34 G2 2U53 D3 3U04 B13 3U14 C3 3U25 C14 3U35 D3 3U45 E7 3U55 E8 3U65 F5 3U75 H2 3UA7 B5 6U04 D7 7U05-1 D2 7U13-2 B2 9U01 E11 FU05 D7 FU24 C6 IU06 B2 IU17 C8 IU28 C4 IU39 D4 IU51 E11 IU63 E7 IU85 F14 IU95 C8
2U05 B4 2U15 C7 2U25 E12 2U35 G9 2U90 D9 3U05 B2 3U15 C5 3U26 C6 3U36 D6 3U46 E8 3U56 E13 3U66 F5 3U76 E13 3UA8 C7 6U05 E12 7U05-2 D4 7U14-1 C13 9U02 F12 FU06 D9 FU25 D6 IU07 B3 IU18 C8 IU29 C13 IU40 D5 IU52 E8 IU65 F4 IU8G F14 IU96 D11
2U06 B14 2U16 C8 2U26 E7 2U36 G2 2U91 D9 3U06 B5 3U17 B8 3U27 C7 3U37 D7 3U47 E9 3U57 E14 3U67 F4 3U77 F14 3UA9 C6 6U06 E7 7U06 B6 7U14-2 B14 9U03 G12 FU07 E12 FU26 D10 IU08 B6 IU19 B13 IU30 C6 IU41 E5 IU53 E8 IU66 F13 IU8H F14 IU97 D11
2U07 C8 2U17 C2 2U27 E8 2U37 H2 2U92 D9 3U07 B3 3U18 B15 3U28 D2 3U38 D2 3U48 E7 3U58 E9 3U68 F8 3U78 C15 5U00 A10 6U07 F12 7U07 F7 7U15-1 E10 9U04 A13 FU08 F12 FU27 E4 IU09 E14 IU20 C7 IU31 C4 IU42 F5 IU54 E7 IU67 G9 IU8I E4 IU98 E9
2U08 B9 2U18 D6 2U28 E8 2U39 F13 2U93 A10 3U08 B8 3U19 C6 3U29 C14 3U39 D3 3U49 E4 3U59 E10 3U69 F9 3UA1 E7 5U01 B8 6U08 F7 7U08 C7 7U15-2 E10 9U05 B13 FU11 G12 FU28 E10 IU10 E13 IU21 C5 IU32 C15 IU44 D2 IU55 E13 IU68 G3 IU8J D2 IU99 E15
2U09 B9 2U19 D4 2U29 E6 2U40 E9 2U94 B9 3U09 B15 3U20 C6 3U30 E4 3U40 D6 3U50 E10 3U60 E4 3U70 F10 3UA2 E8 5U02 D8 6U09 E11 7U09 C3 7U16 B13 FU00 A14 FU12 G12 FU29 F8 IU11 B3 IU23 C10 IU33 C6 IU45 D3 IU58 E4 IU80 D14 IU90 E8

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

B02A DC / DC B02A
A A
+12VF
5U00
IU00 +12V
FU21 10u
FU00
FU22

2U00

3U00

3U01

2U01

2U03

2U02

2U93
100n
9U04
*

10R
10K

22u

22u

22u

22u
7U01 +12VS
9U05
4
3U02 IU02
5 6 *

3U04

2U06
FDS4488

1M0
BC847BPN

1u0
IU03
7U13-2 5
IU05 10K 12V/3V3 CONVERSION 6U01 FU23
IU06 6U00 3U03 2U04 VSW

2U05
3

1u0
IU07 BZX384-C12
IU08
B BAS316 10R 3n3
B

3U09

1K0
3UA7 FU01 5U01 SI4835BDY

3UA4
3U05

3U06
7U06

22R

22R
10K

IU11 3U07 FU02 7U16

2U10

3U11

2U12
100n

100n
4

1K0
6 SUPPLY-FAULT 10R 10u IU14
5 6

2U11
1

1u0
IU12 0V 100R 3V3 GND-SIG IU13 IU19 6U02

3UA3
3U08

3U17

2U08

2U09

2U94
2 FDS4488 5

22R

22R

6K8
BC857BS

3n3

22u

22u
7U13-1 7U03
BC847BPN 4 7U29-1 2
BZX384-C12
3 BC847BS

3U18

330R
2U14
5 6

100n
1 7U00 IU16 7U14-2

14
3U12

3U13

3U14

3U21
NCP5422ADR2G FDS4488 5 6
10K

10K

22K

47K
IU18 IU23 IU24
Φ

3UA6
3U15
VCC
3UA8 IU17

4R7

4R7
IU25

3UA9
7U29-2

3U22

100K
3
FU03 10R BC857BS

2U13

2U07

100n

IU29
4 1
12V SWITCH

1n0
BST H1 3U19 IU20 2U15

3U20
6

22R
GATE IU21
2 10R IU93
L1 3UA5 3n3 3U25 3U78 IU32

22R
7 7U08 IU27 7U14-1 2 +5V-POD
C IU28
10
1
VFB H2
16
IU26
4R7
5 6 IU95 BC847BS
1
22K 22K C
2 GATE IU30 3U23

2U16

3U24

3U29
IU31 15

1K0

47K
1n0

1u0
L2 2U44
8 IU33 IU34
1 4R7 FDS4488
IU35 5
7U09 COMP +1
* BC847BW
IU38 9
2 -1
6 IU36 3U26 FU24 3U27
2U17

100n

IU8J IS 3K3 6K8 FU04

IU39 13 12 POD-MODE
ROSC +2 IU40

2U18

3U31
100n
11

6K8
+1V2 -2

GND
* 2U53 12V/1V2 CONVERSION OVP
2U19

3U32
100n

39K

7U05-1 IU96
BC847BS 6 3U33
3
3 IU80
GND-SIG 100n
6K8 FU25 FU06 +1V2
3U34 IU44 2 3U35 IU45
5 3U36 3U37
7U05-2
D D
3U28

BC847BS
3K3

33K 10K IU46 1K0 6K8 FU05

1 4

2U90

2U92
2U91
2U21
3U38

3U39

330u 6.3V
*
33K

22K

* +3V3F

2U20

3U40

3U72

2U22
100n
7U27

10R
3K3

3U42
TS431AILT

2K2
22u

22u

22u

22u
BAS316 5U02 IU49

3U41
3 5

10R
IU48
3U43
6U04 10u
3U44 FU26
6
5U03 IU97
+3V3F 1
K A
2
* IU81 IU82

GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG GND-SIG 3K3 3U45 10K 7U28 NC NC

3UA2
3U46

3U55

2U24
2

22R

22R

6K8
7U15-1 REF

3n3
IU8I 3U30 IU51 10u PHD38N02LT
+1V2-STANDBY BC847BS

1u0
68R IU50

100u 4V

100u 4V
2U40

2U41

2U42
330R 3U48
1
+1V8 STABILIZER
3U49

3U50

4
1K0

1K0
33K 1%

IU53 2U25 IU10 3U10 3U51

1 4 IU52 IU55
3U52 68R
3U53

3U54
RES

RES
1M0
BC857BS BC857BS
E IU41 2U26 IU98
IU92 6U05 1n0 1K0 560R
E

2U27

2U23

3U56

220R
7U10-1 7U10-2

100n
2 5 FU27

1n0
1%

1%
2K2 IU54 3U58 FU283
1

IU58 7U11 100n BZX384-C6V8 IU09 3U57 SENSE+1V8

3U47

1% 120R
6 3

BAS316
RES 3UA1 10K IU59 3U59 FU07

6U06
IU60
K

5
PDZ9.1-B

IU90 7U15-2 +3V3 68R IU99

3U60

6U10
100K

BC847BS

330u 6.3V
R

IU61 470R 3K3 IU83 1%

STPS2L30A
3U61

2U29

2U33
2 4

1u0
12K 1%

IU62 3U62

2U28

3U63

3U64

9U01

6U09

2U43

3U76

220R
1K0

2K2
1n0

1u0
A

10K IU63
3U65

2U30

RES

TS2431
100n
RES

470R
* IU84 IU85
2U31

100n
RES

*
3

3U66 FU29
RES
10R RES 7U07 STPS2L30A FU08
3U67 BC817-25W IU91 +1V8
IU42

3U68

3U69
4K7

1% 1K0
PDZ18-B
IU65 10K 6U07 IU94

6U08

2U32

2U39
1u0

1u0
F BOOSTER * 9U02 F
12V UNDER-VOLTAGE DETECTION 3U70 1% FU20 * 3U73

10R
IU8G
SENSE+1V2-FPGA
IU66
+1V2 GND-SIG GND-SIG 1K0 3U77 IU8H
SENSE+1V2-PNX8535
120R 1%
ENABLE-3V3
FU11
PROT-DC

IU67 3U71
ENABLE-1V2
FU12
G 22K
G
2U34

100p

2U35

470n
2U36
IU68
9U03
100p
3U74

1% 470R

3U75

2U37

100n
4K7

GND-SIG

GND-SIG GND-SIG GND-SIG

H H

H_16770_013.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 78

SSB: DC / DC
1 2 3 4 5 6 7 8 9 2U38 A1
2U45 B2

B02B DC / DC B02B
2U46 B3
2U47 B4
2U48 C2
2U49 B6
2U50 B7
2U51 B8
2U52 B9
A 3U94 +5VS A 2U54 D5
+5V-STANDBY
2U55 D6
1R0
+5V-STANDBY 2U56 E5

3U85

3U86

3U92

3U90

3U89
47R

47R

47R
1K0

2K2
2U38 2U57 E5
2U58 E5

7
8

5
6
1u0 3U79 B1
IU70 7U02-1 +12V IU71 7U02-2
3U79 SI4936ADY 3U80 SI4936ADY 3U80 B3
2 4
+12VS FU80
3U81 C1

3
100K 220K +5V-ON IU78

3UB5

68K
3U82 D1
3 3

22u 16V
IU43 IU47 3U83 C3

2U45

2U46

2U47
100n

100n
1 7U19
IU79
* 1 7U20 3U84 D3
B +12V * 3U93 BC817-25W
2
FU81 +3V3-STANDBY BC817-25W
2
+1V2-STANDBY B 3U85 A5
3U86 A6
100K
2U49 2U51 FU82 3U87 B7
3U88 C7
FU83 1n0 1n0 3U89 A8
+5V-POD

3U87
1
3U90 A7

330R

2U50

2U52
1u0

1u0
7U17

1
3U91 C8
22u 16V
7U18
2U48

K
IU56 3U92 A6

NC
R

1K0 1%
IU57 1K0 3U93 B1
2 4

REF
3U94 A8

3U88
A
3U91

NC
TS2431 3U98 D6

A
TS431AILT 3U99 D7

3
C C 3UA0 E6

2
3UB1 E3
3UB2 E5
3UB3 E6
6 3 3UB4 D6
3U81 3U83 3UB5 B8
POD-MODE 2 7U04-1 5 7U04-2
BC847BS BC847BS 3UB6 E5
100K 100K 3UB9 E3
1 4
IU72 IU64 FU87 5U09 D5
VP
6U63 D5
6U64 D5
3U82

3U84
100K

100K

7U02-1 B2
D FU88 D 7U02-2 B4
6U63 IU73 3UB4 FU84 VN
+VTUN
7U04-1 D2
100R 7U04-2 D3

BZX384-C27
BAS316
7U17 B5

5U09

2U54

6U64

2U55

3U98

3U99
220u

220n

220n

33K

33K
7U18 C7
ON-MODE
7U19 B6
* * * 7U20 B9
IU74 3UB3
7U24 E4
+12VF 7U26 E6
VSW
IU75 2K2 FU80 B4
FU81 B7

3UA0
2U58

100K
1u0
E E
3UB1

3UB2

3UB6
FU82 B9
68R

68R
1K0

7U26
3

BC847BW FU83 B4
FU84 D6
IU76 7U24 IU04
1 BSH112 FU87 D7
FU88 D7
IU77
3UB9

IU04 E5
2U56

2U57

220p
10K

33p
2

IU43 B5
IU47 B8
IU56 C6
IU57 C8
IU64 D3
IU70 B2
F F IU71 B3
IU72 D1
IU73 D5
IU74 E5
IU75 E5
IU76 E3
H_16770_014.eps IU77 E6
3104 313 6196.2 190307 IU78 B7
IU79 B6
1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 79

SSB: DC / DC
1 2 3 4 5 6 7 8 9 10 11 12
2U60 C2 FU66 E7
2U61 C2 FU6S F5

B02C DC / DC B02C
2U62 D2
2U63 C1
2U64 C2
FU8A F12
IU15 F2
IU22 B3
2U65 B3 IU37 F10
2U66 C4 IU69 E10
2U67 B5 IU6A E6
2U68 E4 IU6E B4
2U69 B4 IU6F D2
2U6A B5 IU6J B2
A A 2U6B E4 IU6K C2
PNX 5050 SUPPLY 2U6C C6
2U6D D5
IU6L C4
IU6M D4
2U6E D5 IU6N D4
3U6G
PROT-DC 2U6G D5 IU6P D4
10K 3U6L 2U6H C5 IU6R F4
IU6J SUPPLY-FAULT
2U6I C6 IU6T C6
100R
2U6K B6 IU7B D4
5U67
2U6M D2 IU7C E5
220R 2U6N D5 IU7E E7
5U68 2U6R B5 IU7F E6
IU22 +12VF 2U6S B5 IU7H E7
B IU6E
220R B 2U70 G2 IU7J C1
5U61
* +12V 2U71 E6
2U72 C6
IU7K C3
IU7L C4
10u

22u 16V
2U73 C6 IU7M C1

BAS316

BAS316
3U7C

2U6R
3U7A

3U7B

2U6A

2U6S

2U6K
6U62

2U65

6U60

2U69

2U67

100n
10R
47K

1K0

1n0

22u

22u

22u

22u
2U74 C6 IU7N D5
IU7V
2U8A E9 IU7P E4
IU7J IU7K 2U8B F10 IU7Q E4
2U8C F9 IU7R E5
2U64

100n

IU7L 2U8D F11 IU7T D5

2U63

1u0

2U8E F12 IU7V B2

9

15

7U64 FU61 2U6H 2U6I

L6910 3U16 F9 IU86 E7
2U66
3U6A D5 IU87 F11
C C
PGOOD

OCSET
VCC

1n0 1n0 IU6T

GND1V4

3U6D
IU7M 3U6M 100n 3U6B C4 IU88 F12

3U96
22R

22R
2U60 1n0 5U60 3U6C D4 IU89 F12
1 VREF BOOT 12 22R
Monitor 3U6D C6 IU8A E9
2U61 100n IU6L 3U6B 10u
4 SS HGATE 11 3U6E E6 IU8B F10

2U73
2U6C
Protection & Ref

2U72

2U74
22R 3U6G A3 IU8C F9
3U7D IU6K

2U6E
2 OSC PHASE 10 7U61-1 7
3U6I F4 IU8D F8

22n
OSC 8

22u 16V
3U6J F5 IU8E F8

22u
100K IU6N

22u
22u 16V
GND1V4 IU6F IU6M 2 3U6K F5 IU8F F11
LGATE 14
IU7N 3U6L A7
FU60 8 PGND 13 SI4936ADY 1 3U6M C4
* 2U6M EAREF

3U7E
3U97

10R

6K8
3U6Y D4
3U6Y
D D
10R
10n 7U66-1 +12V 3U7A B1
BC847BS 6 2U6N 2U6D
GND 7 3U7B B2
IU7T 5U62 FU65
2 IU6P +1V4
3U7C B3
2n2 10n

2U6G
3U6C

3U7D C2
3U95

VFB 6
4R7

4R7

10n
7U61-2 5 6 220R

3U6A
1

1K0
3U7E D5
COMP

5U63
3U7F

2U62
47K

10n

IU7B 3U7F D1
NC

2U8A

3U8A
4

100n

1K0
220R 3U7G E5
GND1V4 7U8A-1 1
3U7H E4
16

SI4936ADY 3 BC857BS
5

IU6A 7U8A-2 4 2 3U7J E5

IU7P BC857BS IU69 3U7L E7
560R 1%
1K0 1%

5 6
IU86 IU8A 3U7N F2
3U7G

3U7Q
3U7H
2U6B

3U7J
470p

GND1V4 GND1V4 GND1V4

2K7

4K7

OVP
3U7P F3

3U8B

100K
IU7E
E 2U68
FU66
3
+3V3F E 3U7Q E5

100R 1%
IU7Q IU7R
*

3U8C
3U8A E10

2K2
3U6E
3U8B E9

1u0
IU7C
100n 2U71
3U8C E10

9U60
IU7F * 3U7L IU7H 7U8B
TS2431
7U8C
PHD38N02LT
3U8D F9
3U8E F8
100R 1% SENSE+1V4
3U8F F8
GND1V4 3 A K 1 3U8G F8
3U6I 3U6J
IU8B 3U95 D4
12V / 1V4 1K0 IU6R 470R R +2V5 STABILIZER 3U96 C7
5

3U97 D4
CONVERTOR

2
5U60 C5
F 3U6K
PROT-DC SENSE+2V5 3U8D
IU8F
IU87
F 5U61 B6
3U8E IU8E 3U16 IU37 2U8B 6U8A
* 6U8B FU8A
4

FU6S +2V5
7U66-2 10K +2V5 5U62 D6
IU15 BC847BS 100R

1K0 1%
3U7N 3U7P IU8D 100R IU8C 1K0 1n0 BZX384-C6V8 STPS2L30A 5U63 D6
ENABLE-1V2

3U8F
5U67 B6

3U8G

2U8C

2U8D

2U8E
100R
9U8A

1u0

1u0

1u0
22K 22K
5U68 B6
2U70

1u0

IU88 IU89 6U60 B4

* 6U62 B3
* 6U8A F10
6U8B F11
7U61-1 C5
7U61-2 D5
G G 7U64 C2
7U66-1 D2
7U66-2 F4
7U8A-1 E10
7U8A-2 E9
7U8B E9
7U8C E10
9U60 E4
9U8A F11
H_16770_015.eps FU60 D2
3104 313 6196.2 190307 FU61 C5
FU65 D7
1 2 3 4 5 6 7 8 9 10 11 12
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 80

SSB: Channel Decoder

1HE0 A10 9T12 D4
1 2 3 4 5 6 7 8 9 10 11 12 1T69 B1 9T13 D4
2T03 B1 9T14 D12
2T04 B1 9T15 C4

B03A CHANNEL DECODER B03A

2T05 G7
2T06 E4
2T07 F5
9T16 C4
9T60 B10
FHE0 A10
2T08 G7 FHE1 A10
2T09 F10 FHE2 A10
2T10 F10 FHE3 A10
2T11 F10 FHE4 B10
EJTAG-TRSTN
3T80 2T12 G6 FHE5 B10
1HE0 2T13 G6 FHE6 B10
A 1
FHE0 EJTAG-TRSTN EJTAG-TDI
10K 3T79
+3V3
A 2T14 G5 FHE7 B10
2 FHE1 EJTAG-DETECT EJTAG-TDI 3T95 10K 2T15 G4 FHE8 B10
FHE2 EJTAG-TDI
3 RES 100K 2T16 G4 FHE9 B10
4 3T78 2T17 G4 FT00 D10
5 FHE3 EJTAG-TDO EJTAG-TMS +3V3
+3V3-ATSC 2T18 G4 FT03 C4
FOR FACTORY 6 10K
7 FHE4 EJTAG-TMS 2T19 G3 FT04 G3
USE ONLY 8 2T20 G3 FT05 G4
9 FHE5 EJTAG-TCK 2T21 G3 FT06 C6
10 2T22 G3 FT07 C6
7T18-1 11 2T23 G2 FT08 C6

3T31

3T32

3T30
TDA10060HL/C1

10K

10K

10K
12 FHE6
Φ
3T13

2T27
2T24 G2 FT09 C6
15R

15p
13 FHE7 FHE8
B 2T04 IT32 3T07
DTV RECEIVER
2T35
14 FHE9
B 2T25 G2
2T26 G2
IT02 G5
IT03 G5
IT34 IT31 21 31 5-147279-3
P P 2T27 B2 IT04 G5

9T60
4M433619

330R 32 2T36 10n

8p2 XTAL N 2T28 C2 IT05 D6
1T69

5T09

IT30 20 IF 34 10n 3T18

2u7

N VCOP 3T20
2T03 VCON
35 100R 2T29 D4 IT06 D6
3T08 134 39 100R 3T25 2T37
IT36 3T11 DET AGC 2T30 G7 IT07 D6
IT35 136 65
8p2 IT33 330R +3V3-ATSC RX_DATA CLK 1K0 100n 2T31 D6 IT08 G5
135 66
4K7 TX_DATA SDATA 2T32 E9 IT09 E5
3T12

2T28

3T10
9T15 +3V3
15R

4K7
15p

SCL-SSB ANT CB
SDA-SSB 9T16 IT29 68 101 2T33 D10 IT10 F4
+3V3-ATSC SCK_SCL RP_SCLK
116
SPI_BSC RN_MCLK
102 2T34 E11 IT11 E3
SCL-SSB1 3T37 100R IT28 69 106 2T35 B9 IT12 E4
IT27 MISO_ADDR1 LP_DATA
SDA-SSB1 3T38 100R 70 107
MOSI_SDA LN_LR +3V3-ATSC 2T36 B8 IT15 C3
C IT26 67
SSB_ADDR0
HOST
AUD
RESET
40 3T21
RESET-SYS-DETECT C 2T37 B9 IT16 D3
3T01 C3 IT17 F4
3T01

3T03

FT06 128 121

1K2

1K2

JTAG-TCK TCK 0 33R

JTAG-TD-PNX8535-FE FT07 126 120 3T03 C3 IT26 C6
TDI 1

3T48
FT03 3T14 22R JTAG-TD-FE-CON FT08 129 41 IT49

4K7
TDO IRQ_OUT 3T05 E4 IT27 C6
JTAG-TMS FT09 127 3 ITA1
TMS 0 3T07 B2 IT28 C6
140 ITA2
IT15 JTAG 1 3T08 B2 IT29 C6
TUN-TDA-SCL 130 GPIO 115 FM-TRAP-SWITCH
SCL 2 3T09 D4 IT30 B6
TUN-TDA-SDA 131 114
IT16 SDA 3 3T33 3K3
MAST 0
75 ITA3 +3V3-ATSC 3T10 C5 IT31 B6
TDA-IF-IN-P IT39 3T29 390R 2T31 3p3 7 76 ITA4 3T34 3K3 3T11 B5 IT32 B2
IT40 P 1
TDA-IF-IN-N 3T19 390R 8 IF 77 ITA5 3T35 3K3 +3V3
N 2 3T12 C1 IT33 C2
FE-CLK 3T09 56 78 ITA6 3T36 3K3
IT38 3T15 3K3 IT05 PS_CLK 3 3T13 B1 IT34 B2
9T10 33R 117 GPO 82 +2V5-TUN
+3V3-ATSC 3T16 3K3 ADC_CLK 4 3T14 C5 IT35 B2
D TDA-IF-AGC
9T11 IT37
3T17 1K0
IT06
IT07
118
142
ADC_F1B
AGCI_CTL
5
6
83
84 D 3T15 D6 IT36 B1

2T33

100n
141 113 +3V3 3T16 D6 IT37 D4
AGCT_CTL 7 IT47

9T14
FE-DATA0 3T40 33R 55 BC847BPN
0 MISC 3T17 D6 IT38 D4
9T12

9T13

2T29

FE-DATA1 7T19-2
100n

3T41 33R 54 89 7T20

FE-DATA2 1 3T18 B9 IT39 D4
3T42 33R 51 90 LD1117DT25C
FE-DATA3 2 3T19 D5 IT40 D4
3T43 33R 50 91 +3V3-ATSC
3 FT00

470R
3T87

3T86
+5V-ON FE-DATA4 3T44 49 DATA 92 3 2 3T20 B8 IT45 E11

2K2
33R 4 +3V3 IN OUT
FE-DATA5 3T45 33R 48 93 3T21 C8 IT46 E10
5 NC

2T32
FE-DATA6

100n
3T46 33R 43 94 COM
FE-DATA7 6 IT45 3T22 E6 IT47 D11
3T47 33R 42 95
7 3T23 E6 IT49 C8
3T90

3T22 64 96
1K0

FE-ERR 33R

1
ERR 3T24 E6 ITA1 C8
FE-SOP 3T23 33R 57 97
3T91 IT11 IT12 3T05 SYNC
TUN-AGC-MON 9T06 IT09 FE-VALID 3T24 33R 63
VALID IT46
3T25 B8 ITA2 C8
3T89
E 100K
4
10K
+3V3-ATSC
CS
3K3
7T19-1
BC847BPN E 3T29 D4
3T30 B6
ITA3 D8
ITA4 D8
2T06

100n

7T06-2 3T31 B5 ITA5 D8

3T88

2K2
BC847BPN

1u0
5 2T34 3T32 B6 ITA6 D8
3T33 D9 ITA7 G7
3
3T34 D8 ITA8 G7
2T07

3T92

10K
10n

3T35 D9 ITA9 F10

IT10
3T36 D8
3T37 C6
3T38 C6
6 3T40 D6
3T93 IT17 3T41 D6
F 1K0
2 7T06-1
BC847BPN +3V3-ATSC
+1V2 F 3T42 D6
3T43 D6
3T94

1
10K

5T02
ITA9 3T44 D6
220R 3T45 E6
+2V5-TUN
3T46 E6

2T11

2T09

2T10
10n

10n

10n
220R 3T47 E6
3T48 C10

220R
5T32
5T31
+1V2
3T78 A12
+3V3-ATSC
+2V5-TUN 3T79 A12
IT02 IT03 IT04 IT08 +2V5-TUN
FT04 FT05 +3V3-ATSC 3T80 A11
ITA7 +1V2 +2V5-TUN
ITA8 3T86 E11
3T87 E11
G G
2T08

2T05

3T88 E10
10n

10n
2T26

2T25

2T24

2T23

2T22

2T21

2T20

2T19

2T18

2T17

2T16

2T15

2T14

2T13

2T12
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

7T18-2 3T89 E10

108
100

104

110
122
138

112
125
132
143

119
137
18

33

29

28

23

10

12
13

17

14

25
44
58
71
88
98

81

38
47
53
61
74
80
85

60
2T30

TDA10060HL/C1
10n

2
XTAL 1P2 2P5 1P2 O P AVDD 1P2 2P5 PLL D 2P5
3T90 E5
VDDC_1P2 3P3 VDDP_2P5 3T91 E3
DVDD AVDD DVDD AUD_VDD DIGPLL AVDD VDD
3T92 F5
Φ
VDDO
OB DS 3T93 F4
DTV RECEIVER 3T94 F4
SUPPLY 3T95 A12
XTAL OB AUD 5T02 F9
VSSO DIGPLL DS_AGND VSSC VSSO
VSS DVSS AVSS DVSS AVSS 5T09 B2
5T31 G8
22

19

30
36

27

105
103

24

6
11
15
16

5
26
45
59
72
87
99
109
123
139

1
37
46
52
62
73
79
86
111
124
133
144
H H 5T32 G9
7T06-1 F5
7T06-2 E4
7T18-1 B7
7T18-2 G8
7T19-1 E11
7T19-2 D11
7T20 D9
9T06 E4
H_16770_016.eps 9T10 D3
3104 313 6196.2 190307 9T11 D3

1 2 3 4 5 6 7 8 9 10 11 12
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 81

SSB: Main Tuner

1T04 C2 2T47 G4 2T59 F2 2T64 D5 2T82 G11 2T86 F9 2T90 F15 2T98 F11 2TA3 E14 2TB5 F14 3T54 F11 3T58 F9 3T69 F2 3T74 G11 3T81 F14 5T53 D13 7T56 F2 9T51 E5 9T63 F11 9T86 H3 AT59 G14 FT56 G14 FT72 F10 IT65 F11 IT69 F14 IT75 G11 IT79 G12 IT83 G11 IT87 F2 IT91 F4 IT95 F12
1T05 A2 2T48 E14 2T61 E2 2T75 F2 2T83 G11 2T87 E9 2T91 F11 2T99 D13 2TA4 D13 2TB6 F14 3T55 G11 3T59 F9 3T70 F2 3T75 G11 3T82 F14 5T54 D5 7T57 E13 9T52 F5 9T67 F5 AT56 F14 AT62 D3 FT57 F10 IT60 G12 IT66 G10 IT71 E14 IT76 F5 IT80 F4 IT84 G12 IT88 F2 IT92 E14
1T06 C7 2T51 F14 2T62 E5 2T80 F11 2T84 F2 2T88 E11 2T92 H12 2TA1 F14 2TA5 D13 3T50 F14 3T56 E14 3T64 F10 3T71 G4 3T76 E14 3T83 G10 5T60 B7 7T58 G3 9T57 G9 9T68 E5 AT57 F14 FT52 E2 FT60 B6 IT62 G11 IT67 G10 IT73 F11 IT77 G11 IT81 F8 IT85 H2 IT89 E4 IT93 C13
1T55 A7 2T53 D1 2T63 G12 2T81 G11 2T85 F14 2T89 E11 2T97 G12 2TA2 G11 2TB2 F3 3T53 F4 3T57 E14 3T68 F3 3T72 G4 3T77 E4 3T84 G10 5T61 D4 7T59 G10 9T62 F11 9T85 H3 AT58 F15 FT53 E4 FT70 D13 IT63 G11 IT68 F14 IT74 F12 IT78 E5 IT82 F8 IT86 G2 IT90 E4 IT94 F12

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

B03B MAIN TUNER B03B

A A
1T55
MAIN DIG TUNER C0 IF-OUT 1 4
I O1 ATSC
1T05 2 5
IGND O2
VA1Y9ED2002
FT60 3
TUNER GND
14 13 X6931D
15 MT MT 12 44M
OBBOUT

2u2
RF-AGC

IFOUT
4MHZ
SDA
NC1

NC2

NC3
SCL

BM
AS

5T60
B B
10
11
1
2
3
4
5
6
7
8
9

IF-FILTP3

IF-FILTN3

IF-OUT
1T06
1 4
I O1
2 5 ANALOGUE VIDEO
IGND O2
1T04
TD1736OF/FHFXP 3
GND
C TUNER
X6767D
C
14 13
ERF-GAIN
FM-TRAP

IF-FILTP1
RF-OUT

IF-OUT

15 12 IF-OUT IF-FILTN1
4MHZ

GND
APO

SDA

VTU
SCL
PLL

+5V-ON
IT93
AT62 5T61
10
11
1
2
3
4
5
6
7
8
9

270n

100u 16V

2T99
220R
5T53
D 2T64
V1
FT70
D
2T53

10n

22u

100n

22u
V2 5T54 +5V-ON

2TA4

2TA5
220R
2T62

IT89 100n
TUN-AGC
FT52 7T57
4-MHz TDA9897HL/V1 3T76

43

44
IT71
100n

V2 FT53
14
E 18 IC
VP
Φ
39
3K3 IT92 2TA3
4-MHz E
2T61

OPTXTAL
IT78 2T48 100p
9T51 SDA-MUX2-BUF 42
DIV IF FREF
46
2T88
3T77 TDA-IF-IN-N PROCESSING 100p 3T57
9T68 TUN-TDA-SDA 10n 26 23 SDA-SSB1
A SDA

2T87
2T89 27 OUT1 24 3T56 100R

3p3
IT90 RES SCL-SSB1
220R B SCL
2TB2
3T70

150p

10n 32 100R
4K7

BVS
2T75

29 25
10n

TDA-IF-IN-P IT94
3T53 A ADRSEL
2T59

2T91
150p

100n
9T67 TUN-TDA-SCL IT95 30 OUT2 AT57
B
IT87 RES 6 2T51 IF-FILTN1
220R IT76 A

390R

390R
3T59
3T58
9T52 SCL-MUX2-BUF 47 IF1 7 10n 2TA1 IF-FILTP1
TAGC B
31 IT68 10n
FT72 IT65 AUD AT56 2T90
33 9
CVBS A 10n
IF2 10
F IT81 B IT69 3T82 10n
F

9T62
IT91 IF-N TUN-AGC 9T63 12 2T85
3T68 IT80 1
2T84

3T64
16 MPP 3 10n

75R
10n

FM-TRAP-SWITCH TUN-AGC-MON 2 A 3T81 180R

2T86
IF3 4

3p3
IT88 4K7 B 2TB5 IF-OUT
+3V3 2T98 15 3K9
IT82 EXTFILO 3T50
100K
3T69

7T56 IF-P FT57 17 10n AT58

BC847BW 1n5 IT73 2T80 IT74 FILI
3T54 13 100K IF-FILTP3
VIF EXT 2TB6
V1 330R 220n 21 IF-FILTN3
2T81 IT62 FMI
TUN-AGC 9T57 IT66 19
FM LF AT59
2T47

100n

47p 2T97 IT84 38 36

RES

CVBS4 TDA-IF-AGC
3T55 IT63 2T82 100n 1 SYN1 DIN
37
SYN2 AGC SWI FT56
8K2 45
3T74 2n2 IT83 VIN
20
CDEEM
470R IT77 IT60 2
3T75 2T83 2T63 1
8
G 7T59 CTAGC
G
8

3T71

3T72

BC847BW
RES

RES

5 TOP
4K7

4K7

7T58 IT75 4n7

2K7 100n CIFAGC
PCA9515ADP 11
3T83 2

2TA2
RES VCC 35

22p
IT67 APCLC
IT86 68R 28
IT79 CAF
SDA-SSB-MUX2 3 SDA0 SDA1 6 SDA-MUX2-BUF 34
APCHC GND GNDD GNDA

220R
3T84

2T92

48

22

41
40
1n5
IT85
SCL-SSB-MUX2 2 SCL0 SCL1 7 SCL-MUX2-BUF

5 EN 1
NC
GND

H H
4

9T85

9T86

H_16770_017.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 82

SSB: SSB: PNX 85xx: Standby Controller

1 2 3 4 5 6 7 8 9 10 11 12 13 14 1HF0 A3 7H03 G13
2H00 B3 7H04 E4

B04A PNX 85xx: STANDBY CONTROLLER B04A

2H01 D3
2H05 G13
2H06 C14
7H14 E3
7H16 H10
7H18 H11
2H07 C14 7H21 F13
2H08 F4 7H22 F12
+3V3-STANDBY SCL-UP-MIPS 9H09 FH10 2H10 C11 7H90 F4
2H11 I4 7H91 H4

27M
2HF0

1HF0
SDA-UP-MIPS 9H10 FH11 2H90 G4 7H92 I4

27p
7H00-6
PNX85xx 2H91 H4 7H93 I3
A AHF0 3HF1
STANDBY CONTROL FH12 A 2HF0 A3 9H01 C14
100R 2HF1 A3 9H02 D14

2HF1
3H09

10K

27p
AG1 3H00 B11 9H03 C14
I
AD4 SPI-SDO 3H01 B11 9H05 H8
XTAL SDO 3H32
AG2 AE1 SPI-SDI SPI-SDI 3H02 B11 9H06 I8
O SDI
SPI AD1 SPI-CLK
3H57 AA3
CLK
AE3
10K 3H03 B11 9H07 E13
RESET-STBY-J RESET_IN CSB SPI-CSB
3H04 B11 9H08 B14
3H10 100R 3H00
P0.0 P0.0 U5 SPI-PROG +3V3-STANDBY
3H05 B11 9H09 A9
3H13 0 3H01
10K P0.1 P0.1 U4 SPI-WP 10K 3H06 B11 9H10 A9
+3V3-STANDBY 3H14 1
4K7 P0.2 P0.2 U3 3H07 B11 AHF0 A4
2 3H02 10K
3H15 10K P0.3 P0.3 U2 AG4 3H38 SCL-UP-MIPS SCL-UP-MIPS
3H16 U1
3
P0 I2C uP
SCL
AH3 3H41 SDA-UP-MIPS 4K7 3H03
3H08 C11 FH00 C13
10K P0.4 P0.4 100R SDA-UP-MIPS
B 3H17
10K
10K
3H19
P0.5 P0.5 V5
V4
4
5
SDA
AD3
100R 3H44 CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3 3H04 4K7 B 3H09 A3
3H10 B2
FH01 C13
FH02 G7
P0.6 P0.6 6 0 CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3
3H20 10K P0.7 P0.7 V3 PWM AD2 3H50 100R CTRL5-STBY_BACKLIGHT-BOOST CTRL5-STBY_BACKLIGHT-BOOST RES 10K 3H05 3H11 E13 FH10 A10
7 1
10K 2H00 100R 3H53 10K 3H12 E13 FH11 A10
3H39 3H40 3H06
+3V3-STANDBY 1n0 RC RC AA2 Y1 PSEN PSEN
3H42 10K 3H43 100R AA1
0 PSEN 3H13 B1 FH12 A10
LED2-3V3 LED2-3V3 1 3H54 100R 10K 3H07
3H46 ALE 3H14 B2 IH00 D9
10K CEC-HDMI CEC-HDMI 100R 3H47 AB4 Y2 ALE 9H08
2 P1 ALE
3H48 10K SUPPLY-FAULT SUPPLY-FAULT 3H49 100R AB3 100R 10K FH00
3H15 B1 IH01 D11
3 3H56 3H08
10K 3H51 DETECT-1V2-2V5-3V3 DETECT-1V2-2V5-3V3 100R 3H52 AB2
7 EA
AA4 EA EA SPI-PROG 9H03 3H16 B2 IH02 D4
3H21 10K 100R 100R 10K 3H17 B1 IH03 D9
P2.0 P2.0 V2
3H23 10K V1
0 2H06 3H18 I2 IH04 G2
P2.1 P2.1 1
+3V3-STANDBY 10K 3H24 P2.2 P2.2 W4 +3V3-STANDBY 3H19 B2 IH05 G4
2 100p
3H26 10K P2.3 P2.3 W3 3H20 B1 IH06 D9
C 3H28
10K 3H27
10K
P2.4 P2.4 W2
W1
3
4
P2 C 3H21 C2 IH07 D9
P2.5 P2.5 5 2H07 3H22 I2 IH08 E3
10K 3H30 P2.6 P2.6 Y4
6 3H23 C1 IH09 H7

2H10

100n
3H31 10K P2.7 P2.7 Y3
7 100p 3H24 C2 IH10 G13
10K FH01
3H58 3H59 AB1 9H01 3H25 I3 IH11 G12
+3V3-STANDBY RXD-UP RXD-UP 0 SDM
3H60 10K TXD-UP TXD-UP 3H61 100R AC5 3H26 C1 IH12 H12
1

8
10K BOLT-ON-IO 100R 3H63 AC4 7H02
2 3H27 C2 IH13 H11
3H64 RESET-SYS-DETECT IH02 100R AC3 P3 M25P05-AVMN6 9H02
10K 3H37 AC2
3
VCC
3H28 C1 IH14 H11
3H67 AV2-BLK IH00 IH01
Φ
4 3H29 I3 IH15 H10
3H69 10K SDM 10K RES AC1 SPI-SDO 5 2 SPI-SDI
5 D Q
10K IH03 512K 3H30 C2 IH16 E13
3H70 KEYBOARD 3H65 AF4 6
RESET-SYS-DETECT 0 SPI-CLK C FLASH 3H31 C1 IH17 E13
AV2-BLK 3H66 100R AF3 IH06 3H32 A11 IH18 I7
D 680R 2H01
SDM
KEYBOARD
100R
100R
3H68
3H71
AF2
AF1
1
2
P5 SPI-CSB 1
S D 3H33 I3 IH19 G4
100n 3 IH07
LIGHT-SENSOR 3H72 100R SPI-WP 3 3H35 D4 IH20 E4
3H36 W
BOLT-ON-IO AV1-STATUS 100R 3H73 AE2 3H36 D2 IH25 G3
4
10K AV2-STATUS 3H74 100R AE4 P6 7 3H37 D4 IH26 H3
5 HOLD
100R 3H38 B7 IH30 I2
SPI-PROG 3H35 +3V3-STANDBY VSS
+3V3-STANDBY
100R
3H39 B2 IH31 I4
SPI-WP
3H40 B4 IH32 I4

4
+3V3-STANDBY 3H41 B7 IH90 F4
SENSE+1V2-PNX8535
3H42 B1 IH91 H2
3H77

100K

3H43 B4 IH92 H4
3H78

10R

3H44 B7 IH93 H4

3H12

10K
E 7H14 CTRL3-STBY_POWER-OK-DISP
E 3H46 B2
3H47 B5
IHSF G13
IHWZ G8
BC847BW 9H07 3H11
3H48 C1
3H86

4K7

IH08 100R 3H49 C4

7H04 POWER-OK-DISPLAY 3H50 B7
NCP303LSN10T1 IH17 IH16
IH20 3H51 C2
2
IN
3H79

1 3H52 C4
68K

RST DETECT-1V2-2V5-3V3
3 7H22 7H21 3H53 B7
GND
3H92

180K

PDTC114EU PDTC114EU
2H08 IH90 3H54 B7
5 4 RES
CD NC 3H56 C7
100n 3H57 B4
3H58 C2
F +3V3-STANDBY
F 3H59 C4
3H60 C1
3H61 C4
3H63 D5
3H64 D1
3H87

68K

7H90 +3V3-STANDBY +3V3-STANDBY

3H65 D4
IH25 6H00 NCP303LSN10T1 3H66 D4
3H84 IH04 3H89 IH19
+3V3 2
IN
1
3H67 D2
10K 100K RST DETECT-1V2-2V5-3V3
BAS316 3 3H68 D4
GND
3H69 D1
3H91

22K

2H90 IH05

3H80

3H81
100K
5 4 3H70 D2

68K
CD NC
7H03 3H71 D4
G 100n
DV-B3_AUDIO-MUTE
FH02 6HW0 3HW0 IH11 BAS316 IH10
2
NCP303LSN10T1 G 3H72 D4
IN 3H73 D4
47K 1 DETECT-5V-12V
BAS316 6H01 RST
3 3H74 D4
+3V3-STANDBY +3V3-STANDBY +3V3-STANDBY GND

3H82
3H77 E2

22K
6HW1 2H05 IHSF
AUDIO-RESET AUDIO-MUTE 5 4 3H78 E3
CD NC
BAS316 IHWZ 100n 3H79 F2
3H80 G11
3H94

68K

3H83

3H85
3H81 G12

100K

100K
7H91 7H16 7H18
NCP303LSN10T1 BC847BW BC847BW 3H82 G12
3H96 IH91 3H97 IH26 6H05 IH92
+2V5 2 3H83 H10
IN IH15 IH13
8K2 47K 1 DETECT-1V2-2V5-3V3
BAS316 3
RST 3H84 G2
H GND
H 3H85 H11
3H98

22K

2H91 IH93
5 4 IH09 3H86 E3
CD NC 3H88 3H90
LED1-3V3 9H05 LED1 IH14 IH12 3H87 F3
+3V3-STANDBY 100n +5V-ON +12V
1K0 27K 3H88 H10
3H89 G3

3H93

3H95
10K

10K
SENSE+1V4
3H90 H11
3H18

3H91 G3
100K

IH18
3H25

9H06 3H92 F3
10R

LED2-3V3 LED2
3H93 H11
3H94 H3
3H95 H12
3H96 H2
3H29

4K7

IH30
I 7H93
BC847BW
7H92
NCP303LSN10T1
I 3H97 H3
IH31 3H98 H3
2
IN 3HF1 A4
3H22

1
68K

RST DETECT-1V2-2V5-3V3
3 3HW0 G8
GND
6H00 G3
3H33

180K

2H11 IH32
5 4 6H01 G12
CD NC
100n 6H05 H3
6HW0 G8
H_16770_018.eps
3104 313 6196.2 120707
6HW1 G8
7H00-6 A5
7H02 D10
1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 83

SSB: SSB: PNX 85xx: Debug SSB: SSB: PNX 85xx: NVM / UART Switch
9H20 A3 9H23 B3 9H26 B3 9H29 B3 9H32 B3 9H35 B3 9H38 C3 9H41 C3 9H44 C3 1 2 3 4 5
9H21 A3 9H24 B3 9H27 B3 9H30 B3 9H33 B3 9H36 B3 9H39 C3 9H42 C3
9H22 A3 9H25 B3 9H28 B3 9H31 B3 9H34 B3 9H37 C3 9H40 C3 9H43 C3 2HC0 B4

B04C PNX 85xx: NVM /UART SWITCH B04C 2HC1 C4

3HC0 A3
1 2 3 4 +3V3-STANDBY

IHC2
3HC1 A5
3HC2 A3
9HC0 9HC1
RES
3HC3 D3
A A 3HC4 D3
PNX 85xx: DEBUG

3HC0

3HC1
B04B

100K
B04B

10K
3HC5 D3
3HC6 E3
RESET-NVM_WP-NANDFLASH FHC6 3HC2 IHC0
BC857BW 3HC7 E3
10K
7HC4 3HC8 F3
3HC9 B3
2HC0 7HC0-1 C3

A A +3V3-STANDBY
7HC3
IHC1
100n
7HC0-2 D3
7HC0-3 E3
M24C64 7HC0-4 E3

8
ROW_1 ROW_2 7HC1 F2
Φ

3HC9
1H10-1 1H10-2

10K
(8Kx8) 7HC2 F3
1 LED1-3V3 9H20
9H21
P0.0 2 B EEPROM
WC
7
FHC1
B 7HC3 B4
RESET-NVM_WP-NANDFLASH P0.1 1 6 7HC4 A4
3 4 IH21 0 SCL SCL-UP-MIPS
ENABLE-1V2 9H22 P0.2 2 9HC0 A3
5 6 1 ADR FHC2
REGIMBEAU_CVBS-SWITCH 9H23 P0.3 3
2 SDA
5 SDA-UP-MIPS 9HC1 A4
7 8 9HC2 C3
ENABLE-3V3 9H24 P0.4
9 10

4
CTRL1-STBY_LAMP-ON 9H25 P0.5 FHC1 B5
11 12 FHC2 B5

9HC2
AUDIO-RESET 9H26 P0.6 FHC7
13 14 FHC3 D2
UART-SWITCH 9H27 P0.7
15 16 FHC4 E3
9H28
17 18 FHC5 F2
DV-B2_DEBUG-BREAK 9H29 P2.0
19 20 MAIN NVM FHC6 A2
B 21 EJTAG-DETECT
AV1-BLK
9H30
9H31
P2.1
P2.2
22 B C C FHC7 C4
IH21 B3
23 24
ON-MODE 9H32 P2.3 IHC0 A3
25 26 +5VS
POD-MODE 9H33 P2.4 IHC1 B4
27 28
DETECT-5V-12V 9H34 P2.5 2HC1 IHC2 A4
29 30
CTRL4-STBY_SELECT-PWM-ANA 9H35 P2.6
31 32 7HC0-1 100n

14
CTRL3-STBY_POWER-OK-DISP 9H36 P2.7 3HC3 74HC4066PW
33 34 1
9H37 RXD 1
35 36 3HC4 100R 1 2 RXD-UP
RES 9H38 ALE FHC3
13
37 38 X1
RES 9H39 PSEN
39 40 100R

7
9H40 EA
41 +3V3-STANDBY +3V3-STANDBY 42
9H41
43
45 RESET-STBY 9H42 RESET-STBY-J
44
46
D 7HC0-2 D

14
74HC4066PW
47 48
C 49 50 C 3HC5
4

5
1
1 3 RXD-MIPS
UART-SWITCHn X1
FTSH-125-01-L-DV FTSH-125-01-L-DV 100R

7
3HC6
TXD
100R 7HC0-3

14
74HC4066PW
+5VS 8 1
1 9 TXD-UP

E 6
X1 E

3HC7

7
10K
FHC4
UART-SWITCHn 7HC0-4

14
3 74HC4066PW

D D UART-SWITCH 1
11 1

12
1 10 TXD-MIPS
FHC5 X1
2

7
7HC1
PDTC114EU
10K

H_16770_019.eps
F 3 3HC8
F
3104 313 6196.2 120707 1 7HC2
PDTC114EU
2

1 2 3 4 3104 313 6196.2

H_16770_020.eps
120707

1 2 3 4 5
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 84

SSB: SSB: PNX 85xx: Miscellaneous

1 2 3 4 5 6 7 8
2HD0 D2
3HD0 D2

B04D PNX 85xx: MISCELLANEOUS B04D 3HD2 C3

3HD3 C2
3HDJ C5
3HDK C6
A A 3HDL C6
3HDM C6
3HDN C7
3HDP C6
6HD0 C7
6HD1 C7
7HD0 C3
7HD1 C4
7HD6-1 C5
7HD6-2 C6
7HD8 C7
9HD0 C3
B +3V3-STANDBY +5VS
B 9HD1 D6
FHD0 C4
FHD1 C1
IHD2
FHD2 D6
FHD4 C6
+3V3-STANDBY +3V3-STANDBY IHD0 C2

BAS316
3HDK

3HDL

6HD0
3HDJ

10K

10K

10K
IHD2 B7
IHD4 C6

3HD0
IHD4
3HDP IHD5 C5

3HD2

10K
3HD3

IHD6 C5
2K2

FHD0 IHD5 IHD6 33K IHD7 3HDM

7HD0
NCP303LSN10T1 * 9HD0
3
RESET-STBY
6 3
IHD7 C6
IHDA C3
C FHD1 2
IN
1 IHDA 1 2 5
18K 7HD8
C IHDE C8
7HD1 7HD6-2
RST PDTC114EU BC847BS
3
GND
IHD0 2 7HD6-1 1 4
5 4 BC847BS BC847BW
CD NC

BAS316
FHD4

3HDN
0V

6HD1
1K0
0V3 IHDE
3HD0

2HD0

100n

9HD1
1K2

FHD2

* 0V3

D D

POD-MODE

ON-MODE

STANDBY
E E

F F

H_16770_021.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 85

SSB: SSB: PNX 85xx: Control

1 2 3 4 5 6 7 8 9 1HP0 D4
2HF2 C1
PNX 85xx: CONTROL 2HF5 C7

B04E +3V3-PER

B04E 2HF6 D7
2HF7 D8
2HF8 D8
2HP1 E4

3HF3

10K
A A 3HF0 B5
3HF2 C7
7H00-4 RESET-SYS-DETECT 3HF3 A6
PNX85xx
3HF4 C7

SML-310
MIPS C0NTROL 3HF9 B6

6HF0
JTAG-TD-PNX8535-FE
3HFG B7
EJTAG-TDI AK1 AJ26 RESET-SYS-DETECT 3HFH B6
TDI RESET_SYS
EJTAG-TCK AJ2
AK3
TCK
AK26
IHS7 3HF0 FHP4 3HFK D8
EJTAG-TMS TMS EJTAG 27MHz_OUT PCI-CLK-OUT JTAG-TD-PNX5050-PNX8535
3HFM E8

3HF9

330R
EJTAG-TRSTN AJ3 33R
TRST
EJTAG-TDO AK2 3HFN E8
TDO
3HFP D8
SCL1 AK27 3HFR D6
SCL
B SDA1
SCL2
AH27
AK29
SDA
SCL
I2C1
3HFG
B 3HFY C2
3HP8 C1
SDA2 AK28 I2C2 PCI-CLK-OUT PCI-CLK-DEBUG
SDA
SCL3 AJ28 33R
3HPA D3
SCL
SDA3 AJ27
SDA
I2C3 3HPB D3
3HFH PCI-CLK-PNX5050_CLK-MOP 3HPC E6
9HF8 AE27
+1V2 VPP_ID IHF0 3HPD E1
33R IHF5
CA-CTRLEN_BOOTMODE IHF6 T1 3HPE E1
0 3HF2
CTRL1-MIPS_LCD-PWR-ON T2 PCI-CLK-PNX8535 3HPF E1
1
T3 3HPG E1
100n

IRQ-PCI 33R
2HF2

IHF7 2
CA-INT 9HG1 G27 GPIO 3HPH E1
3 3HF4
RXD-MIPS E27 PCI-CLK-USB20
9HG0 IHS8 D28
4 3HPJ F1
TXD-MIPS 5 33R 3HPK E3
C C 3HPM F3
9HG2
RES

3HPQ F3
3HP8
CA-INT RESERVED +3V3 3HPR E6
+3V3-PER 10K 2HF5 3HPS F6
3HPT F3
3HFY 10n
CA-CTRLEN_BOOTMODE 3HPU F6
+3V3-PER 2HF6
10K 3HPW F6
7HF1 100n 3HPX E6
CY2305S

6
3HPY E7
Φ VDD
3HPZ E6
ZERO 3
2HF7
6HF0 A6
DELAY 1
D SCL-SLAVE
SDA-SLAVE
9HP5
9HP6
SCL-UP-MIPS
SDA-UP-MIPS
3HPA 100R FHP0 IHF4
1HP0
3HFR
BUFFER
2
2
10p 3HFK
PCI-CLK-PNX8535 D 7H00-4 A3
7HF1 D7
SCL-2 9HP7 SCL-UP-MIPS PCI-CLK-OUT 1
9HP8 FHP1 IHF8 1 SCL REF CLK
5
3HFP 33R 7HP5 E4
SDA-2 SDA-UP-MIPS 2 33R 3 PCI-CLK-DEBUG
SCL-SSB 9HPA SCL-SSB-MUX1
9HF8 B2
3 SDA 33R
SCL-SSB 9HPB SCL-SSB-MUX2 3HPB FHP2 IHF9 5 4 7 2HF8 9HG0 C2
100R 4
SDA-SSB 9HPC SDA-SSB-MUX1 15p 9HG1 C2
SDA-SSB 9HPD SDA-SSB-MUX2 8 9HG2 C3
CLKOUT 3HFM
GND PCI-CLK-PNX5050_CLK-MOP 9HP5 D1

4
+3V3-STANDBY 33R 3HFN 9HP6 D1
PCI-CLK-USB20
33R
9HP7 D1
3HPD
SCL1 SCL-SLAVE 9HP8 D1
3HPE 100R 9HPA D1
2HP1

100p

E SDA1
100R 3HPF
SDA-SLAVE +3V3-STANDBY
E 9HPB D1
9HPC D1

3HPC

3HPX

3HPY
3HPZ

4K7

4K7

4K7

4K7
SCL2 SCL-2
100R
9HPD D1
3HPG
SDA2 SDA-2 FHP0 D4
7HP5 3
100R 3HPH 3HPK PCA9540BDP
FHP1 D3
SCL3 SCL-SSB SCL-SSB +3V3-PER 3HPR FHP2 D4
FHP3
100R 4K7 VDD SC0 5 SCL-SSB-MUX1
SDA3
3HPJ
SDA-SSB SDA-SSB
3HPM FHP3 E7
3HPW 100R IHPF
100R 4K7 SC1 8 SCL-SSB-MUX2 FHP4 B9
3HPT NULL 100R 3HPS FHPA FHPA F6
1 SCL SD0 4 SDA-SSB-MUX1 FHPB F6
I2 C
INP
3HPQ 100R
SDA FIL
-BUS
SD1
3HPU 100R FHPB IHF0 B6
2 CTRL 7 SDA-SSB-MUX2
IHF4 D4
F 100R
VSS
100R
F IHF5 B7
IHF6 C3
6
IHF7 C3
IHF8 D4
IHF9 D4
H_16770_022.eps IHPF F6
3104 313 6196.2 120707 IHS7 B4
IHS8 C2
1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 86

SSB: SSB: PNX 85xx: Control

1 2 3 4 5 6 7 8
3HES C7
3HET C7

B04F PNX 85xx: CONTROL B04F 3HEU C5

3HEV B8
3HF5 B2
3HFA B7
3HFB B8
3HFC B7
3HFD B7
3HFE B7
A A 3HFF B7
3HFZ C7
7H00-5 A3
9HF4 C7
7H00-5 9HF5 C7
PNX85xx 9HF6 C7
9HF7 C7
PCI XIO PCI-DEVSEL 3HFA IHF1 B2
PCI-FRAME 10K 3HFB IHF2 B2
XIO-ACK A11 D12 PCI-CBE0 PCI-IRDY 3HFC 10K
ACK 0 +3V3-PER IHF3 B2
XIO-AD25 B10 XIO C12 PCI-CBE1 PCI-TRDY 10K 3HFD
AD25 1
CBE B12 PCI-CBE2 PCI-STOP 3HFE 10K
3HF5 2
B XIO-SEL-NAND
100R IHF1
B11
C11
0
1
3
A12 PCI-CBE3 PCI-PERR
PCI-SERR
10K
10K
3HFF
3HEV
B
IHF2 D11 XIO SEL A21 PCI-CLK-PNX8535 10K
2 PCI_CLK
IHF3 E11
3
A16 PCI-DEVSEL
DEVSEL
PCI-AD0 A20 C17 PCI-FRAME
0 FRAME
PCI-AD1 B20 D17 PCI-IRDY
1 IRDY
PCI-AD2 C20 E17 PCI-TRDY
2 TRDY
PCI-AD3 D20 B16 PCI-STOP
3 PCI CTRL STOP
PCI-AD4 A19 B21 3HEU PCI-AD24
4 IDSEL
PCI-AD5 B19 E16 100R PCI-PAR 9HF6 PCI-REQ-
5 PAR
PCI-AD6 C19 C16 PCI-PERR 3HES
6 PERR +3V3-PER
PCI-AD7 D19 D16 PCI-SERR 10K
7 SERR
PCI-AD8 E19 9HF7 PCI-GNT-PNX8535
8
C PCI-AD9
PCI-AD10
A18
B18
9
10 PCI AD
REQ
GNT
D21
E21
PCI-REQ
PCI-GNT
PCI-REQ
PCI-GNT 10K
3HET
+3V3-PER C
PCI-AD11 C18 E22 PCI-REQ-B PCI-REQ-B 9HF4 PCI-REQ-USB20
11 REQ_B 3HFZ
PCI-AD12 D18 E20 PCI-GNT-B PCI-GNT-B
12 GNT_B +3V3-PER
PCI-AD13 E18 10K
13
PCI-AD14 A17 C21 PCI-INTA-OUT 9HF5 PCI-GNT-USB20
14 INTA_OUT
PCI-AD15 B17
15
PCI-AD16 E15
16
PCI-AD17 D15
17
PCI-AD18 C15
18
PCI-AD19 B15
19
PCI-AD20 A15
20 PCI AD
PCI-AD21 E14
21
PCI-AD22 D14
22
D PCI-AD23
PCI-AD24
C14
B14
23
24
D
PCI-AD25 A14
25
PCI-AD26 E13
26
PCI-AD27 D13
27
PCI-AD28 C13
28
PCI-AD29 B13
29
PCI-AD30 A13
30
PCI-AD31 E12
31

E E

H_16770_023.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 87

SSB: SSB: PNX 85xx: SDRAM

1 2 3 4 5 6 7 8 9 10 11 12 13 14 2HG0 E3 3HJ3 A12
2HG1 E3 3HJ4 B12
2HG2 E3 3HJ5 A4

B04G PNX 85xx: SDRAM +1V8

3HJ5 IHG0 7H00-2 B04G
2HG3 E3
2HG4 E3
2HG5 E4
3HJ6 A1
3HJ7 A1
3HJ8 A1
PNX85xx
5K6 2HG6 E4 3HJ9 A1

2HH4

100n
3HJY DDR +1V8 +1V8 2HG7 E4 3HJA A1
DDR2-VREF-CTRL 2HG8 E4 3HJB A1
VTT-TERM-DDR 820R 2HH5
3HJ6 DDR2-A12 100n T30 2HG9 E6 3HJC A1
VREF
2HGA E7 3HJD A1
A RES
3HJ7
47R
47R RES
3HJ8
DDR2-A11
DDR2-A10
AE26
IREF
0
V30 DDR2-D0 A 2HGB E7 3HJE A1

330u 6.3V
3HJ9 47R RES DDR2-A9 DDR2-DQS0_P AA28 AD28 DDR2-D1 2HGC E7 3HJF A1
P 1

2HGX
560R

560R
3HJ1

3HJ3
RES 47R 3HJA DDR2-A8 DDR2-DQS0_N AA29 DQS0 AB28 DDR2-D3
N 2 2HGD E7 3HJG A1
3HJB 47R RES DDR2-A7 DDR2-DQS1_P Y28 AB30 DDR2-D2
P 3 2HGE E7 3HJH B1
RES 47R 3HJC DDR2-A6 DDR2-DQS1_N Y29 DQS1 AD29 DDR2-D6
N 4 3HJJ B1
3HJD 47R RES DDR2-A5 DDR2-DQS2_P H28 V29 DDR2-D5 IHG1 IHG2 2HGF E8
3HJE P 5
RES 47R DDR2-A4 DDR2-DQS2_N H29
N
DQS2
6
AD27 DDR2-D4 DDR2-VREF-CTRL DDR2-VREF-DDR
2HGG E8 3HJK B1
3HJF 47R RES DDR2-A3 DDR2-DQS3_P G28 V28 DDR2-D7 2HGH E9 3HJM B1
3HJG P 7
RES 47R DDR2-A2 DDR2-DQS3_N G29 DQS3 W30 DDR2-D8
47R RES
N 8
AC30
2HGJ E9 3HJN B1
3HJH DDR2-A1 9 DDR2-D9
2HGK E9 3HJP B1

560R

560R
3HJ2

3HJ4
RES 47R 3HJJ DDR2-A0 DDR2-DQM0 U29 AA30 DDR2-D10
0 DQ 10
47R
RES DDR2-DQM1 U30 AC28 DDR2-D11 2HGM E9 3HJR B1
3HJK 1 11
DDR2-BA0 DDR2-DQM2 M30
2
DQM
12
AD30 DDR2-D12 2HGN E10 3HJS B1
3HJM 47R RES DDR2-BA1 DDR2-DQM3 M29 W28 DDR2-D13 2HGP E10 3HJT B1
3HJN 3 13
RES 47R DDR2-CAS AC29 DDR2-D14
14 2HGR E10 3HJU C1
B RES
3HJP
47R
47R RES
3HJR
DDR2-RAS
DDR2-CS
DDR2-CLK_P
DDR2-CLK_N
3HJV
22R 3HJW
N28
N29
P
N
CLK
15
16
Y30
E30
DDR2-D15
DDR2-D16
B 2HGS E10 3HJV B4
3HJS 47R RES DDR2-WE DDR2-ODT 3HGN 22R P27 L28 DDR2-D17 2HGT E10 3HJW B5
3HJT ODT 17
RES 47R DDR2-CKE DDR2-CKE 33R 3HGM U26
CKE 18
J29 DDR2-D19 2HGU E12 3HJY A4
RES 3HJZ 47R DDR2-WE 3HGK 33R R28
WEB 19
J28 DDR2-D18 2HGV E13 3HJZ B1
DDR2-CS 33R 3HGJ P28 L29 DDR2-D22
3HGH 33R
CSB DQ 20 2HGW E13 3HKM G4
1K0 RES DDR2-RAS P29 E29 DDR2-D23
RASB 21
DDR2-CAS 33R 3HGG P30
CASB 22
L27 DDR2-D20 RESERVED +1V8
2HGX A11
2HGY E13
3HKN G10
3HKR C1
3HJU DDR2-ODT 33R E28 DDR2-D21
DDR2-CLK_P 3HGE 23
RES 47R DDR2-BA0 T27
0 24
F30 DDR2-D24 +1V8 2HGZ E13 3HKS C1
3HJ0 DDR2-CLK_N DDR2-BA1 3HGF 33R R29 BA K30 DDR2-D30 2HH0 E13 3HKT C1
1 25
33R H30 DDR2-D26
100R 26 2HH1 E14 3HKV D1

2HHR
2HHS

3HHL
100n
3HGD P26 K28

10K
1u0
DDR2-A0 0 27 DDR2-D25
DDR2-A1 33R 3HGC R30 L30 DDR2-D28
2HH2 E14 7H00-2 A6
1 28 7HG2
2HH3 F13 7HG0 F5
C 3HGB 33R N26 F29 NCP5208
C

5
DDR2-A2 2 29 DDR2-D31
DDR2-A3 33R 3HGA U28
3 30
J30 DDR2-D27 2HH4 A4 7HG1 F11
3HKR DDR2-DQS0_N 3HG9 33R M26 F28 6 AVIN _SD 4
DDR2-A4 4 31 DDR2-D29 2HH5 A5 7HG2 C11
DDR2-A5 33R 3HG8 R27
3HKS 10K RES 5 PVIN _POK 2HHA F7 FHG0 D13
DDR2-DQS1_N DDR2-A6 3HG7 33R M27 7 1
6 2HHC D10 IHG0 A4
DDR2-A7 33R 3HG6 V26
3HKT 10K RES DDR2-DQS2_N DDR2-A8 3HG5 33R M28
7 A VTT 8 2HHD D10 IHG1 A10
8

2HHC

2HHD
100n
33R 3HG4 R26 2HHE D12 IHG2 A12

22u
10K RES DDR2-A9 9 FHG0
3HKV DDR2-DQS3_N DDR2-A10 3HG3 33R T28 VFB 3
10 VTT-TERM-DDR 2HHF D12
DDR2-A11 33R 3HG2 L26
10K RES 11 2HHG D12

2
DDR2-A12 3HG1 33R U27
12 2HHH D13

2HHG

2HHH
2HHE

2HHF

2HHJ
100n

100n

100n

100n
33R J27

22u
NC 2HHJ D13
2HHK E6
D D 2HHM E6
2HHN E11
2HHP E12
2HHR C10
2HHS C10

+1V8

+1V8
3HG1 D4
3HG2 D5
3HG3 D4
3HG4 D5

330u 6.3V

330u 6.3V
2HHM

2HHN
2HHK

2HHP
3HG5 C4

1u0

1u0
3HG6 C5
3HG7 C4
E E 3HG8 C5
3HG9 C4
3HGA C5
3HGB C4

2HGW
2HGM
2HGG
2HGC

2HGD

2HGH

2HGN

2HGR

2HGU
2HGA

2HGB

2HGE

2HGK

2HGP

2HGS

2HGV

2HGY
2HGF

2HGT

2HGZ
2HG0

2HG1

2HG2

2HG3

2HG4

2HG5

2HG6

2HG7

2HG8

2HG9

2HGJ

2HH0

2HH1

2HH2
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n
22u

22u
3HGC C5
3HGD C4
7HG0 3HGE C4
MT47H32M16BT-37E
3HGF C4
M9

M1

M9

M1
D1
H1

R9

D9

H9

D1
H1

R9

D9

H9
V1

K1
K3
K7
K9

V1

K1
K3
K7
K9
F1
F3
F7
F9

F1
F3
F7
F9
7HG1 3HGG C5
VDDL MT47H32M16BT-37E VDDL
VDD VDDQ VDD VDDQ 3HGH B4
DDR2-A0
DDR2-A1
R8
R3
0 Φ VREF
M2
2HHA
DDR2-VREF-DDR DDR2-A0
DDR2-A1
R8
R3
0
Φ VREF
M2
2HH3
DDR2-VREF-DDR 3HGJ B5
1 DDR2 3HGP 1 3HHB 3HGK B4
F DDR2-A2
DDR2-A3
R7
T2
2
3 SDRAM
0
1
K8
K2 3HGR
100n
33R
DDR2-D0
DDR2-D1
DDR2-A2
DDR2-A3
R7
T2
2
3
DDR2
SDRAM
0
1
K8
K2 3HHC
100n
33R
DDR2-D16
DDR2-D17
F 3HGM B5
DDR2-A4 T8 L7 33R 3HGS DDR2-D2 DDR2-A4 T8 L7 33R 3HHD DDR2-D18
4 8MX16X4 2 4 8MX16X4 2 3HGN B4
DDR2-A5 T3 L3 3HGT 33R DDR2-D3 DDR2-A5 T3 L3 3HHE 33R DDR2-D19
T7
5 3
L1 T7
5 3 3HGP F7
DDR2-A6 33R 3HGU DDR2-D4 DDR2-A6 L1 33R 3HHF DDR2-D20
6 A 4 33R 6 A 4 33R 3HGR F7
DDR2-A7 U2 L9 3HGV DDR2-D5 DDR2-A7 U2 L9 3HHG DDR2-D21
7 5 7 5
DDR2-A8 U8 J1 33R 3HGW DDR2-D6 DDR2-A8 U8 J1 33R 3HHH DDR2-D22 3HGS F8
8 6 8 6
DDR2-A9 U3
9 7
J9 3HGY 33R DDR2-D7 DDR2-A9 U3
9 7
J9 3HHJ 33R DDR2-D23 3HGT F7
DDR2-A10 R2 DQ F8 33R 3HGZ DDR2-D8 DDR2-A10 R2 DQ F8 33R 3HHK DDR2-D24 3HGU F8
10 8 10 8
DDR2-A11 U7 F2 3HH0 33R DDR2-D9 DDR2-A11 U7 F2 3HHM 33R DDR2-D25
V2
11 9
G7 33R 3HH1 V2
11 9
G7 33R 3HHN
3HGV F7
DDR2-A12 12 10 DDR2-D10 DDR2-A12 12 10 DDR2-D26
G3 3HH2 33R DDR2-D11 G3 3HHP 33R DDR2-D27
3HGW F8
11 11
DDR2-BA0 P2 G1 33R 3HH3 DDR2-D12 DDR2-BA0 P2 G1 33R 3HHR DDR2-D28 3HGY G7
0 12 0 12
DDR2-BA1 P3
1 BA 13
G9 3HH4 33R DDR2-D13 DDR2-BA1 P3
1 BA 13
G9 3HHS 33R DDR2-D29 3HGZ G8
G 3HKM
P1
2 14
15
E1
E9 3HH6
33R 3HH5
33R
DDR2-D14
DDR2-D15
3HKN
P1
2 14
15
E1
E9 3HHU
33R 3HHT
33R
DDR2-D30
DDR2-D31
G 3HH0 G7
3HH1 G8
DDR2-CLK_P 220R M8 33R DDR2-CLK_P 220R M8 33R
CK CK 3HH2 G7
DDR2-CLK_N N8 E7 3HH7 DDR2-DQS1_P DDR2-CLK_N N8 E7 3HHV DDR2-DQS3_P
CK U CK U
DDR2-CS P8 D8 3HH8 33R DDR2-DQS1_N DDR2-CS P8 D8 3HHW 33R DDR2-DQS3_N 3HH3 G8
CS U CS U
DDR2-CKE N2
CKE
DQS
L
J7 33R 3HH9 DDR2-DQS0_P DDR2-CKE N2
CKE
DQS
L
J7 33R 3HHY DDR2-DQS2_P 3HH4 G7
DDR2-RAS N7 H8 3HHA 33R DDR2-DQS0_N DDR2-RAS N7 H8 3HHZ 33R DDR2-DQS2_N 3HH5 G8
RAS L RAS L
DDR2-CAS P7 DDR2-CAS P7
N3
CAS
A1
33R
N3
CAS
A1
33R 3HH6 G7
DDR2-WE WE DDR2-WE WE
DDR2-ODT N9 A2 DDR2-ODT N9 A2 3HH7 G8
ODT ODT 3HH8 G7
A8 A8
DDR2-DQM1 E3
U
A9 DDR2-DQM3 E3
U
A9 3HH9 G8
DDR2-DQM0 J3 DM D2 DDR2-DQM2 J3 DM D2 3HHA G7
L L
H2 H2
NC NC 3HHB F13
H V8
AA1
V8
AA1 H 3HHC F13
AA2 AA2 3HHD F14
V3 AA8 V3 AA8 3HHE F13
V7 RFU AA9 V7 RFU AA9 3HHF F14
VSS VSSDL VSSQ VSS VSSQ 3HHG F13
VSSDL
3HHH F14
D3
H3
M3
T1
U9

M7

D7
E2
E8
G2
G8
H7
J2
J8
L2
L8

D3
H3
M3
T1
U9

M7

D7
E2
E8
G2
G8
H7
J2
J8
L2
L8
3HHJ G13
3HHK G14
3HHL C12
3HHM G13
3HHN G14
3HHP G13
I I 3HHR G14
3HHS G13
3HHT G14
3HHU G13
3HHV G14
3HHW G13
3HHY G14
3HHZ G13
3HJ0 C1
H_16770_024.eps
3104 313 6196.2 120707
3HJ1 A11
3HJ2 B11

1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 88

SSB: PNX 85xx: Digital Video In

1 2 3 Personal Notes:
3HK0 C2
7H00-3 B2

B04H PNX 85xx: DIGITAL VIDEO IN 9HK0 C2

IHSM C2

A A

B 7H00-3
PNX85xx
B
HDMI
RX2- B8
P
RX2+ B9 RX_0 D10 HOT-PLUG
N HOT_PLUG
RX1- A7
P
RX1+ A8 RX_1
N
RX0- B6
P
RX0+ B7 RX_2
N
RXC- A9
P
RXC+ A10 RX_C
N

CEC-HDMI 9HK0 C10

C DDC-SCL
DDC-SDA
C9
E10
CEC
SCL
DDC
C
SDA
C7
RREF
RREF-PNX8535 3HK0 IHSM

12K

D D

E E

H_16770_025.eps
3104 313 6196.2 120707

1 2 3

E_06532_012.eps
131004
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 89

SSB: PNX 85xx: Audio

1 2 3 4 5 6 7 8 9 10 11 12
2HM3 D4

B04I PNX 85xx: AUDIO B04I

2HM8 E4
2HMG D2
2HMH D2
2HMJ A10
2HMN B10
2HMP C9
A A 2HMT E9
2HMW G9
AUDIO-VDD
2HMY H8
2HMZ I9
2HMJ
IHMY 2HN1 F8
100n 3HMA D5
IHMW 3HMG IHMA 4 3HMB E5
ADAC(7) 3 7HM1-1
LM324 1 FHM0 3HME B9
5K6 AUDIO-CL-L
IHMV 2 3HMF B9
3HMG B9
11
2HMN 3HMH E9
3HMJ E9
B IHMZ
100n B 3HMK D9
3HMM G9
AUDIO-VEE 3HMN G9
3HME 3HMF 3HMP F9
3HMR I9
10K 10K 3HMS I9
AUDIO-VDD 2HMP 3HMT H9
33p
3HMV E4
3HMW D5
3HMY C5

3HMY

10K
3HMZ C4
C C 5HM0 C2
5HM1 D2
IHN8
6 7HM1-1 B9
3HMZ IHN0 7HM1-2 D9
ADAC(1) 2 7HM2-1 AUDIO-VDD
BC847BS 7HM1-3 F9
5K6
VP 1 IHM1 7HM1-4 H9
5HM0
AUDIO-VDD 9HM1 +AUDIO-L 7HM2-1 C5
220R 7HM2-2 E5

3HMA
IHM6

10K
IHN3 IHMB 4 9HM1 D4
2HMG

3HMK

2HM3
5 7HM1-2
1u0

3n3
ADAC(8) FHM1
LM324 7
AUDIO-CL-R
9HM2 E4
5K6 IHN6
AUDIO-VDD 6 FHM0 B11
FHM1 D11
D AUDIO-VEE 11
D FHM2 F11
VN 5HM1 FHM3 H11

3HMW

10K
AUDIO-VEE IHM1 C5
IHM9 220R IHM6 D1
2HMH

AUDIO-VEE IHM9 D1
1u0

IHNF
3 3HMH 3HMJ IHMA B9
3HMV IHN4 IHMB D9
ADAC(2) 5 7HM2-2 10K 10K
BC847BS IHMC F9
5K6 2HMT
4 IHMG IHMG E5
9HM2 -AUDIO-R 33p
IHMV B9
IHMW B8

3HMB

10K
IHMY A9
E E
2HM8

3n3

IHMZ B9
IHN0 C5
IHN3 D8
AUDIO-VEE AUDIO-VDD IHN4 E5
IHN6 D9
IHN8 C5
IHN9 H9
IHNB 4 IHNA F9
3HMP IHMC 10 7HM1-3
ADAC(5) FHM2 IHNB F8
LM324 8
5K6 IHNA AUDIO-OUT-L IHND H8
9
IHNE H9

2HN1

3n3
F 11
F IHNF D5

AUDIO-VEE

3HMM 3HMN

10K 10K
2HMW

33p

G G

AUDIO-VDD

IHND 3HMT IHN9 4

ADAC(6) 12 7HM1-4
LM324 14 FHM3
IHNE AUDIO-OUT-R
H 5K6
13 H

2HMY

3n3
11

AUDIO-VEE

3HMR 3HMS

10K 10K
2HMZ

I 33p
I

H_16770_026.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8 9 10 11 12
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 90

SSB: PNX 85xx: Analogue AV

1 2 3 4 5 6 7 8 9 10 11 12 13 2HA2 C4 3HSK A12
2HA3 C4 3HSL A10

B04K PNX 85xx: ANALOGUE AV B04K

2HA4 D4
2HA5 D4
2HKL F4
3HSM B12
3HSN B10
3HSP C10
2HRZ A8 3HSQ C8
2HS0 A10 3HSR D10
2HS1 A8 3HST D12
FHR0 5HRC 3HSH
2HRZ AV1_PR 2HS2 B8 3HSU D9
2HS3 B9 3HSV D10
A 22n 330n 27R
2HS0
IHRB 5HRE 5HRF 3HSK
AV1_C A 2HS4 B10 3HSW I11

2HTR
2HTP
3HSJ

100p

100p
47R
22n 1u0 100n 27R 2HS5 B10 3HSY I11
2HS6 B11 3HSZ F9

2HTS
3HSL

2HTT
330p

330p
47R
2HS7 B8 3HT0 F10
2HS8 B8 3HT1 F10
2HS1 IHR0 5HR0 3HRR 2HS9 B9 3HT2 F11
AV1_PB 2HSA B10 3HT3 G11
22n 330n 27R 2HS4 IHR1 5HR1 5HRD 3HRS 2HSB C8 3HT4 F13

3HRP

2HS2

2HS3
100p

100p
47R
AV1_Y-CVBS
27R
2HSC C10 3HT5 G10
22n 1u0 100n

2HS5

2HS6
3HRT

330p

330p
2HSD C10 3HT6 G11

47R
2HSE C11 3HT9 G4
B 2HS7 FHR1 5HR2 3HRU
AV1_Y
B 2HSF C10
2HSG D10
5HR0 A9
5HR1 B11
27R 5HRG
2HSH D11 5HR2 B9
22n 330n IHRC 3HSM

3HRV

2HS8

2HS9
100p

100p
2HSA 2HSJ C8 5HR3 C11

47R
AV3_PR
22n
330n 27R 2HSK D8 5HR4 C11
2HSM D9 5HR5 C9

3HSN

2HTU

2HTV
100p

100p
47R
7H00-9 2HSN D9 5HR6 G5
PNX85xx
2HSP D10 5HR7 G5
VIDEO ANALOGUE IHRD 5HRJ 5HRK 3HSP
2HSR G10 5HR8 E9
2HSB AV2_C 2HSS H10 5HR9 E10
22n 2HSC
R5 F1
2HA2 1u0 100n 27R IHR3 5HR3 3HRW 2HST E4 5HRA E12
VSYNC_OUT SPARE10 AV3_PB
2HSU H9 5HRB H10

2HTW
3HSQ

2HTY
330p

330p
F2 22n 330n

47R
C Y1_G1 22n 27R
C

3HRY

2HSD

2HSE
2HSV E5 5HRC A9

100p

100p
G1

47R
Y2_G2
ADC1
Y3_G3
G2 2HSW E4 5HRD B11
G3 2HSY F4 5HRE A11
Y4_G4
G4 2HTH
REF1
IHSA 22n 2HSZ G5 5HRF A11
2HSJ IHR5 5HR5 3HS1 2HT0 G5 5HRG B11
H1 2HA3 AV3_Y
SPARE20
H2 22n
27R 5HR4 5HRH
2HT1 G5 5HRH C11
CVBS1_Y1_YC1 22n 330n 2HSF IHR4 3HRZ

2HSM
2HSK
3HS2

100p

100p
J1 2HT2 G5 5HRJ C9

47R
CVBS2_Y2_YC2 AV2_Y-CVBS
ADC2 J2 27R 2HT3 G9 5HRK C9
CVBS3_Y3_YC3 1u0 100n

2HSG
22n

2HSH
3HS0

330p

330p
J3

47R
CVBS4
J4 2HT7
2HT4 G5 5HRL D9
REF2 22n 2HT5 D4 5HRM E9
K1 2HA4 5HRL
2HT6 E4 5HRN D11
SPARE30 IHRE 3HSR
K2 22n 2HSN R-VGA 2HT7 D4 5HRP D11
D ADC2
Pr1_R1
Pr2_R2
K3
K4
22n
330n 27R D 2HT8 E8 5HRR H12
Pr3_R3 2HT9 E9 5HRS E9

3HSU

2HU0
2HTZ

100p

100p
L1

47R
Pr4_R4 IHRF 5HRN 5HRP 3HST 2HTA E9 5HRT F10
L2 2HT5 2HSP FRONT_C
REF3
IHSC 22n 22n
220R
2HTB E10 5HRU F12
3u3 1u0
SPARE40
P4 2HA5 2HTC E10 5HRV G11

3HSV

2HU1

2HU2
680R
P5 22n

82p

39p
Pb1_B1 2HTD E10 5HRW F12
R1
ADC3
Pb2_B2
R2
2HTE E11 7H00-9 C2
Pb3_B3 2HTF E11 9HR0 I9
R3
Pb4_B4 2HT8 IHR6 5HR8 5HRM 3HS9
R4 2HT6 FRONT_Y-CVBS 2HTG E12 9HR1 I8
REF4 22n
IHSD
3u3 1u0 2HTB FHR2 5HR9 3HSB 220R 2HTH C4 FHR0 A9
22n

2HTA
3HS8

2HT9
680R
M1

82p

39p
IF_N G-VGA 2HTK E4 FHR1 B9
M2 2HTE
E IF_P 22n 330n 27R IHR8 5HRA 3HSE
E 2HTL I10 FHR2 E10

3HSA

2HTC

2HTD
100p

100p
M3 IHV3 2HUN

47R
SPARE52 B-VGA
ADC4 M4 2HTK 22n 2HTM H10 FHR3 G4
SPARE53 22n 330n 27R

3HSD

2HTG
2HTF
2HTN I10 FHR4 G5

100p

100p
M5 22n 2HUP

47R
FM_P
N1 IHV6 2HST 22n 2HTP A9 FHR5 I9
FM_N 22n
2HTR A9 FHR6 I10
N2 2HSV
SPARE60
N3 IHVE 2HSW 22n 2HTS A11 IHR0 A9
C4 RES 2HU5 IHS4 5HRS 3HT0 2HTT A11 IHR1 B11
N4 22n AV4_Y
C1|YC1
ADC4 P1 27R
2HTU B11 IHR3 C11
C2|YC2 22n 330n

3HSZ

2HU6

2HU7
100p

100p
P2 2HTV B11 IHR4 C10

47R
C3|YC3
P3 2HSY 2HTW C9 IHR5 C9
REF6 22n
IHSH
A3
2HTY C9 IHR6 E9
P 2HU8 IHS5 5HRT 3HT2 2HTZ D9 IHR8 E11
DAC1 CVBS1_Y B3 3HS6 AV4_PB
F N IHSB 75R 2HUK
22n 330n 27R F 2HU0 D9 IHR9 H11

2HUA
2HU9
3HT1

100p

100p
A2 270p 2HU1 D10 IHRA G10

47R
P
DAC2 CVBS2_C B2 3HS7 2HU2 D11 IHRB A11
N 2HKL
IHSE 75R
F3 270p 2HU3 I12 IHRC B10
HSYNC_IN 2HUB IHS6 5HRU 5HRW 3HT4 2HU4 I12 IHRD C8
T4 IHS9 CVBS4
VSYNC_IN
220R
2HU5 E9 IHRE D9
22n 3u3 1u0

2HUC

2HUD
3HT3

680R
A1 2HU6 F9 IHRF D10

82p

39p
AGC
FHR4 5HR7 2HU7 F9 IHRG H12
D4
3V3_VIDEO_DAC
C3 IHSG 3HS5
+3V3-PER 2HU8 F10 IHS2 H9
10u 16V

VDAC_BIAS 30R IHRA 5HRV 3HT6 2HU9 F10 IHS3 H9

2HT2

2HT4
100n

4K7 2HT3 AV4_PR

L4 3HT9 22n
27R
2HUA F11 IHS4 E9
3V3_TEST_DAC 330n
K5 4K7 2HUB F11 IHS5 F10
G 3V3_VIDEO_REF
G

2HUE

2HUF
3HT5

100p

100p
47R
2HUC G11 IHS6 F11
2HUD G12 IHS9 F4
FHR3 5HR6 2HUE G10 IHSA C4
+3V3-PER 3HS3 2HSR
2HUF G11 IHSB F4
10u 16V

30R IF-N
2HSZ

2HT0

2HT1
100n

2HUK F4 IHSC D4
22n

390R 100n
2HUN E5 IHSD E4

2HSU

12p
2HUP E5 IHSE F4
3HS4 2HSS 3HRP B8 IHSG G4
IF-P
390R
3HRR B9 IHSH F4
100n
3HRS B12 IHV3 E4
3HRT B10 IHV6 E4
H H 3HRU B9
3HRV B8
IHVE E4
2HTM
3HRW C12
100p 3HRY C10
3HSG 5HRB IHR9 3HRZ D12
IHS2 Y-CVBS-MON-OUT
IHS3
3HS0 D10
47R 1u0 3HSY 5HRR IHRG 3HS1 C9
C-MON-OUT

2HTN
3HSF
3HS2 D8

330p
2HTL
75R

10p
120R 2u2
3HS3 G9

3HSW

2HU4
RES
2HU3
75R

12p

27p
3HS4 H9
3HS5 G4
3HS6 F4
FHR5
I 9HR1
9HR0
FHR6
H-SYNC-VGA
V-SYNC-VGA
I 3HS7 F4
3HS8 E8
3HS9 E12
3HSA E10
3HSB E11
3HSD E11
3HSE E12
H_16770_028.eps 3HSF I10
3104 313 6196.2 120707 3HSG H10
3HSH A9
3HSJ A8
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 91

SSB: PNX 85xx: Audio

1 2 3 4 5 6 7 8 9 10 11
2HP4 E9
2HP5 E8

B04L PNX 85xx: AUDIO B04L

2HP6 E8
2HP7 E8
2HP8 E7
2HPA E10
2HPB E9
A A 2HR0 C4
2HR1 C5
2HR2 C4
2HR3 C5
2HR4 C4
2HR5 C4
2HR6 D4
2HR7 D4
2HR8 D4
2HR9 D4
2HRA D4
2HRB D4
B B 2HRC D4
2HRD D4
2HRE E4
2HRF E4
2HRG E3
2HRH E4
2HRJ E3
2HRK E4
2HRM F3
2HRN F3
2HRP F4
3HR0 2HR0 2HRS F9
C AUDIO-IN1-R
3HR1 IHRJ 12K RES 33p
2HR1 C 2HRT F9
22K 1u0 2HRU F3
3HR2 2HR2 2HRV F3
2HR3
AUDIO-IN1-L 3HSC IHRH 12K RES 33p
2HRW G4
22K 3HR3 2HR4 1u0 2HRY G4
3HR4 2HR5
AUDIO-IN2-R IHS1 12K RES 33p 3HAG E10
22K 1u0 3HAH E9
3HR5 2HR6 3HP0 F7
2HR7
AUDIO-IN2-L 3HR6 IHS0 12K RES 33p
3HP1 F8
22K 3HR7 2HR8 1u0 3HP2 F7
3HR8 2HR9 VDDA-AUDIO
AUDIO-IN3-R IHRZ 12K RES 33p 3HP3 F8
D 22K
3HR9 2HRA
2HRB
1u0 7H00-1
PNX85xx
D 3HP4 F7
3HP5 F8
AUDIO-IN3-L 3HRA IHRY 12K RES 33p 7HP0
AUDIO LD2985BM33R
3HP6 F7
22K 3HRB 2HRC 1u0 3HP7 F8
3HRC 2HRD IHSW 5HP2 IHSX 5HP1
IHRW 12K RES 33p AK6 AG12 FHPE 5 1 3HPN F8
AUDIO-IN4-R R P OUT IN +5VS
22K 1u0 AJ6 AIN1 ADAC1 AK13 3HR0 C4
L N 30R 30R
3HRD 2HRE AG5 AH12 4 3 3HR1 C3
2HRF R P BP INH

2HPA
3HRE IHRV 12K RES 33p AF5 AIN2 ADAC2 AJ12

10u
AUDIO-IN4-L L N 3HR2 C4
AJ5 AK11 COM
22K 1u0 R P 3HR3 C4

2HPB
2HP7

2HP6

2HP5

2HP4
2HP8

100n

100n

100n

100n
3HRH 2HRJ AH5 AIN3 ADAC3 AJ11

10u

10n
3HRJ 2HRK L N

IHSY
AUDIO-IN5-R IHRT 12K RES 33p AH4 AF10 3HR4 C3

2
R P
22K AK5 AIN4 ADAC4 AG10 3HR5 D3
3HRF 2HRG 1u0 L N 3HAG
AK4 AG9 3HR6 D3
3HRG 2HRH R P +3V3
E AUDIO-IN5-L IHRU 12K RES 33p AJ4
L
AIN5 ADAC5
N
AK10
22K E 3HR7 D3

3HAH
1u0 AH9

22K
22K IHSU P
AG6 ADAC6 AJ9 3HR8 D3
R N
IHSV AF6 AADC 3HR9 D3
L
AH8 VREF AE10 3HRA D3
POS VSSA_AUDIO_DAC1
AH7 AF11 3HRB D3
NEG 3V3A_AUDIO_DAC1
5HRZ
AJ7 AG7 3HT8
3HRC D3
POS R ADAC(8) ADAC(8)
VDDA-AUDIO AK7 AADC1_VR DAC_CAP AG8 3HT7 33R ADAC(7) ADAC(7) 3HRD E3
30R NEG L
33R 3HRE E2
AJ13 3HP7 ADAC(1) 3HRF E3
1

2HRS

2HRT
AH6 AK12 3HP6 33R

3n3

3n3
VCOM_ADC1 2 ADAC(2) 3HRG E2
2HRM

2HRN

2HRU

2HRV

2HRP
100n

100n

100n

100n

L5 AH11 33R 3HP5

10u

AOUT1 3 ADAC(3) 3HRH E3

L3 AH10 3HP4 33R ADAC(4)
RES_REF 4 3HRJ E2
F M6
GND1
ADAC
5
6
AJ10
AK9
33R
3HP2
3HP3
33R
ADAC(5)
ADAC(6)
F 3HRK G4
SPDIF-IN1 AK15 AK8 33R 3HP1 ADAC(7) 3HRM G4
SPDIF_IN 7
AJ8 3HP0 RES 33R ADAC(8) 3HRN G4
8 33R
RES IHPD
AJ15 3HPN 3HSC C3
SPDIF_OUT SPDIF-OUT
IHRK IHRM IHRL 3HT7 F8
68R
AF14 3HT8 F8
OSCLK
AJ14 5HP1 D10
SCK
2HRW

3HRM

3HRN
2HRY

3HRK
100n

AK14
75R

4K7

4K7
10u

WS 5HP2 D8
AH14
SD
1
AG14
5HRZ E3
2 7H00-1 D6
7HP0 D9
G G FHPE D9
IHPD F8
IHRH C4
IHRJ C4
IHRK F4
IHRL F4
IHRM F4
IHRT E3
IHRU E3
IHRV E3
IHRW D3
IHRY D3
H H IHRZ D3
IHS0 D3
IHS1 C3
IHSU E5
IHSV E4
H_16770_029.eps
3104 313 6196.2 120707
IHSW D8
IHSX D10
IHSY E9
1 2 3 4 5 6 7 8 9 10 11
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 92

SSB: PNX 85xx: Audio

1 2 3 4 5 6 7 8 9
2HV2 C4
2HV3 D2

B04M PNX 85xx: AUDIO B04M

2HV4 C4
2HV6 C1
2HV7 B8
2HV9 C2
2HVA C1
2HVB B3
2HVC B3
2HVD C2
A A 2HVE C1
2HVG D6
3HV3 D7
3HV4 B8
+3V3
3HV7 C8
3HV8 E7
3HVN C4
3HVP B4

5HV0

30R
3HVR C4
3HVS C4
3HVT E8
IHWA +5VS 3HVW D6
B B 3HVX D6

2HVC

2HVB
100n

10u
3HVY D7
IHV5 3HVZ D8
7HV0-1 5HV0 B3
TPA4411RTJ 3HVP FHV2 AUDIO-HDPH-L-AP 7HV0-1 B2
10

19
Φ 7HV0-2 E3

3HV4

2HV7

100n
SVDD PVDD

22K
33R

2HV2
7HV1 E8

1n0
ADAC(3)
2HVD IHWL
13 HEADPHONE 9
IHWJ 3HVN
7HVA-1 D8
L DRIVER L
2HVE 1u0 IHWE IN 33R 7HVA-2 C8
ADAC(4) 15 OUT
R
11
IHV1 3HVS FHV1 AUDIO-HDPH-R-AP FHV1 C4
1u0 R FHV2 B4
4
IHVC 33R 3HV7
2HVA
2HV6

2HV4
1 IHW7 BC847BPN FHV3 C6
3n3

3n3

1n0
C P 3HVR
C
2HV9

4 5 7HVA-2 FHV4 E8
10u

IHVD C1 22K IHVA

3 6 A-PLOP
N 33R IHV0 D2
8 3
14 NC 12 IHV1 C4
SDR IHV5 B8
16
A-PLOP-HDPH 18
SDL
20 6 IHV7 E8
FHV3 3HVW IHVB 3HV3
IHW8 IHV9 E7
AUDIO-RESET 2 7HVA-1
VSS GND BC847BPN
IHVA C8
DNC 22K 22K IHVB C6

2HVG
3HVX
S P S P HEATSINK 1

22K

1n0
IHVC C2
7
5

17
2

21

IHVD C2
IHV0
IHW7 C7
D +3V3 +3V3-STANDBY
D IHW8 C7
IHWA B2
2HV3

10u

IHWE C2
IHWJ C4

3HVY

3HVZ

RES
47K

47K
IHWL C2

7HV0-2
TPA4411RTJ IHV7 3HVT FHV4
3 A-PLOP-HDPH

22
VIA 24
3HV8 IHV9
1 7HV1
12K

23 VIA VIA 25 BC847BW

22K
2
E E

H_16770_030.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 93

SSB: PNX 85xx: Video Streams

1 2 3 4 5 6 7 8 9 3HWK D2
3HWM C7
3HWN C7

B04N PNX 85xx: VIDEO STREAMS B04N 3HWP C7

3HWR C7
3HWS C7
3HWT C7
A A 3HWU C7
3HWV B7
3HWW B7
3HWY B7
3HWZ B7
7H00-10 B5
9HW0 D2
IHW0 D2

7H00-10
PNX85xx
B VIDEO STREAMS B
CA-MDO0 C25 A26 3HWZ CA-MDI0
0 0
CA-MDO1 D23 C27 3HWY 33R CA-MDI1
1 1
CA-MDO2 C23 B27 33R 3HWW CA-MDI2
2 2
CA-MDO3 C29 A27 3HWV 33R CA-MDI3
3 3
CA-MDO4 C30 CA_MDO CA_MDI A25 33R 3HWU CA-MDI4
4 4
CA-MDO5 D30 D26 3HWT 33R CA-MDI5
5 5
CA-MDO6 A28 C26 33R 3HWS CA-MDI6
6 6
CA-MDO7 A29 B26 3HWR 33R CA-MDI7
7 7
33R
CA-MOVAL A24 B25 3HWM CA-MIVAL
MOVAL MIVAL
CA-MOSTRT D25 B30 3HWN 33R CA-MISTRT
C CA-MOCLK_VS2 C24
MOSTRT
VS2_MOCLK_CI
MISTRT
MICLK
B28 33R 3HWP
33R
CA-MICLK C
CA-VS1 A30
VS1
CA-CD1 D29
1
CA-CD2 B23 CD
2
B24 CA-RST
RST
FE-DATA0 E5 D22 CA-DATADIR
FE-DATA1 0 DATA_DIR
A4 A22 CA-DATAEN
1 DATA_EN
FE-DATA2 B4 C22 CA-OOBEN
2 OOB_EN
FE-DATA3 C6 B22 CA-ADDEN
3 ADD_EN
FE-DATA4 D6 FEDATA TNR_TSDI A23 CA-VCCEN
4 VCCEN
FE-DATA5 E6 D24 CA-VPPEN
5 VPPEN
FE-DATA6 A5
6
FE-DATA7 B5
D FE-VALID D5
7
D
FEVAL
IHW0 FE-SOP C4
3HWK FESOP
+3V3-PER FE-ERR FE-CLK C5
FECLK
4K7 FE-ERR A6
FEERR
9HW0

E E

F F

H_16770_031.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 94

SSB: PNX 85xx: Digital Video

1 2 3 4 5 6 7
1F00 B7

B04O PNX 85xx: DIGITAL VIDEO OUT / LVDS B04O

3HP9 C5
7H00-7 B4
7H00-8 A1
9HP9 B6
9HW3 B2
9HW4 B2
9HW5 B2
9HW6 D2
A A 9HW7 D2
9HW8 D2
9HW9 D2
7H00-8 9HWA C2
PNX85xx 9HWB C2
VID_OUT_TTL 9HWC C2
AJ19 9HW5 DV-R0_Y2 9HWD C2
R0_Y2
R1_Y3
AH19
AG19
9HW4
9HW3
DV-R1_Y3 1F00 * 9HWE C2
R2_Y4 DV-R2_Y4 1 9HWF C2
AF19 9HWZ DV-R3_Y5 9HWG C2
R3_Y5 2
R_OUT AK20 9HWY DV-R4_Y6 IHP5
R4_Y6
AJ20 9HWW 9HP9
3 9HWH C2
DV-R5_Y7
B R5_Y7
R6_Y8
AH20
AG20
9HWV
9HWU
DV-R6_Y8
DV-R7_Y9
+12V-DISP 4
5 B 9HWJ C2
9HWK C2
R7_Y9 6
IHP6 7 9HWM C2
AG17 9HWT DV-G0_UV2 IHP7 9HWN C2
G0_UV2 8
AF17 9HWS DV-G1_UV3 IHP8
G1_UV3
AK18 9HWR 7H00-7 9 9HWP B2
G2_UV4 DV-G2_UV4 PNX85xx IHP9 10
AJ18 9HWP DV-G3_UV5 9HWR B2
G3_UV5 11
G_OUT AH18 9HWN DV-G4_UV6 Tx8535oA- 9HWS B2
G4_UV6
AG18 9HWM DV-G5_UV7
LVDS Tx8535oA+
12
9HWT B2
G5_UV7 13
AF18 9HWK DV-G6_UV8 IHPG 9HWU B2
G6_UV8 3HP9 14
AK19 9HWJ DV-G7_UV9 AG21 Tx8535oB-
G7_UV9 IREF VDDA-LVDS 15 9HWV B2
12K Tx8535oB+ 16
AF15 9HWH DV-B0_UART2-RX AK23 Tx8535oCLK+ 9HWW B2
B0_UART P 17
AK16 9HWG DV-B1_UART2-TX CLK AJ23 Tx8535oCLK- Tx8535oC- 9HWY B2
C B1_UART
B2_GPIO
AJ16
AH16
9HWF
9HWE
DV-B2_DEBUG-BREAK
DV-B3_AUDIO-MUTE A
N
P
AK21
AJ21
Tx8535oA+
Tx8535oA-
Tx8535oC+
18
19 C 9HWZ B2
B3_GPIO N 20 IHP5 B7
B_OUT AG16 9HWD DV-B4_UV0 AK22 Tx8535oB+ Tx8535oCLK-
B4_UV0
AF16 9HWC B
P
AJ22
21 IHP6 B7
B5_UV1 DV-B5_UV1 N Tx8535oB- Tx8535oCLK+ 22
AJ17 9HWB DV-B6_Y0 AH22 Tx8535oC+ IHP7 B7
B6_Y0 P 23
AH17 9HWA DV-B7_Y1 C AG22 Tx8535oC- Tx8535oD- IHP8 B7
B7_Y1 N 24
AH23 Tx8535oD+ Tx8535oD+ IHP9 B7
P 25
AK17 9HW6 DV-CLK D AG23 Tx8535oD- IHPA D7
CLK N 26
AH15 9HW7 DV-VS AK24 Tx8535oE+ Tx8535oE-
VSYNC
AG15 9HW8 E
P
AJ24
27 IHPB D7
HSYNC DV-HS N Tx8535oE- Tx8535oE+ 28
AF20 9HW9 DV-FF_DE IHPG C5
AUX2 29
IHPA 30
IHPB 31
33 32
D FI-WE31P-HFE-E1500
D
RES

LVDS CONNECTOR
FOR
FACTORY
USE
E ONLY E

H_16770_032.eps
3104 313 6196.2 120707

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 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 95

SSB: PNX 85xx: Power

1 2 3 4 5 6 7 8 9 10 11 12 13
2HH6 B4 IHY9 E1
2HH7 C4 IHYA B13

B04P PNX 85xx: POWER B04P

2HH8 C5
2HH9 B5
2HK0 C2
2HK1 C3
2HK2 E4
2HK3 E3
2HK4 E3
7H00-11 2HK5 E3
PNX85xx
2HK6 E3
A 5HY3 IHY6
AE7
VDD A 2HK7 D2
2HK8 D2
+1V2 1V2A AUDIO ADC
AE12 2HK9 F1
30R +1V2
AE6 AE13 2HKA D1
VDDA-ADC ADC

2HY7

2HY6

100n
AE14

1u0
2HKB E1

2HYW
2HYU
2HYS

2HYV

2HYY
2HYT

2HYZ

2HZ0

2HZ1
100n

100n

100n

100n

100n
AF7 F10

1u0

1u0

1u0

1u0
REF 3V3A AUDIO 2HY0 B7
F21
AF8 1V2 CORE F22 2HY1 B7
VDDA-DAC DAC
F9 2HY2 B7
IHY4 J5 U25 2HY3 B6
5HY0
J6 V25 CHY1 SENSE+1V2-PNX8535
+1V2
K6
1V2A VIDEO ADC
W25
2HY4 E7
30R 2HY5 E7

2HY3

2HY2

2HY1

2HY0
2HY6 A8

100n

100n

100n
AB27 AA5

1u0
B +1V2
5HG0
30R
IHSK
J26
DLL0
1V2A DDR
1V2 SB CORE
AA6
AB5
+1V2-STANDBY
B 2HY7 A8
DLL3 2HY8 C6

2HZ2

2HZ3

2HZ4
100n

100n
AB6

1u0
2HY9 C6

2HH6

2HH9
100n

100n
IHK0 P18
5HK5 +1V8 2HYA D8
R18 AC26
+1V8-PNX
T18 1V8_2V5 DDR AC27 IHYA 2HYB D8
600R RES
SENSE+1V8 CHY0 U18 AD26 2HYC C11
+3V3-PER
5HK0 5HY5 AE17 2HYD C11
IHSN G26 AE18
+1V2 +3V3-PER PLL 5HYA 2HYE C11
600R AE19
IHSL 30R +3V3 2HYF C11
+3V3-PER W27 3V3A DDR F14
DLL1 220R

2HY9

2HY8
2HYG C12

100n
F27 F15

1u0
30R 5HG1 DLL2 3V3 PER
47u 4V

2HYM
2HYG
2HYC

2HYD

2HYH

2HYN

2HYR
2HYE

2HYK

2HYP
2HYF
2HK0

2HK1

2HYJ
100n

100n

100n

100n

100n

100n

100n

100n

100n
F16 2HYH C12

10u

10u

10u

10u
2HH7

2HH8
100n

100n
D7 F17 2HYJ C12
C RREF-PNX8535
C8
EQ
1V2A HDMI
F24
F25
C 2HYK C12
PLL 2HYM C12
F6
5HK6
E7 G25 2HYN C13
+1V8-PNX PLLCCO
G6 2HYP C13
600R RES 3V3A HDMI
F7 2HYR C13
BIAS
5HK4 IHK1 V6
E8 W5
+3V3-STANDBY 2HYS A12
+1V2 3V3 HDMI 3V3 SB PER 2HYT A12
600R W6

2HZ7

2HZ8

2HZ9
2HYU A12

100n

100n
AG24

1u0
5HK1 IHK4
330u 6.3V

AH24 AD25 2HYV A12

3V3 LVDS
2HKA

2HK7

2HK8

100n

120R AF23 AG11

1u0

VDDA-LVDS 2HYW A12

5HY8 IHY7 AG13
AE22 AH1
2HYY A13
D +3V3-PER
30R 5HY9 IHY8
AE21
3V3A LVDS
NC
AH13
E23
D 2HYZ A13
2HZ0 A13
+1V2 3V3A LVDS PLL

2HZN
2HZT

100n
E24 2HZ1 A13

1u0
30R 5HY6
IHK2 IHK3 IHSP P6 K25 2HZ2 B12
5HK2 5HK3 +1V2 1V2A CAB

2HZA
2HZJ

100n
K26

1u0
+3V3-PER 30R 2HZ3 B12
120R 120R R6 Y5
3V3A 1.7 MCAB 2HZ4 B12

2HYB

2HYA

100n
1u0
2HK2

100n 2HZ7 D11

47u 4V
2HK3

2HK4

2HK5

2HK6
100n

100n

100n

2HZ8 D11
2HZ9 D11
2HZA D7
5HY2 IHY5 2HZB I9
7HK0 +3V3-PER
LD1117DT 2HZC I10
E FHK0
30R
E 2HZD I10

2HY5

2HY4

100n
3 2

1u0
+3V3 IN OUT +1V8-PNX 2HZE I10
2HZF I10
2HKB

COM
10u

2HZG I11
3HK1

120R

VDDA-LVDS IHY0 2HZH G10

1

5HY1
IHY9 +3V3-PER 2HZJ D7
220R 2HZN D6
2HZP F10
47u 4V

2HZR

2HZU
2HZP

2HZS
2HK9

3HK2

100n

100n

100n
15R

1u0
2HZR F10
2HZS F10
2HZT D6
2HZU F11
F F 2HZV H10
3HK1 E2
3HK2 F1
5HG0 B4
5HG1 C4
IHY1 5HY4 5HK0 C2
VDDA-DAC VDDA-AUDIO 5HK1 D3
30R
5HK2 D2

2HZH

100n
5HK3 D4
AJ25
AJ1
AH30
AH29
AH28
AH26
AH25
AH21
AH2
AG30
AG3
AG29
AG28
AG27
AG26
AG25
AF30
AF29
AF28
AF27
AF26
AF25
AF24
AF22
AF21
AF13
AF12
AE5
AE30
AE29
AE28
AE25
AE24
AD6
AD5
AB29
AB25
AA27
AA26
AA25

J25
F26
W26
AB26

N6
N5
H5
H4
H3
G5
F5
F4
E4
E3
E2
E1
D3
D2
D1
C2
C1
B1

AF9
AE9
AE16
AE15
7H00-12
5HK4 C2
PNX85xx 5HK5 B2
G G 5HK6 C2
VSS

VSS

VSS

VSSA DDR DLL

VSSA VIDEO

VSSA VIDEO

VSSA AUDIO

5HY0 B6
5HY1 E11
5HY2 E7
5HY3 A7
VSS

5HY4 F11
IHY2 5HY7
5HY5 C6
VDDA-ADC VDDA-AUDIO 5HY6 D8
30R 5HY7 H10
5HY8 D6

2HZV

100n
VSS

VSS

VSS

VSS

VSS

VSS

5HY9 D7
5HYA C13
H H 7H00-11 A9
AK30
AK25
AJ30
AJ29
W29

M25

7H00-12 G7
G30
U17
U16
U15
U14
U13

R25
R17
R16
R15
R14
R13

N30
N27
N25
N18
N17
N16
N15
N14
N13

H27
H26

D27
C28
Y27
Y26

V27
V18
V17
V16
V15
V14
V13

P25
P17
P16
P15
P14
P13

K29
K27

E26
E25

B29
T29
T26
T25
T17
T16
T15
T14
T13

F19
F18
F13
F12
U6

D9
D8
E9
T6
T5

7HK0 E1
CHY0 B8
IHY3 CHY1 B11
+1V8 FHK0 E2
IHK0 B2
IHK1 C2

2HZG
2HZC

2HZD
2HZB

2HZE

2HZF
1u0

1u0

10n

10n

10n

10n
IHK2 D2
IHK3 D4
IHK4 D3
IHSK B4
I I IHSL C4
IHSN C6
IHSP D9
IHY0 E10
IHY1 F10
IHY2 H10
IHY3 H10
IHY4 B8
H_16770_033.eps IHY5 E8
3104 313 6196.2 120707 IHY6 A8
IHY7 D8
IHY8 D8
1 2 3 4 5 6 7 8 9 10 11 12 13
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 96

SSB: PNX 85xx: Flash

1 2 3 4 5 6 7 8 9
2HA0 B7
2HA1 B7

B04Q PNX 85xx: FLASH B04Q 3HA0 B2

3HA2 C9
3HA3 B8
3HA4 B4
3HA5 B4
3HA6 B4
3HA7 B4
3HA8 B4
A A 3HA9 B4
3HAA C4
5HA0 3HAB C4
+3V3-NAND IHSR 3HAC D4
+3V3 +3V3-NAND
30R 3HAD D4
3HAE D4

2HA0

2HA1
100n

100n
3HAF D4
7HA0
5HA0 A2
NAND128W3A2BN6E 7HA0 B6

37
12
3HA0 7HA3 C9
+3V3-NAND
10K
XIO-SEL-NAND VCC Φ 9HA0 C8
NAND IHA0 C9
B PCI-AD24 3HA4 NAND-AD(0) NAND-AD(0) 29
0
FLASH
R
7 IHSS XIO-ACK XIO-ACK
3HA3
+3V3-NAND
B IHA1 C9
PCI-AD25 3HA5 100R NAND-AD(1) NAND-AD(1) 30 (128Mx8) 2K2 IHSR A6
1 B
PCI-AD26 3HA6 100R NAND-AD(2) NAND-AD(2) 31 16 NAND-CLE
2 CLE +3V3-NAND IHSS B7
PCI-AD27 3HA7 100R NAND-AD(3) NAND-AD(3) 32 17 NAND-ALE
3HA8 100R 41
3
IO
ALE
9 IHST IHST B7
PCI-AD28 NAND-AD(4) NAND-AD(4) 4 CE XIO-SEL-NAND
PCI-AD29 3HA9 100R NAND-AD(5) NAND-AD(5) 42 8 NAND-REn
5 RE
PCI-AD30 3HAA 100R NAND-AD(6) NAND-AD(6) 43 18 NAND-WEn
6 WE
PCI-AD31 3HAB 100R NAND-AD(7) NAND-AD(7) 44 19 RESET-NVM_WP-NANDFLASH-INV
7 WP

3HA2

10K
100R
26 1
27 2
RESET-NVM_WP-NANDFLASH-INV
28 3
33 4 IHA0
NC NC

9HA0
RES
C 34
35
5
10
IHA1
3
C
38 11 1 7HA3
39 14 PDTC114EU
RESET-NVM_WP-NANDFLASH
40 15 2
45 20
46 21
NC NC
47 22
48 23
6 24
25
VSS

36

13
D 3HAC
D
PCI-AD0 NAND-CLE
PCI-AD1 3HAD 100R NAND-ALE
PCI-CBE1 3HAE 100R NAND-WEn
PCI-CBE2 3HAF 100R NAND-REn
100R

E E

H_16770_034.eps
3104 313 6196.2 120707

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 97

SSB: FPGA 1080p: Interface

1 2 3 4 5 6 7 8 9 10 11 12 13
3F35 A11

B05A FPGA 1080p: INTERFACE B05A

3F36 B11
3F37 B11
3F38 B11
3F39 B11
3F40 B11
3F41 B11
FPGA -single/dual odd LVDS-output 3F42 C11
A A 3F43 C11
3F44 C11
3F45 C11
3F46 C11
3F35 3F47 C11
TxFPGAoA- RxP3oA-_B9
180R
3F48 D11

120R
3F36
3F49 D11
3F37 3F50 D11
TxFPGAoA+ RxP3oA+_B8
3F51 D11
180R 3F52 D11
3F38 3F53 F11
TxFPGAoB- RxP3oB-_B7
3F54 F11
B 180R
B

120R
3F39
3F55 F11
3F40 3F56 G11
TxFPGAoB+ RxP3oB+_B6
3F57 G11
180R
3F58 G11
3F41
TxFPGAoC- RxP3oC-_B5 3F59 G11
180R 3F60 G11

120R
3F42
3F61 G11
3F43 3F62 H11
TxFPGAoC+ RxP3oC+_B4
180R
3F63 H11
3F44
3F64 H11
TxFPGAoCLK+ RxP3oCLK+_B3
3F65 H11
C 180R
C 3F66 H11

120R
3F45
3F67 H11
3F46 RxP3oCLK-_B2 3F68 I11
TxFPGAoCLK-
180R 3F69 I11
3F47 3F70 I11
TxFPGAoD- RxP3oD-_B1
9F25 I5
180R 9F26 I5

120R
3F48
9F27 I5
3F49
TxFPGAoD+ RxP3oD+_B0 9F28 I5
180R 9F29 H5
3F50 9F30 H5
TxFPGAoE- RxP3oE-_G9
9F31 G5
D 180R
D

120R
9F32 G5

3F51
3F52
9F33 H5
TxFPGAoE+ RxP3oE+_G8 9F34 H5
180R 9F35 H5
9F36 H5

E E

FPGA -dual even LVDS-output

F TxFPGAeA-
3F53
RxP3eA-_G7 F
180R

120R
3F54
3F55
TxFPGAeA+ RxP3eA+_G6
180R
3F56
TxFPGAeB- RxP3eB-_G5
FPGA - bypass 180R

120R
3F57
3F58
TxFPGAeB+ RxP3eB+_G4
180R
G 3F59
G
TxFPGAeC- RxP3eC-_G3
180R

120R
3F60
Tx8535oA- 9F32 RxP3oA-_B9
3F61
TxFPGAeC+ RxP3eC+_G2
Tx8535oA+ 9F31 RxP3oA+_B8 180R
9F30 3F62
Tx8535oB- RxP3oB-_B7 TxFPGAeCLK+ RxP3eCLK+_G1
180R

120R
3F63
Tx8535oB+ 9F29 RxP3oB+_B6
3F64
TxFPGAeCLK- RxP3eCLK-_G0
9F36
H Tx8535oC- RxP3oC-_B5 180R
3F65
H
Tx8535oC+ 9F35 RxP3oC+_B4 TxFPGAeD- RxP3eD-_R9
180R

120R
3F66
Tx8535oCLK+ 9F34 RxP3oCLK+_B3
3F67
Tx8535oCLK- 9F33 RxP3oCLK-_B2 TxFPGAeD+ RxP3eD+_R8
180R
Tx8535oD- 9F28 RxP3oD-_B1
3F68
TxFPGAeE- RxP3eE-_R7
Tx8535oD+ 9F26 RxP3oD+_B0 180R

120R
3F69
Tx8535oE- 9F27 RxP3oE-_G9
3F70
TxFPGAeE+ RxP3eE+_R6
9F25
I Tx8535oE+ RxP3oE+_G8 180R
I

H_16770_035.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9 10 11 12 13
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 98

SSB: FPGA 1080p: Power & Control

1 2 3 4 5 6 7 8 9 1FA0 D9 3FC6 C9
2FA0 A2 3FC7 C6
+3V3

B05B FPGA 1080P: POWER + CONTROL B05B

2FA1 A3
2FA2 A4
3FC8 D6
5FA1 A7
2FA3 A4 5FA2 A2

5FA1

30R
FFA0 2FA4 A4 5FA4 B1
+1V2-PLL 2FA5 E4 5FA5 B1
2FA6 E6 5FA6 C1
A A

5FA2

220R

2FA0

2FA9

2FA1

2FA2

2FA3

2FA4
2FA7 E5 5FA7 C1

1u0

4u7

10n

10n

10n

10n
2FA8 F8 5FA8 D4
IFA1 2FA9 A3 5FB1 A1
IFB1 5FB1
+1V2-STAB 2FB0 B2 5FB2 A1
220R FFA1 2FB1 B3 6FA0 C9

RES 2FF2

2FF1
RES

10n

10n
5FB2 +1V2-FPGA 2FB2 B3 6FA1 F1
7FA3
EPCS4SI8 2FB3 B3 6FA2 F2

2FF5

8
22u
220u 25V
220R

2FC0
2FB9

2FB0

2FB1

2FB2

2FB3

2FB4

2FB5

2FB6

2FB7
+1V4

4u7

1u0

10n

10n

10n

10n

10n

10n

10n
VCC IFA2 2FB4 B3 6FA3 F2
Φ

RES
1 nCSO
CS_ 2FB5 B4 6FA4 F3
IFA3
2 SCD 6 DCLK 2FB6 B4 6FA5 F3
5FA4 RES DATA DCLK

3FB1

100R
RES
+1V4 IFA9 2FB7 B4 6FA6 F7
B 220R
ASDI
5 ASDO
+3V3-FPGA
B 2FB9 B2 6FA7 F7
5FA5 RES 2FC0 B2 7FA0 C7
CFA0 SENSE+1V4 GND
2FC1 D6 7FA1 C9

4
220R
2FC2 F9 7FA3 B7

3FB3

3FA0
RES
10K

3K3
2FD0 C1 7FA4 E5
2FD1 C2 7FA5 F8
5FA6 +3V3-FPGA DATA0 2FD2 C2 7FK1 F5
FFA2
+3V3-FPGA
+3V3 +3V3-FPGA 2FD3 C3 9FA1 F7

SML-310
30R 2FD4 C3 9FA2 F7

2FD9
2FD0

2FD1

2FD2

2FD8

2FD3

2FD4

2FD5

2FD6

2FD7

2FE7
2FD5 C3 CFA0 B5
1u0

10n

10n

10n

10n

10n
ON-MODE

10n

10n

10n

10n

10n

6FA0
2FD6 C4 FFA0 A2
C C

3FB2

3FA1
10K

10K
FFK1 2FD7 C4 FFA1 A3

3FC7

100K
RES
2FD8 C2 FFA2 C1
3FC6
nCONFIG CONF-DONE 7FA1 2FD9 C3 FFA3 C2
IFA5 3 BC847BW
5FA7 FFA3 +2V5out-FPGA IFA7 FFA7 IFA6 100K 2FE0 D1 FFA4 D9

3FA2
100K
+2V5-STAB RES
1 7FA0 2FE1 D1 FFA5 D9
30R

2FC1 RES
BC847BW 2FE2 D2 FFA6 E9
2FE0

2FE1

2FE2

2FE3

2FE4

2FE5

2FE6

2
4u7

10n

10n

10n

10n

10n

10n

2FE3 D2 FFA7 C7

3FC8

100K
RES

+3V3-FPGA

+3V3-FPGA

+3V3-FPGA
1u0
2FE4 D2 FFA8 E9
JTAG-TD-PNX5050-PNX8535 2FE5 D2 FFA9 E9
2FE6 D2 FFB0 D6

+3V3
RESERVED
D D 2FE7 C4 FFK1 C6

3FA3

3FA4
3FA5
5FA8 2FF0 D5 IFA1 A7

1K0

1K0

1K0
MP-LED5 FFB0 JTAG-TD-PACIFIC-PNX5050
+3V3 +Vin-FPGA 2FF1 A6 IFA2 B7
30R 2FF2 A6 IFA3 B7

RES
1FA0
FFA4

2FF7
2FF3 D5 IFA5 C1

2FF0

2FF3

2FF4

2FF6
3FA6 100R

1u0
10n
MP-LED4 TCK

10n

10n

10n
1
FFA5 2 2FF4 D5 IFA6 C8
TDO 3FA7 100R
3 2FF5 B5 IFA7 C6
FFA6 4
MP-LED3 TMS 3FA8 100R 2FF6 D5 IFA9 B7
5
6 2FF7 D6 IFB1 A1
7FA4 7 2FK7 F4 IFB2 E5
LD3985M25
3FB8 FFA8 8 2FK8 F5 IFB3 F8
MP-LED2 TDI 9
E +3V3 1
IN OUT
5
100R
FFA9
10 E 3FA0 B9
3FA1 C9
IFB4 E1
IFB5 E2
IFB2

3FB9
3 4 5-147279-2

1K0
INH BP 3FA2 C9 IFB6 E2
2FA5

2FA6
100n

1u0
MP-LED1 IFB4 IFB5 IFB6 IFB7 IFB8
COM 3FA3 D8 IFB7 E3
3FA4 D8 IFB8 E3
2FA7

10n
2

3FA5 D8
6FA6 RES 3FA6 D8
3FC1

3FC3

3FC5
330R

330R

330R

3FB4

330R

3FB6

330R

STPS2L30A 3FA7 E8
RES 3FA8 E8
7FK1 RES +3V3 9FA1 7FA5
LD1117DT25 LD1117DT12 3FB1 B5
IFB3
3FB2 C7
F 3 2 9FA2 RES 3 2
F
SML-310

SML-310

SML-310

SML-310

SML-310

+3V3 IN OUT +2V5-STAB +2V5 IN OUT +1V2-STAB 3FB3 B5

6FA7 RES 3FB4 F3
COM COM
220u 25V
6FA1

6FA2

6FA3

6FA4

6FA5

2FC2
3FB6 F3
2FK7

RES 2FK8

2FA8
100n

100n

1u0
STPS2L30A
3FB8 E9
1

1
RES

3FB9 E8
3FC1 F1
H_16770_036.eps
3104 313 6196.2 190307
3FC3 F2
3FC5 F2

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 99

SSB: FPGA 1080p: I/O Banks

1 2 3 4 5 6 7 8 9 10 11 12 13 14
3F75 B2
3F76 B4

B05C FPGA 1080P: I/O BANKS B05C

3F77 B2
3F78 C2
3F93 C6
3F94 C6
3F95 B9
3F98 B9
7F90-1 A3
A +3V3-FPGA
A 7F90-2 B7
7F90-3 D7
7F90-4 B12
7F90-5 D12

3F77 RES
7F90-6 D3
7F90-1 7F90-7 G12
EP2C5F256C7N

1K0
7F90-2 7F90-4
9F50 B2
Φ EP2C5F256C7N EP2C5F256C7N

CONTROL Φ Φ 9F51 B4
9F52 B11
DV-CLK-PLL 9F50 H2 G5 +3V3 ASDO C3 BANK1 BANK3
H1
0 CE
M13 3F76 F4
IO_C3|ASDO
E3 DV-HS D13 M16 DV-R0_Y2
9F53 B11
IF50 IF51 1 STATUS +3V3-FPGA nCSO IO_F4|CSO_ IO_E3|LVDS7p IF54 IO_D13|LVDS29p IO_M16|LVDS38p
PCI-CLK-PNX5050_CLK-MOP 3F75 J2 P1 E4 DV-FF_DE C14 M15 DV-R1_Y3 9F54 C11
10K SD1-DQ9 IF55
2 IO_P1|LVDS0p IO_E4|LVDS7n IO_C14|LVDS29n IO_M15|LVDS38n
B 47R J1
3 CONFIG
J5 nCONFIG SD1-CS P2
IO_P2|LVDS0n IO_D5|LVDS8p
D5 DV-B0_UART2-RX 9F52 RES D16
IO_D16|LVDS30p IO_N16|LVDS39p
N16 DV-R3_Y5
B 9F92 C13

9F94
DV-CLK H16 L13 CONF-DONE SD1-DQ10 N1 E5 DV-VS D15 N15 DV-R4_Y6
4 CLK CONF_DONE IO_N1|LVDS1p IO_E5|LVDS8n +1V2-PLL IO_D15|LVDS30n IO_N15|LVDS39n 9F93 E13
H15 SD1-A5 N2 C1 3F95 100R SDA-SSB DV-B5_UV1 G13 P16
5 IO_N2|LVDS1n IO_C1|LVDS9p IO_G13|LVDS31p IO_P16|LVDS40p 9F94 B5
J15 J13 9F51 SD1-DQ13 L1 C2 3F98 100R SCL-SSB DV-B4_UV0 G12 P15
IF52 6 0 IF89 IO_L1|LVDS2p IO_C2|LVDS9n IO_G12|LVDS31n IO_P15|LVDS40n IF76
J16
7
MSEL
1
K12 MSEL1 MSEL1 SD1-DQ14 L2
IO_L2|LVDS2n IO_L4|PLL1_OUTp
L4 SD1-CLK +1V2-FPGA H11
IO_H11|LVDS32p IO_N14|LVDS41p
N14 DV-R5_Y7 9F95 C5
SD1-DQM K4 M4 J11 N13 DV-R6_Y8 IF50 B2
IO_K4|LVDS3p IO_M4|PLL1_OUTn IO_J11|LVDS32n IO_N13|LVDS41n
F2 TCK SD1-CKE K5 F3 DV-B3_AUDIO-MUTE 9F53 RES F16 M12 +1V2-PLL
TCK IO_K5|LVDS3n IO_F3|VREFB1N0 IO_F16|LVDS33p IO_M12|LVDS42p IF51 B2

9F95
F1 G1 TMS K1 J4 DV-B2_DEBUG-BREAK 9F54 RES F15 N12

RES
DATA0 DATA0 TMS SD1-DQ15 IO_K1|LVDS4n IO_J4|VREFB1N1 IF73 IO_F15|LVDS33n IO_N12|LVDS42n
DCLK H4 G2 TDO SD1-DQ16 K2 L3 SD1-A9 DV-B6_Y0 G15 M14 DV-R2_Y4 IF52 B2
DCLK TDO IO_K2|LVDS4p IO_L3 IO_G15|LVDS34p IO_M14|VREFB3N1
H5 TDI SDA-AMBI-3V3 3F93 100R E1 M1 SD1-DQ11 DV-B7_Y1 G16 H13 DV-G1_UV3 IF53 C7
TDI IO_E1|LVDS5p IO_M1 IO_G16|LVDS34n IO_H13|VREFB3N0
3F78 RES

SCL-AMBI-3V3 3F94 100R E2 M2 SD1-DQ12 DV-G2_UV4 J12 E14 DV-CLK-PLL

D3
IO_E2|LVDS5n IO_M2
M3 SD1-A8 DV-G0_UV2 H12
IO_J12|LVDS35p IO_E14|PLL2_OUTp
D14
IF54 B8
IF78
IF53 IO_D3|LVDS6p IO_M3 IO_H12|LVDS35n IO_D14|PLL2_OUTn IF55 B8
D4 P3 SD1-A4 DV-G4_UV6 K15 E16 9F92 RES DV-B1_UART2-TX
1K0

IO_D4|LVDS6n IO_P3 IO_K15|LVDS36p IO_E16

DV-G3_UV5 K16
IO_K16|LVDS36n IO_L14
L14 DV-G7_UV9 IF73 C8
C DV-G5_UV7
DV-G6_UV8
L16
L15
IO_L16|LVDS37p IO_P14
P14 DV-R7_Y9
C IF74 D8
IO_L15|LVDS37n IF75 D8
IF76 B13
IF78 C13
IF81 E11
IF82 E11
IF83 E11
IF84 E13
IF85 F13
IF86 F11
7F90-3 IF87 G11
D EP2C5F256C7N 7F90-5 D IF88 G11
7F90-6 Φ EP2C5F256C7N
EP2C5F256C7N
BANK2 Φ IF89 B4
Φ C4 B9 BANK4
POWER IO_C4|LVDS10p IO_B9|LVDS21p IF74
C5 A9 M11 T7 SD1-DQ4
IO_C5|LVDS10n IO_A9|LVDS21n IF75 IO_M11|LVDS43p IO_T7|LVDS54p
+3V3-FPGA B1 A1 +1V2-FPGA G7 D10 TxFPGAoD+ +1V2-PLL L11 R7 SD1-DQ3
IO_G7|LVDS11p IO_D10|LVDS22p IO_L11|LVDS43n IO_R7|LVDS54n
G3 A16 G6 D11 TxFPGAoD- MP-LED5 T14 T5 SD1-DQ6
IO_G6|LVDS11n IO_D11|LVDS22n IO_T14|LVDS44p IO_T5|LVDS55p
K3 VCCIO1 B15 F9 A10 TxFPGAoE+ R14 R5 SD1-DQ7
IO_F9|LVDS12p IO_A10|LVDS23p IF81 IO_R14|LVDS44n IO_R5|LVDS55n
R1 B2 F10 B10 TxFPGAoE- MP-LED3 T13 T4 SD1-DQ8
IO_F10|LVDS12n IO_B10|LVDS23n IO_T13|LVDS45p IO_T4|LVDS56p
C8 E6 G11 +1V2-FPGA MP-LED4 R13 R4 SD1-WE
GND IO_E6|LVDS13p IO_G11|LVDS24p IO_R13|LVDS45n IO_R4|LVDS56n
+2V5out-FPGA A15 C9 +1V2-PLL F6 G10 MP-LED1 T12 P5 SD1-A2
IO_F6|LVDS13n IO_G10|LVDS24n IO_T12|LVDS46p IO_P5|LVDS57p
A2 E8 TxFPGAeE+ A3 A12 TxFPGAoCLK+ MP-LED2 R12 P4 SD1-A3
IO_A3|LVDS14p IO_A12|LVDS25p IO_R12|LVDS46n IO_P4|LVDS57n
C10 E9 TxFPGAeE- B3 B12 TxFPGAoCLK- P12 T3 SD1-CAS
IO_B3|LVDS14n IO_B12|LVDS25n IF82 IO_P12|LVDS47p IO_T3|LVDS58p
E C7
E10
VCCIO2 G8
H14
TxFPGAeD+
TxFPGAeD-
A4
B4
IO_A4|LVDS15p IO_A13|LVDS26p
A13
B13
TxFPGAoC+
TxFPGAoC-
IF83
P13
K11
IO_P13|LVDS47n IO_R3|LVDS58n
R3
N9 9F93
SD1-RAS
DV-CLK-PLL
E
IO_B4|LVDS15n IO_B13|LVDS26n IO_K11|LVDS48p IO_N9|LVDS59p
E7 H3 TxFPGAeCLK+ A5 C12 TxFPGAoB+ +1V2-FPGA K10 N10 IF84
IO_A5|LVDS16p IO_C12|LVDS27p IO_K10|LVDS48n IO_N10|LVDS59n
H8 TxFPGAeCLK- B5 C13 TxFPGAoB- CTRL2-FPGA R10 L7 +1V2-FPGA
IO_B5|LVDS16n IO_C13|LVDS27n IO_R10|LVDS49p IO_L7|LVDS60p
+Vin-FPGA B16 H9 TxFPGAeB+ C6 A14 TxFPGAoA+ CTRL1-FPGA T10 L8
IO_C6|LVDS17p IO_A14|LVDS28p IO_T10|LVDS49n IO_L8|LVDS60n
G14 GND J14 TxFPGAeB- D6 B14 TxFPGAoA- L9 N11
IO_D6|LVDS17n IO_B14|LVDS28n IO_L9|LVDS50p IO_N11|VREFB4N0
K14 VCCIO3 J3 TxFPGAeC+ A6 D8 L10 N8
IO_A6|LVDS18p IO_D8|VREFB2N1 IO_L10|LVDS50n IO_N8|VREFB4N1
R16 J8 TxFPGAeC- B6 C11 CTRL3-FPGA T11 L12
IO_B6|LVDS18n IO_C11|VREFB2N0 IO_T11|LVDS51p IO_L12
J9 F8 A8 CTRL4-FPGA R11 P11
IO_F8|LVDS19p IO_A8 IO_R11|LVDS51n IO_P11 IF85
+3V3-FPGA M10 K9 F7 A11 T9 T6 SD1-DQ5
IO_F7|LVDS19n IO_A11 IF86 IO_T9|LVDS52p IO_T6
M7 M8 TxFPGAeA+ B7 B11 R9
IO_B7|LVDS20p IO_B11 IO_R9|LVDS52n
P10 M9 TxFPGAeA- A7 SD1-DQ1 T8
IO_A7|LVDS20n IO_T8|LVDS53p
P7 VCCIO4 P8 SD1-DQ2 R8
IO_R8|LVDS53n
T15 P9
F T2 GND R15
R2
F
+1V2-FPGA G9 T1
H10 T16
H7 VCCINT
J7 L5
GND_PLL1 N5
+1V2-PLL M5 7F90-7
1
E12 VCCA_PLL D12 EP2C5F256C7N
2
L6
GND_PLL2 F12
Φ
1 NC
F11 VCCD_PLL M6
2 1
GNDA_PLL E11 B8 H6
2
C15 J10 +1V2-FPGA
IF87
G IF88
C16
D1
J6
K13
G
D2 K6
D7 K7
D9 K8 +1V2-FPGA
NC NC
E13 N3 SD1-A6
E15 N4 SD1-A7
F13 N6 SD1-A1
F14 N7 SD1-A10
F5 P6 SD1-A11
G4 R6 SD1-A0

H H

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 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 100

SSB: FPGA 1080p: DRAM

1 2 3 4 5 6 7 8 9
2FK0 B2
2FK1 B2

B05D FPGA 1080P: DRAM B05D 2FK2 B2

2FK3 B3
2FK4 B3
2FK5 B3
2FK6 B3
A A 3FK4 C6
3FK5 C5
3FK6 C5
3FK7 C5
+3V3-SD1
3FK8 D6
3FL0 B7
3FL1 B7
7FK0 3FL2 C7

25

13

38

44
5FK0 MSM56V16160J-7T3KFG 3FL3 C7

7
FFK0
3FL4 C7
+3V3
30R
+3V3-SD1
SD1-A0 21
0
VDD
Φ VDDQ
3FL5 C7
SD1-A1 22 DRAM 33
B 1
B 3FL6 C7

2FK0

2FK1

2FK2

2FK3

2FK4

2FK5

2FK6
100n
23 NC 37

10n

10n

10n

10n

10n

10n
SD1-A2 2 512K X 16 X 2 3FL7 C7
SD1-A3 24
3
SD1-A4 27
4
3FL8 B8
28 0
SD1-A5 5 A 512K-1 3FL9 C8
SD1-A6 29 2 3FL0 33R SD1-DQ1
6 1 3FM0 C8
SD1-A7 30 3 33R 3FL8 SD1-DQ2
7 2 3FM1 C8
SD1-A8 31 5 3FL1 33R SD1-DQ3
8 3 3FM2 C8
SD1-A9 32 6 33R 3FL9 SD1-DQ4
9 4
SD1-A10 20
10 5
8 3FL2 33R SD1-DQ5 3FM3 C8
9 33R 3FM0 SD1-DQ6 3FM4 C8
SD1-A11 6
19 11 3FL3 33R SD1-DQ7
A11 7 3FM5 C8
12 33R 3FM1 SD1-DQ8
D 8 5FK0 B2
39 3FL4 33R SD1-DQ9
9 3FM2 7FK0 B6
40 33R SD1-DQ10
RES 3FK4
C +3V3-SD1
10
11
42
43
3FL5 33R
33R 3FM3
SD1-DQ11
SD1-DQ12
C FFK0 B3
IFK0 C6
3FK5 IFK1 4K7 IFK0 35
12
45 3FL6 33R
SD1-CLK CLK 13 SD1-DQ13 IFK1 C5
SD1-CKE 33R 3FK6 34 46 33R 3FM4 SD1-DQ14
CKE 14 IFK2 C6
SD1-CS 3FK7 33R IFK2 18 48 3FL7 33R SD1-DQ15
CS 15
SD1-RAS 33R 17 49 33R 3FM5 SD1-DQ16
RAS 16
SD1-CAS 16
CAS
SD1-WE 15
WE
36
U
DQM 14 SD1-DQM
VSS VSSQ L

3FK8

1K0
RES

26

50

10

41

47
D D

E E

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 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 101

SSB: Pacific 3: LVDS

1 2 3 4 5 6 7 8 9 10 11 12 13 14
1G50 A13
2G00 B9

B06A PACIFIC 3: LVDS B06A

2G01 B9
2G02 C9
2G03 C9
2G04 C9
2G05 C9
2G06 D9
2G07 D9
1G50 2G08 D9
A Single / Dual LVDS input only
FG00
50 51 A 2G09 D9
2G10 E9
48 49
46 47 2G11 E9
44 45 2G12 E9
VDISP
RxP3oA+_B8 42 43
41 2G13 E9
40 2G14 F9

3G00

100R
39
2G15 F9
RxP3oA-_B9 38
CTRL-DISP1 37 2G16 F9
CTRL-DISP2 36 2G17 F9
CTRL-DISP3
RxP3oB+_B6 Dual LVDS only CTRL-DISP4
35
2G18 G9
34
FG01 33 2G19 G9
B B

3G01

100R
TXEA- 32 2G20 G9

1 5G00 4

3
FG02

DLW21S
31
RxP3oB-_B7 2G00 4p7 FG03 2G21 G9
30
2G01 4p7 FG04 2G22 H9
29
TXEA+ FG05

2
28 2G23 H9
RxP3oC+_B4 FG06
27
FG07 26
2G52 E13

3G02

100R
TXEB- 25 2G53 E12

1 5G01 4

3
FG08

DLW21S
24 3G00 B3
RxP3oC-_B5 2G02 4p7 FG09 23
2G03 4p7
22 3G01 B3
TXEB+ FG10
3G02 C3

2
21
RxP3oCLK-_B2 FG11 20
FG12 3G03 C3
19
C C
3G03

100R

FG13 18 3G04 D3
TXEC-
RxP3oCLK+_B3 17 3G05 D3

1 5G02 4

3
FG14

DLW21S
16 3G06 E3
2G04 4p7 FG15 15
2G05 4p7 FG16 3G07 E3
14
RxP3oD+_B0 TXEC+ FG17

2
13 3G08 F3
FG18 12
3G09 F3
3G04

100R

FG19 11
TXECLK- 10 3G10 G3
RxP3oD-_B1

1 5G03 4

3
FG20

DLW21S
9 3G11 G3
2G06 4p7 FG21 8
2G07 4p7 3G52 D12
RxP3oE+_G8 7
TXECLK+ FG22 3G53 D13

2
6
FG23
5 5G00 B9
D D
3G05

100R

FG24 4
TXED- 3
5G01 C9
RxP3oE-_G9 3G53 FG25

1 5G04 4

3
SCL-I2C4-DISP 3G52

DLW21S
2 5G02 C9
2G08 4p7 SDA-I2C4-DISP FG26 1
2G09 4p7 100R 5G03 D9
RxP3eA+_G6 100R
TXED+ FI-RE41S-HF 5G04 D9

2
5G05 E9
LVDS CONNECTOR
3G06

2G53

2G52
100R

100p

100p
TXEE- 5G06 E9
RxP3eA-_G7

1 5G05 4

3
5G07 F9

DLW21S
2G10 4p7 5G08 F9
2G11 4p7
RxP3eB+_G4 TXEE+ 5G09 G9

2
5G10 G9
E E
3G07

100R

5G11 H9
RxP3eB-_G5 TXOA- FG00 A13

1 5G06 4

3
FG01 B13

DLW21S
2G12 4p7
2G13 4p7
FG02 B13
RxP3eC+_G2 TXOA+ FG03 B13

2
FG04 B13
3G08

100R

FG05 B13
TXOB-
RxP3eC-_G3

1 5G07 4

3
FG06 B13

DLW21S
2G14 4p7 FG07 B13
2G15 4p7
RxP3eCLK-_G0 FG08 C13
TXOB+

2
F F FG09 C13
3G09

100R

FG10 C13
TXOC-
RxP3eCLK+_G1 FG11 C13

1 5G08 4

3
DLW21S
2G16 4p7 FG12 C13
2G17 4p7 FG13 C12
RxP3eD+_R8 TXOC+

2
FG14 C13
3G10

100R

FG15 C12
TXOCLK- FG16 C13
RxP3eD-_R9

1 5G09 4

3
DLW21S
2G18 4p7
FG17 C12
2G19 4p7 FG18 C13
RxP3eE+_R6 TXOCLK+

2
FG19 D13
G G FG20 D13
3G11

100R

TXOD- FG21 D13

RxP3eE-_R7

1 5G10 4

3
DLW21S
FG22 D13
2G20 4p7
2G21 4p7 FG23 D13
Dual LVDS input only TXOD+ FG24 D12

2
FG25 D13
TXOE- FG26 D13

1 5G11 4

3
DLW21S
2G22 4p7
2G23 4p7
TXOE+

2
H H

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 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 102

SSB: Pacific 3: Display & Interfacing

1 2 3 4 5 6 7 8 9 10 11 12 13 1D42 B7
2G50 H4
7G51 D10
7G52 B2
2G51 H3 7G53 E11
2G54 B4 7G54 B3

B06B PACIFIC 3: DISPLAY-INTERFACING RESERVED +3V3-STANDBY

2G61

470p
IG55 +5V-STANDBY B06B 2G55 E10
2G57 C2
7G55 C4
7G56 F11

2
2G58 G12 7G57 G4
3G82 7G60-1
BC847BS 2G59 F12 7G58-1 E13

3G83
2K2
10K 2G60 C4 7G58-2 E12

A A 2G61 A11 7G59-1 G11

6
IG58 9G57 SCL-AMBI
2G62 A11 7G59-2 G12
IG60 2G63 E4 7G60-1 A12
2G64 E5 7G60-2 A12
+5V-STANDBY
2G62 2G65 E5 7G61-1 B12
+3V3-STANDBY IG61 2G66 E5 7G61-2 C12
470p

5
3G87
7G60-2
2G67 B12 7G65 H12

3G89

2K2
10K BC847BS 2G68 C12 7G66-1 H13
2G69 C6 7G66-2 H13
5G55 FG50 SDA-AMBI
IG62

3
9G61 9G58 2G70 C7 9G48 I10
VDISP
RES
220R
TO DISPLAY 2G67
2G71 C8 9G49 H10
IG92 2G72 C8 9G50 H3
B 5G56 2G54
3GB5
1D42
FG55 3GA7
470p
3G92 +5V-ON
B 2G75 D13 9G53 I3
7G52 BACKLIGHT-OUT P3-VS IG64
220R 100n 1 +3V3 2G76 B4 9G54 I3
SI4835BDY 100R 1K0 10K
3G56 2 2G78 I11 9G55 E10

2
9G77 RES 6G51 FG56

2K2
IG54 7G54 RES FG60 3 7G61-1

3G95

4K7
2G79 I12 9G56 F12

10u 16V
+12V-DISP SI3441BDV 2K2 SML-310 3GA8 4 3GA9 SDA-I2C4-DISP BC847BS

3GA0
2G76
9G78
5 3G50 H4 9G57 A12

RES
100R FG57 100R
3G51 H4 9G58 B12

6
IG53 3G59 IG66 9G59 SCL-AMBI
9G79 SCL-AMBI-3V3 3G54 D10 9G59 C12
FG58 3GB0 SCL-I2C4-DISP

2G69

100p
RES RES
+5V-ON 47K IG67 3G55 E12 9G60 C12
9G80 IG93 100R
3G63 2G57 3G64 2G68
RES 3G56 B4 9G61 B2
+5V-ON
47R 1u0 IG95 47K 470p 3G57 E11 9G77 B1
IG96 3GA1
C 7G55
+3V3
IG68
C 3G58 E10 9G78 B1

2K2
6G50 BC847BW 10K

5
2G70

2G71

2G72
100p

100p

100p
3G59 C2 9G79 C1
7G61-2

3GA2

3GA3
4K7
BZX384-C5V6 3 IG71 3G67 IG94 3G68 BC847BS 3G60 D3 9G80 C1
1
+3V3 3G61 E11 9G82 I12
10K 10K IG69 SDA-AMBI

4
9G60

3
2 SDA-AMBI-3V3 3G62 F11 FG50 B4

2G60

100n
+3V3 +5V-ON RES IG70 3G63 C2 FG51 D5
3G64 C3 FG52 E5

IG72
VDISP-SWITCH IG97
+12V
3G65 F12 FG53 E5
3G71 3G72 3G66 F13 FG54 E5

3GA5

RES
10K
CTRL4-P3 +3V3 +3V3 3G67 C4 FG55 B7
100R 4K7
3G68 C5 FG56 B8
D D

3GC4
4K7 RES

1R0
IG52 3G69 F10 FG57 C7

3G54
FG59
3G70 F11 FG58 C7

1
47R RES

47R RES
7G51
3G60 +8V2-PAS

3G76

3G77

3G78

3G79
BC847BW

47R

10K
CTRL1-MIPS_LCD-PWR-ON 3G71 D2 FG59 D13

BZX384-C8V2
RES

1u0 RES
FHP SDI
100R RES 3G72 D4 FG60 B6

2G75

6G55

RES
3G80 FG51
3G73 G10 IG50 H2

3
CTRL1-FPGA CTRL-DISP1 IRQ RESET IG91
47R RES IG84 3G76 D4 IG51 I2
9G55

3G55

47K
FG52 CTRL1-STBY_LAMP-ON
3G81 3G77 D5 IG52 D10

3G57
6

27K
CTRL2-FPGA CTRL-DISP2 PDWN
47R RES LAMP-ON-OUT 3G78 D5 IG53 C2
IG85
2 7G58-1 3G79 D5 IG54 B2
3G84 FG53
CTRL3-FPGA CTRL-DISP3 CPU-GO 4 BC847BPN
IG86 3GA6 IG87 3G80 D3 IG55 A12
3 1
E 47R RES
3G85 FG54 IG89 3G58
IG88 12K
5
BC847BPN
7G58-2 E 3G81 E3 IG58 A12
CTRL4-FPGA CTRL-DISP4 PDP-GO BACKLIGHT-CONTROL 1 7G53 3G82 A11 IG59 F2
BC847BW 3
47R RES 4K7 3G83 A12 IG60 A12

3G61

RES
2

2K2
IG73 3G86
CTRL1-MIPS_LCD-PWR-ON RESERVED 2G55
3G84 E3 IG61 A12
47R NOTE : CAN BE 3G85 E3 IG62 B12
2G63

2G64

2G65

2G66
100p

100p

100p

100p

IG75 3G88 470p

CTRL3-STBY_POWER-OK-DISP
CAPACITOR OR 3G86 E3 IG64 B12
WIRE BRIDGE 3G62 9G56 IG90
47R RES 3G87 A11 IG65 G3
IG59 3G90 +3V3 1K0 RES 3G88 F3 IG66 C12

22K RES

1u0 RES
CTRL5-STBY_BACKLIGHT-BOOST RES
3G89 B12 IG67 C12

3G70

2G59

3G65

3G66
15K

1K0
47R RES +3V3-STANDBY
IG77 3G91
3G90 F3 IG68 C12
F CTRL1-STBY_LAMP-ON
IGB1 F 3G91 F3 IG69 C12

3G69

10K
47R RES 3G92 B12 IG70 D12
IG78 3G93
3G94

4K7

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3 CTRL4-STBY_SELECT-PWM-ANA 7G56 RES 3G93 F3 IG71 C4

PDTC114EU
47R RES +3V3 3G94 F4 IG72 D2
IG79 3G96
CTRL4-STBY_SELECT-PWM-ANA 3G95 B12 IG73 E2
47R 3G96 F3 IG75 E2
IG65
3G97 3G97 G3 IG77 F2

3GA4

10K
POD-MODE IGB2 2G58
100K RES 3 3G98 G3 IG78 F2
3G99

100K

7G57 IGB3 1u0 3G99 G3 IG79 F2

BC847BW 6 5 7G59-2
ON-MODE
3G98 BC847BS 3GA0 B12 IG80 H3
3G73
2 7G59-1 4 3GA1 C12 IG81 H5
G 100K
47K
BC847BS G 3GA2 C12 IG82 I4
1
3GA3 C12 IG83 I4
3GA4 G11 IG84 E10
3GA5 D10 IG85 E12
BACKLIGHT-OUT 3GA6 E11 IG86 E11
3GA7 B8 IG87 E12
I2C-BUFFER
*

5G50 2G50 3GA8 B6 IG88 E10

+5V-ON 3GA9 B8 IG89 E10
120R RES 100n +8V2-PAS
RES RESERVED 3GB0 C8 IG90 F13

3GB7

47K
5G51 IG80 IG81 3GB5 B6 IG91 D10

3GB8
9G50 6

12K
H +3V3
120R RES RES 6G52-1
6G52-2
IGA5
H 3GB7 H12 IG92 B3
RES 10K

BAV99S 2
RES 10K

7G66-1 3GB8 H12 IG93 C4

BAV99S
3G50

3G51
2G51

8
RES 100n

7G50 4 BC847BPN
RES IGA6 3GB9 IGA7 3GB9 H12 IG94 C4
PCA9515ADP 1 2 5 4 3 1
BC847BPN
VCC IGA8
10K
5 7G66-2 3GC0 H11 IG95 C3
IGA9 3GC0
IG50 RES RES CTRL5-STBY_BACKLIGHT-BOOST 9G49 1 7G65 3GC1 I11 IG96 C2
SDA-SSB-MUX1 3 SDA0 SDA1 6 6 3 BC847BW 3
4K7 3GC2 I12 IG97 D4

3GC1

RES
9G48 2

2K2
SDA-I2C4-DISP CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3
RES 3GC3 I13 IGA5 H13
2G78
IG51 IG82 3GC4 D13 IGA6 H12
SCL-SSB-MUX1 2 SCL0 SCL1 7 SCL-I2C4-DISP 470p 3GC8 I11 IGA7 H12
3GC8 IGB0
5 EN
NC
1
IG83
9G82 5G50 H2 IGA8 H11
GND RES
1K0 5G51 H2 IGA9 H11
RES
I 5G55 B4 IGB0 I13

3GC2

3GC3
2G79

33K

1K0
1u0
4
5G56 B4 IGB1 F11
6G50 C2 IGB2 G12
9G53 6G51 B4 IGB3 G11
6G52-1 H4
9G54 BACKLIGHT-BOOST 6G52-2 H6
6G55 D13
7G50 H2
H_16770_041.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9 10 11 12 13
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 103

SSB: Pacific 3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1GE0 F10 5GE5 D4
1GE1 B11 5GE6 D4
2GE0 A2 6GE0 G8

B06C PACIFIC 3 B06C

2GE1 A3
2GE2 A3
2GE3 A3
6GE1 H9
6GE2 H8
6GE3 I8
+2V5-PF +2V5-P3 +2V5-PF 2GE4 A3 6GE5 G9
IGH9 5GE0 FGE0 5GE1 FGE1 +2V5-PLL
2GE5 A3 6GE6 D1
600R 600R 2GE6 A4 6GE7 D1

2GG0

2GG1

2GG2

2GG3

2GG4

2GG5
2GE7 A4 7GE0 G11

1u0

10n

10n

1u0

10n

10n
2GE8 A4 7GE1 C7
+3V3-P3
A +3V3 5GE2 FGE2 +3V3-P3 A 2GE9 A4
2GF0 A5
7GE2-1 F4
7GE2-2 B12
120R 2GF1 A5 7GE2-3 E1

47K RES
2GF2 A5 7GE3 B2

2GE0

2GE1

2GE2

2GE3

2GE4

2GE5

2GE6

2GE7

2GE8

2GE9

3GE0
2GF0

2GF1

2GF2

2GF3
2GL1
1u0

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n

10n
2GF3 A5 7GE5 D2
FGE3 3GE1 2GF4 B5 9GE0 B13
CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3
+3V3-P3 2GF5 B5 9GE1 C9
100R

2GJ0
2GF6 B5 9GE2 G11

4u7
+3V3-P3
2GF7 B5 9GE3 G11
2GF8 B5 FGE0 A8
IGE0 3GE4
7GE3 2GF9 B6 FGE1 A9
B B

2GH0

9GE0
1

RES
LD3985M25

10n

10p RES
47R 2GG0 A7 FGE2 A2

3GE2

1GE1

3GE3
2GL2

1M0
2

3GE5 4K7

3GE6 4K7

4K7
5GE3 FGE4 7GE2-2 2GG1 A8 FGE3 A10

60M
1 5 +2V5-PF +1V5 +1V5-P3 T6TF4HFG-0002
+3V3 IN OUT
2GG2 A8 FGE4 B5

3
IGF9 220R
3 4

10p RES
INH BP IGF5 2GG3 A9 FGE5 D10

2GG6

2GK4

2GK5

2GK6
2GF4

2GF5

2GF6

2GF7

2GF8

2GF9

2GL3
2GJ5

2GJ6
100n

165 109 IGE1

1u0

4u7

10n

10n

10n

10n

10n

10n

10n

10n

10n
IGE2 OSC_Z CLKO
COM MISC 115 IGE3 P3-VS 2GG4 A9 FGE8 C5
8 VSO
164 116 IGE4 2GG5 A10 FGF2 E10
OSC_CLK_I HSO
2GJ7

10n
2

VCC 172 168 BACKLIGHT-CONTROL 2GG6 B6 FGF3 E11

2
Q Φ D
5
193
RSTN 0
PWM 1
169
170
2GG7 C5 FGG0 C11
512K 6 191
SI 2 2GG8 C5 FGG1 C9
5GE4 FGE8 FLASH C
192
SCK
117 2GG9 C5 FGG2 H10
+1V5-PLL
C 220R S
1 IGA2 194
SO
CS
0
1
120
121 RES
3GE7
C 2GH0 B8 FGG3 H11
2 4K7 RES 2GH1 D5 IG74 H10

2GG7

2GG8

2GG9
3 4 122 3GE8

1u0

10n

10n
W RxP3VS VSI 3 4K7
JTAG-TD-PACIFIC-PNX5050 2GH2 D5 IGA2 C9

RES 3GE9
3GF0 3GF1 FGG0 123
4

100R
HOLD
7
+3V3 10K 1K0 173
T1
PD
5
126 2GH3 D5 IGA3 D6
3GF2

9GE1
RES
JTAG-TCK 3GF3 207 127 2GH4 D6 IGA4 D6
TCK 6 3GF4
7GE1 VSS JTAG-TD-CON-PACIFIC 3GF5 100R 3 128 4K7
FGG1 TDI 7 2GH5 D6 IGE0 B10
M25P05-AVMN6 JTAG-TD-PACIFIC-PNX5050 100R 3GF7 205 129 3GF6 4K7
TDO 8
5GE5 IGA4 4 JTAG-TD-CON-PACIFIC JTAG-TMS 3GF8 22R 1
TMS 9
132 4K7 2GH6 E5 IGE1 B13
7GE5 FGE5 100R 3GF9 2
LD1117DT +1V5-TX JTAG-TRST TRST 2GH7 E5 IGE2 B11
3GH9 100R 206 133
220R TRIGOUT 0 2GH8 E5 IGE3 B13
IGE6 134
STPS2L30A STPS2L30A IGH8 IGE7 10K 1

2GH1

2GH2

2GH3

2GH4

2GH5
3 2

RES 3GG0
177 135 2GH9 E6 IGE4 C13

1u0

10n

10n

10n

10n
IN OUT +1V5 MINTN 2

100R
IN OUT 137
D +3V3 6GE6 IGH7 6GE7
COM
+3V3-P3 3GG1
CTRL4-P3 CTRL4-P3 178
00
PE 3
4
139 D 2GJ0 B11 IGE6 D11
47u 4V

2GJ1 G12 IGE7 D10

2GK0

2GK1

2GK2
3GH3
100n

100n

179 140
1K0

GND 4K7 01 5
GND-TX GND-TX 183 141 2GJ2 H10 IGE8 E11
1 IGH0 GND-TX 02 6
RxP3FF 185 GPIO
5GE6 GND-TX GND-TX IGA3
187
03
A<19:0>
2GJ3 G10 IGE9 E11
+1V5-RX 04 2GJ4 G9 IGF0 D13
120R

188 143
3GH4

220R 05 RXD IGF0

145 IGF1 2GJ5 B1 IGF1 D13
SCL RDN
2GH6

2GH7

2GH8

2GH9
2GK3

146
1u0

1u0

10n

10n

10n
SDA TXD IGF2 2GJ6 B3 IGF2 E13
IGE8
SDA-SSB 100R 3GG2 198 PE<7:9> 2GJ7 C2 IGF3 E11
MSDA
3GH5

120R

SCL-SSB 200 148 2GK0 D2 IGF4 H12

MSCL 7
149
3GG3 100R IGE9 202 6
151 2GK1 D3 IGF5 B4
GND-RX GND-RX GND-RX GND-RX FGF2 SSDA 5
204 153 2GK2 D3 IGF6 H9
E FGF3 IGF3
114
SSCL
D
4
3
154
155
E 2GK3 E2 IGF7 I13
DEO 2 2GK4 B6 IGF8 H8
159
1
7GE2-3 0
160 2GK5 B6 IGF9 B2
+1V5-RX +1V5-TX +3V3-P3 161
T6TF4HFG-0002 PSEN 2GK6 B6 IGH0 D2
162
WRN 2GL1 A2 IGH2 H12
GND_HS

PF<0:9> 2GL2 B10 IGH3 H12

242 7GE2-1
104

2GL3 B10 IGH4 H12

11
30
42

63
70
79
91

18
50

64
73
88

T6TF4HFG-0002
3GE0 A11 IGH5 H13
VDD_RX_1V5

VDD_TX_1V5

VDD_RX_3V3

VDD_TX_3V3

241 RxP3CLK 7 61 3GE1 B12 IGH6 H12

+2V5-PLL CLKI 3
240 RxP3HS_DE 8 62
54
PLL2_VCCA_2V5
239
HSI 4 3GE2 B8 IGH7 D1
66
F 212
PLL1_VCCA_2V5
238
237
RxP3oA-_B9 9
10
N
ORX0
PWM
5
6
67
68
F 3GE3 B11
3GE4 B11
IGH8 D2
SSCG_VCC_1V5 RxP3oA+_B8 P 7 IGH9 A7
58 236 69
+1V5-PLL 8 3GE5 B8
PLL2_VCCD_1V5
235 RxP3oB-_B7 13
N LVDS
56 234 RxP3oB+_B6 14 ORX1 74 TXEA+ 3GH6 3GE6 B9
214
PLL1_VCCD_1V5
233
P
OTX0
P
N
75 TXEA- 1K0 1GE0 * 3GE7 C13
232 RxP3oC-_B5 15

SML-310
210 231 16
N
ORX2 77 +3V3 +5V-ON 3GE8 C12
RxP3oC+_B4 P P TXEB+
201 230 OTX1 78 10M 3GE9 C8
N TXEB-
VIA

6GE5
+3V3

6GE0
196
158

10p RES

10p RES
229 RxP3oCLK-_B2 20 3GF0 C10
184 N

2GJ4

2GJ3
BAV70W
228 RxP3oCLK+_B3 19 OCLK PA<0:9>
P 3GF1 C11

9GE2

9GE3
180

RES
227 80 TXEC+
174 P
226 RxP3oD-_B1 22 OTX2 81 TXEC- 3GF2 C13
VDD_3V3

167 N N
225 RxP3oD+_B0 23 ORX3 3GF3 C11
G 150
224
223
P
P
83 TXECLK+ G 3GF4 C13
SUPPLY

B<9:0> OTX3 84 TXECLK-

N

3GH7
144 222 25 3GF5 C11

10K
RxP3oE-_G9 N
138 221 RxP3oE+_G8 26 ORX4 86 TXED+
130 P P 3GF6 D13
220 OTX4 87 TXED-
N 3GF7 D11

3GH8
124

2GJ1

100n
219 28

10K
RxP3eA-_G7 N BAS316 P87LPC764BDH
118 218 RxP3eA+_G6 29 ERX0 89 TXEE+ 3GF8 D11
+3V3-P3 P P 7GE0

15
113 217 OTX5 90 TXEE-
N 6GE1 3GF9 D11
Φ
6GE2

110 RxP3eB-_G5 31 VDD

N 3GH0 IG74
199 FGG2 3GG0 D8
BAV70W

RxP3eB+_G4 32 ERX1 92 TXOA+ PWM-3 PWM-3 7

216 P P CLKOUT uC
166 VDD_2V5 ETX0 93 TXOA- FGG3 IGH3 3GG1 D9
+2V5-P3 N IGF6 2K2 X2
211 4Kb OTP

2GJ2
6 34 6 12

10n
RxP3eC-_G3 N X1 TXD IGH4 3GG2 E11
208 RxP3eC+_G2 35 ERX2 PB<0:9> 11
P P2<0:1> RXD IGH5
209 203 95 TXOB+ PWM-OR 1 10 3GG3 E11
H 197
190
195
189
RxP3eCLK-_G0
RxP3eCLK+_G1
38
37
N
ECLK
ETX1
P
N
96 TXOB- 20
19
CMP2
2B
SCL
T0 H 3GG4 H10
P 3GG4 2A SDA IGH6 3GG5 H10
182 186 98 TXOC+ SDA-AMBI-3V3 18 CIN 9
P 1B 0 IGF4 3GG6
176 181 G<9:0> ETX2 99 TXOC- SCL-AMBI-3V3 3GG5 100R 17 INT 8 PWM-OR 3GG6 H13
GND

175 N 1A 1
156 RxP3eD-_R9 40 16 4 3GG7 H13
171 N 100R CMPREF RST 1K0
147 RxP3eD+_R8 41 ERX3 100 TXOCLK+ 14 3 IGH2
163 P P CMP1 6 3GG7 3GG8 I13
136 ETX3 101 TXOCLK- 13 2 RES +3V3
N IGF8 T1 7
6GE3

119 157 44 3GG9 I13

VDD_1V5

RxP3eE-_R7 N P0<0:7> P1<0:7> 4K7

152
BAV70W

111 RxP3eE+_R6 45 ERX4 102 TXOD+ 3GH0 H9

142 P P
105 ETX4 103 TXOD- VSS
131 N 3GG8 RES 3GH1 I13

5
94 RxP3R5 46
85 125 RxP3R4 47 106 TXOE+ 3GH2 I8
P 4K7
3GH2

72 112 48 ETX5 107

4K7

RxP3R3 N TXOE- 3GH3 D2

65 108 RxP3R2 49
I 43
39
5 RxP3R1
RxP3R0
52
53
PC<0:9> IGF7 3GG9 RES
+3V3 I 3GH4 D2
3GH5 E2
SSCG_GND 59 4K7
33
24
3GH6 F9
R<9:0>
21 PLL2_GNDA 55 GND 3GH1 RES 3GH7 G10
12 PLL1_GNDA 213 3GH8 G10
17
27
36
51
60
71
76
82
97

+1V5-P3 4K7
PLL2_GNDD 57 3GH9 D10
PLL1_GNDD 215 5GE0 A7
5GE1 A9
GND-RX GND-TX 5GE2 A2
H_16770_042.eps
3104 313 6196.2 190307 5GE3 B4
5GE4 C4

1 2 3 4 5 6 7 8 9 10 11 12 13 14
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 104

SSB: UART
1J11 A3 1M15 B4 2J12 B3 3J12 B3 6J11-2 B2 9J09 B1 FJ12 A3 IJ01 A2
1J12 B3 2J11 A3 3J11 A3 6J11-1 A2 9J08 B1 FJ11 B3 FJ13 A4 IJ02 B2 Personal Notes:
1 2 3 4

B08A UART B08A

6J11-1
1 2
+3V3-STANDBY

A BAV99S
RES
A

6
FJ13

100p
1J11

2J11
YKB21-5101A
1
8
IJ01 3J11 FJ12
RXD-SERV
7
100R 3
IJ02 3J12
TXD-SERV
2
100R FJ11 4
5

100p
1J12

2J12
1M15
RXD 9J08
B 3
UART B
TXD 9J09 SERVICE
6J11-2
CONNECTOR
+3V3-STANDBY
4 5
BAV99S RES

C C

H_16770_043.eps
3104 313 6196.2 190307

1 2 3 4

E_06532_012.eps
131004
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 105

SSB: SPDIF
1X02 E1 2J31 B2 2J33 B2 2J35 C3 3J31 B3 3J33 B4 3J35 C6 7J30-1 B3 7J30-3 D3 7J30-5 C3 9J01 E4 9J03 E4 9J05 E4 IJ30 B3 IJ32 C5 IJ34 B2
2J30 B2 2J32 B2 2J34 C5 3J30 A3 3J32 B2 3J34 B5 3J36 C6 7J30-2 B5 7J30-4 D5 7J30-6 C5 9J02 E4 9J04 E4 FJ30 B3 IJ31 B4 IJ33 C6

1 2 3 4 5 6 7 8 9

B08B SPDIF B08B

A +3V3 A

3J30

2R2
FJ30 3J31
100n
2J30

2J31

2J32
1n0

10u
IJ30
22K

B 7J30-1 7J30-2 B

14

14
74HCU04PW 74HCU04PW
IJ34 2J33 1 IJ31 1 3J34
SPI 1 2 3 4 SPDIF-IN1
100n 68R

7
3J33
75R

47K
3J32

2J35

100n

7J30-5 7J30-6
14

14
74HCU04PW 74HCU04PW
C SPDIF-OUT 11 1 10 13 1 12
2J34 3J35
SPI-OUT C
IJ32 100n IJ33 220R
7

120R
3J36
7J30-3 7J30-4
14

14
74HCU04PW 74HCU04PW
5 1 6 9 1 8
7

7
D D

1X02
METALIZED EMC HOLE PCI-REQ-PNX8535 9J01 PCI-REQ-DEBUG

PCI-GNT-PNX8535 9J02 PCI-GNT-DEBUG

E PCI-REQ-PNX8535 9J03 PCI-REQ-PNX5050 E
PCI-GNT-PNX8535 9J04 PCI-GNT-PNX5050

PCI-INTA-OUT 9J05 IRQ-PNX5050

H_16770_044.eps
3104 313 6196.2 190307

1 2 3 4 5 6 7 8 9
 Circuit Diagrams and PWB Layouts Q523.1U LA 7. 106

SSB: Externals
1 2 3 4 5 6 7 8 9 10 11 12 13 14 1C00 C2 FJ53 A1
1C01 B6 FJEA F13
1C02 D6 FJEB F13

B08C EXTERNALS 5J40 IJ40 B08C

1C03 A2
1HE1 F14
1HE2 F14
FJEC E11
FJED F13
FJEE F13
SPI 1J15 B7 FJEF H13
FJ40 30R 1J16 C7 FJEG I13
6J40 IJ19 5J39 1J17 D7 IJ15 B8

1J50

2J42

2J41

RES
SPDIF IN

22p

22p
BLACK +12V
1C03 1J50 A3 IJ16 B7
PDZ6.8-B 220R 1J51 B3 IJ17 C8
3
A IJ71
A

100n
3J00

3J01

3J02

2J02

2J03
1J52 C2 IJ18 C7

33R
82K

1K0

1u0
6J41
1J53 D2 IJ19 A12
2 1
PDZ6.8-B 1J59 H13 IJ20 A12
SPDIF OUT BLACK IJ20
YKC21-4225N 1J60 I13 IJ21 B13
FJ53 1M16 I14 IJ22 B12
2J00 IJ26 4 2J00 A11 IJ23 B11
BC847BPN 2J01 B11 IJ24 C11
FJ31 IJ46 6 5 7J39-2
5J45 FJ15 3J15 IJ15 1u0 2J02 A13 IJ25 C10
SPI-OUT AUDIO-IN4-R IJ23
2 7J39-1 3 2J03 A13 IJ26 A12
30R 100R
6J42 BC847BPN 2J04 C10 IJ35 C4
6J15

RES

100K
100p

100p
2J05 I13 IJ36 D3

1J51

2J49

2J71

1J15

3J16

2J15
1

RES
22p
2J01
1C01 IJ21 2J06 H13 IJ37 D4
B IJ72
PDZ6.8-B 3
IJ16
PDZ6.8-B
1u0 IJ22
3J03
Y-CVBS-MON-OUT_SC B 2J15 B8 IJ38 D4
6J43 6J16 330R 2J16 C8 IJ40 A4
2J17 D7 IJ46 B4

330R
3J05

3J04

3J06
2 1

47K

10K
PDZ6.8-B PDZ6.8-B
2J20 E7 IJ53 C4
YKC21-4112N 2J41 A4 IJ54 C3
2J42 A4 IJ57 C4
FJ16 3J17 IJ17 2J49 B4 IJ58 E7
IJ53 2J61 AUDIO-IN4-L
FJ41 3J50 IJ54 3J51