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Computer
Organization
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Chapter 3
Memory
Location
Internal (e.g. processor registers, cache,
main memory)
External (e.g. optical disks, magnetic disks,
tapes)
Capacity
Number of words
Number of bytes
Unit of Transfer
Word
Block
Access Method
Sequential
Direct
Random
Associative
Performance
Access time
Cycle time
Transfer rate
Physical Type
Semiconductor
Magnetic
Optical
Magneto-optical
Physical Characteristics
Volatile/nonvolatile
Erasable/nonerasable
Organization
Memory modules
Characteristics of Memory
Systems
Location
Capacity
Unit of transfer
Direct
access
Random
access
Associative
Each addressable
location in memory has a
unique, physically wiredin addressing mechanism
A word is retrieved
based on a portion of its
contents rather than its
address
Individual blocks or
records have a unique
address based on
physical location
Transfer rate
The rate at which data can be
transferred into or out of a memory
unit
For random-access memory it is
equal to 1/(cycle time)
+ Memory
Semiconductor memory
Magnetic surface memory
Optical
Magneto-optical
Volatile memory
Information decays naturally or is lost when electrical power is switched off
Nonvolatile memory
Once recorded, information remains without deterioration until deliberately changed
No electrical power is needed to retain information
Magnetic-surface memories
Are nonvolatile
Semiconductor memory
May be either volatile or nonvolatile
Nonerasable memory
Cannot be altered, except by destroying the storage unit
Semiconductor memory of this type is known as read-only memory (ROM)
Memory Hierarchy
Inb
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me
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gn OM
M a D- R W
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V
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a
DV lu-R
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Ma
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ap
Memory
Disk cache
Block Transfer
Word Transfer
Main Memory
Cache
CPU
Fast
Slow
Level 2
(L2) cache
Level 1
(L1) cache
CPU
Fastest
Fast
Level 3
(L3) cache
Less
fast
Main
Memory
Slow
Line
Number Tag
0
1
2
Block
Memory
address
0
1
2
3
Block 0
(K words)
C1
Block Length
(K Words)
(a) Cache
Block M 1
2n 1
Word
Length
Address
Processor
Control
Cache
Control
Data
buffer
Data
System Bus
Address
buffer
Cache Addresses
Virtual Memory
Virtual memory
Logical address
MMU
Physical address
Processor
Main
memory
Cache
Data
Logical address
MMU
Physical address
Processor
Cache
Data
Main
memory
Mapping Function
Associative
Permits each main
memory block to be
loaded into any line of the
cache
The cache control logic
interprets a memory
address simply as a Tag
and a Word field
To determine whether a
block is in the cache, the
cache control logic must
simultaneously examine
every lines Tag for a
match
Set Associative
A compromise that
exhibits the strengths of
both the direct and
associative approaches
while reducing their
disadvantages
b
L0
m lines
B0
Bm1
Lm1
First m blocks of
main memory
(equal to size of cache)
cache memory
b = length of block in bits
t = length of tag in bits
b
L0
one block of
main memory
Lm1
cache memory
(b) Associative mapping
L0
k lines
B0
Lk1
Bv1
First v blocks of
main memory
(equal to number of sets)
B0
L0
v lines
one
set
Bv1
First v blocks of
main memory
(equal to number of sets)
Lv1
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Internal Memory
Flash memory
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External Memory
Magnetic Tape
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Magnetic Disks
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Optical Disks
Optical storage devices: A form of secondary storage in which a
laser reads the surface of a reflective plastic platter.
Optical Disks
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Flash/thumb/pen drives:
USB device.
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