APPLE p84

8
CK
APPD
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
REV
ZONE
ECN
PAGE
1
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12
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16
17
18
19
20
21
ENG
APPD
DESCRIPTION OF CHANGE
DATE
CONTENTS
TITLE PAGE AND CONTENTS
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
PCB NOTES AND HOLES
MPC7450 MAXBUS INTERFACE
MPC7450 DATA
CPU PLL AND CONFIGURATION STRAPS
INTREPID MAXBUS AND BOOT STRAPS
PAGE
CONTENTS
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41-42
43-44
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO

DUAL-CHANNEL LVDS
293301
PRODUCTION RELEASED
DATE
09/11/03 ?
SCHEM,MLB,PB17"
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED

SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
09/04/2003
INTERNAL CONNECTORS - DVD,

CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH
FAN CONTROLLER, MODEM, SOUND
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
STUFF
BOM OPTIONS
NO STUFF
D3_HOT
USB 2.0
D3_COLD
GPU_SS
MARVELL GIGABIT ETHERNET PHY
GPU_SWITCH
FIREWIRE A/B PHY
SERIAL_DEBUG
VCORE_OFFSET
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
www.kythuatvitinh.com
B
INTREPID MEMORY INTERFACE / BOOT ROM

DDR MEMORY MUXES
200PIN DDR MEMORY SODIMM CONNECTORS

INTREPID AGP 4X/PCI
INTREPID ENET/FW/UATA/EIDE INTERFACES
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

INTREPID POWER RAILS
INTREPID DECOUPLING
CARDBUS CONTROLLER (PCI1510)
M10 AGP & CLOCKS
M10 LVDS/TMDS/VGA/GPIO & GPU VCORE
SIL1162 TMDS TRANSMITTER

M10 ANALOG, POWER, GND
1_8V_MAXBUS
PMU (POWER MANAGEMENT UNIT)
1_5V_MAXBUS
BATTERY CHARGER AND CONNECTOR
NEC_USB
INTREPID_USB
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
BBANG
3.3V / 5V SYSTEM POWER SUPPLIES
NO_BBANG
CPU CORE VOLTAGE POWER SUPPLY
ATI_MEMIO_HI
ATI_MEMIO_LO
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
SSCG
NO_SSCG
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
5V_HD_LOGIC
SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
3V_HD_LOGIC
SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
EXT_TMDS
INT_TMDS
FUNCTIONAL TEST POINTS
NO_4XVCORE
REVISION HISTORY (1 OF 1)
SIGNAL NAMES
COMPONENT LOCATIONS
DIMENSIONS ARE IN MILLIMETERS
Apple Computer Inc.
METRIC
XX
X.XX
DRAFTER
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
ENG APPD
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
ANGLES
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TITLE
DO NOT SCALE DRAWING

TABLE_5_ITEM
051-6531
SCHEM,MLB,PB17 INCH
SCH1
820-1524
PCBF,MLB,PB17 INCH
PCB1
SCHEM,MLB,PB17 INCH
TABLE_5_ITEM
NONE
SIZE
THIRD ANGLE PROJECTION
NOTICE OF PROPRIETARY PROPERTY
DESIGN CK
X.XXX
MATERIAL/FINISH
NOTED AS
APPLICABLE
DRAWING NUMBER
REV.
051-6531
SHT
B
OF
44
7
J18
FW - B
Connector
P.30
FW - A
Connector
P.30
Ethernet
Connector
P.28
2 DATA PAIRS
@ 200MHz
4 DATA PAIRS
U49
1394 OHCI
3.3V
10/100/1000
8BIT TX
8BIT RX
125MHZ
J25
OPTICAL DRIVE
Connector
P.25
TUBA (SOUND)
Connector
P.26
I2S
I2C
P.31
USB 2.0
UATA 100
EIDE
CARDSLOT
I2S
I2C
P.14
P.14
P.14
P.15
P.14
P.15
CARDBUS
Connector
P.18
J15
J5
SCCA
Keyboard
Connector
TRACKPAD
Connector
Serial Debug
USB PORT A
J12
J10
SERIAL
5V
J3 (SHARE WITH BLUETOOTH)
Connector
P.26
I2C
P.24
PMU
NOT USED
800 MB/S
P.14
LMU
3.3V
Fan
Circuit
P.26
UIDE
FIREWIRE
U36
SMBUS
U48/J2/J4
I2C
ETHERNET
SUTRO (PWR)
Connector
P.32
J14
EIDE
P.25
10/100/1000
P.14
Power Supply
& Charger
P.32-36
U39
ULTRA ATA/100
Connector
3.3V
8BIT TX/RX
100MHZ
J19
Battery
Connector
P.32
J13
G/MII
LEFT USB
P.25
LMU
J11
FireWire
PHY
P.29
Ethernet
PHY
P.28
SLEEP
LED
P.26
2 DATA PAIRS
@ 400MHZ
U28
5
J22
J24
33MHZ
16/32 BITS
3.3V/5V
P.15
P.15
USB PORT B
U44
P.15
VIA/PMU
P.15
USB PORT C
P.15
USB PORT D
P.14
P.15
USB PORT E
PCI
P.15
USB PORT F
Modem Board
Connector
P.26
PCI BUS
32BITS
33MHZ
P.13
P.15
AGP BUS
1.5V/3.3V
32BITS
66MHZ
MAXBUS
INTRPEID
I2C
4X AGP
P.9
U43
MEMORY
P.10
167MHZ
32BIT ADDRESS
64BIT DATA
MEMORY BUS
2.5V
U42
U11/U12/U13/U14
CPU PLL
Config
P.7
APOLLO
CPU
167MHZ
64BITS
2:1 DDR MUXES
P.11
MEMORY
MEMORY
CH. B
CH. D
AIRPOPT
Connector
P.25
(INTERNAL MEM) (INTERNAL MEM)
P.18-21
Inverter
Connector
P.22
PMU
(INTERNAL MEM) (INTERNAL MEM)
J17
J16
LCD Panel S-Video

DVI-I
Connector Connector Connector
P.22
P.22
P.22
J20/J23
DDR SDRAM DIMM 0
J21
J8
J7
(MPC7457)
P.5-6
MEMORY
CH. C
CH. A
ATI M10
64MB
P.13
DDR MEMORY
MAXBUS
1.8V
32BITS
33MHZ
3.3V
(DDC TOO)
J9
USB 2.0
CONTROLLER
P.27
RGB
NOT USED
TI PCI1510
CardBus
Controller
P.18
U52
BOOT ROM
1M X 8
P.10
BOOTROM
TMDS
BlueTooth
P.25
INTREPID
COMPOSITE
J3 (SHARE WITH LEFT USB)
U26
U17
S-VIDEO
USB 2.0
P.33
KB LED
LIGHT SENSOR
P.24
EDID (I2C)
BACKUP BATTERY
NOT USED
LVDS
RIGHT USB
SYSTEM BLOCK DIAGRAM

DDR SDRAM DIMM 1

SO-DIMM Connector

P.12

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
2
1
OF
44
POWER SYSTEM ARCHITECTURE

+5V_MAIN
>~13.44V TURNS-ON
U21
PG 31
+
BACKLIGHT
<~13.44V SHUTS-OFF
MAIN 2.5V/1.5V
DC/DC
(MAX1715)
PGOOD
PG 35
RUN/SS
AC
ADAPTER
IN
PG 31
INRUSH
LIMITER
+24V_PBUS
VCC
PG 30
14V_PBUS
BUCK
REGULATOR
(LTC1625)
PG 32
+PBUS (12.8V)
AC: 12.8V
NO AC: BATTERY VOLTAGE
1625 NOT RUNNING
PG 32
INTREPID CORE
AGP I/O
+5V_MAIN
VCC
AFTER PMU IS UP AND RUNNING
DCDC_EN_L WILL PULL ON1/ON2
LOW IN SHUTDOWN
RC AT 1M*0.047UF @ 24V
SHDN
DC/DC
(MAX1717)
PG 34
DCDC_EN_L
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
+5V_MAIN
+3V_PMU
RUN/SS - 5V
D
MAXBUS
SEQUENCING
+1.5V_MAIN
ON1/ON2
+5V_MAIN
+3V_PMU
LDO
1_5V_2_5V_OK
TURNS ON OUTPUT @ 2.4V
SHUTDOWN: RUNNING
SLEEP: RUNNING
RUN: RUNNING
+BATT
+2.5V_MAIN
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
+5V_MAIN
DCDC_EN
SLEEP
MAP31 DDR I/O

MAP31 DDR CORE
DDR POWER
VCC
INVERTER
+PBUS
1V20_REF
+5V_MAIN
TURNS ON AT >1V
<100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V
+4_6V_BU
+PBUS (12.8V)
EXT_VCC
DC/DC
(LTC1778)
VCC
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
MAIN 3V/5V
DC/DC
(LTC3707)
VCC
3V_5V_OK
PGOOD
HOLDS BOTH RUN/SS AT GND

WHEN ITS CONNECTED TO GND
PG 33 STBYMD
TURNS CONTROL TO RUN/SS

WHEN ITS OPEN
+PBUS
BACKUP
BATTERY
12.8V CHARGES BACKUP BATTERY
PG 20
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
SHUTDOWN: STOPPED
SLEEP: D3HOT/D3COLD
RUN: RUNNING
DCDC_EN
SLEEP
+3.3V_MAIN
RUN/SS - 3V
CPU_VCORE
(+1.4V/+1.5V)
D3_COLD
TURNS ON AS LOW AS 0.8V/TYP 1.5V

INTERNAL 1.2UA CURRENT SOURCE
RUN/SS
GPU_VCORE
SEQUENCING
INTERNAL ZENER CLAMP TO 6V

<100UA ALLOWED
TURNS ON AT >1V
GPU_VCORE
+1.2V/+1.0V
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL

+5V_MAIN TURNS ON
1M & 0.1UF @14V, IT TAKES

~5.88MS TO START SWITCHER
1_5V_2_5V_OK
D3_HOT
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

DCDC_EN_L OR PMU_POWERUP_L
BECOMES 1; MUCH LESS THAN THE
RC CHARGING AT INT_VCC (5V)
DCDC_EN_L
D3_HOT
24V IS OUTPUT ONLY FROM

BACKUP BATTERY
RC AT 1M*0.1UF @ 24V
CHARGER INPUT
& BOOST OUTPUT
PG 32
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
SHUT-DOWN
NO INRUSH PROTECTION
WHEN ONLY BATTERY IS CONNECTED
+24V_PBUS
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
DC/DC
(LTC3411)
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

(UNTIL DRAINED)
BATTERY
CHARGER
(MAX1772)
PG 31
PG 35
+1.8V_MAIN
MAXBUS
BROADCOM
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
+BATT
NO INRUSH PROTECTION
3S 3P PRISMATIC CELLS
WHEN ONLY BATTERY IS CONNECTED
SLEEP
SLEEP_L_LS5
DCDC_EN
DCDC_EN_L
+5V_MAIN
+5V_SLEEP
+3V_MAIN
+3V_SLEEP
3V_5V_OK
+2_5V_MAIN
+2_5V_SLEEP
+1_5V_MAIN
+1_5V_SLEEP
1_5V_2_5V_OK
RUN
SLEEP
RUN
SHUT-DOWN
~11MS
~13.5MS
2.4V - ??? MS
2.6 MS
2.6 MS
(MAX1715 OUTPUT)
BATTERY VOLTAGE
FEED-IN PATH
POWER BLOCK DIAGRAM
1_5V_2_5V_OK
(AT LTC1778 RUN/SS)
+PBUS
GPU_VCORE
~???MS
(D3HOT)
GPU_VCORE
PG 31
(D3COLD)

+1_8V_MAIN
1.9 MS
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
3
1
OF
44
BOARD HOLES
CHASSIS MOUNTS
ASICS HEATSINK
MOUNTS
OMIT
I/O AREA
ZT5
255R158
PCB SPECS
INVERTER
OMIT
ZT10
146R126
1
1
OMIT
ZT2
SH1
OG-503040
SHLD-SM
CHGND5
255R158
BS1
OMIT
255R158
THICKNESS : 1.2 MM / 0.047 IN

1/2 OZ CU THICKNESS: 0.7 MILS
1.0 OZ CU THICKNESS: 1.4 MILS
CHGND2
STDOFF-217ODX150IDX35H-TH
ZT11
1
CHGND1
OMIT
OMIT
ZT6
ZT83
146R126
235R126
OMIT
CHGND6
ZT16
235R126
SPEAKER CLIPS
IMPEDANCE : 50 OHMS +/- 10%

DIELECTRIC: FR-4
LAYER COUNT: 12
SIGNAL TRACE WIDTH: 4 MILS
SIGNAL TRACE SPACING: 4 MILS
PREPREG THICKNESS: 2-3 MILS
SP6
SP1
SP3
SP5
SP2
SPKR_CLIP_P84 SPKR_CLIP_P84 SPKR_CLIP_P84 SPKR_CLIP_P84 SPKR_CLIP_P84

1
CONDUCTIVE MOUNTS
OMIT
ZT4
235R126
SP4
SPKR_CLIP_P84
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
GROUND VIAS
BOARD STACK-UP AND CONSTRUCTION
ZT77
HOLE-VIA-20R10
20R10 TH VIA OR VIA IN PAD
SIGNAL (1/3 OZ + COPPER PLATING)
2 PREPREG (3MIL)
ZT81
ZT50
ZT56
HOLE-VIA-20R10
PREPREG (3MIL)
ZT24
ZT44
ZT72
ZT80
ZT36
LAMINATE (4MIL)
11
LAMINATE (4MIL)
12 PREPREG (3MIL)
ZT75
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT53
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT63
HOLE-VIA-20R10
ZT82
ZT61
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT39
ZT70
ZT79
ZT54
HOLE-VIA-20R10
ZT37
ZT71
HOLE-VIA-20R10
ZT28
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT51
HOLE-VIA-20R10
ZT78
ZT42
ZT3
HOLE-VIA-20R10
1
ZT32
HOLE-VIA-20R10
1
ZT31
HOLE-VIA-20R10
1
ZT26
HOLE-VIA-20R10
ZT23
HOLE-VIA-20R10
ZT19
HOLE-VIA-20R10
ZT17
HOLE-VIA-20R10
1
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT69
ZT58
ZT64
HOLE-VIA-20R10
ZT68
HOLE-VIA-20R10
ZT60
HOLE-VIA-20R10
ZT25
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT22
HOLE-VIA-20R10
ZT15
HOLE-VIA-20R10
1
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT41
ZT76
ZT13
HOLE-VIA-20R10
1
HOLE-VIA-20R10
SIGNAL (1/2 OZ)
ZT65
HOLE-VIA-20R10
ZT33
ZT47
HOLE-VIA-20R10
HOLE-VIA-20R10
GROUND (1/2 OZ)
ZT43
HOLE-VIA-20R10
ZT67
ZT29
ZT34
10 PREPREG (3MIL)
HOLE-VIA-20R10
SIGNAL (1/2 OZ)
ZT73
HOLE-VIA-20R10
ZT74
ZT30
ZT55
HOLE-VIA-20R10
ZT52
HOLE-VIA-20R10
GROUND (1/2 OZ)
ZT27
HOLE-VIA-20R10
CUT POWER PLANE(1 OZ)
HOLE-VIA-20R10
ZT40
CUT POWER PLANE(1 OZ)
HOLE-VIA-20R10
HOLE-VIA-20R10
LAMINATE (3MIL)
8 PREPREG (2MIL)
ZT66
HOLE-VIA-20R10
GROUND (1/2 OZ)
6 PREPREG (2MIL)
HOLE-VIA-20R10
HOLE-VIA-20R10
LAMINATE (4MIL)
HOLE-VIA-20R10
1
HOLE-VIA-20R10
SIGNAL (1/2 OZ)
ZT1
SIGNAL (1/2 OZ)
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
ZT57
HOLE-VIA-20R10
HOLE-VIA-20R10
GROUND (1/2 OZ)
ZT48
HOLE-VIA-20R10
ZT38
LAMINATE (4MIL)
ZT35
HOLE-VIA-20R10
ZT45
HOLE-VIA-20R10
SIGNAL (1/3 OZ + COPPER PLATING)
ZT46
HOLE-VIA-20R10
ZT49
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
1
ZT12
HOLE-VIA-20R10
1
ZT9
HOLE-VIA-20R10
ZT62
HOLE-VIA-20R10
1
ZT14
HOLE-VIA-20R10
1
ZT7
HOLE-VIA-20R10
ZT59
HOLE-VIA-20R10
1
ZT18
HOLE-VIA-20R10
1
ZT8
HOLE-VIA-20R10
ZT21
HOLE-VIA-20R10
BOARD INFORMATION
ZT20
HOLE-VIA-20R10
1

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
4
1
OF
44
MAXBUS_SLEEP
CPU_VCORE_SLEEP
R2411
470
C342
10uF
10uF
20%
6.3V
CERM
805
5%
1/16W
MF
402 2
C25
C346
10uF
C8
20%
10V
2 CERM
402
C153
0.1uF
C138
0.1uF
20%
10V
2 CERM
402
20%
6.3V
2 CERM
805
C223
0.1uF
20%
6.3V
2 CERM
805
10uF
20%
6.3V
2 CERM
805
C344
10uF
20%
6.3V
CERM
805
20%
10V
2 CERM
402
C91
0.1uF
C114
0.1uF
20%
2 10V
CERM
402
C191
0.1uF
C112
0.1uF
20%
2 10V
CERM
402
C111
0.1uF
20%
2 10V
CERM
402
+1_5V_SLEEP
C105
C73
20%
2 10V
CERM
402
C39
0.1uF
20%
2 10V
CERM
402
C38
0.1uF
20%
2 10V
CERM
402
0.1uF
20%
2 10V
CERM
402
C48
0.1uF
20%
2 10V
CERM
402
5%
1/16W
MF
402 2
0.1uF
20%
2 10V
CERM
402
C72
0.1uF
470
20%
10V
2 CERM
402
C150
C189 R2061
0.1uF
20%
2 10V
CERM
402
0.1uF
20%
2 10V
CERM
402
C190
0.1uF
20%
2 10V
CERM
402
C149
C110
0.1uF
20%
10V
2 CERM
402
0.1uF
20%
2 10V
CERM
402
0.1uF
C168
5 7 8 15 16 23 34 38
R702
0
C103
20%
2 10V
CERM
402
0.1uF
20%
2 10V
CERM
402
C104
0.1uF
20%
2 10V
CERM
402
1_5V_MAXBUS
CPU_OVDD DECOUPLING NETWORK
CPU_VCORE DECOUPLING NETWORK
5 34 38 39
C107
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C74
0.1uF
20%
2 10V
CERM
402
C90
0.1uF
20%
2 10V
CERM
402
C275
0.1uF
20%
2 10V
CERM
402
C257
0.1uF
20%
2 10V
CERM
402
C46
0.1uF
20%
2 10V
CERM
402
C272
0.1uF
20%
2 10V
CERM
402
C47
0.1UF
C170
0.1UF
20%
2 10V
CERM
402
+1_8V_SLEEP
20%
10V
2 CERM
402
C188
0.1UF
38 34 23 16 15 8 7 5
C155
20%
2 10V
CERM
402
R58
2
8 5
5%
1/16W
MF
603
C92
C12
2.2uF
C340
2.2uF
0.1uF
20%
10V
2 CERM
805
20%
10V
2 CERM
805
C193
C154
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C115
0.1uF
C113
0.1uF
20%
10V
2 CERM
402
C152
20%
10V
2 CERM
402
C151
0.1uF
0.1uF
20%
10V
2 CERM
402
C202
0.1uF
20%
10V
2 CERM
402
C201
0.1uF
20%
10V
2 CERM
402
C192
0.1uF
0.1uF
20%
10V
2 CERM
402
C224
0.1uF
C194
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C40
20%
10V
2 CERM
402
C203
0.1uF
20%
10V
2 CERM
402
C273
0.1uF
20%
10V
2 CERM
402
C41
0.1uF
20%
10V
2 CERM
402
C169
0.1UF
0.1UF
C139
20%
10V
2 CERM
402
R160
1
CPU_CHKS_L
20%
2 10V
CERM
402
0.1UF
20%
10V
2 CERM
402
10K
CPU_TBEN
5%
1/16W
MF
402
CPU_SHD0_L
10K
0.1UF
20%
2 10V
CERM
402
10K
CPU_MCP_L
MORE 0805 10UF CAPS ON VCORE
25
ADT7460_VCORE_MON
VDD
R72
A8
V14
V10
V7
V4
U16
U12
U2
T9
T6
R16
R13
R4
P11
P8
P2
N6
M3
L5
K2
J5
H3
G18
F2
E18
D5
C12
C2
B4
M12
M10
M8
L13
L11
L9
L7
K14
K12
K10
K8
J13
J11
J9
J7
H12
H10
H8
XW31
SM
OVDD
CPU_VCORE_SLEEP
C195
10UF
20%
2 6.3V
CERM
805
C347
10UF
20%
2 6.3V
CERM
805
C258
10UF
20%
2 6.3V
CERM
805
C345
10UF
36 8
CPU_BR_L
D2
36 8
CPU_BG_L
M1
BR*
BG*
36 8
CPU_TS_L
L4
TS*
BVSEL
E11
CPU_PULLDOWN
H1
C11
G3
F10
36 8
CPU_ADDR<0>
36 8
CPU_ADDR<1>
L2
36 8
CPU_ADDR<2>
D11
36 8
CPU_ADDR<3>
D1
36 8
CPU_ADDR<4>
C10
36 8
CPU_ADDR<5>
G2
36 8
CPU_ADDR<6>
D12
36 8
CPU_ADDR<7>
L3
CPU_BUS_VSEL
5 34 38 39
SYSCLK
CLKOUT
PLLCFG0
PLLCFG1
PLLCFG2
PLLCFG3
PLL_EXT
DBG*
DRDY*
DTI0
DTI1
DTI2
DTI3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A10
39 5
CPU_CLKOUT_SPN
B8
CPU_PLL_CFG<0>
C8
CPU_PLL_CFG<1>
C7
CPU_PLL_CFG<2>
D7
CPU_PLL_CFG<3>
A7
M2
38
CPU_PLL_CFG<4>
CPU_DBG_L
8 36
CPU_AVDD
1%
1/16W
MF
1 402
C137
0.1uF
20%
10V
2 CERM
402
10K
5%
1/16W
MF
402
5
CPU_SRWX_L
2.2uF
CPU_EMODE1_L
10K
10K
5%
1/16W
MF
402
R109
C136
R120
1
CPU_PMONIN_L
20%
10V
2 CERM
805
1K
5%
1/16W
MF
402
R148
402
8 36
H2
R57
1
R106
SYSCLK_CPU
10K
CPU_CHKSTP_OUT_L
NC
20%
2 6.3V
CERM
805
B7
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
402
AVDD
OMIT
CPU_L2TSTCLK
R108
1
CPU_LSSD_MODE
POWER SUPPLY PAGE (PG 33)
10K
5%
1/16W
MF
402
R139
5
R87
1
CPU_SHD1_L
5%
1/16W
MF
402
PLCAE SHORT CLOSE TO CENTER OF CPU
5%
1/16W
MF
402
C106
10K
5%
1/16W
MF
402
R73
5
MAXBUS_SLEEP
R693
0.1UF
20%
2 10V
CERM
402
MPC7447 PULL-UPS
5%
1/16W
MF
603
1_8V_MAXBUS
5%
1/16W
MF
402
1
C156
10UF
20%
2 6.3V
CERM
805
C341
10UF
20%
2 6.3V
CERM
805
10UF
20%
2 6.3V
CERM
805
PLACE BELOW CPU

IN FORMER L3 AREA
C225
C343
10UF
20%
2 6.3V
CERM
805
36 8
CPU_ADDR<8>
G4
36 8
CPU_ADDR<9>
T2
36 8
CPU_ADDR<10>
F4
36 8
CPU_ADDR<11>
V1
36 8
CPU_ADDR<12>
J4
36 8
CPU_ADDR<13>
R2
36 8
CPU_ADDR<14>
K5
36 8
CPU_ADDR<15>
W2
36 8
CPU_ADDR<16>
J2
36 8
CPU_ADDR<17>
K4
36 8
CPU_ADDR<18>
N4
36 8
CPU_ADDR<19>
J3
36 8
CPU_ADDR<20>
M5
36 8
CPU_ADDR<21>
P5
36 8
CPU_ADDR<22>
N3
36 8
CPU_ADDR<23>
T1
36 8
CPU_ADDR<24>
V2
36 8
CPU_ADDR<25>
U1
36 8
CPU_ADDR<26>
N5
36 8
CPU_ADDR<27>
W1
36 8
CPU_ADDR<28>
B12
36 8
CPU_ADDR<29>
C4
36 8
CPU_ADDR<30>
G10
36 8
CPU_ADDR<31>
B11
NC
C1
NC
E3
NC
H6
NC
F5
NC
G7
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
CRITICAL
1_30_VCORE
TABLE_5_ITEM
337S2733
IC,APOLLO7,1.X,1.3GHZ,1.XV CORE,85C
U43
R3
CPU_DRDY_L
8 36
G1
CPU_EDTI
K1
CPU_DTI<0>
8 36
P1
CPU_DTI<1>
8 36
N1
CPU_DTI<2>
8 36
IC,APOLLO7,1.X,1.33GHZ,1.32V VCORE,85C
U43
CRITICAL
39 23 7 5
OMIT
U43
800MHZ
APOLLO_MPC7445_360
TA*
TEA*
BGA
(1 OF 3)
B9
JTAG_CPU_TDI
5 23 39
A4
JTAG_CPU_TDO_TP
39
F1
JTAG_CPU_TMS
5 23 39
C6
JTAG_CPU_TCK
5 23 39
A5
JTAG_CPU_TRST_L
5 23 39
E8
CPU_LSSD_MODE
G8
CPU_L1TSTCLK
B3
CPU_L2TSTCLK
K6
CPU_TA_L
8 36
L1
CPU_TEA_L
8 36
CPU_TBEN
5 8
P4
CPU_QREQ_L
8 36
G5
CPU_QACK_L
8 36
30 5
CPU_TT<0>
E5
36 8
CPU_TT<1>
E6
36 8
CPU_TT<2>
F6
36 8
CPU_TT<3>
E9
36 8
CPU_TT<4>
36 8
CPU_TBST_L
36 8
CPU_TSIZ<0>
C5
F11
G6
F7
36 8
CPU_TSIZ<1>
36 8
CPU_TSIZ<2>
36 8
CPU_GBL_L
E2
36 8
CPU_WT_L
D3
36 8
CPU_CI_L
J1
36 8
CPU_AACK_L
R1
36 8
CPU_ARTRY_L
N2
CPU_SHD0_L
E4
5
5
36 8
E7
CPU_SHD1_L
H5
CPU_HIT_L
B2
R129
10K
CPU_SMI_L
39 23 5
470
JTAG_CPU_TMS
5%
1/16W
MF
402
470OHM FOR BOOT BANGER
39 23 5
R128
470
JTAG_CPU_TDI
14 5
TBEN
QREQ*
QACK*
CKSTP_IN*
CKSTP_OUT*
E1
39 5
CPU_CHKSTP_OUT_L
10K
5%
1/16W
MF
402
A3
B1
MPIC_CPU_INT_L
R65
5 39
R130
5
INT*
SMI*
MCP*
SRESET*
HRESET*
AP0
AP1
AP2
AP3
AP4
D4
MPIC_CPU_INT_L
5 14
F9
CPU_SMI_L
5 30
C9
CPU_MCP_L
A2
CPU_SRESET_L
5 39
D8
CPU_HRESET_L
5 7 23 39
CPU_L1TSTCLK
10K
CPU_SRESET_L
10K
R60
1
CPU_EDTI
JTAG_CPU_TCK
10K
TT0
TT1
TT2
TT3
TT4
TBST*
TSIZ0
TSIZ1
TSIZ2
GBL*
WT*
CI*
AACK*
ARTRY*
SHD0*
SHD1*
HIT*
PMON_IN*
PMON_OUT*
BMODE0*
BMODE1*
G9
CPU_EMODE0_L
F8
CPU_EMODE1_L
CPU_PMONIN_L
R61
1
CPU_PULLDOWN
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
D9
R97
39 23 5
5%
1/16W
MF
402
5%
1/16W
MF
402
5
5%
1/16W
MF
402
R79
MPC7447
5%
1/16W
MF
402
R59
5%
1/16W
MF
402
36 8
10K
CPU_HRESET_L
1K
5%
1/16W
MF
402
R107
CPU INTERNAL PLL FILTERING
1_32_VCORE
TDI
TDO
TMS
TCK
TRST*
LSSDMODE*
L1TSTCLK
L2TSTCLK
CPU_PULLUP
TABLE_5_ITEM
337S2807
R98
470
5%
1/16W
MF
402
A9 NC
MAXBUS_SLEEP
5 7 8 15 16 23 34 38
BBANG
1
R86
470
EXT_QUAL
A11
CPU_PULLDOWN
TEST0
TEST1
TEST2
TEST3
TEST4
A12
CPU_CHKS_L
B6
CPU_PULLUP
5%
1/16W
MF
2 402
39 23 5 JTAG_CPU_TRST_L
NO_BBANG
MPC7447 MAXBUS
B10
R85
E10
CPU_SRWX_L
200
5
D10
CPU_PULLDOWN
5%
1/16W
MF
2 402

SIZE
V15
V11
V8
V5
U17
U13
U3
T10
T7
R17
R14
R5
P12
P9
P3
N7
M13
M9
M11
M7
M4
L12
L10
L8
L6
K13
K9
K3
K11
K7
J12
J8
J10
J6
H13
H11
H9
H7
H4
G17
F3
E17
D6
D13
C3
B5
GND
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531 B
5
1
OF
44
NC F18
NC F17
NC F19
NC H19
NC H18
NC H17
NC H16
NC E19
CPU_DATA<0>
R15
36 8
CPU_DATA<1>
W15
36 8
CPU_DATA<2>
T14
36 8
CPU_DATA<3>
V16
36 8
CPU_DATA<4>
W16
36 8
CPU_DATA<5>
T15
36 8
CPU_DATA<6>
U15
36 8
CPU_DATA<7>
P14
36 8
CPU_DATA<8>
V13
36 8
CPU_DATA<9>
W13
36 8
CPU_DATA<10>
T13
36 8
CPU_DATA<11>
P13
36 8
CPU_DATA<12>
U14
36 8
CPU_DATA<13>
W14
36 8
CPU_DATA<14>
R12
36 8
CPU_DATA<15>
T12
36 8
CPU_DATA<16>
W12
36 8
CPU_DATA<17>
V12
36 8
CPU_DATA<18>
N11
36 8
CPU_DATA<19>
N10
36 8
CPU_DATA<20>
R11
36 8
CPU_DATA<21>
U11
36 8
CPU_DATA<22>
W11
36 8
CPU_DATA<23>
T11
36 8
CPU_DATA<24>
R10
36 8
CPU_DATA<25>
N9
36 8
CPU_DATA<26>
P10
36 8
CPU_DATA<27>
U10
36 8
CPU_DATA<28>
R9
36 8
CPU_DATA<29>
W10
36 8
CPU_DATA<30>
U9
36 8
CPU_DATA<31>
V9
36 8
CPU_DATA<32>
W5
36 8
CPU_DATA<33>
U6
36 8
CPU_DATA<34>
T5
36 8
CPU_DATA<35>
U5
36 8
CPU_DATA<36>
W7
36 8
CPU_DATA<37>
R6
36 8
CPU_DATA<38>
P7
36 8
CPU_DATA<39>
V6
36 8
CPU_DATA<40>
P17
36 8
CPU_DATA<41>
R19
36 8
CPU_DATA<42>
V18
36 8
CPU_DATA<43>
R18
36 8
CPU_DATA<44>
V19
36 8
CPU_DATA<45>
T19
36 8
CPU_DATA<46>
U19
36 8
CPU_DATA<47>
W19
36 8
CPU_DATA<48>
U18
36 8
CPU_DATA<49>
W17
36 8
CPU_DATA<50>
W18
36 8
CPU_DATA<51>
T16
36 8
CPU_DATA<52>
T18
36 8
CPU_DATA<53>
T17
36 8
CPU_DATA<54>
W3
36 8
CPU_DATA<55>
V17
36 8
CPU_DATA<56>
U4
36 8
CPU_DATA<57>
U8
36 8
CPU_DATA<58>
U7
36 8
CPU_DATA<59>
R7
36 8
CPU_DATA<60>
P6
36 8
CPU_DATA<61>
R8
36 8
CPU_DATA<62>
W8
36 8
CPU_DATA<63>
T8
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
NC D18
NC F16
OMIT
U43
NC G16
NC D19
800MHZ
NC F15
NC G19
BGA
(2 OF 3)
NC E16
NC D17
APOLLO_MPC7445_360
36 8
NC D16
NC P15
NC L15
NC N15
NC P18
NC N14
NC M14
NC M17
NC N13
NC N16
NC M19
NC M16
NC P19
NC N17
NC M15
NC L17
NC L14
BOOT BANGER - LMU PERORMS THIS FUNCTION IF NEEDED

SEE PAGE 22
OMIT
NC_F18
NC_F17
NC_F19
NC_H19
NC_H18
NC_H17
NC_H16
NC_E19
NC_D18
NC_F16
NC_G16
NC_D19
NC_F15
NC_G19
NC_E16
NC_D17
NC_D16
U43
800MHZ
BGA
(3 OF 3)
APOLLO_MPC7445_360
NC_P15
NC_L15
NC_N15
NC_P18
NC_N14
NC_M14
NC_M17
NC_N13
NC_N16
NC_M19
NC_M16
NC_P19
NC_N17
NC_M15
NC_L17
NC_L14
NC_K15
NC_J14
NC_J18
NC_J19
NC_J15
NC_K19
NC_J16
NC_H15
NC_L16
NC_P16
NC_M18
NC_L19
NC_L18
NC_K18
NC_J17
NC_K16
NC_C19
NC_D15
NC_G15
NC_C18
NC_A16
NC_B19
NC_A19
NC_D14
NC_E15
NC_B15
NC_B17
NC_C17
NC_C16
NC_G13
NC_E14
NC_H14
NC_G14
NC_C15
NC_A17
NC_G12
NC_F14
NC_F13
NC_E13
NC_B16
NC_A15
NC_C14
NC_A18
NC_A13
NC_F12
NC_A14
NC_G11
NC_C13
B
NC
T3
NC
W4
NC
T4
NC
W9
NC
M6
NC
V3
NC
N8
NC
W6
NC K15
NC J14
NC J18
NC J19
NC J15
NC K19
NC J16
NC H15
NC L16
NC P16
NC M18
NC L19
NC L18
NC K18
NC J17
NC K16
NC C19
NC D15
NC G15
NC C18
NC A16
NC B19
NC A19
NC D14
NC E15
NC B15
NC B17
NC C17
NC C16
NC G13
NC E14
NC H14
NC G14
NC C15
NC A17
NC G12
NC F14
NC F13
DP0
DP1
DP2
DP3
DP4
DP5
DP6
DP7
NC E13
NC B16
NC A15
NC C14
NC A18
NC A13
NC F12
NC A14
NC G11
NC C13
NC N12
NC N18
NC K17
NC N19
NC B18
NC E12
NC B13
NC B14
NC
A6
MPC7447/BBANG
NC_N12
NC_N18
NC_K17
NC_N19
NC_B18
NC_E12
NC_B13
NC_B14
NC_A6

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE

6
1
OF
44
APOLLO 7
MAXBUS_SLEEP
R9
10K
R11
10K
5%
1/16W
MF
2 402
R10
10K
5%
1/16W
MF
2 402
R12
R2
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
NO STUFF NO STUFF
1
R19
0
+5V_SLEEP
R31
R331
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
47K
R20
NO STUFF
1
NO STUFF
1
R21
5%
1/16W
MF
2 402
R22
5%
1/16W
MF
2 402
R00B
R23
0
5%
1/16W
MF
2 402
R01C
NO STUFF
1
5%
1/16W
MF
2 402
R10B
1
R24
0
5%
1/16W
MF
2 402
R25
R00C
R10C
NO STUFF
1
NO STUFF
1
R26
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
0
5%
1/16W
MF
2 402
R13
0
R01D
1
R14
R10D
NO STUFF
1
NO STUFF
1
R15
5%
1/16W
MF
2 402
R00D
R16
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R01E R10E
NO STUFF
1
2N7002DW
R18
5%
1/16W
MF
2 402
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFG<4>
R00E
R27
0
5%
1/16W
MF
2 402
STUFF PASS TRANSISTOR ONLY IF

R10E, R01E, OR PULLUP STUFFED
CPU_PLL_FS01
R48
10K
5%
1/16W
MF
2 402
7 PLL_STOP_L
3
NO STUFF
Q1
D
1
2N7002DW
S
30 7 CPU_PLL_STOP_OC
Q3
SOT-363
S
4
CPU_PLL_FS00
SM
6
Q2
2N7002DW
7 PLL_STOP_L
Q2
0.0X
PLL OFF
1111 0F
1.0X
0011 03
2.0X
333
PLL BYPASS
267
0100 04
3.0X
500
400
1000 08
4.0X
667
533
1010 0A
5.0X
833
667
1011 0B
5.5X
917
733
1001 09
6.0X
1000
800
1101 0D
6.5X
1083
867
0101 05
7.0X
1167
933
0010 02
7.5X
1250
1000
0001 01
8.0X
1333
1067
1100 0C
8.5X
1417
1133
0110 06
9.0X
1500
1200
0111 17
SOT-363
2N7002DW
SOT-363
CPU_PLL_FS10
30 7
CPU_PLL_STOP_OC
CPU_PLL_STOP_BASE
R47
249K 2
Q4
STATE ENCODING
CPU_PLL_STOP_OC
SM
LOW SPEED
HIGH SPEED
PLL DISABLE
0
0
1
0
1
X
CPU_VCORE_HI_OC
CPU CONFIGURATION
B
MAXBUS VSEL
INVERTED HRESET_L
38 34 23 16 15 8 7 5 MAXBUS_SLEEP
BUSTYPE SELECT
CRITICAL
1.5V INTERFACE
R149
1_5V_MAXBUS
1_5V_MAXBUS
5
39 23 7 5 CPU_HRESET_L
U1
SN74AUC1G04
4
CPU_HRESET_INV
04
3
SC70-5
R4
1
22
5%
1/16W
MF
402
39 23 7 5 CPU_HRESET_L
CPU_BUS_VSEL
9.5X
1583
1267
0111 07
10.0X
1667
1333
1010 1A
10.5X
1750
1400
1000 18
CPU_VCORE_HI_OC
2N3904
1%
1/16W
MF
402
34 30
0123
ABCD HEX
2N7002
4
E
SOT-363
5%
1/16W
MF
2 402
82K
Q1
NO STUFF
1
R17
0
5%
1/16W
MF
2 402
NO STUFF
R01B
R01A R00A R10A
CPU_PLL_CFG<1>
6
D
CPU_PLL_CFGEXT
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L

PULLUP TO ENSURE THAT Vgs OF PASS
TRANSISTOR ON CPU_PLL_CFG<4> IS MET.
(MHZ)
(Bus-to-Core)
CPU_PLL_CFG<0>
CPU_PLL_CFG
(AT BUS FREQUENCY)

167MHZ
133MHZ
10K
10K
5%
1/16W
MF
2 402
CORE FREQUENCY
MULTIPLIER
NO STUFF
1
+3V_SLEEP
CPU FREQUENCY CONFIGURATION
CPU PLL CONFIG CIRCUITRY

38 34 23 16 15 8 7 5
22
CPU_EMODE0_L
11.0X
1833
1467
1001 19
11.5X
1917
1533
0000 00
12.0X
2000
1600
1011 1B
12.5X
2083
1667
1111 1F
13.0X
2167
1733
0101 15
13.5X
2250
1800
1110 0E
14.0X
2333
1867
1100 1C
15.0X
2500
2000
0001 11
16.0X
2667
2133
1101 1D
17.0X
2833
2267
0000 10
18.0X
3000
2400
0010 12
20.0X
3333
2667
0011 13
21.0X
3500
2800
0100 14
24.0X
4000
3200
0110 16
28.0X
4667
3733
1110 1E
5%
1/16W
MF
402
1_8V_MAXBUS
APOLLO ONLY SUPPORTS MAXBUS
R51
10
5%
1/16W
MF
402 2
1.8V INTERFACE
CPU CONFIGURATION
DESKTOP HAD PROBLEM USING

INVERTER TO INVERT HRESET_L
NEED TO CHARACTERIZE
SIGNAL
CPU_EMODE0_L
(PROCESSOR)
CPU_BUS_VSEL
(PROCESSOR)
TIED
HIGH

60X BUS MODE
CPU_HRESET_L
MAX BUS MODE
CPU_HRESET_L
2.5V INTERFACE

LOW
1.8V INTERFACE
CPU_HRESET_INV
1.5V INTERFACE
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
APPLICATION
7
1
OF
44
THE FOLLOWING STRAP BITS CAN BE

CHANGED BY SOFTWARE:
INTREPID BOOT STRAPS

C308 1
BIT 32 TO 39
NO STUFF
NO STUFF
NO STUFF
NO STUFF
NO STUFF
0.22UF
NO STUFF
NO STUFF
4.7
38
+1_5V_INTREPID_PLL7
5%
1/16W
MF
402
MAXBUS_SLEEP
38 34 23 16 15 8 7 5
20%
6.3V
CERM 2
402
NO STUFF
H26
36 8
10K
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED

D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED
D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED
D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
A STRAP IS NOT LISTED, THEN
CANNOT BE CHANGED BY SOFTWARE
36 8 5
U45
E29
36 8 5 CPU_BR_L
BR
BG
E26
36 8 5 CPU_BG_L
INPUT
INTREPID-REV2.1
NO BUS KEEPER
BGA
36 8 6 CPU_DATA<33>
36 8 6 CPU_DATA<34>
36 8 6 CPU_DATA<35>
B27
36 8 5 CPU_TS_L
TS
NO BUS KEEPER
36 8 6 CPU_DATA<36>
36 8 6 CPU_DATA<37>
36 8 6 CPU_DATA<38>
36 8 6 CPU_DATA<39>
R1361 R6431 R6391 R6571 R6641 R6731 R1431 R6741
36 5 CPU_ADDR<1>
D25
36 5 CPU_ADDR<2>
A27
36 5 CPU_ADDR<3>
E24
5 CPU_ADDR<4>
G23
36
10K
10K
36 5 CPU_ADDR<5>
B26
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
36 5 CPU_ADDR<6>
A26
36 5 CPU_ADDR<7>
D23
36 5 CPU_ADDR<8>
A25
36 5 CPU_ADDR<9>
E23
36 5 CPU_ADDR<10>
J22
36 5 CPU_ADDR<11>
B25
36 5 CPU_ADDR<12>
H22
36 5 CPU_ADDR<13>
G22
36 5 CPU_ADDR<14>
D22
5 CPU_ADDR<15>
B24
36 5 CPU_ADDR<16>
B23
36 5 CPU_ADDR<17>
E22
36 5 CPU_ADDR<18>
J21
36 5 CPU_ADDR<19>
G21
36 5 CPU_ADDR<20>
E21
36 5 CPU_ADDR<21>
A24
AnalyzerClk_En_h
0: Inactive
1: Active
NO STUFF
1
NO STUFF
1
Spare
10K
Spare
10K
Spare
10K
Spare
10K
ExtPLL_SDwn_Pol
0: Active high
1: Active low
10K
DDR_TPDEn_Pol
0: Active high
1: Active low
10K
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
36 5 CPU_ADDR<0>
D24
36
BIT 40 TO 47
NO STUFF
1
NO STUFF
1
SSCG
NO_SSCG
1
NO_SSCG
NO_SSCG
R142 R164 R1341 R184 R177 R1521 R1651
R122
(1 OF 9)
A_0
A_1
A_2
A_3
A_4
A_5
A_6
A_7
A_8
A_9
A_10
A_11
A_12
A_13
A_14
A_15
A_16
A_17
A_18
A_19
A_20
A_21
A_22
A_23
A_24
A_25
A_26
A_27
A_28
A_29
A_30
A_31
MAXBUS
INTERFACE
D_0
D_1
D_2
D_3
D_4
D_5
D_6
D_7
D_8
D_9
D_10
D_11
D_12
D_13
D_14
D_15
D_16
D_17
D_18
D_19
D_20
D_21
D_22
D_23
D_24
D_25
D_26
D_27
D_28
D_29
D_30
D_31
D_32
D_33
D_34
D_35
D_36
D_37
D_38
D_39
D_40
D_41
D_42
D_43
D_44
D_45
D_46
D_47
D_48
D_49
D_50
D_51
D_52
D_53
D_54
D_55
D_56
D_57
D_58
D_59
D_60
D_61
D_62
D_63
D10
CPU_DATA<0>
6 36
G12
CPU_DATA<1>
6 36
E11
CPU_DATA<2>
6 36
H11
CPU_DATA<3>
6 36
B9
CPU_DATA<4>
6 36
B8
CPU_DATA<5>
6 36
A9
CPU_DATA<6>
6 36
A8
CPU_DATA<7>
6 36
E12
CPU_DATA<8>
6 36
D11
CPU_DATA<9>
6 36
B10
CPU_DATA<10>
6 36
J13
CPU_DATA<11>
6 36
A10
CPU_DATA<12>
6 36
D12
CPU_DATA<13>
6 36
10K
CPU_TS_L
CPU_DATA<14>
6 36
G13
CPU_DATA<15>
6 36
B11
CPU_DATA<16>
6 36
D13
CPU_DATA<17>
6 36
CPU_DATA<18>
6 36
G14
CPU_DATA<19>
6 36
H14
CPU_DATA<20>
6 36
E14
CPU_DATA<21>
6 36
B12
CPU_DATA<22>
6 36
G15
CPU_DATA<23>
6 36
CPU_DATA<24>
6 36
B13
H15
CPU_DATA<25>
6 36
D14
CPU_DATA<26>
6 36
B14
CPU_DATA<27>
6 36
CPU_DATA<28>
6 36
A12
RP21
10K
CPU_TA_L
RP21
36 8 5
10K
CPU_ARTRY_L
36 8 5
RP23
10K
CPU_BR_L
10K
RP23
5%
1/16W
SM1
10K
36 8 5 CPU_DRDY_L
RP23
10K
CPU_TEA_L
RP23
10K
CPU_AACK_L
10K
CPU_DBG_L
5%
1/16W
SM1
36 8 5
RP21
10K
CPU_BG_L
CPU_QREQ_L
10K
5%
1/16W
SM1
RP24
36 8 5
5%
1/16W
SM1
RP24
36 8 5
5%
1/16W
SM1
5%
1/16W
SM1
36 8 5
5%
1/16W
SM1
RP24
36 8 5 CPU_HIT_L
5%
1/16W
SM1
5%
1/16W
SM1
36 8 5
A11
5 7 8 15 16 23 34 38
5%
1/16W
SM1
36 8 5
E13
MAXBUS_SLEEP
RP21
CRITICAL
6 CPU_DATA<32>
38 34 23 16 15 8 7 5 MAXBUS_SLEEP
MAXBUS PULL-UPS
VDD15A_7
(PLL6)
R6421 R1351 R1231 R1531 R1661 R1791 R6511 R1781
1/
2/
3/
4/
5/
6/
IF
IT
R227
1
38 14 12 +1_5V_INTREPID_PLL
5%
1/16W
SM1
10K
5%
1/16W
MF
402 2
36 8 6
CPU_DATA<40>
36 8 6
CPU_DATA<41>
36 8 6
CPU_DATA<42>
36 8 6
CPU_DATA<43>
36 8 6
CPU_DATA<44>
36 8 6
CPU_DATA<45>
36 8 6
CPU_DATA<46>
36 8 6
CPU_DATA<47>
10K
10K
10K
10K
10K
10K
10K
36 5 CPU_ADDR<22>
D21
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
36 5 CPU_ADDR<23>
A23
36 5 CPU_ADDR<24>
H20
36 5 CPU_ADDR<25>
B22
36 5 CPU_ADDR<26>
H21
36 5 CPU_ADDR<27>
A22
36 5 CPU_ADDR<28>
E20
5 CPU_ADDR<29>
B21
36 5 CPU_ADDR<30>
D20
36 5 CPU_ADDR<31>
A21
36
NO_SSCG
1
SSCG
SSCG
1
SSCG
1
36 5 CPU_CI_L
G26
36 5 CPU_GBL_L
A29
A28
36 5 CPU_TBST_L
R6401 R6521 R6651 R644 R6831 R6751 R658 R666
G24
36 5 CPU_TSIZ<1>
H24
36 5 CPU_TSIZ<2>
D26
36 5 CPU_TT<0>
E25
36 5 CPU_TT<1>
G25
36 5 CPU_TT<2>
B28
36 5 CPU_TT<3>
D27
36 5 CPU_TT<4>
J25
BIT1
BIT0
InternalSpreadEn
0: Inactive
1: Active
Spare
BIT2
PLL4MODESEL_NXT[2:0]
000: 166.4MHZ (2.5X)
001: 149.76MHZ
010: 133.12MHZ (2.0X)
011: 99.84MHZ (1.5X)
100: 83.20MHZ
MODE A (2.5X) IS FOR STATIC OPERATION

MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
D28
36 5 CPU_WT_L
B29
36 8 5 CPU_AACK_L
H23
36 8 5 CPU_ARTRY_L
B31
36 8 5 CPU_HIT_L
A32
36 8 5 CPU_QREQ_L
AACK
ARTRY
HIT
QREQ
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
INPUT - PD
38 34 23 16 15 8 7 5 MAXBUS_SLEEP
BIT 48 TO 55
NO STUFF
1
NO STUFF
1
NO STUFF
1
NO STUFF
1
R133 R1211 R1631 R151 R162 R141 R1831 R176

10K
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
AK9
30 INT_SUSPEND_ACK_L
AM8
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
SYSCLK_LA_TP
511
1%
1/16W
MF
402 2
36 8 6 CPU_DATA<49>
36 8 6 CPU_DATA<50>
CPU_FB_IN
H16
CPU_FB_OUT
G8
ANALYZER_CLK
36 8 INT_CPUFB_OUT
R1971
Vin = Intrepid Vcore (1.5V)

Vout = MaxBus rail (1.8V)
J24
36 8 INT_CPUFB_IN
36 8 6 CPU_DATA<48>
AH9
30 CPU_CLK_EN
36 8 6 CPU_DATA<53>
36
36 8 6 CPU_DATA<54>
NO_SSCG
1
NO STUFF
1
NO STUFF
1
R645 R641 R668 R659 R667 R653 R684

10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
BIT1
BIT0
MaxBus output impedance
J15
36 SYSCLK_CPU_UF
A31
5 CPU_TBEN
CPU_DATA<35>
6 8 36
E16
CPU_DATA<36>
6 8 36
G17
CPU_DATA<37>
6 8 36
B15
CPU_DATA<38>
6 8 36
H17
CPU_DATA<39>
6 8 36
A15
CPU_DATA<40>
6 8 36
B16
CPU_DATA<41>
6 8 36
NO STUFF
E17
CPU_DATA<42>
6 8 36
A16
CPU_DATA<43>
R1401 R1611 R1751 R1321 R1311 R1501 R1741 R1821
6 8 36
J18
CPU_DATA<44>
6 8 36
H18
CPU_DATA<45>
6 8 36
D17
CPU_DATA<46>
6 8 36
G18
CPU_DATA<47>
6 8 36
A17
CPU_DATA<48>
6 8 36
B17
CPU_DATA<49>
6 8 36
E18
CPU_DATA<50>
6 8 36
B18
CPU_DATA<51>
6 8 36
D18
CPU_DATA<52>
6 8 36
A18
CPU_DATA<53>
6 8 36
A19
CPU_DATA<54>
6 8 36
H19
CPU_DATA<55>
6 8 36
38 34 23 16 15 8 7 5
INTREPID BOOT STRAPS
MAXBUS_SLEEP
BIT 56 TO 63
NO STUFF
CPU_DATA<56>
6 8 36
J19
CPU_DATA<57>
6 8 36
A20
CPU_DATA<58>
6 8 36
D19
CPU_DATA<59>
6 8 36
E19
CPU_DATA<60>
6 8 36
G19
CPU_DATA<61>
6 8 36
B20
CPU_DATA<62>
6 8 36
G20
CPU_DATA<63>
6 8 36
DBG
A30
CPU_DBG_L
5 8 36
DRDY
G28
CPU_DRDY_L
5 8 36
DTI_0
DTI_1
DTI_2
K25
CPU_DTI<0>
5 36
D29
CPU_DTI<1>
5 36
B30
CPU_DTI<2>
CPU_CLK
NO BUS KEEPER - PU
5 36
TA
TEA
E27
CPU_TA_L
5 8 36
E28
CPU_TEA_L
5 8 36
TBEN
NO BUS KEEPER - PU
1K
NO STUFF
NO STUFF
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
NO STUFF
1
10K
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
36 8 6 CPU_DATA<56>
36 8 6 CPU_DATA<57>
36 8 6 CPU_DATA<58>
36 8 6 CPU_DATA<59>
36 8 6 CPU_DATA<60>
36 8 6 CPU_DATA<61>
36 8 6 CPU_DATA<62>
36 8 6 CPU_DATA<63>
R654 R669 R677 R646 R647 R660 R678 R685
H25
Intrepid MaxBus
R167
36 8
LONG = 1" LONGER THAN MATCHED LENGTH

NO STUFF
INT_CPUFB_OUT
R215
36
INT_CPUFB_OUT_SHORT
5%
1/16W
MF
402
011: 33.3 ohm

101: 40 ohm
36
5%
1/16W
MF
402
NO STUFF
R2251
001: 50 ohm
5%
1/16W
MF
402 2
110: 66.6 ohm

010: 100 ohm
36 8
36
INT_CPUFB_LONG
5%
1/16W
MF
402
R2081
5%
1/16W
MF
402 2
R226
0
36
INT_CPUFB_IN_NORM
5%
1/16W
MF
402
000: 200 ohm

INT_CPUFB_IN
INT_CPUFB_OUT_NORM

NO STUFF
SIZE
R196
1
APPLE COMPUTER INC.
5%
1/16W
MF
402
R207
NO STUFF
10K
VSSA_7
(PLL6)
SHORT = 1" SHORTER THAN MATCHED LENGTH
100: 200 ohm
NO STUFF
10K
B19
NO STUFF
10K
1%
1/16W
MF
402 2
111: 28.6 ohm
NO BUS KEEPER - ?
NO BUS KEEPER - PU
R137
10K
5%
1/16W
MF
402 2
6 8 36
D16
INTREPID OUTPUTS HIGH BY DEFAULT
R676
ACS_REF
NO BUS KEEPER - ?
Spare
TI 1394b workaround
0: Normal 1394b
1: TI PHY workaround
Spare
SelPLL4ExtSrc
0: PLL5
1: External source
BUF_REF_CLK_OUTEnable_h
0: Inactive
1: Active
BIT2
5%
1/16W
MF
402
36 8 6 CPU_DATA<55>
NO_SSCG
5 SYSCLK_CPU
H13
INTREPID_ACS_REF
R144
CPU_DATA<34>
STOPCPUCLK
NO BUS KEEPER - ?
36 8 6 CPU_DATA<52>
NO BUS KEEPER - PU
INPUT - PU
36 8 6 CPU_DATA<51>
30 INT_SUSPEND_REQ_L
6 8 36
A13
PCI1_REQ2_L / PCI1_GNT2_L
0: REQ/GNT
1: GPIOs
SSCG
NO BUS KEEPER - ?
QACK
SUSPENDREQ
SUSPENDACK
6 8 36
CPU_DATA<33>
Spare
SSCG
1
G27
36 5 CPU_QACK_L
6 36
CPU_DATA<32>
A14
Processor Bus Mode

0: Max Bus (G4)
1: 60x bus (G3)
36 5 CPU_TSIZ<0>
5%
1/16W
MF
402 2
6 36
CPU_DATA<31>
D15
FireWire PHY interface

0: Legacy interface
1: B-mode interface
10K
5%
1/16W
MF
402 2
CPU_DATA<30>
J16
0: REQ/GNT
1: GPIOs
10K
5%
1/16W
MF
402 2
E15
0: REQ/GNT
1: GPIOs
10K
5%
1/16W
MF
402 2
6 36
Spare
10K
5%
1/16W
MF
402 2
CPU_DATA<29>
Spare
10K
5%
1/16W
MF
402 2
PCI0 Source Clock

1: PLL4
0: PLL5 (NO SPREAD)
10K
5%
1/16W
MF
402 2
PCI1 Source Clock

1: PLL4
0: PLL5 (NO SPREAD)
10K
5%
1/16W
MF
402 2
Spare
10K
CI
GBL
TBST
TSIZ_0
TSIZ_1
TSIZ_2
TT_0
TT_1
TT_2
TT_3
TT_4
WT
G16
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
8
1
OF
44
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
22
RP33
36 9 SYSCLK_DDRCLK_A1_L_UF
22
36 10
MEM_DATA<1>
AK33
36 10
MEM_DATA<2>
AK31
36 10
MEM_DATA<3>
AK35
36 10
MEM_DATA<4>
AK36
36 10
MEM_DATA<5>
AJ32
36 10
MEM_DATA<6>
AJ35
36 10
MEM_DATA<7>
AJ36
36 10
MEM_DATA<8>
AG33
MEM_DATA<9>
AG35
36 10
MEM_DATA<10>
AH35
36 10
MEM_DATA<11>
AG36
36 10
MEM_DATA<12>
AH36
36 10
MEM_DATA<13>
AH32
36 10
MEM_DATA<14>
AG32
36 10
MEM_DATA<15>
AG31
36 10
MEM_DATA<16>
AE32
36 10
MEM_DATA<17>
AF35
36 10
MEM_DATA<18>
AF36
36 10
MEM_DATA<19>
AE36
36 10
36 10
MEM_DATA<20>
AE35
36 10
MEM_DATA<21>
AE33
36 10
MEM_DATA<22>
MEM_DATA<23>
AD35
36 10
MEM_DATA<24>
AA36
36 10
MEM_DATA<25>
AA35
36 10
36 10
MEM_DATA<26>
AA33
MEM_DATA<27>
AB36
36 10
MEM_DATA<28>
AB35
36 10
MEM_DATA<29>
AC36
36 10
AD36
MEM_DATA<30>
AA32
36 10
MEM_DATA<31>
AB33
36 10
MEM_DATA<32>
V36
36 10
MEM_DATA<33>
U33
DDR_DATA_0
DDR_DATA_1
CRITICAL
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4INTREPID-REV2.1
BGA
(2 OF 9)
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDRCS_0
DDR_DATA_16
DDRCS_1
DDR_DATA_17
DDRCS_2
DDR_DATA_18
DDRCS_3
DDR
DDR_DATA_19
DDR_DQS_0
MEMORY
DDR_DATA_20
INTERFACE
DDR_DQS_1
DDR_DATA_21
DDR_DQS_2
DDR_DATA_22
DDR_DQS_3
DDR_DATA_23
DDR_DQS_4
DDR_DATA_24
DDR_DQS_5
DDR_DATA_25
DDR_DQS_6
DDR_DATA_26
DDR_DQS_7
DDR_DATA_27
DDR_DATA_28
DDR_DM_0
DDR_DATA_29
DDR_DM_1
DDR_DATA_30
DDR_DM_2
DDR_DM_3
DDR_DATA_31
DDR_DATA_32
DDR_DM_4
DDR_DATA_33
DDR_DM_5
DDR_DM_6
DDR_DATA_34
DDR_DATA_35
DDR_DM_7
DDR_DATA_36
DDRRAS
DDR_DATA_37
DDRCAS
DDR_DATA_38
DDRWE
DDR_DATA_39
DDRCKE0
DDR_DATA_40
DDRCKE1
DDR_DATA_41
DDRCKE2
DDR_DATA_42
DDRCKE3
DDR_DATA_43
DDR_DATA_44
DDR_SELHI_0
DDR_SELHI_1
DDR_DATA_45
DDR_SELLO_0
DDR_DATA_46
DDR_SELLO_1
DDR_DATA_47
DDR_DATA_48
DDR_MCLK_0_P
DDR_DATA_49
DDR_MCLK_0_N
DDR_DATA_50
DDR_MCLK_1_P
DDR_DATA_51
DDR_MCLK_1_N
DDR_DATA_52
DDR_MCLK_2_P
DDR_DATA_53
DDR_MCLK_2_N
DDR_DATA_54
DDR_MCLK_3_P
DDR_DATA_55
DDR_MCLK_3_N
DDR_DATA_56
DDR_MCLK_4_P
DDR_DATA_57
DDR_MCLK_4_N
DDR_DATA_58
DDR_MCLK_5_P
DDR_DATA_59
DDR_MCLK_5_N
DDR_DATA_60
DDR_DATA_61
DDR_REF
DDR_DATA_62
DDR_VREF_0
DDR_DATA_63
DDR_VREF_1
U45
MEM_ADDR<0>
9 36
G35
MEM_ADDR<1>
9 36
G36
MEM_ADDR<2>
9 36
F36
MEM_ADDR<3>
9 36
F35
MEM_ADDR<4>
9 36
E35
MEM_ADDR<5>
9 36
E36
MEM_ADDR<6>
9 36
G32
MEM_ADDR<7>
9 36
D36
MEM_ADDR<8>
9 36
H36
MEM_ADDR<9>
9 36
G33
MEM_ADDR<10>
9 36
H33
MEM_ADDR<11>
9 36
D35
MEM_ADDR<12>
9 36
L30
MEM_BA<0>
9 36
M29
MEM_BA<1>
9 36
AN34
MEM_CS_L<0> 9
36
AN36
MEM_CS_L<1> 9
36
AL35
MEM_CS_L<2> 9
36
MEM_CS_L<3> 9
36
AL33
CLOCKS
DDR_A_0
DDR_A_1
DDR_A_2
DDR_A_3
DDR_A_4
DDR_A_5
DDR_A_6
DDR_A_7
DDR_A_8
DDR_A_9
DDR_A_10
DDR_A_11
DDR_A_12
DDR_BA_0
DDR_BA_1
MEM_DQS<0>
10 36
AH31
MEM_DQS<1>
10 36
AD32
MEM_DQS<2>
10 36
AB30
MEM_DQS<3>
10 36
V30
MEM_DQS<4>
10 36
P32
MEM_DQS<5>
10 36
N29
MEM_DQS<6>
10 36
L32
MEM_DQS<7>
10 36
AJ33
MEM_DQM<0>
10 36
AH33
MEM_DQM<1>
10 36
AD33
MEM_DQM<2>
22
22
22
11 36
SYSCLK_DDRCLK_B1_L
11 36
C460
20%
2 10V
CERM
805
SYSCLK_DDRCLK_B0
11 36
SYSCLK_DDRCLK_B0_L
11 36
2.2UF
RAM_CS_L<0>
C470
0.1UF
20%
2 10V
CERM
402
C479
0.1UF
20%
10V
2 CERM
402
11
VPP
RAM_CS_L<1>
11 36
5%
1/16W
SM1
RAM_CS_L<2>
RAM_CS_L<3>
11 36
11 36
RP36
22
36 9 MEM_CKE<0>
RP36
12 PCI_AD<0>
21
39 37 26 24 17 12 PCI_AD<1>
20
39 37 26 24 17 12 PCI_AD<2>
19
39 37 26 24 17 12 PCI_AD<3>
18
39 37 26 24 17 12 PCI_AD<4>
17
39 37 26 24 17 12 PCI_AD<5>
16
39 37 26 24 17 12 PCI_AD<6>
15
12 PCI_AD<7>
14
39 37 26 24 17 12 PCI_AD<8>
39 37 26 24 17 12 PCI_AD<9>
39 37 26 24 17
5%
1/16W
SM1
RP35
22
22
39 37 26 24 17
RAM_CKE<0>
30
31
11 36
RP35
36 9 MEM_CS_L<2>
22
SYSCLK_DDRCLK_B1
5%
1/16W
SM1
5%
1/16W
SM1
22
22
RP36
36 9 MEM_CS_L<3>
RP36
36 9 MEM_CS_L<0>
22
5%
1/16W
SM1
11 36
5%
1/16W
SM1
RP34
0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B
SYSCLK_DDRCLK_A0_L
1MB BOOT ROM
RP34
36 9 SYSCLK_DDRCLK_B0_UF
11 36
5%
1/16W
SM1
5%
1/16W
SM1
36 9 SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_A0
+3V_MAIN
22
RP33
1
RP33
36 9 SYSCLK_DDRCLK_B1_UF
36 9 SYSCLK_DDRCLK_B1_L_UF
22
5%
1/16W
SM1
36 9 MEM_CS_L<1>
AJ31
11 36
5%
1/16W
SM1
RP34
36 9 SYSCLK_DDRCLK_A0_L_UF
11 36
SYSCLK_DDRCLK_A1_L
CS
36 10
AK32
SYSCLK_DDRCLK_A1
RP34
36 9 SYSCLK_DDRCLK_A0_UF
MEM_DATA<0>
5%
1/16W
SM1
5%
1/16W
SM1
H35
RP33
4
36 9 SYSCLK_DDRCLK_A1_UF
PINS ARE SWAPABLE FOR RPAKS
9 11 36
5%
1/16W
SM1
39 37 26 24 17 12 PCI_AD<10>
36
39 37 26 24 17 12 PCI_AD<11>
39 37 26 24 17 12 PCI_AD<12>
39 37 26 24 17 12 PCI_AD<13>
12 PCI_AD<14>
VCC
U17
FEPR-1MX8
3.3V
TSOP
A0
DQ0
A1 OMIT DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
25
PCI_AD<24>
12 17 24 26 37 39
26
PCI_AD<25>
12 17 24 26 37 39
27
PCI_AD<26>
12 17 24 26 37 39
28
PCI_AD<27>
12 17 24 26 37 39
32
PCI_AD<28>
12 17 24 26 37 39
33
PCI_AD<29>
12 17 24 26 37 39
34
PCI_AD<30>
12 17 24 26 37 39
35
PCI_AD<31>
12 17 24 26 37 39
U32
36 10
MEM_DATA<35>
V35
36 10
MEM_DATA<36>
T30
MEM_DATA<37>
U36
36 10
MEM_DATA<38>
U35
36 10
MEM_DATA<39>
T36
36 10
MEM_DATA<40>
P33
36 10
MEM_DATA<41>
R30
36 10
MEM_DATA<42>
P35
36 10
MEM_DATA<43>
P36
36 10
MEM_DATA<44>
R36
36 10
MEM_DATA<45>
R35
36 10
MEM_DATA<46>
R33
36 10
MEM_DATA<47>
R32
36 10
MEM_DATA<48>
N35
36 10
MEM_DATA<49>
M36
36 10
MEM_DATA<50>
L35
36 10
36 10
MEM_DATA<51>
M35
36 10
MEM_DATA<52>
M33
36 10
MEM_DATA<53>
L36
36 10
MEM_DATA<54>
N33
36 10
MEM_DATA<55>
M30
36 10
MEM_DATA<56>
J32
36 10
MEM_DATA<57>
J33
36 10
MEM_DATA<58>
J35
36 10
MEM_DATA<59>
K32
36 10
MEM_DATA<60>
K33
36 10
MEM_DATA<61>
J36
36 10
MEM_DATA<62>
K36
MEM_DATA<63>
K35
36 10
MEM_DQM<3>
10 36
T35
MEM_DQM<4>
10 36
T33
MEM_DQM<5>
10 36
N32
MEM_DQM<6>
10 36
L33
MEM_DQM<7>
L29
MEM_RAS_L
9 36
H32
MEM_CAS_L
9 36
K30
MEM_WE_L
9 36
MEM_CKE<0>
9 36
AM35
MEM_CKE<1>
9 36
AM36
MEM_CKE<2>
9 36
MEM_CKE<3>
9 36
AB32
MEM_MUXSEL_H<0>
10 36
AE29
MEM_MUXSEL_H<1>
10 36
N30
MEM_MUXSEL_L<0>
10 36
T32
MEM_MUXSEL_L<1>
10 36
Y32
9 36
SYSCLK_DDRCLK_A1_L_UF
9 36
SYSCLK_DDRCLK_B0_UF
9 36
SYSCLK_DDRCLK_B0_L_UF
9 36
SYSCLK_DDRCLK_B1_UF
9 36
9 36
INT_DDRCLK5_P_TP
INT_DDRCLK5_N_TP
AA22
INT_MEM_REF_H
Y22
INT_MEM_VREF
22
22
38
22
22
22
R199
36 9 MEM_ADDR<9>
MEM_VREF
22
1%
1/16W
MF
402 2
INT_MEM_VREF 9
38
20%
10V
CERM 2
402
36 9 MEM_WE_L
22
22
ROM_WP_L
12
30 13 INT_RESET_L
10
CE
OE
WE
WP
PWD
GND
39
11 36
11 36
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
BOOTROM,P84
U17
CRITICAL
TABLE_5_ITEM
341S1336
RAM_ADDR<6>
11 36
RAM_ADDR<7>
11 36
RAM_ADDR<8>
11 36
RAM_ADDR<9>
11 36
RAM_ADDR<10>
11 36
RAM_ADDR<11>
11 36
PULL-DOWN RESISTORS TO ENSURE

CKE STAYS LOW AFTER INTREPID
2.5V I/O SHUTS OFF
RAM_ADDR<12> 11
36
11 36
22
RAM_BA<1>
11 36
36 11 9
RAM_CKE<0>
36 11 9
RAM_CKE<1>
36 11 9
RAM_CKE<2>
36 11 9
RAM_CKE<3>
R5001 R4391 R4091
INT - DDR/BOOTROM
R3871
10K
10K
10K
10K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
RAM_WE_L
22
5%
1/16W
MF
402

11 36

RAM_CAS_L 11
36
RAM_RAS_L 11
36
SIZE
APPLE COMPUTER INC.
5%
1/16W
MF
402
24
39 24 12 ROM_RW_L
5%
1/16W
SM1
MEM_CAS_L
MEM_RAS_L
22
39 24 12 ROM_OE_L
R250
R238
36 9
5%
1/16W
SM1
36 9
RAM_ADDR<4>
RAM_BA<0>
RP26
0.1UF
CNTL
10K
1%
1/16W
MF
402 2
39 24 ROM_ONBOARD_CS_L
23
5%
1/16W
SM1
C245 1
11 36
RP26
36 9 MEM_BA<1>
R1911
22
22
5%
1/16W
SM1
BA
22
1K
11 36
RP30
3
36 9 MEM_BA<0>
38
ROM_CS_L
5%
1/16W
MF
402
5%
1/16W
SM1
RP26
10K
36 9 MEM_ADDR<12>
R198
37
39 37 26 24 17 12 PCI_AD<20>
11 36
RP31
5%
1/16W
SM1
1
39 37 26 24 17 12 PCI_AD<19>
R357
11 36
5%
1/16W
SM1
22
22
RP26
36 9 MEM_ADDR<11>
13
RP30
36 9 MEM_ADDR<10>
38 16 15 10 +2_5V_INTREPID
39 37 26 24 17 12 PCI_AD<18>
5%
1/16W
SM1
5%
1/16W
SM1
1%
1/16W
MF
2 402
39 37 26 24 17 12 PCI_AD<17>
5%
1/16W
MF
402 2
TABLE_5_HEAD
1K
MEM_ADDR<8>
22
10K
5%
1/16W
MF
402 2
OVERRIDE ROM MODULE

INTERCEPTS ROM CHIP SELECT
RAM_ADDR<5>
RP31
1
RAM_ADDR<2>
10K
40
RP30
5%
1/16W
SM1
36 9
39 37 26 24 17 12 PCI_AD<16>
5%
1/16W
SM1
RP31
T22
22
RAM_ADDR<3>
9 38
R3861
RP25
36 9 MEM_ADDR<6>
RAM_ADDR<0>
39 24 12
5%
1/16W
SM1
36 9 MEM_ADDR<7>
9 11 36
5%
1/16W
SM1
R3381
RP25
5%
1/16W
SM1
36 9 MEM_ADDR<5>
RAM_ADDR<1>
36 9 MEM_ADDR<2>
36 9 MEM_ADDR<3>
39 37 26 24 17 12 PCI_AD<15>
5%
1/16W
SM1
5%
1/16W
SM1
39 37 26 24 17
9 11 36
RP31
RP30
W33
W36
22
RAM_CKE<2>
RAM_CKE<3>
36 9 MEM_ADDR<4>
W32
W35
22
RP25
9 36
V32
22
5%
1/16W
SM1
RP25
0S ARE SAME POLARITY (ACTIVE-LO)

1S ARE SAME POLARITY (ACTIVE-HI)
SYSCLK_DDRCLK_A1_UF
V33
9 MEM_CKE<2>
36 9 MEM_ADDR<1>
INT_DDRCLK2_N_TP
+3V_MAIN
36 9 MEM_ADDR<0>
0 & 1 GO TO SLOT A
2 & 3 GO TO SLOT B
Y35
W30
36
9 11 36
RP35
5%
1/16W
SM1
Y33
INT_DDRCLK2_P_TP
RAM_CKE<1>
5%
1/16W
SM1
36 9 MEM_CKE<3>
9 36
Y30
RP35
SYSCLK_DDRCLK_A0_UF
Y36
10 36
AN35
AL36
36 9 MEM_CKE<1>
CKE
MEM_DATA<34>
36 10
10 36
AC35
ADDR
36 10
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531 B
9
1
OF
44
38 16 15 10 9
BIT 0..15
+2_5V_INTREPID
BIT 16..31
38 16 15 10 9 +2_5V_INTREPID
BIT 32..47
38 16 15 10 9 +2_5V_INTREPID
38 16 15 10 9
BIT 48..63
+2_5V_INTREPID
G1
36 11
RAM_DATA_B<1>
J1
36 11
RAM_DATA_B<2>
K2
36 11
RAM_DATA_B<3>
J4
36 11
RAM_DATA_B<4>
K5
DB4*
36 11
RAM_DATA_B<5>
K7
36 11
RAM_DATA_B<6>
K8
DB5*
DB6*
36 11
RAM_DATA_B<7>
K10
DB7*
36 11
RAM_DQS_B<0>
H10
36 11
RAM_DQM_B<0>
F10
DB8*
DB9*
36 11
RAM_DATA_B<8>
D10
DB10*
36 11
RAM_DATA_B<9>
B10
36 11
RAM_DATA_B<10>
RAM_DATA_B<11>
B7
36 11
RAM_DATA_B<12>
A6
36 11
RAM_DATA_B<13>
A4
36 11
A9
36 11
RAM_DATA_B<14>
A3
U13
CBTV4020
BGA
DA13 A8
DA14 A7
DB11*
DB12*
DB15*
DB16*
DB17*
11 36
RAM_DATA_A<11>
11 36
RAM_DATA_A<12>
11 36
11 36
DA17 A2
RAM_DATA_A<15>
11 36
RAM_DQM_A<1>
MEM_DATA<0>
RAM_DATA_B<16>
G1
DB0*
DA11 C10
RAM_DATA_A<25>
11 36
36 11
RAM_DATA_B<17>
J1
DB1*
DA12 A10
RAM_DATA_A<26>
11 36
36 11
RAM_DATA_B<18>
DA13 A8
RAM_DATA_A<27>
J4
36 11
RAM_DATA_B<20>
K5
36 11
RAM_DATA_B<21>
K7
36 11
K8
RAM_DATA_B<22>
U12
DB2*
DB3*
CBTV4020
DA14
BGA
DB4*
DB5*
DA15
DA16 B4
DA17 A2
DB6*
RAM_DATA_B<23>
K10
36 11
RAM_DQS_B<2>
H10
36 11
RAM_DQM_B<2>
F10
DB9*
36 11
RAM_DATA_B<24>
D10
36 11
RAM_DATA_B<25>
B10
DB10*
DB11*
36 11
RAM_DATA_B<26>
A9
11 36
MEM_DATA<1>
9 36
36 11
RAM_DATA_B<27>
B7
MEM_DATA<2>
9 36
36 11
RAM_DATA_B<28>
A6
A7
A5
36 11
11 36
9 36
K2
RAM_DATA_B<19>
36 11
11 36
RAM_DQS_A<1>
36 11
11 36
RAM_DATA_A<14>
DH1 H2
DH2 J2
DB13*
DB14*
RAM_DATA_A<9>
RAM_DATA_A<10>
RAM_DATA_A<13>
DH0 F2
C736
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C738
0.1UF
C737
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
CRITICAL
VDD
DA15 A5
DA16 B4
DA18 B1
DA19 D1
0.1UF
20%
10V
2 CERM
402
CRITICAL
VDD
DA11 C10
DA12 A10
0.1UF
DA18 B1
DA19 D1
DB7*
DB8*
RAM_DATA_A<28>
G1
DB0*
36 11 RAM_DATA_B<33>
J1
11 RAM_DATA_B<34>
K2
DB1*
DB2*
J4
K5
K7
DB5*
K8
K10
DB6*
DB7*
36 11 RAM_DQS_B<4>
H10
DB8*
11 RAM_DQM_B<4>
F10
D10
DB9*
DB10*
B10
DB11*
36
11 36
11 36
RAM_DATA_A<29>
11 36
RAM_DATA_A<30>
11 36
RAM_DATA_A<31>
11 36
RAM_DQS_A<3>
11 36
RAM_DQM_A<3>
11 36
36
F2
DH0
DH1 H2
DB12*
DB13*
DB14*
DH3 J3
DH4 J5
MEM_DATA<3>
9 36
36 11
RAM_DATA_B<29>
A4
MEM_DATA<4>
9 36
36 11
RAM_DATA_B<30>
A3
DB15*
DB16*
DH5 J6
MEM_DATA<5>
RAM_DATA_B<31>
A1
DB17*
MEM_DATA<16>
9 36
A9
MEM_DATA<17>
9 36
B7
DH2 J2
DH3 J3
MEM_DATA<18>
MEM_DATA<19>
DH4 J5
MEM_DATA<20>
A6
9 36
A4
9 36
A3
9 36
DH5 J6
DH6 J8
MEM_DATA<21>
MEM_DATA<22>
9 36
36 11 RAM_DQS_B<5>
C1
36 11 RAM_DQM_B<5>
E1
9 36
A1
VDD
U10
DA11 C10
RAM_DATA_A<41>
11 36
36 11
RAM_DATA_B<48>
G1
DB0*
DA12 A10
DA13 A8
RAM_DATA_A<42>
11 36
36 11
RAM_DATA_B<49>
J1
K2
DB1*
DB2*
CBTV4020
DA14 A7
BGA
DA15 A5
DB3*
DB4*
CRITICAL
F8
0.1UF
20%
10V
2 CERM
402
0.1UF
C743
F3
C748
20%
2 10V
CERM
402
CRITICAL
DB0*
DB1*
DB2*
DB3*
0.1UF
E8
E8
RAM_DATA_B<0>
C742
20%
2 10V
CERM
402
C727
E8
0.1UF
VDD
36 11
C753
20%
2 10V
CERM
402
F8
0.1UF
C735
E8
C752
20%
2 10V
CERM
402
F8
0.1UF
20%
2 10V
CERM
402
F3
C747
F8
0.1UF
F3
C741
20%
2 10V
CERM
402
F3
1
1
RAM_DATA_A<43>
11 36
36 11
RAM_DATA_B<50>
RAM_DATA_A<44>
11 36
36 11
RAM_DATA_B<51>
J4
RAM_DATA_A<45>
11 36
36 11
RAM_DATA_B<52>
K5
DB5*
DB6*
DB7*
U9
RAM_DATA_A<46>
11 36
36 11
RAM_DATA_B<53>
K7
RAM_DATA_A<47>
11 36
36 11
RAM_DATA_B<54>
K8
DA18 B1
RAM_DQS_A<5>
11 36
36 11
RAM_DATA_B<55>
K10
36 11
RAM_DQS_B<6>
H10
DB8*
36 11
RAM_DQM_B<6>
F10
36 11
RAM_DATA_B<56>
D10
DB9*
DB10*
36 11
RAM_DATA_B<57>
B10
DB11*
36 11
RAM_DATA_B<58>
A9
36 11
RAM_DATA_B<59>
B7
DB12*
DB13*
36 11
RAM_DATA_B<60>
A6
36 11
RAM_DATA_B<61>
A4
36 11
RAM_DATA_B<62>
A3
36 11
RAM_DATA_B<63>
36 11
RAM_DQS_B<7>
C1
36 11
RAM_DQM_B<7>
E1
DH0 F2
DH1 H2
DB12*
DB13*
DH2 J2
DH3 J3
DB14*
DB15*
DB16*
DB17*
DB18*
RAM_DQM_A<5>
11 36
MEM_DATA<32>
9 36
MEM_DATA<33>
9 36
MEM_DATA<34>
9 36
MEM_DATA<35>
9 36
DH4 J5
DH5 J6
MEM_DATA<36>
9 36
MEM_DATA<37>
9 36
DH6 J8
MEM_DATA<38>
A1
RAM_DATA_A<57>
11 36
DA12 A10
DA13 A8
RAM_DATA_A<58>
11 36
RAM_DATA_A<59>
11 36
RAM_DATA_A<60>
11 36
RAM_DATA_A<61>
11 36
RAM_DATA_A<62>
11 36
RAM_DATA_A<63>
11 36
CBTV4020
DA14 A7
BGA
DA15 A5
DB3*
DB4*
DA16 B4
DA17 A2
DA19 D1
DA11 C10
DA16 B4
DA17 A2
DA18 B1
RAM_DQS_A<7>
11 36
DA19 D1
RAM_DQM_A<7>
11 36
DH0 F2
MEM_DATA<48>
9 36
DH1 H2
MEM_DATA<49>
9 36
DH2 J2
DH3 J3
MEM_DATA<50>
9 36
MEM_DATA<51>
9 36
MEM_DATA<52>
DB16*
DH4 J5
DH5 J6
9 36
MEM_DATA<53>
DB17*
DB18*
9 36
DH6 J8
MEM_DATA<54>
9 36
MEM_DATA<55>
9 36
DB14*
DB15*
RAM_DATA_A<7>
36 11
RAM_DQS_A<0>
36 11
RAM_DQM_A<0>
J10 DA8
G10 DA9
36 11
RAM_DATA_A<8>
E10 DA10
9 36
DH11 C9
36 11
RAM_DATA_A<16>
9 36
9 36
DH12 B9
DH13 B8
MEM_DATA<10>
9 36
36 11
RAM_DATA_A<17>
DH11 C9
DH12 B9
MEM_DATA<25>
MEM_DATA<9>
DH14 B6
DH15 B5
MEM_DATA<12>
MEM_DATA<13>
DH16 B3
MEM_DATA<14>
MEM_DATA<11>
36 11
RAM_DATA_A<18>
9 36
36 11
RAM_DATA_A<19>
9 36
36 11
RAM_DATA_A<20>
9 36
36 11
RAM_DATA_A<21>
9 36
DH17 B2
DH18 C2
MEM_DATA<15>
9 36
36 11
RAM_DATA_A<22>
MEM_DQS<1>
9 36
36 11
RAM_DATA_A<23>
DH19 E2
MEM_DQM<1>
9 36
36 11
RAM_DQS_A<2>
SEL E3
RAM_MUXSEL_L
F1 DA0
H1 DA1
K1 DA2
K3 DA3
K4 DA4
K6 DA5
J7 DA6
K9 DA7
36 11
RAM_DQM_A<2>
J10 DA8
G10 DA9
36 11
RAM_DATA_A<24>
E10 DA10
36 11 RAM_DATA_A<33>
9 36
DH13 B8
DH14 B6
MEM_DATA<27>
9 36
MEM_DATA<28>
9 36
DH15 B5
MEM_DATA<29>
9 36
DH16 B3
DH17 B2
MEM_DATA<30>
MEM_DATA<31>
9 36
DH18 C2
MEM_DQS<3>
9 36
DH19 E2
MEM_DQM<3>
SEL E3
RAM_MUXSEL_L
9 36
C5
H6
H5
F1 DA0
H1 DA1
K1 DA2
K3 DA3
K4 DA4
K6 DA5
J7 DA6
K9 DA7
9 36
DH10 E9
DH11 C9
MEM_DATA<40>
9 36
MEM_DATA<56>
9 36
MEM_DATA<41>
9 36
DH10 E9
DH11 C9
MEM_DATA<57>
9 36
DH12 B9
MEM_DATA<42>
9 36
DH12 B9
MEM_DATA<58>
9 36
DH13 B8
DH14 B6
MEM_DATA<43>
9 36
DH13 B8
DH14 B6
MEM_DATA<59>
9 36
MEM_DATA<60>
9 36
DH15 B5
DH16 B3
MEM_DATA<45>
9 36
MEM_DATA<61>
9 36
MEM_DATA<46>
9 36
DH15 B5
DH16 B3
MEM_DATA<62>
9 36
DH17 B2
MEM_DATA<47>
9 36
DH17 B2
MEM_DATA<63>
9 36
DH18 C2
DH19 E2
MEM_DQS<7>
9 36
MEM_DQM<7>
9 36
DH18 C2
DH19 E2
36 11 RAM_DQM_A<4>
J10 DA8
G10 DA9
E10 DA10
36 11 RAM_DQS_A<4>
9 36
SEL E3
MEM_DATA<44>
RAM_DATA_A<48>
36 11
RAM_DATA_A<49>
36 11
RAM_DATA_A<50>
36 11
RAM_DATA_A<51>
36 11
RAM_DATA_A<52>
36 11
RAM_DATA_A<53>
9 36
MEM_DQS<5>
9 36
MEM_DQM<5>
9 36
RAM_MUXSEL_H
36 11
10 36
F1 DA0
H1 DA1
K1 DA2
K3 DA3
K4 DA4
K6 DA5
J7 DA6
K9 DA7
36 11
RAM_DATA_A<54>
36 11
RAM_DATA_A<55>
36 11
RAM_DQS_A<6>
36 11
RAM_DQM_A<6>
J10 DA8
G10 DA9
36 11
RAM_DATA_A<56>
E10 DA10
SEL E3
RAM_MUXSEL_H
10 36
10 36
GND
GND
G9
G2
D9
D2
C6
10 36
GND
C5
MEM_DATA<26>
9 36
GND
H6
36 11
J7 DA6
K9 DA7
MEM_DATA<8>
9 36
9 36
MEM_DQM<6>
H5
RAM_DATA_A<6>
MEM_DATA<24>
DH10
MEM_DQM<2>
DH9 F9
DB19*
G9
36 11
E9
MEM_DQS<6>
9 36
G2
RAM_DATA_A<5>
9 36
9 36
MEM_DQM<4>
D9
36 11
K4 DA4
K6 DA5
MEM_DQM<0>
9 36
MEM_DQS<4>
D2
RAM_DATA_A<4>
DH9 F9
DH10 E9
MEM_DATA<39>
DH9 F9
DB19*
C6
36 11
9 36
C5
RAM_DATA_A<3>
MEM_DQS<2>
DH7 J9
DH8 H9
H6
36 11
K1 DA2
K3 DA3
9 36
DH8 H9
DH9 F9
9 36
DH7 J9
DH8 H9
H5
RAM_DATA_A<2>
DH7 J9
DB18*
DB19*
G9
36 11
E1
MEM_DATA<23>
RAM_DQM_B<3>
G2
RAM_DATA_A<1>
RAM_DQS_B<3>
36 11
9 36
D9
36 11
F1 DA0
H1 DA1
36 11
9 36
MEM_DQS<0>
D2
RAM_DATA_A<0>
9 36
MEM_DATA<7>
C6
36 11
MEM_DATA<6>
DH8 H9
C5
DB19*
H6
DB18*
E1
H5
C1
RAM_DQM_B<1>
G9
RAM_DQS_B<1>
36 11
C1
G2
36 11
DH6 J8
DH7 J9
D9
A1
D2
RAM_DATA_B<15>
36 11
C6
36 11
9 36
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND

SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
NO STUFF
R242
36 9
MEM_MUXSEL_L<0>
R243
RAM_MUXSEL_L
10 36
36 9
MEM_MUXSEL_L<1>
5%
1/16W
MF
402
RAM_MUXSEL_L
16BIT 2:1 DDR MUXES
10 36
5%
1/16W
MF
402

NO STUFF
R252
36 9
MEM_MUXSEL_H<0>
R239
RAM_MUXSEL_H
10 36
36 9
MEM_MUXSEL_H<1>
5%
1/16W
MF
402

RAM_MUXSEL_H
10 36
5%
1/16W
MF
402

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
10 44
1
7
+2_5V_MAIN
38 11
201
1
DDR_VREF
3
36 10
RAM_DATA_A<0>
36 10
RAM_DATA_A<1>
7
9
36 10
RAM_DQS_A<0>
11
36 10
RAM_DATA_A<2>
13
15
36 10
RAM_DATA_A<3>
17
36 10
RAM_DATA_A<8>
19
36 10
RAM_DATA_A<9>
21
23
36 10
RAM_DQS_A<1>
25
36 10
RAM_DATA_A<10>
29
27
36 10
31
RAM_DATA_A<11>
33
36 9
SYSCLK_DDRCLK_A0
35
36 9
SYSCLK_DDRCLK_A0_L
37
39
36 10
RAM_DATA_A<16>
41
36 10
RAM_DATA_A<17>
43
45
36 10
RAM_DQS_A<2>
47
36 10
RAM_DATA_A<18>
49
36 10
RAM_DATA_A<19>
53
RAM_DATA_A<24>
55
51
36 10
57
RAM_DATA_A<25>
59
36 10
RAM_DQS_A<3>
61
36 10
RAM_DATA_A<26>
65
36 10
RAM_DATA_A<27>
67
36 10
63
69
71
NC
73
NC
75
VREF0
VSS0
DQ0
VREF1
J19
VSS1
DQ4
F-RT-SM
DQ5
VDD1
AS0A42-D2S
DQ1
VDD0
DQS0
DM0
DQ2
VSS2
DQ6
VSS3
DQ3
DQ7
DQ8
VDD2
DQ12
VDD3
DQ9
DQ13
DQS1
VSS4
DM1
VSS5
DQ10
DQ11
DQ14
DQ15
VDD4
VDD5
CK0
CK0*
VDD6
VSS6
VSS7
VSS8
KEY
DQ16
DQ20
DQ17
VDD7
DQ21
VDD8
DQS2
DQ18
DM2
DQ22
VSS9
VSS10
DQ19
DQ24
DQ23
DQ28
VDD9
VDD10
DQ25
DQS3
DQ29
DM3
VSS12
VSS11
DQ26
DQ27
DQ30
DQ31
VDD11
RFU0
VDD12
RFU1
RFU2
RFU3
VSS13
RFU4
VSS14
RFU5
201
+2_5V_MAIN
38 11 DDR_VREF
DDR_VREF
11 38
4
6
RAM_DATA_A<4>
10 36
RAM_DATA_A<5>
10 36
36 10
RAM_DATA_B<4>
36 10
RAM_DATA_B<5>
6
8
10
10
12
14
RAM_DQM_B<0>
12
36 10
RAM_DATA_B<6>
14
36 10
RAM_DATA_B<7>
18
36 10
RAM_DATA_B<12>
20
36 10
RAM_DQM_A<0>
10 36
RAM_DATA_A<6>
10 36
16
16
18
RAM_DATA_A<7>
20
RAM_DATA_A<12> 10
36
RAM_DATA_A<13> 10
36
10 36
22
22
24
26
RAM_DQM_A<1>
36 10
RAM_DATA_B<13>
24
36 10
RAM_DQM_B<1>
26
10 36
28
28
30
RAM_DATA_A<14> 10
32
RAM_DATA_A<15> 10
36 10
RAM_DATA_B<14>
30
36 10
RAM_DATA_B<15>
32
36
36
34
34
36
36
38
38
40
40
42
RAM_DATA_A<20> 10
36
44
RAM_DATA_A<21> 10
36
36 10
RAM_DATA_B<20>
42
36 10
RAM_DATA_B<21>
44
46
46
48
RAM_DQM_A<2>
50
RAM_DATA_A<22> 10
36
RAM_DATA_A<23> 10
36
36 10
RAM_DQM_B<2>
48
36 10
RAM_DATA_B<22>
50
10 36
52
52
54
56
RAM_DATA_A<28> 10
36 10
RAM_DATA_B<23>
54
36 10
RAM_DATA_B<28>
56
36
58
58
60
RAM_DATA_A<29> 10
62
RAM_DQM_A<3>
36 10
RAM_DATA_B<29>
60
36 10
RAM_DQM_B<3>
62
36 10
RAM_DATA_B<30>
66
36 10
RAM_DATA_B<31>
68
36
10 36
64
64
66
RAM_DATA_A<30> 10
36
68
RAM_DATA_A<31> 10
36
70
70
72
72
NC
NC
74
NC
NC
74
76
76
REVERSED
SLOT "B"
CUSTOMER SLOT
78
VREF1
VSS1
DQ4
DQ5
+2_5V_MAIN
CRITICAL
J22
VREF0
VSS0
AS0A42-D2R DQ0
F-RT-SM
DQ1
VDD1
VDD0
DM0
DQ6
DQS0
DQ2
VSS3
VSS2
DQ3
DQ8
DQ7
DQ12
VDD2
VDD3
DQ13
DQ9
DQS1
DM1
VSS5
DQ14
VSS4
DQ10
DQ15
DQ11
VDD5
VDD6
VDD4
CK0
VSS6
CK0*
VSS8
VSS7
KEY
DQ16
DQ17
DQ20
DQ21
VDD7
VDD8
DM2
DQS2
DQ18
DQ22
VSS10
DQ23
VSS9
DQ19
DQ28
DQ24
VDD10
DQ29
VDD9
DQ25
DM3
VSS12
DQS3
VSS11
DQ26
DQ30
DQ27
DQ31
VDD12
RFU1
VDD11
RFU0
RFU3
VSS14
RFU2
VSS13
RFU4
+2_5V_MAIN
CRITICAL
1
DDR_VREF
+2_5V_MAIN
11 38
3
5
RAM_DATA_B<0>
10 36
RAM_DATA_B<1>
10 36
DDR VREF
ONE 0.1UF PER SLOT
R449
9
11
13
RAM_DQS_B<0>
10 36
RAM_DATA_B<2>
10 36
17
RAM_DATA_B<3>
10 36
19
RAM_DATA_B<8>
10 36
1K
1%
1/16W
MF
2 402
15
DDR_VREF
1
R440
21
1K
23
RAM_DATA_B<9>
10 36
25
RAM_DQS_B<1>
10 36
29
RAM_DATA_B<10>
10 36
31
RAM_DATA_B<11>
10 36
0.1UF
1%
1/16W
MF
2 402
27
C542
11 38
C482
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
33
35
SYSCLK_DDRCLK_B0
37
SYSCLK_DDRCLK_B0_L
9 36
9 36
39
41
RAM_DATA_B<16>
10 36
43
RAM_DATA_B<17>
10 36
45
+2_5V_MAIN
47
RAM_DQS_B<2>
49
10 36
RAM_DATA_B<18>
10 36
53
RAM_DATA_B<19>
10 36
55
RAM_DATA_B<24>
10 36
RAM_DATA_B<25>
10 36
DDR BYPASS CAPS

SLOT "A"
51
57
C602
10UF
59
61
RAM_DQS_B<3>
20%
6.3V
2 CERM
805
10 36
C601
10UF
20%
6.3V
2 CERM
805
63
65
RAM_DATA_B<26>
10 36
67
RAM_DATA_B<27>
10 36
69
71
NC
73
NC
77
NC
79
NC
C573
0.1UF
20%
10V
2 CERM
402
75
C526
0.1UF
20%
10V
2 CERM
402
C525
0.1UF
20%
10V
2 CERM
402
C490
0.1UF
20%
10V
2 CERM
402
C527
0.1UF
20%
10V
2 CERM
402
STANDARD
SLOT "A"
FACTORY SLOT
36 9
77
NC
79
NC
81
83
NC
85
NC
87
89
NC
91
NC
93
95
RAM_CKE<1>
97
NC
36 11 9
RAM_ADDR<12>
36 11 9
RAM_ADDR<9>
99
101
103
36 11 9
105
RAM_ADDR<7>
36 11 9
RAM_ADDR<5>
107
36 11 9
RAM_ADDR<3>
109
RAM_ADDR<1>
111
36 11 9
113
36 11 9
RAM_ADDR<10>
115
36 11 9
RAM_BA<0>
117
36 11 9
RAM_WE_L
119
36 9
121
RAM_CS_L<0>
123
NC
125
36 10
RAM_DATA_A<32>
127
36 10
RAM_DATA_A<33>
129
131
36 10
RAM_DQS_A<4>
133
36 10
RAM_DATA_A<34>
135
36 10
RAM_DATA_A<35>
139
36 10
RAM_DATA_A<40>
141
137
143
36 10
RAM_DATA_A<41>
145
36 10
RAM_DQS_A<5>
147
149
36 10
36 10
RAM_DATA_A<42>
151
RAM_DATA_A<43>
153
155
157
159
161
36 10
RAM_DATA_A<48>
163
36 10
RAM_DATA_A<49>
165
167
36 10
RAM_DQS_A<6>
169
36 10
RAM_DATA_A<50>
171
173
36 10
RAM_DATA_A<51>
175
36 10
RAM_DATA_A<56>
177
179
36 10
RAM_DATA_A<57>
181
36 10
RAM_DQS_A<7>
183
36 10
RAM_DATA_A<58>
187
36 10
RAM_DATA_A<59>
189
185
+3V_MAIN
191
39 23 13 11
INT_I2C_DATA0
193
39 23 13 11
INT_I2C_CLK0
195
197
NC
199
RFU6
RFU7
VDD14
RFU9
VDD13
RFU8
RFU10
RFU11
VSS15
RFU12
VSS16
VSS17
RFU13
VDD16
VDD15
VDD17
CKE1
CKE0
RFU14
A12
RFU15
A11
A9
A8
VSS18
A7
VSS19
A6
A5
A4
A3
A1
A2
A0
VDD18
A10_AP
VDD19
BA1
BA0
RAS*
WE*
S0*
CAS*
S1*
RFU16
RFU17
VSS20
DQ32
VSS21
DQ36
DQ33
DQ37
VDD21
DM4
VDD20
DQS4
DQ34
VSS22
DQ38
VSS23
DQ35
DQ39
DQ40
VDD22
DQ44
VDD23
DQ41
DQ45
DQS5
VSS24
DM5
VSS25
DQ42
DQ46
DQ43
VDD24
DQ47
VDD25
VDD26
VSS26
CK1*
CK1
VSS27
VSS28
DQ48
DQ49
DQ52
DQ53
VDD27
VDD28
DQS6
DQ50
DM6
DQ54
VSS29
VSS30
DQ51
DQ56
DQ55
DQ60
VDD29
DQ57
VDD30
DQ61
DQS7
DM7
VSS31
DQ58
VSS32
DQ62
DQ59
DQ63
VDD31
SDA
VDD32
SA0
SCL
SA1
VDDSPD
RFU18
SA2
RFU19
78
NC
80
NC
82
84
NC
86
NC
88
90
92
NC
80
NC
82
84
NC
86
NC
88
90
92
94
94
96
RAM_CKE<0>
36 9
96
RAM_CKE<2>
9 36
98
NC
98
NC
100
RAM_ADDR<11>
9 11 36
102
RAM_ADDR<8>
9 11 36
36 11 9
RAM_ADDR<11>
100
36 11 9
RAM_ADDR<8>
102
104
104
106
RAM_ADDR<6>
RAM_ADDR<4>
9 11 36
110
RAM_ADDR<2>
9 11 36
RAM_ADDR<0>
RAM_ADDR<6>
36 11 9
RAM_ADDR<4>
108
36 11 9
RAM_ADDR<2>
110
36 11 9
RAM_ADDR<0>
112
9 11 36
108
112
36 11 9
106
9 11 36
114
114
116
RAM_BA<1>
9 11 36
118
RAM_RAS_L
9 11 36
120
RAM_CAS_L
122
RAM_CS_L<1>
124
36 11 9
RAM_BA<1>
116
36 11 9
RAM_RAS_L
118
36 11 9
RAM_CAS_L
120
RAM_CS_L<3>
122
9 11 36
36 9
9 36
124
NC
NC
126
126
128
RAM_DATA_A<36> 10
36
130
RAM_DATA_A<37> 10
36
36 10
RAM_DATA_B<36>
128
36 10
RAM_DATA_B<37>
130
132
132
134
RAM_DQM_A<4>
136
RAM_DATA_A<38> 10
36 10
RAM_DQM_B<4>
134
36 10
RAM_DATA_B<38>
136
10 36
36
138
138
140
142
RAM_DATA_B<39>
140
36 10
RAM_DATA_B<44>
142
36 10
RAM_DATA_B<45>
36 10
RAM_DQM_B<5>
36 10
RAM_DATA_A<39> 10
36
RAM_DATA_A<44> 10
36
144
144
146
RAM_DATA_A<45> 10
148
RAM_DQM_A<5>
36
146
148
10 36
150
150
152
RAM_DATA_A<46> 10
154
RAM_DATA_A<47> 10
36 10
RAM_DATA_B<46>
152
36 10
RAM_DATA_B<47>
154
36
36
156
156
158
SYSCLK_DDRCLK_A1_L
160
SYSCLK_DDRCLK_A1
36 9
SYSCLK_DDRCLK_B1_L
36 9
SYSCLK_DDRCLK_B1
9 36
158
160
9 36
162
162
164
RAM_DATA_A<52> 10
36
166
RAM_DATA_A<53> 10
36
36 10
RAM_DATA_B<52>
164
36 10
RAM_DATA_B<53>
166
168
168
170
RAM_DQM_A<6>
172
RAM_DATA_A<54> 10
36 10
RAM_DQM_B<6>
170
36 10
RAM_DATA_B<54>
172
10 36
36
174
174
176
RAM_DATA_A<55> 10
36
178
RAM_DATA_A<60> 10
36
36 10
RAM_DATA_B<55>
176
36 10
RAM_DATA_B<60>
178
180
180
182
RAM_DATA_A<61> 10
184
RAM_DQM_A<7>
36 10
RAM_DATA_B<61>
182
36 10
RAM_DQM_B<7>
184
36 10
RAM_DATA_B<62>
188
36 10
RAM_DATA_B<63>
190
36
10 36
186
+3V_MAIN
186
188
RAM_DATA_A<62> 10
36
190
RAM_DATA_A<63> 10
36
192
192
194
194
196
196
198
200
ADDR=0XA0(WR)/0XA1(RD)
ADDR=0XA2(WR)/0XA3(RD)
NC
NC
198
200
RFU5
RFU7
VDD14
RFU6
VDD13
RFU9
RFU11
RFU8
RFU10
VSS15
VSS16
RFU12
VSS17
VDD15
VDD17
RFU13
VDD16
CKE0
RFU15
CKE1
RFU14
A12
A11
A9
VSS18
A8
VSS19
A7
A6
A4
A5
A3
A2
A1
A0
VDD19
VDD18
A10_AP
BA1
BA0
WE*
RAS*
CAS*
S0*
S1*
RFU16
VSS20
RFU17
VSS21
DQ32
DQ36
DQ37
DQ33
VDD20
VDD21
DQS4
DM4
DQ38
DQ34
VSS22
VSS23
DQ35
DQ40
DQ39
DQ44
VDD22
VDD23
DQ41
DQS5
DQ45
DM5
VSS24
VSS25
DQ46
DQ42
DQ43
DQ47
VDD24
VDD25
CK1*
CK1
VDD26
VSS26
VSS28
DQ52
VSS27
DQ48
DQ49
DQ53
VDD27
DQS6
VDD28
DM6
DQ50
DQ54
VSS30
VSS29
DQ51
DQ55
DQ56
DQ60
VDD30
DQ61
VDD29
DQ57
DM7
VSS32
DQS7
VSS31
DQ58
DQ62
DQ59
VDD31
DQ63
VDD32
SDA
SA0
SA1
SCL
VDDSPD
SA2
RFU18
RFU19
81
83
NC
85
NC
87
89
NC
91
NC
0.1UF
20%
10V
2 CERM
402
93
95
RAM_CKE<3>
97
C595
C524
0.1UF
20%
10V
2 CERM
402
C549
0.1UF
20%
10V
2 CERM
402
C523
0.1UF
20%
10V
2 CERM
402
9 11 36
RAM_ADDR<9>
9 11 36
105
RAM_ADDR<7>
9 11 36
107
RAM_ADDR<5>
9 11 36
109
RAM_ADDR<3>
9 11 36
111
RAM_ADDR<1>
9 11 36
115
RAM_ADDR<10>
9 11 36
117
RAM_BA<0>
9 11 36
RAM_WE_L
9 11 36
101
FOR RETURN CURRENT
103
+2_5V_MAIN
SLOT "B"
113
119
121
RAM_CS_L<2> 9
123
C589
10UF
36
20%
2 6.3V
CERM
805
NC
125
127
RAM_DATA_B<32>
10 36
129
RAM_DATA_B<33>
10 36
133
RAM_DQS_B<4>
10 36
135
RAM_DATA_B<34>
10 36
139
RAM_DATA_B<35>
10 36
141
20%
2 10V
CERM
402
C530
10UF
20%
2 6.3V
CERM
805
131
137
C551
0.1UF
RAM_DATA_B<40>
10 36
145
RAM_DATA_B<41>
10 36
147
RAM_DQS_B<5>
10 36
151
RAM_DATA_B<42>
10 36
153
RAM_DATA_B<43>
10 36
163
RAM_DATA_B<48>
10 36
165
RAM_DATA_B<49>
10 36
169
RAM_DQS_B<6>
10 36
171
RAM_DATA_B<50>
10 36
175
RAM_DATA_B<51>
10 36
177
RAM_DATA_B<56>
10 36
181
RAM_DATA_B<57>
10 36
183
RAM_DQS_B<7>
10 36
187
RAM_DATA_B<58>
10 36
189
RAM_DATA_B<59>
10 36
C550
0.1UF
20%
2 10V
CERM
402
C596
0.1UF
20%
2 10V
CERM
402
C597
C522
0.1UF
20%
2 10V
CERM
402
143
149
1
C761
0.1UF
20%
10V
2 CERM
402
155
157
C565
0.1UF
20%
10V
2 CERM
402
C548
0.1UF
C594
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C489
0.1UF
20%
10V
2 CERM
402
159
161
167
173
DDR SODIMM CONNS

A
179

185
+3V_MAIN
191
193
INT_I2C_DATA0
11 13 23 39
195
INT_I2C_CLK0
11 13 23 39
SIZE
197
199
APPLE COMPUTER INC.
NC
DRAWING NUMBER
REV.
051-6531
SHT
NONE
0.1UF
20%
2 10V
CERM
402
SCALE
0.1UF
9 36
RAM_ADDR<12>
202
C481
20%
10V
2 CERM
402
NC
99
202
OF
11 44
1
AGP PULL-UPS/PULL DOWNS
R146
38 14 12 8
R112
38 14 12 8
+1_5V_INTREPID_PLL
4.7
C160 1
+1_5V_INTREPID_PLL6
0.22UF
38
38 21 19 18 16 15 12
5%
1/16W
MF
402
C83 1
0.22UF
+1_5V_INTREPID_PLL
4.7
+1_5V_INTREPID_PLL5
38
+3V_GPU
5%
1/16W
MF
402
20%
6.3V
CERM 2
402
+1_5V_AGP
R192
33
39 36 24 CLK33M_AIRPORT
R209
33
AIRPORT_PCI_REQ_L
AR17
17 12
CBUS_PCI_REQ_L
AR16
26 12
USB2_PCI_REQ_L
AT17
39 24
AIRPORT_PCI_GNT_L
AT16
17
CBUS_PCI_GNT_L
AN18
26
USB2_PCI_GNT_L
AN17
39 24 12
R147
1
36 17 CLK33M_CBUS
5%
1/16W
MF
402
NEC_USB
36
R157
36
22
26 CLK33M_USB2
5%
1/16W
MF
402
33
AR18
36
CLK33M_CBUS_UF
AH18
36
CLK33M_USB2_UF
AT18
36
INT_PCI_FB_OUT
AM18
39
26 24 17
39
26 24 17
39
12
37
12
37
26 24 17 12
39 37
5%
1/16W
MF
402
26 24 17
39
26 24 17
39
12
37
12
37
PCI_FRAME_L
AN16
PCI_TRDY_L
AT15
PCI_IRDY_L
AH16
PCI_STOP_L
AR15
PCI_DEVSEL_L
AM17
39 37 26 24 17
PCI_CBE<0>
AR14
R186
39 37 26 24 17
PCI_CBE<1>
AK16
47
39 37 26 24 17
PCI_CBE<2>
AM16
PCI_CBE<3>
AJ15
CLK33M_AIRPORT_UF
AJ19
36 INT_PCI_FB_IN
OUTPUT IMPEDANCE IS ABOUT 20OHM
AT14
37 26 24 17 PCI_PAR
R171
1
60.4
J11
5%
1/16W
MF
402
5%
1/16W
MF
2 402
39 37 26 24 17
VDD15A_6
(PLL4)
PCI_REQ_0
PCI_REQ_1
PCI_REQ_2
PCIAD_0
PCIAD_1
PCIAD_2
CRITICAL
PCIAD_3
PCI_GNT_0
PCIAD_4
PCI_GNT_1
INTREPID-REV2.1
PCIAD_5
BGA
PCI_GNT_2
(7 OF 9)
PCIAD_6
PCI_CLK0
PCIAD_7
PCI_CLK1
PCIAD_8
PCI/ROM
PCI_CLK2
INTERFACE
PCIAD_9
PCIAD_10
PCI_CLK_OUT
VOUT = 3.3V
PCI_CLK_IN
PCIAD_11
VIN = 1.5V (CORE)
PCIAD_12
PCI_PAR
PCIAD_13
PCI_FRAME
PCIAD_14
PCI_TRDY
PCIAD_15
PCI_IRDY
PCIAD_16
PCI_STOP
PCIAD_17
PCI_DEVSEL
PCIAD_18
PCI_CBE_0
PCIAD_19
PCI_CBE_1
PCIAD_20
PCI_CBE_2
PCIAD_21
PCI_CBE_3
PCIAD_22
PCIAD_23
ROM_OVRLY_EN
PCIAD_24
ROM_CS
PCIAD_25
ROM_OE
PCIAD_26
ROM_WE
PCIAD_27
PCIAD_28
PCIAD_29
PCIAD_30
PCIAD_31
(PLL4)
VSSA_6
U45
AM10
PCI_AD<0>
9 17 24 26 37 39
AR8
PCI_AD<1>
9 17 24 26 37 39
AK12
PCI_AD<2>
9 17 24 26 37 39
AJ8
PCI_AD<3>
9 17 24 26 37 39
PCI_AD<4>
9 17 24 26 37 39
AT8
PCI_AD<5>
9 17 24 26 37 39
AN11
PCI_AD<6>
9 17 24 26 37 39
AH13
PCI_AD<7>
9 17 24 26 37 39
AK13
PCI_AD<8>
9 17 24 26 37 39
AR9
PCI_AD<9>
9 17 24 26 37 39
AR10
PCI_AD<10>
9 17 24 26 37 39
AT9
PCI_AD<11>
9 17 24 26 37 39
AR11
PCI_AD<12>
9 17 24 26 37 39
AM12
PCI_AD<13>
9 17 24 26 37 39
AN12
PCI_AD<14>
9 17 24 26 37 39
AK11
PCI_AD<15>
9 17 24 26 37 39
AT11
PCI_AD<16>
9 17 24 26 37 39
AT10
PCI_AD<17>
9 17 24 26 37 39
AN13
PCI_AD<18>
9 17 24 26 37 39
AM13
PCI_AD<19>
9 17 24 26 37 39
AR12
PCI_AD<20>
9 17 24 26 37 39
AJ11
PCI_AD<21>
17 24 26 37 39
AT12
PCI_AD<22>
17 24 26 37 39
12 STOP_AGP_L
10K
V14
VDD15A_5
(PLL5)
STOP_AGP_L
INT_AGPPVT
U45
AN19
5%
1/16W
SM1
5%
1/16W
SM1
+1_5V_AGP 12
STP_AGP INTREPID-REV2.1 AGPREQ AT33

BGA
AGPGNT AM29
AGPPVT
(3 OF 9)
AB20
38 18 12 INT_AGP_VREF
AGPVREF0
AGPAD0 AR19
AB21
CRITICAL
AGPVREF1
AGPAD1 AM19
AGPAD2 AT20
AT19
18 12 AGP_BUSY_L
AGP_BUSY
AGPAD3 AR20
CLK66M_AGP_15V_TP AK28 AGP_CLK
AGPAD4 AT21
AK27
36 INT_AGP_FB_IN
AGP_FB_IN Vin = Vcore (1.5V)
AGPAD5 AN20
AK25
36 INT_AGP_FB_OUT
AGP_FB_OUT Vout = AGPIO (1.5V)
AGPAD6 AR21
AGPAD7 AN21
Need divider for 3.3V slot!
AGPAD8 AM21
AGPAD9 AT22
0 2
1
AGPAD10 AR22
5%
AGPAD11 AN22
1/16W
MF
AGPAD12 AM22
402
AGP
AGPAD13 AN23
INTERFACES
AGPAD14 AR23
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
AGPAD15 AT24
AGPAD16 AM23
AGPAD17 AR24
AGPAD18 AT25
AGPAD19 AR25
AGPAD20 AM24
(PLACE CLOSE TO INTREPID AGP BALLS)
AGPAD21 AN25
AGPAD22 AL24
18 16 15 12 +1_5V_AGP
AGPAD23 AR26
AGPAD24 AT26
AGPAD25 AM25
1
AGPAD26 AN26
4.99K
AGPAD27 AM26
1%
1/16W
AGPAD28 AR27
MF
402 2
AGPAD29 AT27
AGPAD30 AR28
INT_AGP_VREF 12 18 38
AGPAD31 AN27
12
AN10
10K
RP19
NOTE: Designs using AGP slot should

use 52-ohm a resistor here.
1%
1/16W
MF
2 402
18 19 21 38
RP19
2
18 12 AGP_BUSY_L
20%
6.3V
CERM 2
402
AJ24
R217
15 16 18 19 21
38
AGP_REQ_L
12 18 37
AGP_GNT_L
12 18 37
AGP_AD<0>
18 37
AGP_AD<1>
18 37
AGP_AD<2>
18 37
AGP_AD<3>
18 37
AGP_AD<4>
18 37
AGP_AD<5>
18 37
AGP_AD<6>
18 37
AGP_AD<7>
18 37
AGP_AD<8>
18 37
AGP_AD<9>
18 37
AGP_AD<10>
18 37
AGP_AD<11>
18 37
AGP_AD<12>
18 37
AGP_AD<13>
18 37
AGP_AD<14>
18 37
AGP_AD<15>
18 37
AGP_AD<16>
18 37
AGP_AD<17>
18 37
RP22
10K
37 18 12 AGP_REQ_L
5%
1/16W
SM1
RP20
10K
37 18 12 AGP_GNT_L
RP20
3
37 18 12 AGP_FRAME_L
10K
5%
1/16W
SM1
RP19
10K
37 18 12 AGP_DEVSEL_L
10K
5%
1/16W
SM1
RP22
2
37 18 12 AGP_IRDY_L
5%
1/16W
SM1
5%
1/16W
SM1
AK17
36
CLK66M_GPU_AGP_UF
12
INT_ROM_CS_L
AM9
12
INT_ROM_OE_L
AR7
12
INT_ROM_RW_L
AN9
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
R169
36 18
CLK66M_GPU_AGP 1
33
5%
1/16W
MF
402
AM11
PCI_AD<23>
17 24 26 37 39
AR13
PCI_AD<24>
9 17 24 26 37 39
AK15
PCI_AD<25>
9 17 24 26 37 39
AH15
PCI_AD<26>
9 17 24 26 37 39
AN14
PCI_AD<27>
9 17 24 26 37 39
AT13
PCI_AD<28>
9 17 24 26 37 39
AK14
PCI_AD<29>
9 17 24 26 37 39
AN15
PCI_AD<30>
9 17 24 26 37 39
AM15
PCI_AD<31>
9 17 24 26 37 39
AGP I/O REFERENCE
38 21 19
R185
J10
R1801
4.99K
1%
1/16W
MF
402 2
C247
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGPCBE_3
0.22UF
20%
2 6.3V
CERM
402
SIMPLY PROVIDING REFERENCE TO CHIP

BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
+3V_SLEEP
RP17
39 37 26 24 17 12 PCI_FRAME_L
10K
10K
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

PLACE CLOSE TO INTREPID SIDE
RP17
10K
10K
12
INT_ROM_CS_L
5%
1/16W
SM1
12
RP18
2
22
5%
1/16W
MF
402
39 24 12 AIRPORT_PCI_REQ_L
18 37
AGP_AD<21>
18 37
AGP_AD<22>
18 37
AGP_AD<23>
18 37
AGP_AD<24>
18 37
AGP_AD<25>
18 37
AGP_AD<26>
18 37
AGP_AD<27>
18 37
AGP_AD<28>
18 37
AGP_AD<29>
18 37
AGP_AD<30>
18 37
AGP_AD<31>
18 37
AGP_CBE<0>
18 37
AT23
AGP_CBE<1>
18 37
AN24
AGP_CBE<2>
18 37
AL25
AGP_CBE<3>
18 37
AGP_PAR
18 37
AGP_FRAME_L
12 18 37
AGP_TRDY_L
12 18 37
AGP_IRDY_L
12 18 37
AGP_STOP_L
12 18 37
AGP_DEVSEL_L
12 18 37
AGP_SBA<0>
18 37
AR32
AGP_SBA<1>
18 37
AM31
AGP_SBA<2>
18 37
AN31
AGP_SBA<3>
18 37
AR31
AGP_SBA<4>
18 37
AT31
AGP_SBA<5>
18 37
AM30
AGP_SBA<6>
18 37
AN30
AGP_SBA<7>
18 37
AGP_SB_STB_P AH25
AGP_SB_STB_N AG25
AGP_SB_STB
12 18 37
10K
INT_ROM_OE_L
5%
1/16W
SM1
12
INT_ROM_RW_L
22
9 24 39
AGP_SB_STB_L
12 18 37
AGP_ST<0>
18
AGP_ST<1>
18
AGP_ST0 AN29
AGP_ST1 AT30
AGP_ST2 AR30
22
ROM_OE_L
9 24 39
5%
1/16W
MF
402
R82
ROM_CS_L
R77
ROM_RW_L
9 24 39
18 12
5%
1/16W
MF
402
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGP_WBF_L
AK30
AGP_WBF
VSSA_5
(PLL5)
AGPPIPE
AGPRBF
AGP_ST<2>
18
AK20
AGP_AD_STB<0>
12 18 37
AK19
AGP_AD_STB_L<0>
12 18 37
AK21
AGP_AD_STB<1>
12 18 37
AK22
AGP_AD_STB_L<1>
12 18 37
AJ29
AGP_PIPE_L
12
AK24
AGP_RBF_L
12 18 37
26 12 USB2_PCI_REQ_L
RP18
17 12 CBUS_PCI_REQ_L
10K
10K
37 18 12 AGP_STOP_L
10K
RP19
10K
5%
1/16W
SM1
RP20
R193
10K
5%
1/16W
MF
402
R187
10K
37 18 12 AGP_AD_STB<1>
10K
5%
1/16W
MF
402
R230
1
5%
1/16W
SM1
5%
1/16W
MF
402
R194
1
10K
5%
1/16W
MF
402
R170
1
37 18 12 AGP_AD_STB_L<1>
10K
5%
1/16W
MF
402
R216
37 18 12 AGP_SB_STB_L
10K
5%
1/16W
MF
402
INTREPID AGP/PCI
A
5%
1/16W
SM1


USB2 AND CBUS REQ REMAINS ON

+3V_MAIN BECAUSE THESE CHIPS
ARE POWERED IN SLEEP
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
10K
12 AGP_PIPE_L
37 18 12 AGP_AD_STB<0>
5%
1/16W
SM1
RP22
5%
1/16W
SM1
10K
37 18 12 AGP_RBF_L
18 12 AGP_WBF_L
5%
1/16W
SM1
5%
1/16W
SM1
RP18
10K
RP20
V13
+3V_MAIN
RP22
37 18 12 AGP_TRDY_L
37 18 12 AGP_AD_STB_L<0>
R103
5%
1/16W
SM1
RP17
39 37 26 24 17 12 PCI_STOP_L
5%
1/16W
SM1
5%
1/16W
SM1
39 37 26 24 17
10K
12 PCI_TRDY_L
18 37
AGP_AD<20>
AT32
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
RP18
RP17
39 37 26 24 17 12 PCI_IRDY_L
AGP_AD<19>
37 18 12 AGP_SB_STB
5%
1/16W
SM1
39 37 26 24 17 12 PCI_DEVSEL_L
18 37
AM20
AGPPAR AT29
AGPFRAME AN28
AGPTRDY AR29
AGPIRDY AT28
AGPSTOP AM28
AGPDEVSEL AM27
PCI PULL-UPS
AGP_AD<18>
OF
12
1
44
1
TEST PULL-UPS/DOWNS
36 27
ATA_D0
ATA_D1
INTREPID-REV2.1 ATA_D2
ATA_D3
BGA
(5 OF 9)
ATA_D4
ATA_D5
ATA_D6
ATA_D7
ATA_D8
ATA_D9
ATA_D10
UATA100
ATA_D11
ATA_D12
ATA_D13
ATA_D14
ATA_D15
CRITICAL
U45
V5
UIDE_DATA<0>
24 37
T1
UIDE_DATA<1>
24 37
U1
UIDE_DATA<2>
24 37
U2
UIDE_DATA<3>
24 37
R630
37 27
V4
UIDE_DATA<4>
24 37
V2
UIDE_DATA<5>
24 37
W1
UIDE_DATA<6>
24 37
V1
UIDE_DATA<7>
24 37
W2
UIDE_DATA<8>
24 37
W8
UIDE_DATA<9>
24 37
W4
UIDE_DATA<10>
24 37
W5
UIDE_DATA<11>
24 37
Y2
UIDE_DATA<12>
24 37
Y1
UIDE_DATA<13>
24 37
W7
UIDE_DATA<14>
24 37
Y8
UIDE_DATA<15>
Y5
ATA_A0
ATA_A1 AB1
ATA_A2 Y7
10
ENET_PHY_TX_EN
R624
37 27
ENET_PHY_TX_ER
10
24 37
UIDE_ADDR<1>
24 37
UIDE_ADDR<2>
24 37
+3V_MAIN
H9
37
ENET_LINK_TX_ER
A5
37 13
ENET_LINK_TXD<0>
H10
37 13
ENET_LINK_TXD<1>
E9
37 13
ENET_LINK_TXD<2>
D8
37 13
ENET_LINK_TXD<3>
37 13
ENET_LINK_TXD<4>
B7
37 13
ENET_LINK_TXD<5>
G10
37 13
ENET_LINK_TXD<6>
D9
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE
CARDSLOT
ATA_VREF
ATA_RST
ATA_WR
ATA_RD
ATA_CHRDY
ATA_CS0
ATA_CS1
ATA_DMACK
ATA_DMARQ
ATA_INTRQ
CS_CE1
CS_CE2
CS_IORD
CS_IOWR
CS_OE
CS_WE
CS_WAIT
Y15
UIDE_REF
38
Y4
UIDE_RST_L
24 37
AA1
UIDE_DIOW_L
24 37
AA2
AA5
AA4
UIDE_DIOR_L
24 37
UIDE_IOCHRDY
24 37
UIDE_CS0_L
AB2
AC1
AC2
24 37
UIDE_DMACK_L
24 37
37
37 27 ENET_RX_ER
R51
82
HD_DMARQ
24 37
5%
1/16W
MF
402
R92
82
UIDE_INTRQ
+3V_MAIN
AD1
HD_INTRQ
5%
1/16W
MF
402
24 37
R124
36 27 CLKENET_PHY_GTX
CSLOT_CE2_L_SPN
AB5
CSLOT_IORD_L_SPN
AD2
CSLOT_IOWR_L_SPN
AC4
CSLOT_OE_L_SPN
AE1
CSLOT_WE_L_SPN
10
5%
1/16W
MF
402
CSLOT_CE1_L_SPN
AB4
RX_CLK
C4
RX_DV
D2
RX_ER
27 ENET_RX_DV
R52
10K
5%
1/16W
MF
2 402
37 27 ENET_LINK_RXD<0>
D3
E7
D6
B4
A4
D7
G9
E8
RXD_0
RXD_1
RXD_2
RXD_3
RXD_4
RXD_5
RXD_6
RXD_7
GBE_REFCLK
GTX_CLK
CRS
COL
MDIO
MDC
L13
36 27 CLKENET_LINK_GBE_REF
H12
36 CLKENET_LINK_GTX
37 27 ENET_CRS
E6
37 27 ENET_COL
C5
37 27 ENET_MDIO
B5
37 27 ENET_MDC
B6
RESET
U5
INT_RESET_L
9 30
PURESET
T2
INT_PU_RESET_L
25 30
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA4
PHY_DATA5
PHY_DATA6
PHY_DATA7
L4
FW_LINK_DATA<0>
28 37
M4
FW_LINK_DATA<1>
28 37
P7
FW_LINK_DATA<2>
28 37
N5
FW_LINK_DATA<3>
28 37
K1
FW_LINK_DATA<4>
28 37
K2
FW_LINK_DATA<5>
28 37
L2
FW_LINK_DATA<6>
28 37
N4
FW_LINK_DATA<7>
28 37
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
M1
FW_PHY_LPS
28
FW_LINK_CNTL<0>
28 37
FW_LINK_CNTL<1>
28 37
MISC
GB ETHERNET
FIREWIRE
P5
L1
M2
T7
FWR_LCLK U14
FW_LINKON N2
FW_PINT N1
39 27 13
RP16
2
JTAG_ASIC_TCK
1K
JTAG_ASIC_TRST_L
FW_PHY_LREQ
22
RP16
1K
INT_TST_MONIN_PD
10K
5%
1/16W
SM1
R629
13
28 37
10K
5%
1/16W
SM1
INT_JTAG_TEI
5%
1/16W
MF
402
R145
1
28 37
22
13
5%
1/16W
MF
402
36 CLKFW_LINK_LCLK
FW_PINT
5%
1/16W
MF
402
28 36
28
10K
R626
39 27 13
R34
FW_LKON
INT_TST_PLLEN_PD
5%
1/16W
MF
402
5%
1/16W
MF
402
37 FW_LINK_LREQ
CLKFW_LINK_PCLK
10K
R621
13
R117
2
27 13 JTAG_ENET_TDI
J12
36 27 CLKENET_LINK_RX
37 UIDE_DMARQ
AA8
E10
ENET_LINK_TXD<7>
37 13
24 37
UIDE_CS1_L
A6
5%
1/16W
SM1
BGA
(4 OF 9)
TXD_0
TXD_1
TXD_2
TXD_3
TXD_4
TXD_5
TXD_6
TXD_7
10K
39 27 13 JTAG_ASIC_TMS
INTREPID-REV2.1
5%
1/16W
SM1
RP16
U45
TX_CLK
TX_EN
TX_ER
A7
5%
1/16W
MF
402
10K
39 13 JTAG_ASIC_TDI
CRITICAL
37
UDMA - STOP
RP16
37 ENET_LINK_TX_EN
5%
1/16W
MF
402
24 37
UIDE_ADDR<0>
CLKENET_LINK_TX
CLKFW_PHY_LCLK
28 36
5%
1/16W
MF
402
I2C PULL-UPS
+3V_MAIN
RP12
39 23 13 11
2.2K
2
INT_I2C_CLK0
AE2
CSLOT_IOWAIT_L_PU
CS_WAIT IS AN INPUT
IDE
IDEDD0
IDEDD1
IDEDD2
IDEDD3
IDEDD4
IDEDD5
IDEDD6
IDEDD7
IDEDD8
IDEDD9
IDEDD10
IDEDD11
IDEDD12
IDEDD13
IDEDD14
IDEDD15
AC5
IDEA0
IDEA1
IDEA2
IDEA3
IDEA4
IDEA5
IDEA6
IDEA7
IDEA8
IDEA9
EIDE_DATA<0>
AH10
13 INT_TST_MONIN_PD
24 37
AF2
EIDE_DATA<4>
24 37
AH1
EIDE_DATA<5>
24 37
AD5
EIDE_DATA<6>
24 37
AG2
EIDE_DATA<7>
24 37
AE4
EIDE_DATA<8>
24 37
AE5
EIDE_DATA<9>
24 37
AF4
EIDE_DATA<10>
24 37
AH2
EIDE_DATA<11>
24 37
AD7
EIDE_DATA<12>
24 37
AG4
EIDE_DATA<13>
24 37
AJ1
EIDE_DATA<14>
24 37
AJ2
EIDE_DATA<15>
24 37
AF5
EIDE_ADDR<0>
AE7
EIDE_ADDR<1>
24 37
EIDE_ADDR<2>
24 37
CSLOT_ADDR4_SPN
CSLOT_ADDR5_SPN
AK2
CSLOT_ADDR6_SPN
AH5
CSLOT_ADDR7_SPN
AF7
CSLOT_ADDR8_SPN
AG7
37 27
ENET_PHY_TXD<0>
AJ4
EIDE_RST_L
24 37
AM2
EIDE_WR_L
24 37
AL2
EIDE_RD_L
24 37
AG8
EIDE_DMACK_L
24 37
EIDE_DMARQ
24 37
INT_I2C_CLK0
11 13 23 39
INT_I2C_DATA0
11 13 23 39
AK5
INT_I2C_CLK1
13 14 25 39
INT_I2C_DATA1
13 14 25 39
RP12
INT_I2C_DATA0
2.2K
INT_I2C_CLK1
2.2K
5%
1/16W
SM1
RP12
INT_I2C_DATA1
2.2K
37 27
22
37 27
ENET_PHY_TXD<7>
22
22
13 37
13 37
ENET_LINK_TXD<5>
13 37
5%
1/16W
SM1
5%
1/16W
SM1
24 37
ENET_LINK_TXD<3>
ENET_LINK_TXD<4>
5%
1/16W
SM1
RP15
ENET_PHY_TXD<6>
13 37
RP15
ENET_PHY_TXD<5>
37 27
22
5%
1/16W
SM1
37 27
13 37
RP14
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_LINK_TXD<1>
ENET_LINK_TXD<2>
22
5%
1/16W
SM1
RP14
37 27
22
ENET_PHY_TXD<2>
A0-WR
A1-RD
A2-WR
A3-RD
AC-WR
AD-RD
AE-WR
AF-RD
84-WR
85-RD
58-WR
59-RD
6A-WR
6B-RD
D0-WR
D1-RD
13 37
RP14
ENET_PHY_TXD<1>
ENET_LINK_TXD<6>
13 37
ENET_LINK_TXD<7>
13 37
22
I2C-0
I2C-1
I2C-2
(MAIN)
(MAIN)
(SLEEP)
(SLEEP)
N/A
N/A
N/A
N/A
N/A
RAM - STANDARD
J20 - PG 12
RAM - REVERSED
J23 - PG 12
N/A
BOOTBANG E2PROM
U37 - PG 23
LMU
U36 - PG 23
N/A
N/A
N/A
N/A
PMU
DASH MODEM
N/A
N/A
J9 - PG 25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
SNAPPER SOUND
N/A
FAN CONTROLLER
U3 - PG 24
N/A
J12 - PG 24
CLOCK SLEW SSCG

U56 - PG 15
N/A
N/A
ADDR LSB INDICATES READ (1) OR WRITE (0) MODES
RP15
4
5%
1/16W
SM1
ADDR
ENET_LINK_TXD<0>
5%
1/16W
SM1
RP12
39 25 14 13
IICCLK_1
IICDATA_1 AM3
5%
1/16W
SM1
37 27
24 37
IICCLK_0 AN2
IICDATA_0 AN1
BUS
22
RP14
24 37
TEST
RP15
5%
1/16W
SM1
EIDE_CS1_L
39 23 13 11
ENET_TXD SERIES TERMINATION
NOT USING CARDSLOT INTERFACE
EIDE_CS0_L
EIDE_INT
AR6
5%
1/16W
SM1
39 25 14 13
37 27
24 37
AA7
AM7
13 INT_TST_PLLEN_PD
24 37
EIDE_IOCHRDY
AH7
TDI
TDO
TCK
TMS
TRSTN
TEI
TST_MONIN
TST_MONOUT
TST_PLLEN
AK10
INT_TST_MONOUT_TP
CSLOT_ADDR9_SPN
IDECHRDY AK4
IDECS0 AB7
IDECS1 AM1
IDERST
IDEWR
IDERD
IDEDMACK
IDEDMARQ
IDEINTRQ
13 INT_JTAG_TEI
EIDE_DATA<3>
AL1
AR5
24 37
EIDE_DATA<2>
AH4
AP5
39 27 13 JTAG_ASIC_TMS
24 37
EIDE_DATA<1>
AG1
CSLOT_ADDR3_SPN
AT5
AN6
AF1
AG5
27 13 JTAG_ENET_TDI
39 27 13 JTAG_ASIC_TCK
39 27 13 JTAG_ASIC_TRST_L
24 37
AD4
AK1
AK8
39 13 JTAG_ASIC_TDI
5%
1/16W
SM1
JTG_RSTN_L
1
R154
1K
1%
1/16W
MF
2 402
TST_TEI_H
1
0
X
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
JTG_TDO_H
(I/O)
JTG_TDI_H
(I/O)
EXTPLL
SHUTDOWN
(OUTPUT)
DDR_
TPDENABLE
(OUTPUT)
(OUTPUT)
HWPLL_
TESTSEL5
(INPUT)
0(I)
0(I)
0(I)
1(I)
1(I)
1(I)
0(I)
1(I)
0(I)
1(I)
1(I)
0(I)
0(I)
1(I)
TST_PLLEN_H
X
0
1
1
MEMWE
0
1
0
1
X
ANALYZER_CLK
X
(OUTPUT)
SELECTED
PLL OUTPUTS
SELECTED
PLL OUTPUTS
SYNC/MEM DATA
BYPASS
X(I)
X(I)
X(I)
X(I)
X(I)
DESCRIPTION
JTAG MODE
NORMAL OPERATION
VIEW
VIEW
ATPG
ATPG
TEST
INT - ENET/FW/UATA
EIDE/I2C
PLLS (SOFTWARE)
PLLS (HARDWARE)
NORMAL
IDDQ
TRI-STATE
FUNCTIONAL
POSTSCALAR
FUNCTIONAL
POSTSCALAR

TEST WITHOUT
BYPASS
TEST WITH
BYPASS
SIZE
APPLE COMPUTER INC.
FUNCTIONAL TEST IDDQ
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
13 44
1
6
U7
LT1962-ADJ
NC
RP29
10K
AIRPORT_PCI_INT_L
14 24 39
C433 1
NC
NC
NC
1UF
5%
1/16W
MF
603
20%
10V
CERM 2
603
ADJ 2
1%
1/16W
MF
402 2
20%
6.3V
CERM 2
402
C419
4.7
20%
6.3V
2 CERM
805
R2771
LT1962_INT_BYP
C200
5%
1/16W
SM1
20%
6.3V
CERM 2
402
1%
1/16W
MF
402 2
4.7
C182 1
20%
6.3V
CERM 2
402
R7
R113
1
5%
1/16W
MF
402
10K
10K
C148
0.22UF
14
USB_PWREN_CD_L
RP47
10K
10K
5%
1/16W
SM1
USB_PWREN_AB_L
+3V_MAIN
14
USB_OC_CD_L
RP6
10K
5%
1/16W
SM1
+2_5V_MAIN
USB2_PCI_INT_L
0.1UF
14 26
20%
10V
CERM 2
402
INT_EXTINT14_PU
14
10K
INT_EXTINT8_PU
14
SSCG
L22
L18
400-OHM-EMI
400-OHM-EMI
SM-1
SM-1
5%
1/16W
SM1
+1_5V_INTREPID_PLL2
R699 R707
10K
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
10K
10K
PORT C - LEFT USB
+3V_INTREPID_USB
1
C85
0.1UF
20%
2 16V
CERM
402
U45
INTREPID_USB
C97
R614
10UF
20%
2 6.3V
CERM
805
20%
2 10V
CERM
402
26 14
BGA
(6 OF 9)
C691
24
USB_DCP
INTREPID_USB
R609
26 14
24
USB_DCM
NEC_USB
NEC_USB
R708
10K
10K
5%
1/16W
MF
2 402
USB_D1P
26
5%
1/16W
MF
402
USB_D1M
26
5%
1/16W
MF
402
R701
SCCTXDA AF9 COMM_TXD_L

SCCRTSA AN3 COMM_RTS_L
SCCDTRA AF10 COMM_DTR_L
SCCRXDA AG11 COMM_RXD
SCCGPIOA AG9 COMM_GPIO_L
SCCTRXCA AT4 COMM_TRXC
INTREPID-REV2.1
38
5%
1/16W
SM1
38
C84
RP7
5
38
26
5%
1/16W
SM1
14 USB_DBM
+1_5V_INTREPID_PLL1
USB_D2M
RP48
6
SM
SSCG
C692
FERR-EMI-100-OHM
26
PORT B - UNUSED
14 USB_DBP
38
USB_D2P
5%
1/16W
MF
402
L1
2
+3V_CG_PLL_MAIN
SSCG
RP6
CRITICAL
2
24
NEC_USB
0.01UF
1
SSCG
NEC_USB
+3V_MAIN
38
SSCG
C698
RP29
5%
1/16W
SM1
10K
+1_5V_INTREPID_PLL3
20%
6.3V
CERM 2
402
14
RP48
5%
1/16W
MF
402
0.22UF
1
5%
1/16W
SM1
4.7
C198 1
14
R80
1
USB_DAM
26 14
5%
1/16W
MF
402
INTREPID_USB
R155
14
RP7
1
24
26 14 USB_DAP
5%
1/16W
MF
402
20%
6.3V
CERM 2
402
USB_OC_AB_L
4.7
USB POWER FAULT SIGNALS
5%
1/16W
SM1
5%
1/16W
SM1
USB_OC_EF_L
38
R125
14
RP47
RP47
6
USB_PWREN_EF_L
R89
+1_5V_INTREPID_PLL4
PCI_
VDD15A_1 AA16
(PLL1)
10K
5%
1/16W
MF
402
INTREPID_USB
5%
1/16W
MF
402
0.22UF
10K
PORT A - RIGHT USB 1
R156
1
+3V_MAIN
USB PORT ASSIGNMENTS
38
5%
1/16W
MF
402
0.22UF
68.1K
+1_5V_INTREPID_PLL8
R168
10UF
LT1962_INT_ADJ
BYP 3
GND 4
SHDN
0.22UF
15.8K
20%
16V
CERM 2
402
OUT 1
IN
R278
0.01UF
MSOP
8
LTC1962_INT_VIN
38
R264
+3V_SLEEP
C424
C353 1
5%
1/16W
MF
402
VDDU33_2 U8
5%
1/16W
MF
603
+1_8V_MAIN
4.7
VDDU33_1 T8
R244
8 12 38
CRITICAL
VDD15A_8 AG29
(PLL9)
+1_5V_INTREPID_PLL
R291
PCI_
VDD15A_4 AJ18
(PLL7)
+2_5V_MAIN NO STUFF
PCI_
VDD15A_3 AJ17
(PLL3)
PCI_
VDD15A_2 AJ12
(PLL2)
PORT D - UNUSED
5%
1/16W
MF
2 402
25 39
RP46
25 39
25 39
14 USB_DDP
10K
8
PMU_REQ_L
14 30
39 25 13
RP46
10K
5%
1/16W
SM1
RP51
10K
10K
INT_EXTINT3_PU
INT_EXTINT13_PU
ADDRSEL
30 14
14
CG_RESET_L
17
RESET*
SYSTEM_CLK_EN
13
PD*
CG_LOCK
10K
10K
10K
INTERNAL 250K PULL-DOWN
SSCG
14
R636
38 34 14
VCORE_VGATE 1
14
5%
1/16W
MF
402
NO STUFF
1
R656
10K
5%
1/16W
MF
2 402
LOCK
R281
2
ODSEL INTERNAL
RP6
10K
250K PULL-UP
10K
INT_EXTINT11_PU
14
36
E31
G30
D31
14 INT_EXTINT8_PU
C32
30 14 PMU_INT_NMI
INT_EXTINT12_PU
14 INT_EXTINT11_PU
E30
14 INT_EXTINT12_PU
J9
14 INT_EXTINT13_PU
F4
14 INT_EXTINT14_PU
D1
E2
G4
D30
F-ST-SM
3
14
R28
5%
1/16W
MF
2 402
18.432M
1
AN7
30 14 SYSTEM_CLK_EN
AT7
30 INT_WATCHDOG_L
R632
36 14 INT_REF_CLK_OUT
INT_MOD_DTI_UF
100K 2
14 26
USB_DAM
14 26
14
USB_OC_AB_L
14
USB_VD2_P H2
USB_VD2_N H1
USB_DCP
14 26
USB_DCM
14 26
USB_VD3_P M7
USB_VD3_N M8
USB_DDP
14
USB_DDM
14
J2
USB_PWREN_CD_L
14
J1
USB_OC_CD_L
14
USB_DEP
14 37
USB_DEM
14 37
USB_PRTPWR2
USB_PWRFLT2
AUDIO/I2S
CLOCKS
WATCHDOG
37 14
14 37
USB_DFM
14 37
USB_PWREN_EF_L
14
N7
USB_OC_EF_L
14
MOD_DTO
MOD_DTI
MOD_SYNC
MOD_BITCLK
MOD_CLKOUT
R7
RP8
25 39
R2
14 INT_MOD_DTO_UF
V8
14 INT_MOD_BITCLK_UF
P1
14 INT_MOD_CLKOUT_UF
R29
1K
22PF
5%
50V
2 CERM
402
AA15
5%
1/16W
MF
1 402
47
INT_MOD_SYNC_UF
14
PART#
QTY
DESCRIPTION
5%
1/16W
SM1
R102
MODEM_USB_DM
25 37 39
R114
15K
5%
1/16W
MF
402 2
25 39
R115
15K
5%
1/16W
MF
2 402
25 39
25 36 39
SND_CLKOUT
25 36 39
MOD_DTO
25 39
HWPLL_
TESTMUXSEL
5
4
3
2
1
0
25 39
RP56
47
MOD_BITCLK
25 39
5%
1/16W
SM1
MOD_CLKOUT
25 39
SIGNAL NAME
MOD_BITCLK_B_H
MOD_CLKOUT_B_H
MOD_DTO_B_H
MOD_SYNC_B_H
MOD_DTI_B_H
JTG_TDO_H
5%
1/16W
SM1
INT - USB/GPIOS/I2S
1K
5%
1/16W
MF
1 402

INT_I2C_CLK2
25 39
INT_I2C_DATA2
25 39

BOM OPTION
RES,METAL FILM,10 K OHM,5,1/16W,0402,SM
R100
NO_SSCG
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
197S0004
197S0035
BOM OPTION
REF DES
COMMENTS:
Y1
ALT FOR SIWARD
SIZE
TABLE_ALT_ITEM
14 25 39
5%
1/16W
MF
402
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
25 37 39

116S1104
SND_HW_RESET_L
MODEM_USB_DP
5%
1/16W
SM1
MOD_SYNC
RP56
2
5%
1/16W
SM1
5%
1/16W
SM1
47
47
TABLE_5_HEAD
47
INT_SND_CLKOUT
SND_SYNC
SND_SCLK
R5
RP56
RP8
RP56
25 39
47
5%
1/16W
SM1
1
14 INT_MOD_SYNC_UF
24 37 39
5%
1/16W
SM1
INT_SND_SCLK
R1
BT_USB_DM
5%
1/16W
MF
402
RP8
3
47
22
SND_TO_AUDIO
INT_SND_SYNC
IICCLK_2 AL4
IICDATA_2 AH8
USB_DFM
5%
1/16W
SM1
C140
47
P2
INT_MOD_DTI
22
USB_DFP
5%
1/16W
MF
402
T5
T4
R90
INT_SND_TO_AUDIO
INT_AUDIO_TO_SND
24 37 39
R91
37 14
4
R4
22
BT_USB_DP
PORT F - MODEM
RP8
M5
AUD_DTO
AUD_DTI
AUD_SYNC
AUD_BITCLK
AUD_CLKOUT
USB_DEM
5%
1/16W
MF
402
5%
1/16W
MF
402
USB_DFP
22
USB_DEP
R50
BUF_REF_CLK_OUT
SS_REF_CLK_IN
TABLE_5_ITEM
R111
1
37 14
USB_DAP
USB_PWREN_AB_L
CONTRAST PWM
IIC
INT_MOD_BITCLK_UF 14
10K
U15
K9
36 14 INT_REF_CLK_IN
RP1
4
BRIGHTNESS PWM
8X4.5MM-SM
5%
50V
CERM 2
402
R67
30
K4
USB_VD5_P
USB_VD5_N N8
FAN PWM
CLK18M_XTAL_IN 36
22PF
PORT E - BLUETOOTH
30
+3V_SLEEP
5%
1/16W
MF
2 402
30
J4
P8
C15 1
CRYSTAL LOAD CAPACITANCE IS 16PF
CBUS_IREQ_L
XTAL_IN
XTAL_OUT
STOPXTAL
14 30
14
USB_VD4_P K5
USB_VD4_N L5
VGATE/LOCK INTERRUPT
5%
1/16W
SM1
30
14
5%
1/16W
SM1
5%
1/16W
SM1
POWERBOOK SPARE
10K
14 USB_DDM
37 14
Y1
10M
5%
1/16W
MF
402
CRITICAL
NO STUFF
1
U4
V15
25 39
USB_DBP
USB_PRTPWR1
USB_PWRFLT1
PCIPME
PROCSLEEPREQ
AN8
PENDPROCINT
36 CLK18M_INT_XOUT
R622
USB
INTERRUPTS
5%
1/16W
SM1
RP46
25 39
USB_DBM
USB_PRTPWR0
USB_PWRFLT0
AT6
36 CLK18M_INT_XIN
NO STUFF
EXTINT0
EXTINT1
EXTINT2
EXTINT3
EXTINT4
EXTINT5
EXTINT6
EXTINT7
EXTINT8
EXTINT9
EXTINT10
EXTINT11
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
CPU_INT
USB_VD1_P G2
USB_VD1_N G1
AJ7
30 INT_PROC_SLEEP_REQ_L
5%
1/16W
MF
402
J1
U.FL-R_SMT
H7
14 INT_EXTINT16_PU
26 14 USB2_PCI_INT_L
30 INT_PEND_PROC_INT
NO STUFF
14
B32
14 INT_EXTINT10_PU
39 25 SND_HP_SENSE_L
CLK18M_INT_EXT
14
RP1
10K
A33
NO STUFF
FW_PHY_PD_INT 14
27 ENET_ENERGY_DET
5%
1/16W
MF
1 402
CRITICAL
10K
39 25 SND_LIN_SENSE_L
B33
R49
INT_GPIO9_PU
RP1
2
R100
75
5%
1/16W
MF
402
D34
5%
1/16W
MF
402
51
10K
14 INT_EXTINT3_PU
5 MPIC_CPU_INT_L
5%
1/16W
SM1
C33
14
R720
PLACE R68 CLOSE TO INTREPID SIDE

OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT
5%
1/16W
SM1
VCORE_VGATE
SSCG
OPEN-DRAIN OUTPUT
RP7
3
18 AGP_INT_L
30 26 PMU_PME_L
INT_EXTINT10_PU
5%
1/16W
SM1
E34
17 14 CBUS_INT_L
38 34 14
5%
1/16W
SM1
30 14 PMU_INT_L
SDATA
RP29
3
RP24
INT_GPIO12_PU
INT_EXTINT16_PU
5%
1/16W
SM1
5%
1/16W
SM1
36
SSCG
RP6
RP48
2
10K
5%
1/16W
SM1
5%
1/16W
SM1
F33
39 30 25 14 COMM_RING_DET_L
INT_REF_CLK_IN 14
14
RP48
4
K7
39 24 14 AIRPORT_PCI_INT_L
14
CG_ADDRSEL
INT_MOD_DTO_UF
5%
1/16W
SM1
INT_I2C_DATA1
F1
27 INT_ENET_RST_L
VSSU_2
10K
INT_I2C_CLK1
K8
14 INT_GPIO15_PU
USB_VD0_P L8
USB_VD0_N L7
R8
39 25 13
14 INT_GPIO12_PU
SCK
VSSU_1
RP1
5%
1/16W
SM1
CG_FSEL
J5
ACK*
VSSA_8
(PLL9)
14
H4
MOSI
AH29
30
CLKIN
14 INT_GPIO9_PU
REQ*
VSSA4
(PLL7)
PMU_INT_NMI 14
R634
TSSOP
33 2
SSCG
CPU0 16 CG_CLKOUT 1
OUTPUT IMPEDANCE ~18-20OHM
3 FSEL
5%
1/16W
INTERNAL 250K PULL-UP
MF
9 SCLK
402
20
INT_REF_CLK_OUT
25 SND_AMP_MUTE_L
L9
25 39
SCCTXDB AR4 PMU_FROM_INT

SCCRTSB AL5 PMU_REQ_L
SCCRXDB AG10 PMU_TO_INT
SCCGPIOB AP4 PMU_ACK_L
SCCTRXCB AM5 PMU_CLK
MISO
R9
U42
36 14
SSCG
CY28512D
14 17
H5
39 25 14 SND_HW_RESET_L
CRITICAL
CBUS_INT_L
25 SND_HP_MUTE_L
VIA
AK18
5%
1/16W
MF
402
C686
J8
FW_PHY_PD_INT
VSSA3
(PLL3)
10K
5%
1/16W
SM1
F2
14
VSSA1
(PLL1)
RP29
10K
39 25 COMM_RESET_L
AJ16
30
J7
GPIO0
GENERAL
SEL
GPIO1 VCORE_A/B PURPOSE
GPIO2
I/OS
GPIO3
GPIO4
GPIO5
GPIO6
GPIO9
GPIO11
GPIO12
GPIO15
GPIO16
VSSA2
(PLL2)
PMU_INT_L 14
RP51
39 25 COMM_SHUTDOWN
20%
10V
2 CERM
402
VSSQ
5%
1/16W
MF
2 402
E1
AJ13
10K
0.1UF
VDDC 5
R682
14
5%
1/16W
SM1
5%
1/16W
SM1
INT_MOD_CLKOUT_UF
VSSC
10K
FW_PHY_PD
SSCG
RP51
10K
R698
28
NO STUFF
1
G5
14 CG_FSEL
34 14 INT_GPIO1_PU
+2_5V_CG_MAIN
38
5%
1/16W
MF
402 2
0.1UF
20%
10V
2 CERM
402
15
10K
5%
1/16W
MF
402 2
14
RP46
5%
1/16W
SM1
INT_GPIO15_PU
R6311 R6251
0
14 25 30 39
VDDA 12
5%
1/16W
SM1
COMM_RING_DET_L
SSCG
5%
1/16W
MF
2 402
VSSA
10K
20%
10V
2 CERM
603
10K
11
RP47
R638
NO STUFF
VDD0 1
VDD1 10
10K
1UF
14 34
VDDQ 18
INT_GPIO1_PU
RP51
VSS0
VSS1
5%
1/16W
SM1
39 30 26 24 20 18
19
10K
17 MAIN_RESET_L
OF
14 44
1
+2_5V_MAIN
+2_5V_SLEEP
NO STUFF
R2871
R399
5%
1/10W
FF
805 2
38 21 19 18 16 12
+1_5V_AGP
+3V_MAIN
+1_5V_MAIN
MAXBUS_SLEEP
AL10
AK6
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
G3
F9
F7
F30
AC13
AC12
AB6
AB3
AA12
AA11
AR34
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AL19
AGP_IO_VDD
AA25
VDD3.3
AL13
C12
AA29
AL16
C15
AB25
AL3
C18
AB27
AL7
U45
C21
AB31
INTREPID-REV2.1
C24
AM4
AB34
BGA
(8 OF 9)
C27
C30
AN5
AC25
AA21
AC27
AA24
AP10
U45
AP13
INTREPID-REV2.1
C9
AC28
AB13
F12
AE31
AB15
F15
AE34
AB17
F18
AF28
AB19
K6
N24
F21
AH30
AC17
N3
AH34
AC19
N6
AK34
AC23
P13
M15
AP35
AD13
P14
M16
C35
AD15
M19
G31
AD22
T12
M22
G34
P15
T18
M23
K31
P18
N18
K34
P20
N28
P21
N23
N31
R17
P16
N34
R20
W13
P19
N36
T13
W3
P25
U17
W6
P28
U18
AP2
R25
U24
AP7
R27
V16
AR3
T25
V19
B3
T28
V20
C2
T29
V22
C6
T31
W16
D32
T34
W24
D5
U25
Y13
B34
U28
Y18
E4
F24
F27
VDD1.8/CPUVIO
N21
AJ23
AJ21
AH28
AH22
AH19
AD20
AF22
+2_5V_INTREPID
AE23
38 16 10 9
AE20
38 34 23 16 8 7 5
5%
1/10W
FF
2 805
VDD2.5
AP16
BGA
(9 OF 9)
K3
POWER
R22
T3
VDD3.3
T6
U12
VDD1.5
W12
POWER/GROUND
L24
V25
M14
V29
M17
W25
M18
W31
M20
W34
M21
Y27
M24
Y29
M28
E33
AD34
M31
AN33
M32
AN4
AD6
M34
AP1
AE14
M6
AP12
AE16
GROUND
M9
AP15
AE18
N15
AP18
AE19
N25
AP21
AE21
U19
P12
AP24
AE22
U22
P17
AP27
AE28
U27
P22
AP3
AG21
U29
P29
AP30
AG23
V10
P4
AP33
AG24
V12
AP34
AG3
R16
AP36
AG30
R18
AP6
AG34
AP9
AG6
R21
AR2
AH20
V3
R23
AR35
AH21
V31
R24
AT3
AH23
R26
AT34
AH27
R29
B2
R14
VSS
R19
VSS
R3
R31
V18
V21
V24
V34
V6
VSS
W11
B35
AK3
W14
C1
AK7
W23
W26
R34
C10
R6
C13
AL15
Y11
T11
C16
AL18
Y12
T14
C19
AL21
Y14
T23
C22
AL27
Y16
T24
C25
AL31
Y19
C28
AL34
Y23
Y24
Y25

AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16
AC15
AC11
AB29
AB12
AB11
AA6
AA34
AA31
AA3
AA27
A34
AA20
A3
C7
AGP_IO_VSS
C36
D4
D33
F10
F13
F16
F19
F22
F25
F3
F28
F31
F6
G7
F34
J3
J6
J31
J34
Intrepid Power
C34
AB28
AL9
AB24
C31
AB18
U16
AB16
C3
AB14
U10
AL6
V17
VSS
AL12
T27
AD3
AD31
M3
AD28

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
15 44
1
8
38 34 23 15 8 7 5 MAXBUS_SLEEP
C204
10uF
C236
INTREPID MAXBUS DECOUPLING

C348
10uF
20%
6.3V 2
CERM
805
10uF
C196
C239
0.22uF
20%
6.3V 2
CERM
805
20%
2 6.3V
CERM
402
10uF
20%
6.3V 2
CERM
805
C174
20%
2 6.3V
CERM
402
C173
0.22uF
20%
2 6.3V
CERM
402
C205
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V 2
CERM
805
C240
C206
C171
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C350
C259
C175
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C312
C237
20%
2 6.3V
CERM
402
C226
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C238
0.22uF
C95
20%
2 6.3V
CERM
402
C172
0.22uF
C207
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C313
20%
2 6.3V
CERM
402
C117
C118
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C94
C241
C287
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C286
C260
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C119
0.22uF
20%
2 6.3V
CERM
402
C158
C314
0.22uF
20%
2 6.3V
CERM
402
10uF
20%
6.3V
CERM 2
805
C231
10uF
20%
6.3V
CERM 2
805
C356
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V 2
CERM
805
C157 1
C315 1
20%
6.3V 2
CERM
805
20%
6.3V 2
CERM
805
10uF
10uF
20%
2 6.3V
CERM
402
C244
20%
2 6.3V
CERM
402
C144
0.22uF
20%
2 6.3V
CERM
402
C243
0.22uF
20%
2 6.3V
CERM
402
0.22uF
0.22uF
C147
0.22uF
10uF
C349
20%
2 6.3V
CERM
402
C212
20%
2 6.3V
CERM
402
C178
C246
0.22uF
C211
0.22uF
20%
2 6.3V
CERM
402
C242
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
C262
C179
C263
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C227
20%
2 6.3V
CERM
402
C177
20%
2 6.3V
CERM
402
C180
0.22uF
20%
6.3V
2 CERM
402
C297
0.22uF
20%
6.3V
2 CERM
402
C159
C161
C213
0.22uF
C197
0.22uF
20%
2 6.3V
CERM
402
C215
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
0.22uF
C142
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
0.22uF
0.22uF
C181
0.22uF
C162
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C280
0.22uF
C208
0.22uF
C279
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C264
0.22uF
20%
2 6.3V
CERM
402
0.22uF
C278
20%
2 6.3V
CERM
402
C214
0.22uF
20%
2 6.3V
CERM
402
+3V_MAIN
C209
57 Balls
4 X 10UF (0805)
72 X 0.22UF (0402)
INTREPID 3.3V DECOUPLING
INTREPID AGP I/O DECOUPLING

C371
C101 1
20%
6.3V 2
CERM
805
10uF
20%
2 6.3V
CERM
402
38 21 19 18 15 12 +1_5V_AGP
C128 1
30 Balls
4 X 10UF (0805)
29 X 0.22UF (0402)
INTREPID CORE DECOUPLING
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C288
0.22uF
20%
2 6.3V
CERM
402
0.22uF
+1_5V_MAIN
24 Balls
4 X 10UF (0805)
32 X 0.22UF (0402)
C176
C268
0.22uF
20%
6.3V
2 CERM
402
C217
0.22uF
20%
6.3V
2 CERM
402
C355
0.22uF
C267
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
21 Balls
4 X 10UF (0805)
24 X 0.22UF (0402)
1
C250
0.22uF
20%
6.3V
2 CERM
402
C298
0.22uF
20%
6.3V
2 CERM
402
C164 1
C395 1
10uF
10uF
20%
6.3V 2
CERM
805
C377
0.22uF
20%
6.3V
2 CERM
402
C216
C10 1
0.22uF
10uF
20%
6.3V
2 CERM
402
C375
0.22uF
20%
2 6.3V
CERM
402
C9 1
10uF
20%
6.3V
CERM 2
805
20%
6.3V 2
CERM
805
20%
6.3V
CERM 2
805
C33
0.22uF
20%
6.3V
2 CERM
402
C351
0.22uF
20%
2 6.3V
CERM
402
C184
0.22uF
20%
6.3V
2 CERM
402
C53
0.22uF
20%
2 6.3V
CERM
402
C43
0.22uF
20%
6.3V
2 CERM
402
C42
0.22uF
20%
2 6.3V
CERM
402
C35
0.22uF
20%
6.3V
2 CERM
402
C21
0.22uF
20%
2 6.3V
CERM
402
C261
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
C185
C60
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
C31
C52
0.22uF
20%
6.3V
2 CERM
402
C143
0.22uF
20%
2 6.3V
CERM
402
C199
20%
6.3V
2 CERM
402
0.22uF
C121
0.22uF
20%
2 6.3V
CERM
402
0.22uF
C123
20%
2 6.3V
CERM
402
C57
0.22uF
C19
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C281
10uF
20%
6.3V
CERM 2
805
C394
10uF
20%
6.3V
CERM 2
805
C228
0.22uF
20%
6.3V
2 CERM
402
C251
0.22uF
20%
6.3V
2 CERM
402
C230
0.22uF
20%
6.3V
2 CERM
402
C266
0.22uF
20%
6.3V
2 CERM
402
C265
0.22uF
20%
6.3V
2 CERM
402
C378
0.22uF
20%
6.3V
2 CERM
402
C357
0.22uF
C229
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C325
0.22uF
20%
6.3V
2 CERM
402
C393
0.22uF
20%
6.3V
2 CERM
402
C324
0.22uF
20%
6.3V
2 CERM
402
C323
0.22uF
20%
6.3V
2 CERM
402
C249
0.22uF
20%
6.3V
2 CERM
402
C422
10uF
C418
C417
10uF
20%
6.3V
CERM 2
805
10uF
C423
20%
6.3V
2 CERM
402
10uF
20%
6.3V 2
CERM
805
C407
20%
6.3V 2
CERM
805
C367
20%
2 6.3V
CERM
402
C321
0.22uF
20%
2 6.3V
CERM
402
C404
0.22uF
20%
2 6.3V
CERM
402
C337
0.22uF
20%
6.3V
2 CERM
402
C391
0.22uF
20%
6.3V
2 CERM
402
0.22uF
0.22uF
20%
6.3V
CERM 2
805
C292
C318
0.22uF
20%
2 6.3V
CERM
402
C400
0.22uF
20%
2 6.3V
CERM
402
C290
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C310
C295
44 Balls
4 X 10UF (0805)
51 X 0.22UF (0402)
C399
0.22uF
20%
2 6.3V
CERM
402
C386
0.22uF
20%
2 6.3V
CERM
402
C402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C317
C403
C410
0.22uF
20%
2 6.3V
CERM
402
C289
0.22uF
20%
2 6.3V
CERM
402
C397
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C291
0.22uF
C335
C369
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C387
0.22uF
C401
0.22uF
20%
2 6.3V
CERM
402
C352
20%
2 6.3V
CERM
402
0.22uF
20%
2 6.3V
CERM
402
C368
0.22uF
C334
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C370
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C390
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C480
C322
C384
0.22uF
20%
2 6.3V
CERM
402
C354
0.22uF
20%
2 6.3V
CERM
402
C388
0.22uF
20%
6.3V
2 CERM
402
C320
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C75
0.22uF
+2_5V_INTREPID
INTREPID DDR DECOUPLING
C34
0.22uF
20%
6.3V
2 CERM
402
38 15 10 9
C16
0.22uF
20%
6.3V
2 CERM
402
C392
C294
0.22uF
20%
2 6.3V
CERM
402
C389
0.22uF
20%
2 6.3V
CERM
402
C293
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C365
C385
C406
0.22uF
20%
2 6.3V
CERM
402
C309
0.22uF
20%
2 6.3V
CERM
402
C319
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C376
0.22uF
C183
0.22uF
20%
2 6.3V
CERM
402
C296
20%
2 6.3V
CERM
402
C108
0.22uF
20%
6.3V
2 CERM
402
C23
C122
0.22uF
20%
6.3V
2 CERM
402
C248
20%
6.3V
2 CERM
402
C120
0.22uF
20%
6.3V
2 CERM
402
C51
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C55
0.22uF
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C366
C210
0.22uF
20%
2 6.3V
CERM
402
C49
0.22uF
20%
2 6.3V
CERM
402
C32
0.22uF
20%
6.3V
2 CERM
402
C146
0.22uF
20%
6.3V
2 CERM
402
C59
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C18
C58
C36
0.22uF
20%
2 6.3V
CERM
402
0.22uF
20%
6.3V
2 CERM
402
C141
C163
20%
6.3V
2 CERM
402
C22
C17
C126
0.22uF
20%
6.3V
2 CERM
402
C20
20%
6.3V
2 CERM
402
C99
0.22uF
C98
0.22uF
20%
6.3V
2 CERM
402
C61
C396
0.22uF
20%
2 6.3V
CERM
402
C277
0.22uF
20%
6.3V
2 CERM
402
C96
C109
20%
6.3V
2 CERM
402
C44
C124
C54
0.22uF
C56
C27
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C29
0.22uF
C24
0.22uF
20%
6.3V
2 CERM
402
C50
20%
6.3V
2 CERM
402
0.22uF
0.22uF
20%
2 6.3V
CERM
402
0.22uF
0.22uF
C26
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
0.22uF
C28
0.22uF
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
2 6.3V
CERM
402
C145
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C76
0.22uF
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C30
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
0.22uF
C45
0.22uF
0.22uF
20%
6.3V
2 CERM
402
0.22uF
20%
6.3V
2 CERM
402
C125
20%
6.3V
2 CERM
402
C127
0.22uF
C100
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C405
0.22uF
20%
6.3V
2 CERM
402
C398
0.22uF
20%
2 6.3V
CERM
402
Intrepid Decoupling
C336
0.22uF
20%
6.3V
2 CERM
402

C316
0.22uF
20%
6.3V
2 CERM
402
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
OF
16 44
1
PCI1510 PULL-UPS
+3V_MAIN
39 30 26 24 20 18 17 14 MAIN_RESET_L
THIS PROPERLY SHUTS DOWN

CARDBUS POWER FOR PSUEDO-D3COLD
+3V_MAIN
+3V_MAIN
1
C813
10UF
5%
1/16W
MF
402
CBUS_PCI_PERR_L
17
C798
0.22UF
20%
6.3V
2 CERM
402
20%
6.3V
2 CERM
402
C790
R348
0.22UF
47
20%
6.3V
2 CERM
402
5%
1/16W
MF
2 402
5%
1/16W
MF
402
R756
10K
10K
0.22UF
20%
6.3V
2 CERM
805
R757
1
C795
CBUS_PCI_SERR_L
10K
U19
NO STUFF
C796
0.22UF
CBUS_SUSPEND_PU
R3731
17
R753
0.22UF
20%
2 6.3V
CERM
402
17
5%
1/16W
MF
402
C797
20%
2 6.3V
CERM
402
C791
NC
20%
2 6.3V
CERM
402
9
5
10K
5%
1/16W
MF
402 2
0.22UF
3
4
R7621
10K
5%
1/16W
MF
402 2
+2_5V_MAIN
15
14
16
TPS2211_SHDN_L_PU
A7
C13
D5
E1
M1
N11
N7
7
1
VCC
C789
0.22UF
20%
6.3V
2 CERM
402
NC
PCI1510_VR_EN_L
H10
D4
L8
39 37 26 24 12 9 PCI_AD<0>
N8
39 37 26 24 12 9 PCI_AD<1>
M7
39 37 26 24 12 9 PCI_AD<2>
L7
39 37 26 24 12 9 PCI_AD<3>
N6
39 37 26 24 12 9 PCI_AD<4>
K4
39 37 26 24 12 9 PCI_AD<5>
M6
39 37 26 24 12 9 PCI_AD<6>
L6
39 37 26 24 12 9 PCI_AD<7>
N5
39 37 26 24 12 9 PCI_AD<8>
N4
39 37 26 24 12 9 PCI_AD<9>
M2
39 37 26 24 12 9 PCI_AD<10>
M5
39 37 26 24 12 9 PCI_AD<11>
L4
CRITICAL
CLK_48_RSVD/NC
U26
VR_EN*
VR_PORT
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CLAMP FOR PC-CARD

CLAMP FOR PCI
PCI1510GGU
VCCCB
VCCP
VCCD0*
VCCD1*
BGA
VPPD0
VPPD1
CD1*/CCD1*
CD2*/CCD2*
IORD*/CAD13
IOWR*/CAD15
OE*/CAD11
CE1*/CC/BE0*
VS1*/CVS1
VS2*/CVS2
WE*/CGNT*
RDY/IREQ*/CINT*
RESET/CRST*
REG*/CC/BE3*
BVD1/CSTSCHG/STSCHG*/RI*
BVD2/SPKR*/CAUDIO
PULL-UP
WP/IOIS16*/CCLKRUN*
CE2/CAD10*
INPACK/CREQ*
WAIT/CSERR*
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES

TO MINIMIZE INDUCTANCE!
+5V_MAIN
TPS2211
V_12 SSOI AVPP
V_5_1
V_5_2 AVCC0
V_3_1 AVCC1
V_3_2 AVCC2
10
+VPP_CBUS_SW
17 38
11
+VCC_CBUS_SW
17 38
12
13
C773 1
VCCD0
VCCD1 CRITICAL
VPPD0
VPPD1
SHTDWN
GND
OC
0.1UF
20%
10V
CERM 2
402
C467
0.1UF
20%
10V
2 CERM
402
NC
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
B11
L3
N13
CBUS_VCCD0_L
L12
CBUS_VCCD1_L
K9
M11
PC CARD/CARDBUS CONNECTOR
CBUS_VPPD0
CBUS_VPPD1
CRITICAL
L13
CBUS_DET_1_L
17 39
B5
CBUS_DET_2_L
17 39
F12
CBUS_IORD_L
17
C11
CBUS_IOWR_L
17
G10
CBUS_OE_L
17
H13
CBUS_CE1_L
J9
QT500806-L111
M-ST-SM1
84
81
17
CBUS_DATA<3>
17
N3
39 37 26 24 12 9 PCI_AD<12>
39 37 26 24 12 9 PCI_AD<13>
K5
39 37 26 24 12 9 PCI_AD<14>
L5
39 37 26 24 12 9 PCI_AD<15>
M4
39 37 26 24 12 9 PCI_AD<16>
J4
39 37 26 24 12 9 PCI_AD<17>
H1
39 37 26 24 12 9 PCI_AD<18>
H3
PCI_AD<19>
H2
39 37 26 24 12 9 PCI_AD<20>
G2
39 37 26 24 12 PCI_AD<21>
G4
39 37 26 24 12 PCI_AD<22>
F1
39 37 26 24 12 PCI_AD<23>
C3
39 37 26 24 12 9 PCI_AD<24>
F3
39 37 26 24 12 9 PCI_AD<25>
E2
39 37 26 24 12 9 PCI_AD<26>
F4
39 37 26 24 12 9 PCI_AD<27>
B1
39 37 26 24 12 9 PCI_AD<28>
D2
39 37 26 24 12 9 PCI_AD<29>
E4
39 37 26 24 12 9 PCI_AD<30>
D3
R7671
39 37 26 24 12 9 PCI_AD<31>
E3
5%
1/16W
MF
402 2
39 37 26 24 12 PCI_CBE<0>
K6
39 37 26 24 12 PCI_CBE<1>
M3
39 37 26 24 12 PCI_CBE<2>
J2
12 PCI_CBE<3>
A1
22
39 37 26 24
N1
39 37 26 24 12 PCI_PAR
K1
39 37 26 24 12 PCI_IRDY_L
17 CBUS_PCI_SERR_L
17 CBUS_PCI_PERR_L
NO STUFF
R764
30 27 26 23 IO_RESET_L
47
J1
39 37 26 24 12 PCI_STOP_L
L1
39 37 26 24 12 PCI_TRDY_L
J3
39 37 26 24 12 PCI_DEVSEL_L
K2
C2
12 CBUS_PCI_GNT_L
C1
G1
R766
39 30 26 24 20 18 17 14 MAIN_RESET_L
10K
5%
1/32W
25V
47
5%
1/16W
MF
402
CBUS_MFUNC1_PD
17
10
CBUS_MFUNC2_PD
17
CBUS_MFUNC3_PD
17
CBUS_MFUNC4_PD
17
CBUS_MFUNC5_PD
17
CBUS_MFUNC6_PD
17
G3
12 CBUS_PCI_REQ_L
36 12 CLK33M_CBUS
RP39
K3
39 37 26 24 12 PCI_FRAME_L
CBUS_PCI_RESET_L
5%
1/16W
MF
402
L2
F2
CBUS_PCI_IDSEL
NC
M9
NC M8
N10
17 CBUS_SUSPEND_PU
14 CBUS_INT_L
K7
17 CBUS_MFUNC1_PD
N9
17 CBUS_MFUNC2_PD
L9
17 CBUS_MFUNC3_PD
K10
17 CBUS_MFUNC4_PD
M10
17 CBUS_MFUNC5_PD
N12
17 CBUS_MFUNC6_PD
L10
INTEGRATED
C/BE0*
C/BE1*
C/BE2*
C/BE3*
PAR
IRDY
SERR
IDSEL
PERR
FRAME
STOP
TRDY
DEVSEL
PRST
REQ
GNT
PCLK
F13
CBUS_DATA<5>
17
17 CBUS_DATA<12>
CBUS_DATA<6>
17
A6
CBUS_READY
17
17 CBUS_DATA<13>
10
12
11
39 17 CBUS_DET_1_L
D8
CBUS_RESET_L
17
CBUS_DATA<7>
17
A8
CBUS_REG_L
17
17 CBUS_DATA<14>
14
13
CBUS_CE1_L
17
C6
CBUS_BVD1_L
17
17 CBUS_DATA<15>
16
15
CBUS_ADDR<10>
17
CBUS_OE_L
17
D6
CBUS_BVD2_L
17
17 CBUS_CE2_L
18
17
A5
CBUS_WP_L
17
17 CBUS_VS1
20
19
G13
CBUS_CE2_L
17
22
21
CBUS_ADDR<11>
17
B8
CBUS_INPACK_L
17
17 CBUS_IORD_L
24
23
CBUS_ADDR<9>
17
17 CBUS_IOWR_L
26
25
CBUS_ADDR<8>
17
17 CBUS_ADDR<17>
28
27
CBUS_ADDR<13>
17
17 CBUS_ADDR<18>
30
29
B6
CBUS_WAIT_L
17
CBUS_DATA<0>
17
C4
CBUS_DATA<1>
17
A3
CBUS_DATA<2>
17
K11
CBUS_DATA<3>
17
K12
CBUS_DATA<4>
17
J13
CBUS_DATA<5>
17
J10
CBUS_DATA<6>
17
H12
CBUS_DATA<7>
17
C5
CBUS_DATA<8>
17
B4
CBUS_DATA<9>
17
B3
CBUS_DATA<10>
17
M12
CBUS_DATA<11>
17
J11
CBUS_DATA<12>
17
K13
CBUS_DATA<13>
17
J12
CBUS_DATA<14>
17
H11
CBUS_DATA<15>
17
GND
D1
17
17 CBUS_DATA<11>
17
A4
GRST
A11
CBUS_DATA<4>
17
CBUS_WE_L
D0/CAD27
D1/CAD29
D2/RSVD
D3/CAD0
D4/CAD1
D5/CAD3
D6/CAD5
D7/CAD7
D8/CAD28
D9/CAD30
D10/CAD31
D11/CAD2
D12/CAD4
D13/CAD6
D14/RSVD
D15/CAD8
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
A2
17
CBUS_VS2
D13
CBUS_ADDR<0>
1
L11
CBUS_VS1
A9
A0/CAD26 C7
A1/CAD25 D7
A2/CAD24 B7
A3/CAD23 D10
A4/CAD22 B12
A5/CAD21 C8
A6/CAD20 C9
A7/CAD18 A12
A8/CC/BE1* E11
A9/CAD14 F11
A10/CAD9 G11
A11/CAD12 G12
A12/CC/BE2* D9
A13/CPAR E12
A14/CPERR* D12
A15/CIRDY* C10
A16/CCLK B13
A17/CAD16 F10
A18/RSVD E13
A19/CBLOCK* A13
A20/CSTOP* E10
A21/CDEVSEL* D11
A22/CTRDY* C12
A23/CFRAME* A10
A24/CAD17 B10
A25/CAD19 B9
SPKROUT
RI_OUT/PME
SUSPEND
SM
B2
17
CBUS_ADDR<1>
17
CBUS_ADDR<2>
17
CBUS_ADDR<3>
17
CBUS_ADDR<4>
17
CBUS_ADDR<5>
17
CBUS_ADDR<6>
17
CBUS_ADDR<7>
17
CBUS_ADDR<8>
17
CBUS_ADDR<9>
17
CBUS_ADDR<10>
CBUS_ADDR<11>
17
17
CBUS_ADDR<14>
17
CBUS_ADDR<15>
17
CBUS_ADDR_16_UF
CBUS_ADDR<17>
17
CBUS_ADDR<18>
17
CBUS_ADDR<19>
17
CBUS_ADDR<20>
17
CBUS_ADDR<14>
17
33
CBUS_WE_L
17
36
35
CBUS_READY
17
17 CBUS_ADDR<21>
38
37
+VCC_CBUS_SW
17 38
40
39
42
41
+VPP_CBUS_SW
C783
2.2UF
20%
2 10V
CERM
805
C776
17 38
44
43
CBUS_ADDR<16>
2.2UF
20%
2 10V
CERM
805
17
17 CBUS_ADDR<22>
46
45
CBUS_ADDR<15>
17
17 CBUS_ADDR<23>
48
47
CBUS_ADDR<12>
17
17 CBUS_ADDR<24>
50
49
52
51
CBUS_ADDR<7>
17
17 CBUS_ADDR<25>
54
53
CBUS_ADDR<6>
17
17 CBUS_VS2
56
55
CBUS_ADDR<5>
R750
1
47
17
17 CBUS_RESET_L
58
57
CBUS_ADDR<4>
17
17 CBUS_WAIT_L
60
59
CBUS_ADDR<16>
62
61
CBUS_ADDR<3>
17
17 CBUS_INPACK_L
64
63
CBUS_ADDR<2>
17
17 CBUS_REG_L
66
65
CBUS_ADDR<1>
17
17 CBUS_BVD2_L
68
67
CBUS_ADDR<0>
17
17 CBUS_BVD1_L
70
69
72
71
CBUS_DATA<0>
17
17 CBUS_DATA<8>
74
73
CBUS_DATA<1>
17
17 CBUS_DATA<9>
76
75
CBUS_DATA<2>
17
17 CBUS_DATA<10>
78
77
CBUS_WP_L
17
80
79
83
82
38 17 +VPP_CBUS_SW
17
5%
1/16W
MF
402
17
CBUS_ADDR<22>
17
CBUS_ADDR<23>
17
CBUS_ADDR<24>
17
CBUS_ADDR<25>
17
CBUS_ADDR<13>
31
34
17 CBUS_ADDR<20>
38 17 +VCC_CBUS_SW
17
CBUS_ADDR<12>
CBUS_ADDR<21>
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
32
17 CBUS_ADDR<19>
17
39 17 CBUS_DET_2_L
CARDBUS
H4
K8
M13
N2

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531 B
SCALE

OF
17 44
1
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
U44
CRITICAL
TABLE_5_ITEM
338S0133
IC,ATI,M10,NO HEATSPREADER
27M OSC
38 21 19 18 12
+3V_GPU
(PLACE THE OSCILLATOR AND R189 AND R195
U44
38 21 19 18 16 15 12
+1_5V_AGP
B26
OMIT
CRITICAL
A26
B25
R1191
U44
37 12 AGP_AD<31>
37 12 AGP_AD<30>
37 12 AGP_AD<29>
37
12 AGP_AD<28>
37 12 AGP_AD<27>
37 12 AGP_AD<26>
37 12 AGP_AD<25>
37
12 AGP_AD<24>
37 12 AGP_AD<23>
37 12 AGP_AD<22>
37 12 AGP_AD<21>
37 12 AGP_AD<20>
37 12 AGP_AD<19>
37 12 AGP_AD<18>
37 12 AGP_AD<17>
37 12 AGP_AD<16>
37 12 AGP_AD<15>
37 12 AGP_AD<14>
37 12 AGP_AD<13>
37 12 AGP_AD<12>
37 12 AGP_AD<11>
37
12 AGP_AD<10>
37 12 AGP_AD<9>
37 12 AGP_AD<8>
37 12 AGP_AD<7>
RAGE_MOBILITY
M10-CSP64
64MB
AB30 AD31
BGA
AD_STB0
AB27 AD30
AA29 AD29
(1 OF 6)
AB28 AD28
AA30 AD27
AA27 AD26
Y30 AD25
AA28 AD24
W30 AD23
W27 AD22
V30 AD21
V28 AD20
V29 AD19
V27 AD18
U30 AD17
U28 AD16
R27 AD15
R29 AD14
P28 AD13
P30 AD12
P27 AD11
P29 AD10
N28 AD9
N30 AD8
M30 AD7
AD_STB1
AD_STBB0
AD_STBB1
AGP_BUSYB
AGPREF
AGPTEST
AGP8X_DETB
R127
47
N29
AGP_AD_STB<0>
W29
M28
Y29
AG28
5%
1/16W
MF
2 402
12 37
AGP_AD_STB<1>
12 37
AGP_AD_STB_L<0>
12 37
AGP_AD_STB_L<1>
12 37
AGP_BUSY_L
12
20K
INT_AGP_VREF
K29
U25
A27
B27
1
SUS_STAT AJ28
ST0 AF30
ST1 AF28
ST2 AE29
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0
RBFB
C62
AC28
AB29
0.1uF
AGP_SUS_STAT_L_PU
AGP_ST<0>
12
AGP_ST<1>
12
AGP_SBA<7>
12 37
L4
M3
L3
AGP_SBA<6>
(PLACE C1002 CLOSE TO AGPREF PIN)
AC27
AGP_SBA<5>
12 37
38 21 19 18 12
12 37
AC30
AD27
AGP_SBA<4>
12 37
M4
AGP_SBA<3>
12 37
AD30
AGP_SBA<2>
12 37
N2
N1
AGP_SBA<1>
12 37
AGP_SBA<0>
12 37
AGP_RBF_L
12 37
AE28
AD29
AE30
STP_AGPB AG29
SB_STB AC29
SB_STBS AD28
AGP_STP_L
RSTB_MSK AD24
ATI_RSTB_MSK
+3V_GPU
R172
20K
(PLACE R200 CLOSE TO OSC)
G2
GPU_SS
R200
27.0000M
1
ATI_OSC_OE
OE
OSC
SM-1
OUT
GND
R1891
287
VSS
2 ATI_CLK27M_OSC_SS
18
5%
1/16W
MF
402
1%
1/16W
MF
402 2
ATI_CLK27M_IN
19
R195
162
1%
1/16W
MF
402 2
B8
VSS
ATI_CLK27M_OSC
B9
A9
A8
C7
D7
C6
D6
N4
N3
5%
1/16W
MF
2 402
20%
6.3V
2 CERM
805
B11
A11
K4
K3
12
C78
4.7uF
A12
J1
AGP_ST<2>
5%
1/16W
MF
402 2
C9
B12
H1
J2
20%
16V
2 CERM
402
VCC
100K
D9
OMIT
20%
10V
CERM 2
402
CRITICAL 14
C10
H2
C63
0.01uF
20%
10V
2 CERM
402
NO STUFF
R1881
C12
D10
D23
AGP8X_DET_PU
C77
D12
12 38
GPU_AGP_TEST
38 +3V_ATI_OSC_SLEEP
0.1uF
D13
C13
D22
C23
K30
2
SM
B13
A13
C20
5%
1/16W
MF
2 402
A14
C21
D20
R159
FERR-EMI-100-OHM
A16
B14
D21
1
CLOSE TO ATI PIN AJ29)
L4
A17
B16
(2 OF 6)
A25
C22
10K
5%
1/16W
MF
402 2
+3V_SLEEP
RAGE_MOBILITY
M10-CSP64
64MB
BGA
C4
G30
D4
C3
G28
B30
D3
A5
37 12 AGP_AD<6>
37 12 AGP_AD<5>
37 12 AGP_AD<4>
38 21 19 18 12 +3V_GPU
37
R54
R53
24 20 17 14 MAIN_RESET_L
39 30 26
47
37 12 AGP_AD<2>
MAIN_RESET_L IS TOGGLED FOR SLEEP
37 12 AGP_AD<1>
10K
37 12 AGP_AD<0>
5%
1/16W
MF
402 2
5%
1/16W
MF
402
12 AGP_AD<3>
37 12 AGP_CBE<3>
37 12 AGP_CBE<2>
37 12 AGP_CBE<1>
37 12 AGP_CBE<0>
36 12 CLK66M_GPU_AGP
21 19 18 12
38
+3V_GPU
37 12 AGP_FRAME_L
37 12 AGP_IRDY_L
R43
37 12 AGP_TRDY_L
1K
37 12 AGP_STOP_L
1%
1/16W
MF
2 402
37 12 AGP_DEVSEL_L
37 12 AGP_PAR
37 12 AGP_REQ_L
37 12 AGP_GNT_L
R44
38 21 18
14 AGP_INT_L
1K
+GPU_MEM
1%
1/16W
MF
2 402
AGP_ATI_RESET_L
12 AGP_WBF_L
PLACE VERF VOLTAGE DIVIDER

CLOSE TO ATI M10 VREF PIN
R45
AGP_ATI_VREFG
1K
AGP_ATI_VREF
1%
1/16W
MF
2 402
R46
1K
1%
1/16W
MF
2 402
C11
0.1uF
20%
10V
2 CERM
402
C37
10uF
20%
6.3V
2 CERM
805
M27 AD6
M29 AD5
L28 AD4
L30 AD3
L27 AD2
L29 AD1
K28 AD0
DBI_LO Y25
DBI_HI Y27
ATI_MEMIO_HI
1
R70
4.7K
5%
1/16W
MF
402 2
U44
RAGE_MOBILITY
M10-CSP64
64MB
BGA
R138
47K
47K
5%
1/16W
MF
2 402
(6 OF 6)
VSS
M2
P3
B3
G3
A21
E1
B19
M15
U1
V3
N15
P15
AB1
R15
AC3
J30
T15
T12
J29
H30
H29
T14
W16
F30
F29
AF29 REQB
AF27 GNTB
AH29 INTAB
V16
E30
U16
T16
E29
J28
AH30 RSTB
AE27 WBF
R16
R17
J27
AK3 VREFG
D8 VREF
C19
A10
C5
P2
B18
A3
P4
G4
E2
A19
R3
U2
R104
4.7K
5%
1/16W
MF
2 402
B7 MEMVMODE0
B6 MEMVMODE1
R18
H28
H27
R19
F28
U6
F27
E28
AE15
VDDCI F18
E27
D30
P25
D29
C30
C29
V4
AB2
A30
AC4
VSS B23
K2
A29
A28
A23
D28
C28
B28
39 38 19 GPU_VCORE
60-OHM-EMI
L2
38 GPU_VCORE_VDDCI
C64
0.01uF
20%
2 16V
CERM
402
GPU_THERM_DP
GPU_THERM_DM
+GPU_MEM
18
C67
10uF
20%
2 6.3V
CERM
805
21 38
E8
J6
(PULL-UP to GPU_MEM_IO)
C8
AC22 NC
ATI_MEMTEST
C65
20%
2 16V
CERM
402
R118
R105
45.3
4.7K
C68
0.01uF
20%
2 16V
CERM
402
1%
1/16W
MF
2 402
5%
1/16W
MF
2 402
C25
D24
C24
D18
C18
D17
0.01uF
ATI_MEMIO_LO
1
D27
C27
D25
SM
A22
L1
TEST_YCLK
TEST_MLCK
MEMTEST
PLLTEST
L2
K1
B22
D+ AC10
D- AC11
ATI_MEMIO_HI
1
ATI_MEMVMODE1
OMIT
+1_5V_AGP
5%
1/16W
MF
402 2
A4
B4
B10
D5
T13
B29
C26
ATI_MEMVMODE0
38
19
16
12
15
18
21
B5
D11
T27 STOPB
T29 DEVSELB
R28 PAR
A15
C11
FOR 2.5 VDDR1

MEMVMODE0=1.8V
MEMVMODE1=GND
FOR 1.8 VDDR1
MEMVMODE0=GND
MEMVMODE1=1.8V
D16
B15
T30 IRDYB
T28 TRDYB
C16
5%
1/16W
MF
402 2
D26
5%
1/16W
MF
402
ATI_DBI_LO_PU
ATI_DBI_HI_PU
R1261
G27
4.7K
R158
12 37
AG30 PCICLK
U27 FRAMEB
P1 VSS
G29
R55
AGP_SB_STB_L
R30 CBEB1
N27 CBEB0
D19
ATI_MEMIO_LO
1
12 37
W28 CBEB3
U29 CBEB2
A18
R4
38 21 20 19 +1_8V_GPU
AGP_SB_STB
C17
D15
C15
D14
C14
B17
C66
0.01uF
20%
2 16V
CERM
402
S0=1;S1=M => -1.5% DOWN-SPREAD
A2
SPREAD SPECTRUM SUPPORT
B2
A1
B1
+3V_SLEEP
GPU_SS
L3
E4
E3
FERR-EMI-100-OHM
1
F3
F4
38
+3V_ATI_SS
SM
GPU_SS
GPU_SS
H3
H4
J3
C70
10uF
J4
C1
C2
NO STUFF
R1731
0
D1
5%
1/16W
MF
402 2
D2
F1
F2
G1
20%
2 10V
CERM
402
GPU_SS
GPU_SS
R181
7 CRITICAL
VDD
5%
1/16W
MF
2 402 18 ATI_CLK27M_OSC_SS
U47
CY25811
SOI
1 XIN/CLKIN
NC
XOUT
NC
FRSEL
SSCLK 5
ATI_SSCLK_UF
GPU_SS
G2
R1
R2
CY25811_S1
T1
CY25811_S0
R201
5%
1/16W
MF
2 402
ATI_SSCLK_IN
S1
S0
VSS
VSS
W1
W2
NO STUFF
1
T3
T4
5%
1/16W
MF
402 2
R37
0
U3
NO STUFF
1
R38
0
5%
1/16W
MF
2 402
U4
W3
W4
Y3
Y4
Y1
Y2
AA1
AA2
AC1
AC2
AD1
AD2
M10 AGP INTERFACE
AA3
AA4
AB3
AD3
AD4

0.01uF
20%
2 16V
CERM
402
SIZE
DRAWING NUMBER
REV.
051-6531
SHT
NONE
AB4
SCALE
19
V2
APPLE COMPUTER INC.
33
VSS
T2
V1
AE3
AE4
C69
C71
0.1uF
20%
2 6.3V
CERM
805
OF
18 44
1
TMDS TERMINATION
U44
TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN

CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
37 20
37 20
37 20
37 20
37 20
37 20
37 20
37 20
37 20
37 20
37 20
AH6 ZV_LCDDATA3
AJ6 ZV_LCDDATA4
AK6 ZV_LCDDATA5
INT_TMDS
R234
10K
5%
1/16W
MF
402 2
22
GPU_G
B AK26
22
GPU_B
AJ10
NC AK10
NC AG11
NC AH11
RSET AK25
R2SET AJ24
37 20 GPU_DVO_HSYNC
36 20 GPU_DVO_CLKP
AJ2 GPIO0
AK2 GPIO1
19 ATI_AGP_FBSKEW<0>
19 ATI_AGP_FBSKEW<1>
19 ATI_X1CLK_SKEW<1>
19 ATI_BUS_CFG<0>
19 ATI_BUS_CFG<1>
AH2 GPIO4
AJ1 GPIO5
AF4 GPIO6
75
22
22
1%
1/16W
MF
2 402
20%
2 16V
CERM
402
C256
0.01uF
C299
C305
0.01uF
20%
2 16V
CERM
402
20%
2 16V
CERM
402
0.01uF
AB6
F17 VDD15
C328
10uF
20%
2 16V
CERM
402
20%
2 6.3V
CERM
805
C232
0.01uF
20%
2 16V
CERM
402
C269
0.01uF
C300
0.01uF
20%
2 16V
CERM
402
20%
2 16V
CERM
402
22
GPU_Y
22
GPU_C
22
GPU_COMP
1
R245
DIGON AE13
BLON AF13
22 INV_ON_PWM
HPD1 AF11
GPU_HPD
+3V_GPU
1%
1/16W
MF
2 402
20%
2 16V
CERM
402
GPU VCORE - 1.2V

C167
10uF
C219
10uF
20%
2 6.3V
CERM
805
R254
75
1%
1/16W
MF
2 402
22 FP_PWR_EN
1%
1/16W
MF
402 2
R248
75
499
C252
0.22uF
20%
2 6.3V
CERM
805
C270
0.22uF
20%
2 6.3V
CERM
402
C301
0.22uF
20%
2 6.3V
CERM
402
C307
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C329
0.22uF
C332
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
1%
1/16W
MF
2 402
C186
0.22uF
20%
2 6.3V
CERM
402
22
12 18 19 21
38
G12
R25
AB25
G13
G14
G15
C220
0.22uF
C253
0.22uF
20%
2 6.3V
CERM
402
C271
0.22uF
20%
2 6.3V
CERM
402
C302
0.22uF
20%
2 6.3V
CERM
402
C311
0.22uF
20%
2 6.3V
CERM
402
OMIT
G16
G17
20%
2 6.3V
CERM
402
C330
0.22uF
C333
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
G20
G6
G21
G22
H6
P6
G23
AD26
G24
H7
V6
W6
H8
H23
H24
AC6
J7
J24
F7
F10
K7
AE10
K24
L7
F11
AE11
L24
M7
M24
F13 VDDC
F14
AE14
R711
10K
5%
1/16W
MF
2 402
R2471
R2531
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10K
GPU_AUXWIN
DDC1DATA AH28
DDC1CLK AH27
GPU_DVI_DDC_DATA
22
GPU_DVI_DDC_CLK
22
DDC2DATA AE12
DDC2CLK AF12
LVDS_DDC_DATA
LVDS_DDC_CLK
22 39
DDC3DATA AH26
DDC3CLK AH25
SI_DDC_DATA
20
SI_DDC_CLK
20
10K
C187
0.22uF
20%
2 6.3V
CERM
402
38 21 19 18 12
C221
0.22uF
C254
0.22uF
0.22uF
20%
2 6.3V
CERM
402
C282
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C303
C326
0.22uF
20%
2 6.3V
CERM
402
20%
2 6.3V
CERM
402
C331
0.22uF
20%
2 6.3V
CERM
402
C338
AF14
0.22uF
W26
AF15
20%
2 6.3V
CERM
402
+3V_GPU
G18
G19
AF5
F6
AD6
AE6
75
1%
1/16W
MF
2 402
G10
G11
(5 OF 6)
AG4
AH4
0.01uF
R257
715
G9
G25
AF25
C306
R256
Y_G AK23
C_R AK24
COMP_B AK22
RAGE_MOBILITY
M10-CSP64
64MB
BGA
AJ3
1
39 38 19 18 GPU_VCORE
ATI_R2SET
C166
10%
25V
2 X7R
402
75
1%
1/16W
MF
2 402
19 38
1000pF
R249
75
1%
1/16W
MF
2 402
0.01uF
19 21
+GPU_VDD15_UF
R246
ATI_RSET
AUXWIN AJ27
AK1 GPIO2
AH3 GPIO3
19 ATI_X1CLK_SKEW<0>
GPU_CORE_OK
C222
G7
G8
U44
T6
(PUT ALL CAPs BELOW ATI ASIC)
AH5 ZV_LCDCNTL2
AG5 ZV_LCDCNTL3
20 GPU_DVOD_DE
R240
AJ4 ZV_LCDCNTL0
AK4 ZV_LCDCNTL1
37 20 GPU_DVO_VSYNC
1
1
F12
L6
(500mA)
+1_5V_GPU_VDD15
38
ATI_HSYNC
NC AH10
G AK27
HSYNC AG26
H2SYNC AG24 NC
NC AG10
ZV_LCDDATA20_PU
GPU_R
AK7 ZV_LCDDATA9
AG8 ZV_LCDDATA10
NC AJ9
NC AK9
10K
5%
1/16W
MF
402 2
22
ATI_VSYNC
NC AH9
2
0805
R AK28
VSYNC AG27
V2SYNC AG25 NC
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
TSOP
AG7 ZV_LCDDATA6
AH7 ZV_LCDDATA7
AJ7 ZV_LCDDATA8
NC AG9
ROMCSB AE5 NC
OMIT
AH8 ZV_LCDDATA11
NC AJ8 ZV_LCDDATA12
NC AK8 ZV_LCDDATA13
+3V_GPU
EXT_TMDS
R228
(3 OF 6)
AJ5 ZV_LCDDATA0
AK5 ZV_LCDDATA1
AG6 ZV_LCDDATA2
GPU_DVOD<0>
GPU_DVOD<1>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
FERR-220-OHM
SI3446DV
1
L24
Q77
RAGE_MOBILITY
M10-CSP64
64MB
BGA
37 20
38 21 20 18 +1_8V_GPU 18 12
38 21 19
+1_5V_AGP
5
38 21 19 18 16 15 12
N7
N24
P7
P24
R7
AE17
AC25
R24
AE18
T7
T24
F23
F24
U7
19 ATI_BUS_CFG<2>
(NO ICT TEST)
ATI_GPIO7_SPN
ATI_GPIO8_PD
(NO ICT TEST)
ATI_GPIO9_SPN
38 21 19 18
(NO ICT TEST)
12 +3V_GPU
ATI_GPIO10_SPN
NO STUFF
2 402
1
MF
1/16W
10K
5%
5%
1K
1/16W
MF
1
402 2
(NO ICT TEST)
ATI_GPIO11_SPN
R223
(NO ICT TEST)
ATI_GPIO12_SPN
(NO ICT TEST)
ATI_GPIO13_SPN
R221
22 HPD_PWR_SNS_EN
18 ATI_SSCLK_IN
20 ATI_TMDS_DP<0>
20 ATI_TMDS_DN<1>
20 ATI_TMDS_DN<2>
20 ATI_TMDS_DP<2>
AJ12 TXCM
AK12 TXCP
20 ATI_TMDS_CLKN
20 ATI_TMDS_CLKP
AJ29 XTALIN
18 ATI_CLK27M_IN
5%
1/16W
MF
402
AF1 GPIO13
AE2 GPIO14
AK14 TX1P
AJ15 TX2M
AK15 TX2P
20 ATI_TMDS_DP<1>
TXOUT_U0N AH18
TXOUT_U0P AG18
TXOUT_U1N AH19
TXOUT_U1P AG19
TXOUT_U2N AH20
TXOUT_U2P AG20
TXOUT_U3N AH22
TXOUT_U3P AG22
TXCLK_UN AH21
TXCLK_UP AG21
TXOUT_L0N AK16
TXOUT_L0P AJ16
TXOUT_L1N AK17
TXOUT_L1P AJ17
TXOUT_L2N AK18
TXOUT_L2P AJ18
TXOUT_L3N AK20
TXOUT_L3P AJ20
TXCLK_LN AK19
TXCLK_LP AJ19
AJ13 TX0M
AK13 TX0P
AJ14 TX1M
20 ATI_TMDS_DN<0>
1K
AG2 GPIO10
AF2 GPIO11
AG1 GPIO12
AE1 GPIO15
M1 GPIO16
19 GPU_VCORE_CNTL_L
R229
AH1 GPIO7
AG3 GPIO8
AF3 GPIO9
NC
AJ30 XTALOUT
ATI_TESTEN AH24
NC
TESTEN
AJ26 SSIN
22 39
M10 Power Shut down Sequencing
22 37 39
LVDS_U0P
22 37 39
LVDS_U1N
22 37 39
22 37
39
22 37 39
38
LVDS_U2P
SOT-363
1
6 +2_5V_SLEEP_NECK1 1
(NO ICT TEST)
LVDS_U3P_TP
(NO ICT TEST)
CLKLVDS_UN
39 38 19 18
GPU_VCORE
BAS16TW
22 37 39
LVDS_L0N
22 37 39
LVDS_L0P
22 37 39
XW22
SM
LVDS_L1P
22 37 39
38 19 +GPU_VDD15_UF
22 37 39
LVDS_L2N
22 37 39
LVDS_L2P
22 37 39
(NO ICT TEST)
LVDS_L3P_TP
(NO ICT TEST)
CLKLVDS_LN
22 37 39
CLKLVDS_LP
22 37 39
DP6
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
NO STUFF
1
BAS16TW
SOT-363
3
4
NO STUFF
1
NO STUFF
1
R269
R271
10K
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
38
12 15 16
18 19 21
NO STUFF
1
R259
NO STUFF
1
R261
R263
NO STUFF
1
R266
NO STUFF
1
5%
1/16W
MF
2 402
NO STUFF
1
R270
F25
M25
R273
10K
2 +1_5V_AGP
V24
W7
N25
VSS W24
W25
V25
19
Y7
Y24
ATI_AGP_FBSKEW<1>
19
AA7
ATI_X1CLK_SKEW<0>
19
ATI_X1CLK_SKEW<1>
19
AA24
AB7
ATI_BUS_CFG<0> 19
AB24
ATI_BUS_CFG<1> 19
AC7
AC8
ATI_AGP_FBSKEW<0>
ATI_BUS_CFG<2> 19
AC23
NO STUFF
R272
R274
10K
10K
10K
10K
10K
10K
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
AC24
AD7
AD8
AD9
AD10
+GPU_VDD15_NECK
38
AD11
AD12
AD13
GPU VCORE SUPPLY
AD14
AD15
AD16
+PBUS
SSOUT AJ25 NC
B24 VSS
B20 VSS
5%
1/16W
MF
2 402
NO STUFF
1
10K
(GPIO0)
(GPIO1)
(GPIO2)
(GPIO3)
(GPIO4)
(GPIO5)
(GPIO6)
XW23
SM
GPU_VCORE_NECK
38
LVDS_L3N_TP
R265
+1_5V_AGP_NECK 38
SOT-363
2
5
CLKLVDS_UP
LVDS_L1N
NO STUFF
1
10K
DP6
XW20
SM
22 37 39
R262
10K
+1_8V_PVDD_NECK
22 37 39
LVDS_U3N_TP
R260
10K
XW24
SM
BAS16TW
38
NO STUFF
1
R258
5%
1/16W
MF
2 402
DP6
XW21
SM
+1_8V_ATI_PVDD
38 21
LVDS_U2N
+2_5V_SLEEP
LVDS_U0N
LVDS_U1P
U24
V7
AE24
AD17
AD18
VSS A20
VSS B21
AD19
AD20
A24 VSS
R430
R389
R339
C766
1%
1/16W
MF
2 402
AD22
AD23
1.2V = 0.8V * (1 + R332 / (R331//R333))
20%
25V
CERM 2
1206
20%
25V
CERM 2
1206
AD21
WHEN VCORE_CNTL HIGH => 1.2V
4.7UF
4.7UF
576K
5%
1/16W
MF
2 603
5%
1/16W
MF
2 402
C762
1M
WHEN VCORE_CNTL LOW => 1.0V

1.0V = 0.8V * (1 + R332 / R333)
Q51
SI7860DP
R3161
38 21 19 18 16 15 12 +1_5V_AGP
1778_SHDN_L_D3COLD
100K
100K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
GPU_VCORE_PWR_SEQ
DP1
DP1
BAS16TW
BAS16TW
SOT-363
6
1
SOT-363
2
5
SLEEP_L_LS5
10K
5%
1/16W
MF
402 2
Q6
GPU_VCORE_SEQ_L
2N3904
SOT-363
3
4
SM
R2031
33K
100K
5%
1/16W
MF
2 402
C494
R416
0.1uF
11
20%
25V
CERM 2
603
10
29 32 33 34 39
Q5
U16
SSOP
5 ITH
38 1778_VRNG
3 VRNG
1%
1/16W
MF
402 2
SM
2
38 1778_ITH_RC
C448
470pF
38
10%
50V
CERM 2
402
19 1778_GND
38
1778_FCB
C451 1R311
220pF
5%
25V
2 CERM
402
5%
1/16W
MF
2 402
21
19 GPU_CORE_OK
5%
1/16W
MF
2 402
C483
0.1uF
R3521
38
B00ST 16
TG 15
SW 14
SM
2 PGOOD
SGND
6
VFB 8
PGND
C708
22uF
D24
SMB
18.2K
C721
330UF
20%
10V
2 CERM
1210
20%
2 6.3V
POLY
SMD
+5V_MAIN
HIGH_VCORE_DIV
GPU_PWRMSR
B340LB
1
C719 1
C720 1
20%
6.3V 2
POLY
SMD
20%
6.3V 2
POLY
SMD
R307
330UF
330UF
100K
5%
1/16W
MF
2 402
1778_TG
38 1778_BG
GPU_PWRMSR
Q48
R410
SO-8-PWRPK
NO STUFF
1778_VFB 19
CRITICAL
SI7892DP
38 39
20%
10V
2 CERM
402
C882
10%
2 50V
CERM
402
OMIT
XW2
SM
1
GPU_VCORE_CNTL_L 1
10K
C515 1
0.1uF
20%
10V
CERM 2
402
C902
0.1UF
20%
10V
2 CERM
402
GPU_VCORE_CNTL
R3511
R804
GPU_PWRMSR20K
1
1%
1/16W
MF
1.82K 402
1%
2
1/16W
MF
2 402
HIGH_VCORE
SOT-363
2N7002DW
SOT-363

1
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE

2N7002DW
Q80
M10 CORE PWR/LVDS/TMDS

Q80
6
D
1%
1/16W
MF
2 402
3
D
2 VCORE_CNTL_RC
5%
1/16W
MF
402
GPU_PWRMSR
0.0022UF
13
19
1778_VFB
GPU_PWRMSR
1
R451
38 1778_BST
38
1%
1/16W
MF
402 2
39 38 19
2.1UH-11A
20%
25V
CERM 2
603
1778_ION
4.99K
18 19 38 39
L30
4 FCB
R332
GPU_VCORE_SW
0.1uF
ION 7
BG 12
1
38
C514 1
LTC1778
38 1778_ITH
20K
2N3904
38
5%
1/16W
MF
603
EXT INT VIN

VCC VCC
1 RUN/SS
2.2
CRITICAL
R340
5%
1/16W
MF
402 2
MBR0540
19
38
1778_SHDN_L
DCDC_EN
R236
1
GPU_VCORE_SEQ
D5
SM
+5V_MAIN
BAS16TW
1%
1/16W
MF
2 402
DP1
C473
20%
10V
2 CERM
1206
1778_GND
5%
1/16W
MF
402 2
R2941
63.4K
CRITICAL
GPU_VCORE
4.7UF
4.7uF
R3901
27 33 34 35
SO-8-PWRPK
CRITICAL
38 1778_VIN
1778_BST_RC
R306
5%
1/16W
MF
2 402
R341
1778_VCC
R388
NO STUFF
1
38
NO STUFF
1
+5V_MAIN
OF
19 44
1
+3V_SLEEP
SIL1162 DVI TRANSMITTER
R41
0
+3V_GPU_SI
20
5%
1/16W
MF
603
EXT_TMDS
RP58
20
+3V_GPU_SI
20
SI_TMDS_CLKN
10
EXT_TMDS
L14
TMDS_CLKN
20 22 37
TMDS_CLKP
20 22 37
SM1
RP58
400-OHM-EMI
2
38
SM-1
EXT_TMDS
1
EXT_TMDS
1
C130
EXT_TMDS
C132
20
10
SI_TMDS_CLKP
5%
1/16W EXT_TMDS
SM1
C165
RP59
100PF
5%
50V
2 CERM
402
20%
2 6.3V
CERM
805
+3V_SI_AVCC
EXT_TMDS
100PF
10UF
5%
2 50V
CERM
402
20
L13
5%
EXT_TMDS 1/16W
RP59
SI_TMDS_DN<0>
10
TMDS_DP<0>
20 22 37 39
TMDS_CLK_CMF
5%
1/16W
SM1
EXT_TMDS
L15
400-OHM-EMI
10
+3V_GPU_SI 20
EXT_TMDS
400-OHM-EMI
SI_TMDS_DP<0>
C
R205
TMDS_DN<0>
R218
1
38
SM-1
EXT_TMDS
EXT_TMDS
C14
C129
EXT_TMDS
10UF
10UF
20%
2 6.3V
CERM
805
20%
6.3V
2 CERM
805
+3V_SI_PLLVCC
EXT_TMDS
C131
100PF
38
C133
5%
2 50V
CERM
402
5%
2 50V
CERM
402
+3V_SI_VCC
EXT_TMDS
100PF
EXT_TMDS
C218
100PF
C233
100PF
5%
50V
2 CERM
402
5%
50V
2 CERM
402
20
5%
1/16W
SM1
SM-1
EXT_TMDS
1
20 22 37 39
C255
20
10UF
10
RP60
SI_TMDS_DN<1>
10
R222 R224
10
R202
330
EXT_TMDS
R212
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
EXT_TMDS
R237
19
19
R235
5%
1/16W
MF
402
27
26
SI_DDC_CLK
SI_DDC_DATA
SI_A2
SI_RST
24
25
47
44
SI_PD
SI_EDGE
37 19
37 19
37 19
37 19
37 19
37 19
37 19
37 19
37 19
37 19
37 19
37 19
19
37 19
37 19
36 19
20
18
GPU_DVOD<0>
GPU_DVOD<1>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
GPU_DVOD_DE
GPU_DVO_HSYNC
GPU_DVO_VSYNC
GPU_DVO_CLKP
SI_VREF
17
16
15
14
13
10
9
8
7
6
5
19
20
21
12
11
NO STUFF
1
R88
10K
5%
1/16W
MF
2 402
EXT_TMDS
1
R110
10K
5%
1/16W
MF
2 402
NO STUFF
1
R233
10K
1%
1/16W
MF
2 402
TMDS_D0_CMF
22 37 39
R211
TMDS_DN<2> 20
39 37 22 20
TMDS_DP<0>
22 37 39
ATI_TMDS_CLKN
10
SI_MSEN
TMDS_CLKN
SI_TMDS_DP<1>
SI_TMDS_DN<1>
SI_TMDS_DP<2>
SI_TMDS_DN<2>
10
TMDS_CLKP
39 37 22 20
20
INT_TMDS
20
RP27
20
19
ATI_TMDS_DP<0>
10
22 37 39
10
TMDS_DN<0>
C82 1
20 22 37 39
470PF
10%
50V
CERM 2
402
TMDS_DP<0>
20 22 37 39
TMDS_DP<1>
20 22 37 39
1%
1/16W
MF
402
5%
1/16W
SM1
TMDS_DN<2> 20
22 37 39
R220
49.9 2
1
49.9 2
1%
1/16W
MF
402
C102
470PF
10%
50V
2 CERM
402
20
5%
1/16W
SM1
20
+1_8V_GPU
20
INT_TMDS
TMDS_D2_CMF
RP32
18 19 21 38
19
ATI_TMDS_DP<1>
10
R204
39 37 22 20
EXT_TMDS
INT_TMDS
RP32
R231
1K
1%
1/16W
MF
2 402
EXT_SWING
20
TMDS_DP<1>
20 22 37
RP27
TMDS_DN<1> 20
470PF
10%
50V
2 CERM
402
TMDS_D1_CMF
ATI_TMDS_DN<0>
22 37 39
C89
R210
5%
1/16W INT_TMDS
SM1
20
TMDS_DN<0> 20
20 22 37
SM1
20
19
SI_TMDS_DP<0>
SI_TMDS_DN<0>
ATI_TMDS_CLKP
49.9 2
1%
1/16W
MF
402
5%
19
U5
D0
SIL1162
D1
TX0+ 36
TSSOP
TX0- 35
D2
D3
TX1+ 39
D4
EXT_TMDS
TX1- 38
D5
D6
TX2+ 42
TX2- 41
D7
CRITICAL
D8
D9
D10
D11
DE
HSYNC
EXT_SWING 30
VSYNC
IDCK+
VREF 2
IDCK-
10%
50V
CERM 2
402
INT_TMDS 1/16W
SI_TMDS_CLKP
SI_TMDS_CLKN
R219
49.9 2
1%
1/16W
MF
402
RP57
TXC+ 33
TXC- 32
C81 1
RP57
PD*
EDGE/HTPLG
470PF
10%
50V
2 CERM
402
470PF
19
MSEN 48
SCL/DK1
SDA/DK0
CTL3/A2
ISEL/RST*
TMDS_DP<2> 20
INT_TMDS
PGND
PGND
AGND
AGND
AGND
GND
GND
GND
THRML
PAD
30 26 24 18 17 14 MAIN_RESET_L
39
5%
1/16W
NO STUFF MF
402
45
29
4.99K
5%
1/16W
MF
2 402
10K
EXT_TMDS
10K
49
R99
23
37
1
NO STUFF
10K
10
5%
1/16W
SM1
28
R66
SI_TMDS_DN<2>
22 37 39
C88
10%
50V
CERM 2
402
5%
1/16W
SM1
PVCC1
46
PVCC2 40
AVCC 34
AVCC
22
VCC
3
VCC
31
43
NO STUFF
20
C80 1
20 22 37
RP61
RP61
EXT_TMDS
22 37 39
TMDS_CLKN
EXT_TMDS
EXT_TMDS
1%
1/16W
MF
402
470PF
TMDS_DN<1> 20
SI_TMDS_DP<2>
20
TMDS_DP<1> 20
5%
1/16W
SM1
EXT_TMDS
1%
1/16W
MF
402
5%
1/16W
SM1
EXT_TMDS
20
TMDS_CLKP
49.9 2
1
RP60
SI_TMDS_DP<1>
20%
6.3V
2 CERM
805
37 22 20
EXT_TMDS
49.9 2
1
19
EXT_TMDS
C284
0.1UF
20%
10V
2 CERM
402
EXT_TMDS
19
10
19
ATI_TMDS_DN<2>
10
10
20 22 37 39
TMDS_DN<2>
20 22 37 39
C87
470PF
10%
50V
CERM 2
402
10%
50V
2 CERM
402
5%
1/16W
SM1
5%
1/16W
SM1
5%
1/16W
MF
2 402
470PF
TMDS_DP<2>
49.9 2
1%
1/16W
MF
402
C79 1
20 22 37 39
RP28
RP28
1K
TMDS_DN<1>
INT_TMDS
INT_TMDS
R232
R214
1
1%
1/16W
MF
402
ATI_TMDS_DP<2>
1%
1/16W
MF
2 402
5%
1/16W
SM1
SI_VREF
1
ATI_TMDS_DN<1>
TMDS_DP<2>
5%
1/16W
SM1
49.9 2
1

SIZE
APPLE COMPUTER INC.
D
SCALE
DRAWING NUMBER
REV.
051-6531 B
20 44
SHT
OF
NONE
7
MM1571J (100mA MAX)
+2_5V_GPU
38 21
SOT-25A
CRITICAL
21 19
GPU_CORE_OK
VIN
VOUT
CONT NOISE
21
38
L58
GND
1
1
C379
+2_5V_GPU_A2VDD
20%
2 6.3V
CERM
805
20%
6.3V
2 CERM
805
38 21 20 19 18
10uF
0.01uF
C716
C374
38
20%
16V
2 CERM
402
C415
C437
0.01uF
20%
16V
2 CERM
402
20%
6.3V
2 CERM
805
C870
0.01uF
20%
16V
2 CERM
402
L59
+2_5V_GPU_A2VDD
AE21 A2VDD0
AF21 A2VDD1
38 21
+1_8V_GPU_AVDDQ
AJ23 A2VDDQ
1
1
C339
10uF
C363
(20mA)
38 +1_5V_AGP_GPU
20%
16V
2 CERM
402
C381
0.1uF
C420
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C446
0.1uF
20%
10V
2 CERM
402
C543
0.1uF
20%
10V
2 CERM
402
(AVDD+VDDDI=75mA)
+1_8V_GPU_VDDDI
C358
10uF
0.01uF
20%
6.3V
2 CERM
805
C361
20%
16V
2 CERM
402
C382
0.01uF
21 38
C372
0.01uF
C421
0.01uF
20%
16V
2 CERM
402
20%
16V
2 CERM
402
0402
1
CONT NOISE
C879
GND
21
C881
10UF
INT_TMDS
1
2
+1_8V_GPU_TP_PLL
0402
4 ATI_TPVDD_BYP
20%
2 6.3V
CERM
805
C880
0.01UF
INT_TMDS
10%
16V
2 CERM
402
C447
0.01uF
20%
16V
2 CERM
402
H5
AA25
J5
K5
K26
L26
L5
M26
M5
N5
N26
P26
P5
0.01uF
L63
FERR-220-OHM
MEMORY I/O
(1200mA)
38
C872
U26
U5
V5
V26
Y26
W5
AA26
C875
C873
0.1uF
0.1uF
20%
10V
2 CERM
402
C856
0.1uF
20%
10V
2 CERM
402
C860
20%
10V
2 CERM
402
C851
0.1uF
20%
10V
2 CERM
402
C855
0.1uF
20%
10V
2 CERM
402
C876
0.1uF
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C850
0.1uF
20%
6.3V
2 CERM
805
GPU_MEM_IO_FLT
1
10uF
R5
T5
R26 VDDP
T26
MEMORY CORE - 2.5V
2
0805
VSSRH0 F20
VSSRH1 M6
F5
G5
20%
16V
2 CERM
402
VSS1DI AG23
VSS2DI AF19
F19 VDDRH0
N6 VDDRH1
Y28
K27
38 21 18 +GPU_MEM
20%
16V
2 CERM
402
AH23 VDD1DI
AF20 VDD2DI
T25
C671
L67
FERR-220-OHM
A2VSSN0 AE19
A2VSSN1 AE20
10uF
20%
6.3V
2 CERM
805
D
38 21 18 +GPU_MEM
A2VSSQ AJ22
AVSSN0 AE22
AVSSN1 AE23
C871
L56
FERR-220-OHM
1
L69
FERR-220-OHM
VOUT 5+1_8V_ATI_TPVDD
PVSS AK30
AVSSQ AF22
K25
L25
SM
0.01uF
20%
6.3V
2 CERM
805
38
20
18 +1_8V_GPU
19
21
+1_8V_GPU_VDDDI
38 21 +GPU_MCLK
AGP 4X I/O - 1.5V
FERR-10-OHM-500MA
21 38
0402
AK29 PVDD
AF23 AVDD0
AF24 AVDD1
38 21
38 21 19 18 16 15 12 +1_5V_AGP
+1_8V_GPU_AVDDQ
VIN
1UF
(AVDD+VDDDI=75mA)
+1_8V_GPU_AVDD
10uF
L55
(2mA)
INT_TMDS
GPU_CORE_OK
10%
6.3V
2 CERM
603
0402
FERR-220-OHM
2
20%
16V
2 CERM
402
38 21
CRITICAL MM1571J
SOT-25A
21
19
0.01uF
0.1uF
20%
2 10V
CERM
402
INT_TMDS
L66
0.01uF
20%
16V
2 CERM
402
20%
6.3V
2 CERM
805
38
20
18 +1_8V_GPU
19
21
C364
C865
FERR-220-OHM
21 38
C360
INT_TMDS
+1_8V_GPU
0402
1
C438
10uF
C380
10uF
0.01uF
20%
16V
2 CERM
402
(140mA)
+2_5V_GPU
(21mA)
0402
FERR-220-OHM
1
38 21
38 +1_8V_GPU_PLL
ATI_PVDD_BYP
10%
6.3V
2 CERM
603
+2_5V_GPU
38 21 19 +1_8V_ATI_PVDD
1UF
GPU PLL - 1.8V
L65
1
U54
FERR-220-OHM
(Total PVDD = 66mA)
C889
U55
C861
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
Y5
AA5
C874
C847
C852
C857
C862
38
18 +GPU_MEM
21
38
+GPU_MEMCORE
VDDR1
AB26
AC26
(1800mA)
FERR-220-OHM
1
C383
0.1uF
+GPU_MCLK
C359
10uF
C362
0.01uF
20%
6.3V
2 CERM
805
20%
16V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
21 38
0402
C425
20%
10V
2 CERM
402
C866
0.1uF
20%
10V
2 CERM
402
C672
0.1uF
C715
20%
6.3V
2 CERM
805
0.01uF
38 21
C426
0.01uF
20%
2 16V
CERM
402
R2841
R722
0.01uF
+1_8V_SLEEP
C408
20%
2 16V
CERM
402
C450
0.01uF
20%
2 16V
CERM
402
C701
0.01uF
20%
2 16V
CERM
402
19 +1_8V_ATI_PVDD
38 21 18
5%
1/10W
FF
805 2
5%
1/10W
FF
2 805
L61
+1_8V_GPU 18
15 16 18 19 21 38
+1_8V_SLEEP
10uF
C428
0.01uF
20%
6.3V
2 CERM
805
+2_5V_SLEEP
C409
20%
16V
2 CERM
402
(40mA)
R728
R729
C867
5%
1/4W
FF
2 1210
5%
1/4W
FF
1210 2
2.5V
21
FERR-220-OHM
1
+1_8V_GPU_MEMPLL
AF9
38 21 +2_5V_GPU
20%
2 16V
CERM
402
L64
38
(350mA)
+2_5V_GPU_PNLIO
C412
10uF
0.01uF
20%
6.3V
2 CERM
805
+1_8V_GPU
C434
20%
16V
2 CERM
402
C868
0.01uF
20%
16V
2 CERM
402
L60
10uF
38
R299
20%
6.3V
2 CERM
805
5%
1/10W
FF
2 805
38
2.5V
C413
10uF
0
+2_5V_GPU 21
+3V_GPU
AE16 LVDDR_18
AF16 LVDDR_18
AG16 LVDDR_25
LVSSR0
LVSSR1
LVSSR2
LVSSR3
C647
INT_TMDS
0.1uF
20%
2 10V
CERM
402
R268
0
C414
0.1uF
(180mA)
+1_8V_GPU_PNLIO
1
C435
0.1uF
20%
10V
2 CERM
402
C864
0.1uF
20%
10V
2 CERM
402
C704
38 +3V_GPU_FLT
12 18 19 21
38
SM
1
C722
C848
10uF
0.1uF
20%
2 6.3V
CERM
805
20%
2 10V
CERM
402
C725
C853
0.1uF
C858
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C863
0.1uF
20%
2 10V
CERM
402
TXVSSR2 AH14
TXVSSR3 AH15
C849
0.1uF
20%
2 10V
CERM
402
C854
0.1uF
C859
0.1uF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
EXT_TMDS
AF18
AG14 TXVDDR2
AG15 TXVDDR3
0.1uF
20%
2 10V
CERM
402
AG17
AH17
DVOVMODE AH12
TXVSSR1 AH13
R255
ATI_DVODMODE 1
INT_TMDS
1
R251
0
+1_8V_GPU 18
19 20 21 38
5%
1/16W
MF
402
5%
1/16W
MF
2 402
3.3V IO SUPPLY
(Max Current varies, depends on usage)
M10 SHUT DOWN POWER SEQUENCING

OMIT
+2_5V_SLEEP
0.1uF
+3V_SLEEP
M10 POWER
38
C436
0.01uF
20%
16V
2 CERM
402
BAS16TW
2 +2_5V_SLEEP_NECK2
OMIT
0.01uF
20%
16V
2 CERM
402
XW30
SM
+3V_SLEEP_NECK 1
2 38 +1_8V_SLEEP_NECK

SOT-363
2
5

SIZE
OMIT
+1_5V_SLEEP
DP7
BAS16TW
2 38 +1_5V_SLEEP_NECK
SOT-363
1
6
BAS16TW
XW29
SM
SOT-363
3
4
DP7
XW28
SM
C869
OMIT
DP7
XW27
SM
20%
10V
2 CERM
402
GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V
+3V_GPU
L68
FERR-10-OHM-500MA
AH16
AG12 TXVDDR0
AG13 TXVDDR1
+1_8V_SLEEP
1
20%
10V
2 CERM
402
5%
1/16W
MF
2 603
LPVSS AJ21
TPVSS AJ11
MPVSS A6
12 18 19 21 38
3.3V
0.1uF
20%
2 10V
CERM
402
0402
5%
1/10W
FF
2 805
C327
LVDS/TMDS - 1.8V
FERR-220-OHM
+3V_SLEEP
R721
C304
20%
2 6.3V
CERM
805
+2_5V_SLEEP
SM
AF26
AF17 LVDDR_25
SM
38 21 20 19 18
AE25
AE26
A7 MPVDD
LVDS - 2.5V
E24
E25
AK21 LPVDD
AK11 TPVDD
(20mA)
FERR-10-OHM-500MA
VDDR3 AD25
0.01uF
20%
16V
2 CERM
402
FERR-10-OHM-500MA
+1_8V_DVO_F
AF10
E22
E23
18 19 20 21 38
L16
J25
J26
E21
20%
6.3V
2 CERM
805
C429
E7
AE8
C877 1 C878
20%
16V
2 CERM
402
+1_8V_GPU
EXT_TMDS
H25
AF8
AE9
0.01uF
20%
6.3V
2 CERM
805
F21
F22
E16 VDDR1
E17
10uF
C411
10uF
21 38
E26
F26
E15
+1_8V_GPU_TP_PLL
0402
+GPU_MEM 18
F16
R279
MEMORY PLL - 1.8V

38
F9
F15
E20
AE7
VDDR4 AF7
5%
1/16W
MF
2 603
20%
10V
2 CERM
402
F8
E18 VDDM
E19
AF6
20%
10V
2 CERM
402
0.01uF
Y6
AA6
E11
E14
0.01uF
20%
16V
2 CERM
402
L62
38 21 19 +1_8V_ATI_PVDD
(4 OF 6)
E10
ATI_MEMIO_HI
ATI_MEMIO_LO
1
E13
EXT_TMDS
38 +1_8V_GPU_PNLPLL
1.8V
1.5V
1.8V
20%
10V
2 CERM
402
0.1uF
K6
R6
H26
E9
0402
19 20 21 38
+GPU_MEM
LVDS PLL - 1.8V
FERR-220-OHM
E6
E12
RAGE_MOBILITY
M10-CSP64
64MB
BGA
E5
0.1uF
G26
U44
C373
20%
16V
2 CERM
402
+1_5V_SLEEP
+1_5V_AGP 12
OMIT
10uF
20%
10V
2 CERM
402
0.1uF
20%
10V
2 CERM
402
AC5
AD5
0805
L57
0.1uF
AB5
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
21 44
1
ANALOG FILTERING PLACE CLOSE TO CONNECTOR

LCFILTER
SM-220MHZ
1
19 GPU_B
2
3
VGA_B
FL1
DVI DDC CURRENT LIMIT

(55mA requirement per DVI spec)
C685
0.25%
2 50V
CERM
402
SM-220MHZ
+5V_SLEEP
VGA_G
D21
SM
CRITICAL
QH1112
F-RT-TH
33
VGA_R
1
C684
+3V_MAIN
36
17
TMDS_CONN_DP<0>
18
R655
22
19
TMDS_CONN_DN<2> 22
TMDS_CONN_DN<1> 22
TMDS_CONN_DP<2> 22
10
TMDS_CONN_DP<1> 22
11
CRITICAL
5
74AHC1G32
ATI_HSYNC
U56
(TMDS_DN<5>)
NC
(TMDS_DP<5>)
NC
R718
SM
VGA_HSYNC_BUF 1
33
VGA_HSYNC
NC
(TMDS_DN<4>)
12
NC
(TMDS_DN<3>)
21
NC
(TMDS_DP<4>)
13
5%
1/16W
MF
402
32
22
23
CRITICAL
19
R714
SM
4
U57
VGA_VSYNC_BUF 1
39 22
VGA_B
C1
C5B
2 VGA_VSYNC
VGA_R
22 39
39 22
C4
VGA_HSYNC
34
C710
0.01UF
C2
VGA_G
22 39
5%
1/16W
MF
402
GPU_DVI_DDC_CLK
100
R6801
2N7002DW
SOT-363
DVI_DDC_DATA 6
S 1
GPU_DVI_DDC_DATA
HPD_4V_REF
19
R663
100K
2N7002DW
5%
1/16W
MF
2 402
SOT-363
DVI_HPD
S 4
39 22 DVI_HPD_UF
GPU_HPD
2N3904
330
SM
2
Pulldown prevents
3904 from turning
on when DVI monitor
has active, selfpowered DDC clock
pullup.
C696
HPD_PWR_SW
LMC7211
SM
R694
10K
19
Q45
+PBUS
R681
1%
1/16W
MF
402 2
R696
R703
SOT-363
330
5%
1/16W
MF
2 402
SM
100K
10K
1%
1/16W
MF
402 2
2N7002DW
TP0610
HPD_ON
Q41
R686
4
S
DVI_HPD_DIV
5%
50V
2 CERM
402
CRITICAL
1%
1/16W
MF
402
100pF
20%
50V
2 CERM
603
R688
U46
2
4
1
5
Q42
0.1UF
1%
1/16W
MF
402 2
5%
1/16W
MF
2 402
5%
1/16W
MF
402
C1
20%
10V
2 CERM
402
68.1K
10K
10K
5%
1/16W
MF
402
19
R650
1
C5A
S 4
DVI_TRUN_ON_ILIM
5%
1/16W
MF
402 2
R671
Q35
5%
50V
2 CERM
402
22 39
5%
1/16W
MF
402
32
33
C3
100
R691
+5V_DDC_SLEEP
100pF
22 39
5%
1/16W
MF
402
C669
39
22 DVI_HPD_UF
16
74AHC1G32
ATI_VSYNC
VGA_VSYNC
Q38
(TMDS_DP<3>)
SOT-363
DVI_DDC_CLK
R649
39
22 DVI_DDC_CLK_UF
24
39 37 22 TMDS_CONN_CLKN
C706
(+5V_DDC SLEEP)
39 DVI_DDC_DATA_UF
5%
1/16W
MF
2 402
5%
1/16W
MF
402
5%
50V
2 CERM
402
15
VGA VSYNC BUFFERS

5
NC
6
14
39 37 22 TMDS_CONN_CLKP
2N7002DW
100pF
20
22 39
10K
100
23 30 34
Power key detect path

when system is running.
HPD normally driven to
3.3V. When power key
+3V_SLEEP
on remote device pressed,
HPD will be driven to 5V.
COMPARATOR ENABLED BY NV17MAP
GPIO.
R662
Q38
R670
1
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
19
4.7K
R6611
680
1
39 38 22
4.7K
TMDS_CONN_DN<0>
DVI_TURN_ON
DDC_CLK_ISO
22 39
22
0.25%
50V
2 CERM
402
R690
3
+3V_SLEEP
MBR0530
31
3.3PF
DVI_DDC_CLK_UF
3V LEVEL SHIFTERS
J14
C676
0.25%
50V
2 CERM
402
1
3
39 22
LCFILTER
22 38 39
Isolation required for DVI power switch
SM-1
3.3PF
FL3
SM-220MHZ
19 GPU_R
+5V_DDC_SLEEP_UF
+5V_DDC_SLEEP
4
1
CRITICAL
22 39
SM
SOFT_PWR_ON_L
DVI_TURN_ON_BASE
SM
400-OHM-EMI
38
DVI POWER SWITCH
TP0610
L23
F1
2
Q40
0.5AMP-13.2V
1
19 GPU_G
22 39
3.3PF
LCFILTER
CRITICAL
Power key detect path when

system is shutdown or asleep..
DDC_CLK is isolated from
NV17M DURING SHUTDOWN. WHEN
power key on remote device
is pressed, 5V will be driven
into DDC_CLK. Since host rails
will be low, TP0610 will turn
on, driving SOFT_PWR_ON_L low.
As host rails rise, TP0610
will turn off, as will remote
device path into DDC_CLK.
Isolation will be disabled as well.
EXTERNAL VIDEO (DVI) INTERFACE
FL2
CRITICAL
COMP_ENABLE
32
35
20K
HPD_ON_RC
Q44
2N3904
5%
1/16W
MF
402
100K
5%
1/16W
MF
402 2
HPD_BASE
R700
R704
SM
2
100K
NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
TMDS FILTERING PLACE CLOSE TO CONNECTOR

CRITICAL
L72
90-OHM-200MA
SM
39 37 20 TMDS_DN<0>
TMDS_CONN_DN<0>
22
39 37 20 TMDS_DP<0>
TMDS_CONN_DP<0>
22
37 20
TMDS_CLKP
37 20
TMDS_CLKN
CRITICAL
5%
1/16W
MF
2 402
PLACE NEAR C5A & C5B
5%
1/16W
MF
402 2
TMDS_CONN_CLKP
22 37 39
TMDS_CONN_CLKN
22 37 39
LCD INTERFACE
CHGND1
90-OHM-200MA
SM
SYM_VER-1
SYM_VER-1
4 TMDS_CONN_DN<1>
39 37 20 TMDS_DN<2>
22
3 TMDS_CONN_DP<1>
39 37 20 TMDS_DP<2>
22
3 TMDS_CONN_DP<2>
C416
38
GPU_TV_GND1
CHGND4
CRITICAL
+PBUS
J6
G-501973
L33
F-RT-SM
34
FERR-1K-OHM-EMI
R3421 R3201
100K
TV_GND1
100K
C452
C449 1
19
GPU_Y
39 37 19
LVDS_L0N
39 37 19
LVDS_L0P
5%
1/16W
MF
402 2
10
FP_PWR_EN_L
39 37 19
LVDS_L1N
11
39 37 19
LVDS_L1P
12
0.001uF
20%
50V
CERM 2
402
20%
50V
CERM 2
402
CHGND4
C707
CRITICAL
1
3.3UH
C724
560PF
19
39 37 19
LVDS_L2P
15
39 37 19
CLKLVDS_LN
17
39 37 19
CLKLVDS_LP
18
L27
LVDS_U0N
20
39 37 19
LVDS_U0P
21
3
1
A
1
38 GPU_TV_GND2
TV_COMP
LCD POWER SWITCHES
39
10
R400
100K
5%
1/16W
MF
2 402
560PF
L28
FERR-10-OHM-500MA
10%
50V
CERM 2
402
R391
TV_GND2
38 39
SM
LCD_DIGON_L
C717
20%
50V
CERM 2
603
100K 2
38
C484
2200pF
1
5%
50V
CERM
603
39 37 19
LVDS_U1N
23
39 37 19
LVDS_U1P
24
39 37 19
LVDS_U2N
26
39 37 19
LVDS_U2P
27
39 37 19
CLKLVDS_UN
29
39 37 19
CLKLVDS_UP
30
L6
10UF
6
5
2
1
TSOP
SI3443DV
Q11
C474 1
C749
0.001UF
39
20%
50V
CERM 2
402
BRIGHT_PWM
SM-1
0.001UF
C552
20%
10V
CERM 2
402
19
INV_ON_PWM
U24
32
74LVC32
CHGND2
TSSOP
3
BRIGHT_PWM_UF
INVERTER EXPECTS ACTIVE HIGH SIGNAL
VIDEO CONNECTORS
SHARES LOGIC WITH KB RESET SIGNALS (PG 28)
R724
0
1
CHGND4

5%
1/16W
MF
402

C744
CHGND4
20%
50V
CERM
603
CHGND1
SIZE
0.01uF
1
14
1
0.1UF
SM
C739
20%
50V
2 CERM
402
2N7002
FP_PWR_EN
20%
50V
2 CERM
402
400-OHM-EMI
1
20%
50V
CERM
402
0.001uF
Q8
22 19
+5V_INV_SW
L31
SC70-6
0.001uF
+3V_PMU
C500
SM
2
39
38
33
FERR-250-OHM
LCD_PWREN_L
5%
1/16W
MF
402
0.01UF
Place GND shorts at

graphics controller
5 G1
FP_PWR_EN
28
CHGND1
C713
C440
S1
25
+3V_MAIN
11
10%
50V
CERM 2
402
39
+3V_LCD_SW
560PF
XW13
SM
TV_Y
0603
C714
22 19
22
SM-2MT
5
20%
2 50V
CERM
402
1
39 37 19
J7
C746
19
39
RT-TH
10%
50V
CERM 2
402
3.3UH
1
GPU_COMP
0.001UF
20%
2 6.3V
CERM
805
FDG6324L
MINIDIN
560PF
10%
50V
CERM 2
402
G2
6
Q7
14
MH1177
TV_C
J15
10%
50V
CERM 2
402
0603
C718
CRITICAL
2
SM-1
16
560PF
L29
560PF
GPU_C
13
LVDS_L2N
C702 1
19
D2
4 S2
D1
39 37 19
0603
10%
50V
CERM 2
402
400-OHM-EMI
0.001uF
L32
SC70-6
1
39 19 LVDS_DDC_DATA
38 39
+5V_INV_UF_SW 38
FDG6324L
R317
20%
50V
CERM 2
603
L25
NC
5
6
0.01UF
3.3UH
39 19 LVDS_DDC_CLK
SM
(LVDS DDC POWER)
+12_8V_INV
SM
Q7
5%
1/16W
MF
402 2
NO STUFF
+5V_MAIN
38 +3V_LCD
100K
5%
1/16W
MF
402 2
L26
C712
39
38
22
FERR-10-OHM-500MA
1
5%
1/16W
MF
2 402
INVERTER INTERFACE
20%
50V
CERM 2
402
22
S-VIDEO/COMP OUT INTERFACE

Place GND shorts at
graphics controller
XW12
SM
R705
39 37 20 TMDS_DP<1>
68K
20%
6.3V
CERM 2
1210
SOT-363
R2131
5%
1/16W
MF
402 2
0.001uF
+3V_SLEEP
4 TMDS_CONN_DN<2>
47UF
2N7002DW
19 HPD_PWR_SNS_EN
LVDS INTERFACE
100K pull-ups are for

no-panel case (development)
Panel has 2K pull-ups
L74
90-OHM-200MA
SM
C703
Q41
100K
PLACE NEAR 3, 11 & 19
CRITICAL
L73
39 37 20 TMDS_DN<1>
SM
R1
R706
SYM_VER-1
SYM_VER-1
NEED PULL-DOWN BECAUSE THIS

SIGNAL IS TRISTATED INITIALLY
L21
165-OHM
COMP_DISABLE
NOTE: DVI_HPD SHARES Q68 WITH ALS

BECAUSE OF BOARD REAL ESTATE
CHGND5
CRITICAL
5%
1/16W
MF
402 2
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
CHGND2
SHT
NONE
REV.
051-6531
OF
22 44
1
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
U52
CRITICAL
BOOT BANGER E2PROM
TABLE_5_ITEM
341S1194
+3V_MAIN
IC,LMU,P84
+3V_MAIN
MLB - ALS SENSOR
LMU
C673
0.1UF
+3V_MAIN
BBANG
R533
30 27 26 17
R550
V+
R606
1
MLB_PHOTODIODE
1K
6 MAX4236EUTT
SOT23-6
1
MLB_ALS_OUT_FB
U40
MLB_ALS_OP_IN
1K
MLB_ALS_OUT
23
BS520
2
TH
TEST
RESET*
C4 OSC1 XIN
B3 OSC2 XOUT
ST7_OSC1
ST7_OSC2
R605
5.1M
C670
5%
1/16W
MF
2 402
PA7/TDO
PA6/SDAI
PA5/RDI
PA4/SCLI
PA3
PA2
PA1/ICCDATA
PA0/ICCCLK
OMIT
R617
120K 2
1
0.01UF
20%
16V
2 CERM
402
R618
15K
1K
1%
1/16W
MF
402 2
R568
CRITICAL
Y4
0.22UF
1
20%
6.3V
CERM
402
C654
23 MLB_ALS_GAIN_SW
ST7_XTAL_IN
1
C648
27PF
5%
50V
CERM 2
402
2N7002DW
8X4.5MM-SM
27PF
Q35
D
2
5%
1/16W
MF
2 402
8.000M
GAIN_SETTING2
20%
10V
2 CERM
402
C675
1%
1/16W
MF
2 402
C637
0.1UF
5%
1/16W
MF
402
R615
5%
50V
2 CERM
402
NC
C1
NC
C2
NC
D1
NC
E5
NC
D6
NC
D5
NC
C5
PB7/SS*
PB6/SCK
PB5/MISO
PB4/MOSI
PB3/OCMP2_A
PB2/ICAP2_A
PB1/OCMP1_A
PB0/ICAP1_A
NC
B6
NC
LOAD CAPACITANCE = 16PF
SDA
SCL
PC5/EXTCLK_A/AIN5
PC4/OCMP2_B/AIN4
PC3/ICAP2_B/AIN3
PC2/MCO/AIN2
PC1/OCMP1_B/AIN1
PC0/ICAP1_B/AINO
1
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
197S0008
197S0040
BOM OPTION
REF DES
COMMENTS:
ST7_SENSOR4_SCK_PD
23
F5
INT_I2C_DATA0
11 13 23 39
Y4
ALT FOR SIWARD
TABLE_ALT_ITEM
11 13 23 39
INT_I2C_CLK0
11 13 23 39
ST7_SENSOR4_SDA_PD
23
E6
INT_I2C_CLK0
11 13 23 39
C6
JTAG_CPU_TDI
5 39
D4
JTAG_CPU_TRST_L
5 39
A6
ST7_SENSOR5_SCK_PU
23
A5
ST7_SENSOR5_SDA_PU
23
R532
R7731
10K
25 30 33 35 39
ST7_PB6_PD
23
B1
SUTRO_ALS_GAIN_SW
24 39
B2
BBANG_HRESET_L
23 39
C3
PMU_CPU_HRESET_L
23 30
SLEEP_LED_SW_L
23
MLB_ALS_GAIN_SW
23
F2
3
SLEEP_LED_UF
Q75
23
ST7_SLEEP_LED_H
SOT-363
10K
5%
1/16W
SM1
24 39
PMU_LID_CLOSED_L
(PMU_PWM)
SM
1
4.7K 2
2N7002DW
RP52
SUTRO_ALS_OUT
E2
SLEEP_LED_I
R776
MLB_ALS_OUT
23
F4
ST7_SLEEP_LED_H
23
D3
JTAG_CPU_TMS
5 39
400-OHM-EMI
10K
SM-1
5%
1/16W
MF
2 402
PMU_SLEEP_LED
E3
L52
+3V_PMU
23 30
5%
1/16W
MF
402
6
D
5
ST7_KBD_LED_OUT
+3V_MAIN
23
F1
5%
1/16W
MF
402 2
2N3906
R777
SLEEP
BBANG_JTAG_TCK
100
5%
1/16W
MF
402 2
Q74
A1
E1
R772 1
2.2K
5%
1/16W
MF
2 402
SLEEP_LED_L
A2
D2
+5V_MAIN
EEPROM_WP_PD
BBANG
1
VSS
F6
F3
INT_I2C_DATA0
WC*
E4
SOT-363
BBANG
CRITICAL
3 E2
BGA
B5
ST7_RESET_L A3
20%
2 10V
CERM
402
VCC
U32
2 E1
SLEEP LED
0.1UF
16KX8_M24128B
SOI
1 E0
EEPROM_ADDR
ST72264G2H1
256KX8
ST7_ICP_SEL_PD
SHDN_L
CRITICAL
PD1
U52
5%
1/16W
MF
2 402
23
1%
1/16W
MF
402
V-
1%
1/16W
MF
402
47
R619
1
20%
2 10V
CERM
402
VDD
5%
1/16W
MF
2 402
C663
0.1UF
B4
C638
10K
IO_RESET_L
CRITICAL
MLB_ALS_OP_COMP
BBANG
20%
2 10V
CERM
402
NOTE: KEEP L39 CLOSE TO C781

2
R598
100K
SLEEP_LED
5%
1/16W
MF
2 402
VSS
C828
25 39
+3V_PMU
A4
C655
0.1UF
SPIDEY FLEX
+5V_SLEEP
L47
R587
39 38 +3V_HALL_EFFECT
CRITICAL
J24
400-OHM-EMI
40FLH-SM1-TB
F-RT-SM
41
39 38 +5V_TPAD_SLEEP
20%
2 10V
CERM
402
SM-1
C660
0.001UF
22
Q75
C636
470pF
2N7002DW
0.1UF
SOT-363
20%
2 10V
CERM
402
PMU_SLEEP_LED_L
10%
50V
CERM 2
603
30
BOOT BANGING SIGNAL DEFINITION
5%
1/16W
MF
402
20%
50V
2 CERM
402
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)

2/ PMU_HRESET_L (3V INPUT INTO LMU)
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
KEYBOARD PULLUPS
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)

5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
C814
0.001UF
20%
2 50V
CERM
402
39 30 KBD_Y<7>
39 30 KBD_Y<6>
39 30 KBD_Y<5>
4
5
30 KBD_Y<3>
39
+3V_MAIN
Q73
2N3906
30 NUMLOCK_LED_L
SM
1
R770
NUMLOCK_LED
200
39 30 KBD_Y<1>
39 30 KBD_Y<0>
39 30 23 KBD_X<9>
10
39 30 23 KBD_X<8>
11
39 30 23 KBD_X<7>
12
39 30 23 KBD_X<6>
13
39 30 23 KBD_X<5>
14
39 30 23 KBD_X<4>
15
39 30 23 KBD_X<3>
18
39 30 23 KBD_X<2>
19
39 30 23 KBD_X<1>
20
39 30 23 KBD_X<0>
21
39 30 23 KBD_SHIFT_L
22
39 30
R582
2
200
39 30 23 KBD_COMMAND_L
25
26
39 30 23 KBD_FUNCTION_L
27
1
SM-1
39 30 23
KBD_X<7>
10
39 30 23
KBD_X<8>
39 30 23
KBD_X<9>
39 30 23
KBD_X<2>
39 30 23
KBD_X<4>
39 30 23
KBD_X<3>
39 30 23
KBD_X<5>
23
39 38 23
KBD_LED2_OUT
32
39 38 23
KBD_LED1_OUT
33
39
LID_CLOSED_L
39
TPAD_F_RXD
U4
JTAG_CPU_TCK
5 39
23
ST7_SENSOR5_SCK_PU
INPUTS ARE 3V TOLERANT

23
ST7_SENSOR4_SDA_PD
23
ST7_SENSOR4_SCK_PD
23
ST7_PB6_PD
39 30 23
KBD_FUNCTION_L
39 30 23
KBD_CONTROL_L
10
39 30 23
KBD_SHIFT_L
39 30 23
KBD_COMMAND_L
NC
R39
10K
5%
1/16W
MF
402 2
R40
10K
39 30 23
KBD_OPTION_L
39 30 23
KBD_X<1>
39 30 23
KBD_X<0>
30 23
PMU_CPU_HRESET_L
39 23
BBANG_HRESET_L
23
ST7_ICP_SEL_PD
U2
10K
10K
5%
1/16W
SM1
5%
1/16W
SM1
5 SN74AUC1G08
SC70-5
RP53
RP53
5%
1/16W
MF
402
5%
1/16W
MF
402 2
9
6
5%
1/16W
SM1
R6
BBANG
10K
5%
1/16W
SM1
NO_BBANG
10K
RP52
RP52
MAXBUS_SLEEP
10K
BBANG
+3V_SLEEP
5%
1/32W
25V
10K
5%
1/16W
SM1
CPU_HRESET_L
5 7 39
B BBANG
39
TPAD_F_TXD
KB LED DRIVER
38
39
INPUTS ARE 3V TOLERANT
R581
17.4K2
40
CRITICAL
L48
U35
42
MAX1916
400-OHM-EMI
ST7_KBD_LED_OUT
LMU/BOOTBANGER/SPIDEY
23
1%
1/16W
MF
402
SM-1
39 38
6 LED1
5 LED2
23 KBD_LED1_OUT
39 38 23 KBD_LED2_OUT
C815
0.001UF
0.001UF
20%
2 50V
CERM
402
20%
50V
CERM 2
402
C816
NC
0.001UF
20%
50V
2 CERM
402
SET 3
EN 1
4 LED3
GND
2
KBD_LED_SET
KBD_LED_EN

R552
1
2.2K 2
5%
1/16W
MF
402
R534
10K
5%
1/16W
MF
2 402
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
SOT23-6
SM-1
B BBANG
37
C656
5%
1/16W
SM1
RP53
36
400-OHM-EMI
BBANG_JTAG_TCK
10K
35
L11
TPAD_TXD
PULL-UP FOR I2C (IN-CIRCUIT PROGRAMMING)
SM
SM-1
30
BBANG_TCK_EN
5 SN74AUC1G08
SC70-5
ST7_SENSOR5_SDA_PU
34
RP53
23
RP42
31
39 25 PWR_BUTTON_L
L49
38 34 23 16 15 8 7 5
30
400-OHM-EMI
PMU_LID_CLOSED_L
10K
5%
1/16W
MF
402 2
KBD_X<6>
29
39 30 23 KBD_ID
400-OHM-EMI
34 30 22 SOFT_PWR_ON_L
R62
5%
1/32W
25V
28
39 KBD_CAPSLOCK_LED
L46
+3V_MAIN
LMU PULL-DOWNS
10K
39 30 23
MAXBUS_SLEEP
BBANG
RP43
24
23 KBD_OPTION_L
39 30 23 KBD_CONTROL_L
5%
1/16W
MF
402
38 34 23 16 15 8 7 5
SM
CAPSLOCK_LED
TPAD_RXD
KBD_ID
23
30
100K 2
1
5%
1/16W
MF
402
17
SM
1
30 CAPSLOCK_LED_L
30 23
39 30 23
16
39 KBD_NUMLOCK_LED
+3V_MAIN
2N3906
39 30 KBD_Y<2>
5%
1/16W
MF
402
Q33
R771
39 30 KBD_Y<4>
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
+3V_PMU
OF
23 44
1
HARD DRIVE INTERFACE (UATA100)

+3V_SLEEP
WIRELESS INTERFACE
EIDE SERIES TERMINATION
3V_HD_LOGIC
+3V_SLEEP
37 13
EIDE_DATA<8>
RP13
37 13
EIDE_DATA<10>
37 13
EIDE_DATA<9>
33
33
EIDE_OPTICAL_DATA<8> 24
EIDE_OPTICAL_DATA<10>
33
EIDE_OPTICAL_DATA<9> 24
39
37 39
39 12
RP49
37 13
37 13
33
EIDE_DATA<11>
5%
1/16W
SM1
EIDE_DATA<12>
RP10
37 13
EIDE_DATA<14>
37 13
EIDE_DATA<13>
33
EIDE_DATA<15>
37 13
EIDE_DATA<2>
33
37 13
EIDE_DATA<1>
37 13
33
EIDE_DATA<3>
33
33
33
AIRPORT_PCI_REQ_L
33
UIDE_DATA<3>
PCI_AD<31>
CLK33M_AIRPORT
10
12
11
39 37 26 17 12 9
PCI_AD<27>
15
39 37 26 17 12 9
PCI_AD<25>
18
17
20
24 37 39
39 37 26 17 12
PCI_CBE<3>
39 37 26 17 12
PCI_AD<23>
37 13
PCI_AD<18>
AIRPORT_PCI_GNT_L
PCI_AD<30>
PCI_AD<28>
19
PCI_AD<26>
22
21
24
23
26
25
PCI_AD<24>
12 39
37 13
R745
9 12 17 26 37 39
9 12 17 26 37 39
39 AIRPORT_IDSEL
27
PCI_AD<22>
12 17 26 37 39
29
PCI_AD<20>
9 12 17 26 37 39
32
31
PCI_PAR
34
33
PCI_AD<18>
9 12 17 24 26 37 39
36
35
PCI_AD<16>
9 12 17 26 37 39
37
PCI_CBE<2>
PCI_IRDY_L
40
39
42
41
44
43
46
45
48
47
24 37 39
AIRPORT_CLKRUN_L
24 37 39
39 37 26 17 12 9
PCI_CBE<1>
PCI_AD<14>
PCI_FRAME_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
37 13
33
UIDE_DATA<7>
33
HD_DATA<1>
24 37
R81
37 13
UIDE_DATA<5>
37 13
33
UIDE_DATA<4>
37 13
37 13
UIDE_DATA<8>
12 17 26 37 39
37 13
UIDE_DATA<9>
50
49
PCI_AD<15>
9 12 17 26 37 39
52
51
PCI_AD<13>
9 12 17 26 37 39
PCI_AD<12>
54
53
PCI_AD<11>
9 12 17 26 37 39
39 37 26 17 12 9
PCI_AD<10>
56
55
ROM_RW_L
58
57
PCI_AD<9>
9 12 17 26 37 39
39 37 26 17 12 9
PCI_AD<8>
60
59
PCI_CBE<0>
39 37 26 17 12 9
PCI_AD<7>
37 13
UIDE_DATA<10>
33
HD_DATA<6>
5%
1/16W
SM1
24 37
24 37
HD_DATA<8>
24 37
24 37
RP4
4
RP3
33
HD_DATA<5>
HD_DATA<4>
5%
1/16W
SM1
12 17 26 37 39
33
HD_DATA<9>
49
48
HD_DATA<8>
24 37
HD_DATA<6>
47
HD_DATA<9>
24 37
46
37 24
HD_DATA<5>
45
HD_DATA<10>
24 37
37 24
HD_DATA<4>
44
HD_DATA<11>
24 37
43
37 24
HD_DATA<3>
42
HD_DATA<12>
24 37
37 24
HD_DATA<2>
10
41
HD_DATA<13>
24 37
11
40
37 24
HD_DATA<1>
12
39
HD_DATA<14>
24 37
37 24
HD_DATA<0>
13
38
HD_DATA<15>
24 37
14
37
36
37 13
HD_DMARQ
15
37 24
HD_DIOR_L
16
35
17
34
38
HD_DATA<10>
37
24 37
37 24
HD_DMACK_L
18
33
HD_INTRQ
13 37
37 24
HD_ADDR<1>
19
32
HD_ADDR<2>
24 37
20
31
HD_CS1_L
24 37
37 24
HD_ADDR<0>
21
30
37 24
HD_CS0_L
22
29
23
28
24
27
25
26
+HD_LOGIC_SLEEP
24 37
RP4
5%
1/16W
SM1
HD_DIOW_L 24
HD_IOCHRDY
24 37
5%
1/16W
SM1
50
HD_DATA<7>
RP3
12 17 26 37 39
12 17 26 37 39
33
J13
1
37 24
24 37
5%
1/16W
SM1
RP3
33
HD_DATA<7>
CRITICAL
37 24
24 37
RP2
5%
1/16W
SM1
UIDE_DATA<6>
HD_DATA<0>
5%
1/16W
SM1
RP2
5%
1/16W
MF
402 2
5%
1/16W
MF
2 402
HD_RESET_L
24 37
RP2
33
24 37
37 24
HD_DATA<2>
R601
M-ST-SM1
5%
1/16W
SM1
5%
1/16W
SM1
12 17 26 37 39
39 37 26 17 12 9
24 37 39
5%
1/16W
SM1
UIDE_DATA<0>
10K
30
39 37 26 17 12
UIDE_DATA<2>
9 12 17 26 37 39
28
39 37 26 17 12
HD_DATA<3>
24 37
RP9
RP9
5%
1/16W
MF
1 402
PCI_AD<19>
38
37 13
22
9 12 17 26 37 39
PCI_AD<21>
PCI_AD<17>
33
14 39
39 37 26 17 12
24 37 39
RP9
9 12 17 24 26 37 39
AIRPORT_PME_L_TP
AIRPORT_PCI_INT_L
HD_DATA<11>
5%
1/16W
MF
402 2
12 36 39
39 37 26 17 12 9
24 37 39
UIDE_DATA<1>
5%
1/16W
SM1
5%
1/16W
SM1
13
39 37 26 17 12
37 13
24 37 39
5%
1/16W
SM1
16
39
RF_DISABLE_L_SPN
14
RP50
7
MAIN_RESET_L
PCI_AD<29>
39 37 26 17 12 9
5%
1/16W
SM1
RP10
24 37 39
RP10
7
5%
1/16W
SM1
EIDE_DATA<0>
RP50
37 13
5%
1/16W
SM1
5%
1/16W
SM1
33
39 37 26 17 12 9
39 37 26 17 12 9
RP50
5%
1/16W
SM1
33
5%
1/16W
SM1
RP10
37 13
24 37 39
RP13
5%
1/16W
SM1
RP9
24 37 39
39 30 26 20 18 17 14
UIDE_DATA<11>
QT510806-L111
37 39
RP13
5%
1/16W
SM1
37 13
F-ST-SM1
84
81
5%
1/16W
SM1
J20
33
33 38
5V_HD_LOGIC
R6021
RP2
CRITICAL
RP50
1
+5V_HD_SLEEP
PLACE SERIES R CLOSE TO INTERPID
PLACE TERMINATORS NEAR INTREPID
R6031
R101
37 13
RP13
5%
1/16W
SM1
EIDE_DATA<6>
RP49
37 13
37 13
33
EIDE_DATA<7>
37 13
33
EIDE_DATA<5>
37 13
37 13
EIDE_ADDR<1>
37 13
EIDE_ADDR<0>
R36
PCI_AD<6>
9 12 17 26 37 39
PCI_AD<5>
66
65
ROM_ONBOARD_CS_L
68
67
PCI_AD<4>
9 12 17 26 37 39
PCI_AD<3>
70
69
PCI_AD<2>
9 12 17 26 37 39
72
71
PCI_AD<0>
9 12 17 26 37 39
74
73
33
24 37 39
39 9
39 37 26 17 12 9
24 37 39
RP11
33
39 37 26 17 12 9
EIDE_OPTICAL_CS0_L
39 12 9
PCI_AD<1>
EIDE_OPTICAL_ADDR<1>
76
10K
5%
1/16W
MF
402 2
24 37 39
RP11
33
75
NC
NC
78
77
NC
NC
80
79
83
82
ROM_CS_L
24 37 39
R7301
5%
1/16W
SM1
39 37 26 17 12 9
37 13
UIDE_ADDR<0>
37 13
UIDE_CS0_L
37 13
33
37 13
UIDE_DATA<15>
37 13
UIDE_DATA<13>
37 13
33
37 13
10K
5%
1/16W
MF
2 402
HD_CS0_L
24 37
33
ANY SEQUENCING REQUIREMENT BETWEEN

+5V_HD_SLEEP AND +3V_SLEEP?
24 37
HD_DATA<15>
24 37
33
HD_DATA<13>
24 37
HD_DATA<12>
24 37
BLUETOOTH/LEFT-SIDE USB
5%
1/16W
SM1
CRITICAL
HD_ADDR<2>
24 37
+5V_MAIN
+3V_MAIN
R75
UIDE_CS1_L
33
+5V_SLEEP
J3
54550-1490
F-RT-SM
15
HD_CS1_L
24 37
5%
1/16W
MF
402
OPTICAL DRIVE INTERFACE (EIDE)
5%
1/16W
MF
2 402
24 37
RP4
5%
1/16W
SM1
24 37 39
5%
1/16W
SM1
5%
1/16W
SM1
RP5
UIDE_ADDR<2>
33
HD_ADDR<1>
5%
1/16W
SM1
UIDE_DATA<12>
HD_ADDR<0>
20K
5%
1/16W
MF
402 2
24 37
RP5
RP3
33
HD_DATA<14>
5%
1/16W
SM1
5%
1/16W
SM1
RP5
5%
1/16W
SM1
UIDE_ADDR<1>
33
5%
1/16W
SM1
RP5
37 13
33
9 12 39
5%
1/16W
SM1
UIDE_DATA<14>
24 37 39
10K
12 17 26 37 39
ROM_OE_L
63
24 37 39
37 13
RP4
61
RP11
33
5%
1/16W
SM1
5%
1/16W
SM1
EIDE_ADDR<2>
39 12 9
64
RP11
33
24 37 39
62
5%
1/16W
SM1
EIDE_CS0_L
RP49
RP49
37 13
5%
1/16W
SM1
5%
1/16W
SM1
EIDE_DATA<4>
33
1
39 37 14 BT_USB_DP
14 BT_USB_DM
39 37
4
5
NO STUFF
R31
37 13 EIDE_CS1_L
33
5%
1/16W
MF
402
EIDE_OPTICAL_CS1_L
R95
37 13 EIDE_DMACK_L
22
5%
1/16W
MF
402
5%
1/16W
MF
402
82
5%
1/16W
MF
402
A
37
13 EIDE_RST_L
24 37 39
22
24 37 39
EIDE_OPTICAL_RD_L
24 37 39
24 37 39
R76
1
82
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_INT
24 37 39
R69
1
33
J10
M-ST-SM1
EIDE_OPTICAL_RST_L
24 37 39
49
48
39 37 24
39 37 24
39 37 24
39 37 24
39 37 24
39 37 24
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
EIDE_OPTICAL_RST_L
24 37 39
24 37 39
47
24 37 39
46
24 37 39
45
24 37 39
44
43
24 37 39
42
24 37 39
39 37 24
10
41
24 37 39
39 37 24
11
40
24 37 39
12
39
39 37 24
EIDE_OPTICAL_DMA_RQ
13
38
EIDE_OPTICAL_WR_L
39 37 24
EIDE_OPTICAL_RD_L
14
37
39 37 24
EIDE_OPTICAL_DMAACK_L
15
36
EIDE_OPTICAL_INT
16
35
24 37 39
24 37 39
17
34
39 37 24
EIDE_OPTICAL_CS1_L
18
33
EIDE_OPTICAL_CS0_L
19
32
5%
1/16W
MF
402
R4411
20
31
20K
21
30
5%
1/16W
MF
402 2
22
29
23
28
NC
24
27
25
26
39 26 NEC_LEFT_USB_OVERCURRENT
11
39 23 SUTRO_ALS_GAIN_SW
12
R941
10K
10K
5%
1/16W
MF
402 2
14
10K
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
UIDE_RST_L
33
5%
1/16W
MF
402
37 13
HD_RESET_L
UIDE_DIOR_L
22
5%
1/16W
MF
402
37 13
R93
1
UIDE_IOCHRDY
C86
10PF
82
22
HD_DMACK_L
24 37
HD_DIOR_L
24 37
22
5%
1/16W
MF
2 402
HD_DIOW_L 24
37
HD_IOCHRDY

24 37
5%
1/16W
MF
402

5%
50V
2 CERM
402
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
SHT
NONE
REV.
051-6531
SCALE
16
INTERNAL I/O CONNECTORS

2
5%
1/16W
MF
402
24 37 39
37 13
15K
5%
1/16W
MF
2 402
24 37
R68
UIDE_DIOW_L
5%
1/16W
MF
2 402
15K
5%
1/16W
MF
402
R35
37 13
R64
R613
UIDE_DMACK_L
24 37 39
R71
R74
37 13
24 37 39
24 37 39
10
23 SUTRO_ALS_OUT
13
R612
R458
NC
10K
LEFT_USB_DM
39
LEFT_USB_DP
39 37 26
39 26 NEC_LEFT_USB_PWREN
R631
39 37 24
39 37 26
+3V_SLEEP
R411
10K
50
2
3
24 37 39
5%
1/16W
MF
402
CRITICAL
NC
EIDE_OPTICAL_WR_L
R81
1
EIDE_OPTICAL_DMA_RQ
5%
1/16W
MF
402
37 13 EIDE_IOCHRDY
37 13 EIDE_INT
R30
R32
37 13 EIDE_WR_L
82
37 13 EIDE_RD_L
22
5%
1/16W
MF
402 2
5%
1/16W
MF
402
R442
100K
R116
37 13 EIDE_DMARQ
R452
24 37 39
PLACE PULLUP RESISTORS CLOSE TO INTREPID
NO STUFF
OF
24 44
1
+5V_MAIN
SERIAL DEBUG INTERFACE

L77
SOUND BOARD (SOUSAPHONE)
FERR-220-OHM
39 14
SND_SYNC
SND_SYNC_F 25
C895
0.01UF
L80
FERR-220-OHM
36 14
39
SND_CLKOUT
20%
16V
2 CERM
402
SND_CLKOUT_F
+5V_MAIN
L81
1
INT_AUDIO_TO_SND
QT510306-L111
C896
F-ST-SM1
39 25 14
SND_TO_AUDIO_F
25
25
C897
0.01UF
20%
16V
2 CERM
402
L76
FERR-220-OHM
25
39
1
SND_AMP_MUTE
SND_TO_AUDIO_F
25
SND_HP_SENSE_L
14 39
INT_I2C_CLK2
SND_LIN_SENSE_L
SND_SCLK_F
10
12
NO STUFF
1
11
25
SND_SYNC_F
13
14
INT_I2C_DATA2
15
16
SLEEP_LED
17
18
19
20
21
22
23
24
25
26
27
28
29
30
39 25 14
SND_AMP_MUTE_F
0402
SND_CLKOUT_F
39 23
25
C898
0.01UF
20%
16V
2 CERM
402
L78
FERR-220-OHM
14
39
1
SND_HW_RESET_L
SND_HW_RESET_L_F
0.01UF
39
14 SND_SCLK
36
20%
16V
2 CERM
402
L79
FERR-220-OHM
2
10
COMM_DTR_L
14 39
COMM_TRXC
COMM_RTS_L
14 39
R405
10K
20%
10V
2 CERM
402
C478
COMM_RXD
14 39
COMM_GPIO_L
0.1UF
C469
10UF
20%
10V
2 CERM
402
5%
1/16W
MF
2 402
20%
6.3V
2 CERM
805
13 30
25
SLEEP 23
J8
30 33 35 39
QT510166-L010
DEBUG POWER BUTTON
F-ST-SM1
SND_HW_RESET_L_F
25
39 14
MOD_DTO
39 14
MOD_CLKOUT
INT_MOD_DTI
14 39
MOD_BITCLK
14 39
39 14
COMM_RESET_L
39 14
COMM_SHUTDOWN
10
MODEM_USB_DM
14 37 39
39 25 14
INT_I2C_CLK2
11
12
MODEM_USB_DP
14 37 39
39 25 14
INT_I2C_DATA2
13
14
COMM_RING_DET_L
14 30 39
15
16
+3V_MAIN
5
SND_HP_MUTE_INV
CRITICAL
SND_AMP_MUTE_F
25 39
RP44
R689
100K
100K
5%
1/16W
SM1
5%
1/16W
MF
2 402
MOD_SYNC
14 39
NO STUFF
R527
0
39 23 PWR_BUTTON_L
5%
1/16W
MF
603
39 25 SND_HP_MUTE_INV
38 SND_AGND
Q31
25
+5V_SLEEP
2N7002DW
NO STUFF
+3V_MAIN
SOT-363
C901
INT_PU_RESET_L
1
2
NO STUFF
1
C513
0.1UF
10UF
C767
20%
6.3V
2 CERM
805
4
S
COMM_TXD_L
SND_SCLK_F
0402
NO STUFF
1
5%
1/16W
SM1
SOT-363
XW9
SM
C900
39 14
RP44
2N7002DW
14 39
+3V_MAIN
39 14
100K
25
NO STUFF
0402
Q26
+5V_MAIN
14
5
25
25
SND_AMP_MUTE_L
AMP_CONTROL
INT_AUDIO_TO_SND_F
25
NO STUFF
0402
SM
2
J12
25
NO STUFF
0.01UF
SND_TO_AUDIO
J16
M-ST-5087
39 14
CRITICAL
20%
16V
2 CERM
402
FERR-220-OHM
SOT-363
INT_AUDIO_TO_SND_F
L82
CRITICAL
SUPPORTS BOTH THE LAST DASH AND Q52 SOFT MODEM
2N7002DW
20%
2 16V
CERM
402
Q26
SERIAL_DEBUG
MODEM
0.01UF
0402
39 14
7
SND_AMP_MUTE
25
C899
FERR-220-OHM
39 14
5%
1/16W
SM1
39 25
NO STUFF
+5V_MAIN
100K
+3V_MAIN
0402
RP44
AUDIO - SNAPPER
SND - INTREPID
NO STUFF
0402
SND_HP_MUTE
FAN CONTROLLER
DEBUG JUMPERS
R814
0.01UF
20%
2 16V
CERM
402
10
Q31
SOT-363
5 SND_HP_MUTE_L
5%
1/16W
MF
402
14
RP44
R42
FAN INTERFACE
U3
14
16
39 14 13 INT_I2C_DATA1
39 14 13 INT_I2C_CLK1
37 25 THERM1_DP
13
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
37 25 THERM1_DM
12
R719
37 25 THERM2_DP
11
37 25 THERM2_DM
10
SUPPLY_M_DM
25 CPU_M_DP
25 CPU_M_DM
PLACE CLOSE TO CPU

MAIN2
C668
0.001UF
THERM1_DM
R713
20%
50V
2 CERM
402
25 SUPPLY_M_DM
2N3904
C688
0.001UF
THERM2_DP
20%
2 50V
CERM
402
NO STUFF
1
C846
0.001UF
20%
50V
2 CERM
402
25 37
5%
1/16W
MF
402
R716
Q39
C690
0.001UF
NO STUFF
25 37
25 SUPPLY_M_DP
NO STUFF
NO STUFF
1
5%
1/16W
MF
402
CPU_M_DP
25 37
C905
0.001UF
20%
2 50V
CERM
402
SM
25 39
ADT7460_ADR_EN_L
RIGHT FAN (GPU)
NC
ADT7460_THERM
25
+5V_SLEEP
R623
THERM2_DM
5%
1/16W
MF
2 402
25 37
39 38
LEFT FAN (CPU)
37 25
NO STUFF
NO STUFF
C651
0.001UF
Q62
20%
50V
2 CERM
402
37 25
2N3904
SM
2
R717
37 25
THERM2_A_DM
THERM2_DP
THERM2_DM
39 25
FANL_TACH
39 38
FANL_GND
Q87
SOT-363
SOT-363
S
4
2N7002DW
25 ADT7460_THERM
6
D
25 37
5%
1/16W
MF
402
THERM_INV
5%
1/16W
MF
2 402
R710
1
THERM2_A_DP
25 THERM2_A_DP
3 NO STUFF
R813
25 37
FANR_PWM
FAN/MODEM/SOUND/SLEEP LED/DEBUG
C903
0.1UF
20%
2 10V
CERM
402

PLACE CLOSE
TO CONNECTOR
1

C134
4.7UF
20%
2 10V
CERM
1206

SIZE
25 37
5%
1/16W
MF
402
39 25 FANL_PWM
APPLE COMPUTER INC.
THERM2_A_DM
DRAWING NUMBER
SCALE
REV.
051-6531
SHT
NONE
2N7002DW
100K
5%
1/16W
MF
402
PLACE CLOSE TO BATTERY CHARGER/VCORE

ALTERNATE2
THERM1_DM
30
Q87
4.7UF
20%
10V
2 CERM
1206
39 25
THERM1_A_DM
THERM_L_OC
25 37
C135
37 25
THERM1_DP
R726
0
5%
1/16W
MF
402
TO CONNECTOR
THERM1_A_DP
5%
1/16W
MF
2 402
5
PLACE CLOSE
SM-2MT
10K
5%
1/16W
MF
402 2
Q37
37 25
R679
SI3446DV
SM
NO STUFF
J4
TSOP
R723
2N3904
2
NO STUFF
FANR_TACH
1
30 38
100K
5%
1/16W
MF
2 402
NO STUFF
37 25 THERM1_A_DM
37
25
CRITICAL
R812
100K
NO STUFF
Q47
SM-2MT
4
FANR_GND
+5V_SLEEP
R811
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER

1
J2
10K
20%
50V
2 CERM
402
+3V_PMU_AVCC
CRITICAL
+3V_MAIN
37 25 THERM1_A_DP
20%
2 50V
CERM
402
SOT-363
25
0.001UF
PLACE UNDERNEATH UPPER RAM

ALTERNATE1
C678
Q78
2N7002DW
FANR_TACH
THERM ISOLATION
ADT7460_FAN2_PWM
25 CPU_M_DM
NO STUFF
SOT-363
FANL_TACH
5%
1/16W
MF
402
25
THERM1_DP
5%
1/16W
MF
402
R725
5%
1/16W
MF
603
25 39
FANR_PWM
2N7002DW
SM
Q78
30 PMU_RESET_BUTTON_L1
2N3904
Q66
20%
2 50V
CERM
402
5%
1/16W
MF
2 402
ADT7460_FAN1_PWM
R553
39
TSOP
C681
PWM1/ 15
+2.5V/ QSOP
XTO
SMBALERT#
TACH1 6
SDA
ADT7460
PWM2/ 5
SCL
SMBALERT#
TACH2 7
D1+
CRITICAL
D1PWM3/ 8
ADR ENABLE#
4
D2+
TACH3
D2TACH4/ 9
ADR SELECT/
THERM#
GND
FANL_PWM 25
10K
Q36
SUPPLY_M_DP
5 ADT7460_VCORE_MON
5%
1/16W
MF
2 402
SI3446DV
MAIN1
VCC
R695
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
10K
10K
20%
10V
CERM 2
402
5%
1/16W
MF
603
NO STUFF
R692
PMU_NMI_BUTTON_L
10K
5%
1/16W
MF
2 402
CAPS FOR EMI EXPERIMENTATION ONLY
R295
10K
0.1UF
30
R293
C711 1
PLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
25
100K
PLACE CAPS AS CLOSE TO THERMISTORS AS POSSIBLE
0.001UF
+5V_SLEEP
20%
10V
2 CERM
603
5%
1/16W
SM1
R537
C904
1UF
AMP_CONTROL
PLACE XW9 CLOSE TO 5V SWITCHER (U27)
25
ADT7460_VCC
2N7002DW
25
NO STUFF
OF
25 44
1
8
NEC_USB
1
C841
0.1uF
20%
10V
2 CERM
402
7
NEC_USB
1
C837
0.1uF
20%
10V
2 CERM
402
+3V_NEC_VDD
NEC_USB
NEC_USB
1
C843
0.1uF
26 38
TABLE_ALT_HEAD
C836
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
197S0608
197S0038
NEC_USB
Y5
ALT FOR SIWARD
0.1uF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
NEC_USB
+3V_MAIN
TABLE_ALT_ITEM
L54
FERR-EMI-100-OHM
NEC_USB
1
C840
0.1uF
20%
10V
2 CERM
402
NEC_USB
1
C842
0.1uF
20%
2 10V
CERM
402
NEC_USB
1
C829
0.1uF
20%
10V
2 CERM
402
NEC_USB
1
NEC_USB
C834
0.1uF
20%
10V
2 CERM
402
NEC_USB
C845
20%
6.3V
CERM
805
20%
2 10V
CERM
402
10uF
0.1uF
38 NEC_AVDD
NEC_USB
1
NEC_USB
C844
C667
0.1uF
20%
10V
2 CERM
402
R796
C833
NEC_USB
C839
0.1uF
NEC_USB
1
NEC_USB
C830
2
SM
0.1uF
20%
10V
2 CERM
402
NEC_USB
C838
10uF
20%
10V
2 CERM
402
Y7 LOAD CAPACITANCE IS 16PF
20%
6.3V
CERM
805
0.1uF
20%
2 10V
CERM
402
Y5
39 37 24 17 12 9 PCI_AD<2>
N5
39 37 24 17 12 9 PCI_AD<3>
P4
9 PCI_AD<4>
N4
39 37 24 17 12 9 PCI_AD<5>
M3
39 37 24 17 12 9 PCI_AD<6>
N3
39 37 24 17 12 9 PCI_AD<7>
M1
SERR_L AND PERR_L
39 37 24 17 12 9 PCI_AD<8>
L2
HAS DEDICATED PULL-UP
39 37 24 17 12 9 PCI_AD<9>
L1
FOR BOTH CBUS AND USB2
39 37 24 17 12 9 PCI_AD<10>
K2
9 PCI_AD<11>
L3
39 37 24 17 12
NEC_USB
6
RP52
10K
5%
1/16W
SM1
R783
10K
5%
1/16W
MF
2 402
39 37 24 17 12 9 PCI_AD<12>
K1
39 37 24 17 12 9 PCI_AD<13>
K3
39 37 24 17 12 9 PCI_AD<14>
J2
39 37 24 17 12 9 PCI_AD<15>
J1
39 37 24 17 12 9 PCI_AD<16>
F2
39 37 24 17 12 9 PCI_AD<17>
E3
39 37 24 17 12 9 PCI_AD<18>
E1
39 37 24 17 12 9 PCI_AD<19>
D3
39 37 24 17 12 9 PCI_AD<20>
D1
39 37 24 17 12 PCI_AD<21>
D2
39 37 24 17 12 PCI_AD<22>
C2
NEC_XT2_R
C649
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
N12
N10
D7
H4
G12
D13
F13
H13
N8
J13
E2
L13
A3
A12
A13
P3
P12
C8
P2
VDD
L9
5%
1/16W
MF
2 402
36 NEC_XT2
NEC_USB
DP1 L14 (NEC_USB_DAP)

RSDP1 K13 37 NEC_USB_RSDP1
Low/Full/High Speed (External)
K14
37 NEC_USB_RSDP2
RSDM5
DM5
DP5
RSDP5
E13 RSDM5_TP
10K
5%
1/16W
SM1
1
NEC_LEFT_USB_OVERCURRENT
5%
1/16W
MF
402
26 37
NEC_USB
NEC_USB
R791
NEC_USB_DBM
26 37
NEC_USB_DBP
26 37
C661
0.1uF
20%
10V
2 CERM
402
1%
36 402
NEC_USB
NEC_USB
1
24 39
R600
26 NEC_OCI<2>
DP3 G13
RSDP3 G14 RSDP3_TP
F12 RSDM4_TP
15K
26 NEC_OCI<1>
1%
36 402
NEC_USB
RSDM3 H11 RSDM3_TP

DM3 G11
RSDM4
DM4
DP4
RSDP4
402
NEC_USB_DAP
J14 (NEC_USB_DBP)
NEC_USB
RP45
R591
26 37
R792
K12 (NEC_USB_DBM)
J12
36
NEC_USB_DAM
NEC_USB
37 NEC_USB_RSDM2
10K
NEC_USB
1%
NEC_UPD720101_USB2
RSDM2
DM2
DP2
RSDP2
NEC_USB
RP45
5%
1/16W
SM1
R795
RSDM1 M14 37 NEC_USB_RSDM1

DM1 M13 (NEC_USB_DAM)
FBGA
100
Low/Full/High Speed (External)

CRITICAL
U39
5%
2 50V
CERM
402
NEC_USB
36 NEC_XT1
P8
NEC_USB
C657 1R590
27PF
5%
2 50V
CERM
402
XT1/SCLK
XT2
NEC_USB
1
27PF
AVDD
P5
M4
H3
M5
39 37 24 17 12 9 PCI_AD<1>
VDD_PCI
39 37 24 17 12 9 PCI_AD<0>
8X4.5MM-SM
1
+3V_MAIN
+3V_MAIN
30.0000M
38
26 +3V_NEC_VDD
39 37 24 17 12
CRITICAL
NEC_USB
5%
1/16W
MF
2 603
15K
NEC_RIGHT_USB_OVERCURRENT
32 39
5%
1/16W
MF
402
C665
0.1uF
20%
10V
2 CERM
402
R790
3
26
NEC_PCI_SERR_L
26
NEC_PCI_PERR_L
39 37 24 17 12 PCI_AD<23>
C1
39 37 24 17 12 9 PCI_AD<24>
B4
9 PCI_AD<25>
A4
39 37 24 17 12 9 PCI_AD<26>
B5
(PCI_AD<27>)
C4
39 37 24 17 12 9 PCI_AD<28>
A5
39 37 24 17 12 9 PCI_AD<29>
C5
39 37 24 17 12 9 PCI_AD<30>
B6
39 37 24 17 12 9 PCI_AD<31>
A6
39 37 24 17 12
39 37 24 17 12 9 PCI_AD<27>
NEC_USB
R7841
22
5%
1/16W
MF
402 2
39 37 24 17 12 PCI_CBE<0>
M2
39 37 24 17 12 PCI_CBE<1>
J3
39 37 24 17 12 PCI_CBE<2>
F1
39 37 24 17 12 PCI_CBE<3>
C3
39 37 24 17 12 PCI_PAR
J4
39 37 24 17 12 PCI_FRAME_L
F3
39 37 24 17 12 PCI_IRDY_L
F4
39 37 24 17 12 PCI_TRDY_L
G1
39 37 24 17 12 PCI_STOP_L
G3
B3
NEC_IDSEL
39 37 24 17 12 PCI_DEVSEL_L
NEC_USB
RP55
47
5%
30 27 23 17 IO_RESET_L
30 14 PMU_PME_L
30 24 20 18 17 14 MAIN_RESET_L
39
NEC_IO_RESET_L
26
NEC_PME_L
26
NEC_MAIN_RESET_L
26
12 USB2_PCI_REQ_L
C6
12 USB2_PCI_GNT_L
D6
26 NEC_PCI_PERR_L
H2
26 NEC_PCI_SERR_L
H1
26 NEC_PCI_INTA_L
C7
26 NEC_PCI_INTB_L
B7
26 NEC_PCI_INTC_L
A7
A8
36 12 CLK33M_USB2
1/16W
SM1
26 NEC_IO_RESET_L
Series Rpaks required to

facilitate NAND-tree testing
R5511
26 NEC_PME_L
D9
26 NEC_MAIN_RESET_L
C9
4.7K
NEC_SMI_L_TP
5%
1/16W
MF
402 2
B8
N6
NEC_CRUN_L
NEC_USB
G2
L6
47
1%
E14 RSDP4_TP
36
402
+3V_MAIN
D14
C13
NEC_USB
C14 RSDP5_TP
RREF P11
R794
9.09K2
NEC_RREF
NEC_AVSS_F
26
CBE0
CBE1
CBE2
CBE3
OCI1
OCI2
OCI3
OCI4
OCI5
LEFT PORT
RIGHT PORT
PAR
FRAME
IRDY
TRDY
STOP
IDSEL
DEVSEL
REQ
GNT
PERR
SERR OD
INTA OD
INTB OD
INTC OD
PCLK
OUT
OUT
OUT
OUT
OUT
PPON1
PPON2
PPON3
PPON4
PPON5
NC1
NC2
B12
NEC_OCI<1>
26
B11
NEC_OCI<2>
26
B10
NEC_OCI<3>
A10
NEC_OCI<4>
B9
NEC_OCI<5>
C1239
A11
39
INTREPID_USB
INTREPID_USB
R56
1%
1/16W
MF
402
Tie to GND at ball N11
10K
NEC_PPON3_TP
NEC_PPON4_TP
A9
NEC_PPON5_TP
P6
NEC_NC1_TP
M6
NEC_NC2_TP
M8
1.5K
5%
1/16W
MF
2 402
IPD
SMC
M7
1.5K
5%
1/16W
MF
2 402
LEFT_USB_DM
R96
1
TEB
AMC
TEST
P7
NEC_AMC_TP
L8
TEST_TP
39
37 26 NEC_USB_DAP
LEFT_USB_DP
AVSS(R)
26
M12
NEC_USB
NEC_AVSS_F
INTREPID USB CONSTRAINTS
RIGHT_USB_DM
37 26 NEC_USB_DBP
USB_DA
5 MIL SPACING
14
USB_DAP
USB_DA
5 MIL SPACING
14
USB_DCM
USB_DC
5 MIL SPACING
14
USB_DCP
USB_DC
5 MIL SPACING
14
USB_D1M
USB_D1
5 MIL SPACING
14 26
USB_D1P
USB_D1
5 MIL SPACING
14 26
USB_D2M
USB_D2
5 MIL SPACING
14 26
USB_D2P
USB_D2
5 MIL SPACING
14 26
5%
1/16W
MF
402
PLACE NEAR J12

RIGHT_USB_DP

32 37 39
BUBBA CONNECTOR
INTREPID_USB
R530
0

2
SIZE
5%
1/16W
MF
402
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
REV.
051-6531
SHT
NONE
26 14 USB_D2P
5%
1/16W
MF
402
NEC_USB
R540
USB_DAM
USB 2.0
R554
1
26 14 USB_D2M
5%
1/16W
MF
603
32 37 39
INTREPID_USB
5%
1/16W
MF
402
R286
2
R545
37 26 NEC_USB_DBM
SUTRO CONNECTOR
5%
1/16W
MF
402
NEC_USB
SRMOD_TP 39
24 37 39
R78
1
SRCLK_TP 39
PLACE NEAR J3
INTREPID_USB
NEC_NANDTESTEN_TP
NEC_NANDTESTOUT_TP
5%
1/16W
MF
402
39
5%
1/16W
MF
402
R83
TEB_TP
24 37 39
INTREPID_USB
26 14 USB_D1M
N7
AVSS
P13
N11
D8
G4
F11
J11
D12
N1
B1
H12
VSS
1/16W
SM1
L12
NEC_LEGC
M11
R793
5%
1/16W
MF
402
SMC_TP
NANDTEST M10
SRCLK M9
SRDTA N9
IPDSRMOD P9
B13
26
NEC_USB
NEED PULL-UP RESISTORS IN CASE USB 1.0 IS USED FOR PORT POWER
26 14 USB_D1P
N13
26
NEC_PCI_INTC_L
5%
1/16W
MF
1 402
NEC_USB
NTEST1_TP
LEGC
N2
NEC_PCI_INTB_L
10K
5%
1/16W
SM1
32 NEC_RIGHT_USB_PWREN
C10
NTEST1
IPD
B2
10K
24 NEC_LEFT_USB_PWREN
C11
IPD
IPD
A2
26
5%
1/16W
SM1
R789
NEC_USB
B14
NEC_PCI_INTA_L
10K
5%
1/16W
MF
2 402
R84
H14
N14
NEC_USB
37 26 NEC_USB_DAM
VBBRST
CRUN
PME OD
VCCRST
SMI OD
P10
USB2_PCI_INT_L
6 NEC_USB
RP45 RP45 2R586
10K
5%
1/16W
MF
2 402
5%
14
5 NEC_USB
R531
NEC_USB
IPD
L7
E12
NEC_USB
NEC_USB
RP54
F14
OF
26 44
1
5
+3V_MAIN
C442
Ethernet routing priority:

1. Decoupling caps
2. TX SERIES TERMINATION - LOCATE NEAR LINK
3. RX SERIES TERMINATION - LOCATE NEAR PHY
10uF
LTC3405_SW
20%
6.3V
CERM 2
805
NO STUFF
1
R333
VIN
L5
LTC3405
SOT23-6
1
RUN
MODE
3405_MODE
VFB
CRITICAL
R319
R334 C471 1
665K
R370
CLKENET_LINK_RX
36 13
CLKENET_LINK_GBE_REF
5%
1/16W
MF
402
36
CLKENET_PHY_RX
36
CLKENET_PHY_GBE_REF
5%
1/16W
MF
402
R344
1
CLKENET_PHY_TX
R353
1
5%
50V
CERM 2
402
VOUT = 0.8V*(1+R2EQV/R1)
R2EQV = R2A||R2B
36
TX_CLK
RX_CLK
125CLK
10
CTRL10
+1_0V_MARVELL
38
Sandwich each RJ54 pair between chassis grounds
R361
49.9K
1%
1/16W
MF
2 402
R2B
C486
10uF
20%
6.3V
2 CERM
805
3405_VFB
PLACE ALL SERIES RES CLOSE TO PHY
36 13
22pF
1%
1/16W
MF
2 402 R2A
5%
1/16W
MF
402 2
GND
Must maintain 50-ohms trace impedance on all

MDI pairs and all RJ45 pairs
3.3uH
SW
SM1
CLKENET_LINK_TX
All differential signals should be close,

parallel, matched lengths, with minimum
via count, and short if possible
CRITICAL
U14
5%
1/16W
MF
402 2
36 13
38
R362
182K
1%
1/16W
MF
2 402
R1
51 NC
6
22
DVDD
11
37 13 ENET_PHY_TXD<0>
12
14
16
17
18
19
13 ENET_PHY_TXD<7>
20
37
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
CRITICAL
20%
2 10V
CERM
402
57
62
U49
67
88E1111
71
C492
0.1UF
15
5%
1/16W
MF
402
C511
0.01UF
20%
2 16V
CERM
402
C517
0.1UF
C502
C465
0.01UF
20%
2 10V
CERM
402
0.1UF
20%
2 16V
CERM
402
C475
20%
2 16V
CERM
402
NO STUFF
R438
R465
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
38 27
5%
1/10W
FF
805
5%
1/16W
MF
2 603
+2_5V_MARVELL
CHGND1
21
VDDO
85
BCC
PLACE CLOSE TO
ETHERNET CONNECTOR
+2_5V_MAIN
0.01UF
20%
2 10V
CERM
402
88
C464
0.1UF
96
20%
10V
2 CERM
402
C472
0.01UF
20%
16V
2 CERM
402
C453
0.1UF
C503
0.01UF
20%
10V
2 CERM
402
C501
0.1UF
20%
16V
2 CERM
402
C496
10uF
20%
10V
2 CERM
402
20%
6.3V
2 CERM
805
37 13 ENET_PHY_TX_EN
37 13 ENET_PHY_TX_ER
TX_EN
TX_ER
52
VDDOH
36 13 CLKENET_PHY_GTX
20%
10V
2 CERM
402
R3451
R371
R3541
10K
10K
1.5K
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
92
93
91
90
89
13 ENET_LINK_RXD<6>
87
86
37 13 ENET_RX_DV
94
37 13 ENET_RX_ER
37 13 ENET_CRS
84
13 ENET_COL
83
37
R343
14 INT_ENET_RST_L
37
38 27 +2_5V_MARVELL
1K
95
37 13 ENET_MDC
25
37 13 ENET_MDIO
24
VDDOX
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
D1
14
23
ENET_ENERGY_DET
1N914
3
30 26 23 17 IO_RESET_L
28
ENET_RST_L
SOT23
27
ENET_COMA
C755
35
C497
0.1UF
20%
10V
2 CERM
402
36
20%
10V
CERM 2
805
2N7002DW
31 30 29
AC_IN
SOT-363
Q15
D
1
35 34 33 19
2N7002DW
SLEEP_L_LS5
SOT-363
NC
82
NC
81
NC
77
NC
75
NC
79
4
NC
PLACES PHY IN "COMA" MODE WHEN

ASLEEP ON BATTERY (SAVES POWER)
80
ENET_HSDACP
37
ENET_HSDACM
38
36 CLK25M_ENET_XIN
55
36 CLK25M_ENET_XOUT
54
NO STUFF
R435
1
PUT CRYSTAL CIRCUIT CLOSE TO PHY
20K
40
MDI0+
MDI0MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-
RX_DV
RX_ER
CRS
COL
MDC
MDIO
LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
INT-/
INT+
RESET
COMA
29
37
MDI_P<0>
31
37
MDI_M<0>
33
CRITICAL
Y3
25.0000M
2
5%
1/16W
MF
2 402
CONFIG0
CONFIG1
CONFIG2
CONFIG3
CONFIG4
CONFIG5
CONFIG6
S_IN+
S_INS_OUT+
S_OUTS_CLK+
S_CLK-
TDI
TDO
TCK
TMS
TRST
HSDAC+
HSDAC-
RSET
XTAL1
XTAL2
SEL_OSC
SEL_2.5V
VSSC
NO STUFF
R3931
R4031
49.9
49.9
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
37
MDI_P<1>
C504
0.01UF
20%
16V
2 CERM
402
C487
0.1UF
C476
C491 1
5%
50V
CERM 2
402
5%
50V
CERM 2
402
33pF
0.01UF
20%
16V
2 CERM
402
20%
10V
2 CERM
402
15
RJ45_C0_PD
11
39 37 14
RJ45_DN<0>
39 37 16
RJ45_DP<1>
18
RJ45_C1_PD
39
37 17
RJ45_DN<1>
39 37 19
RJ45_DP<2>
21
RJ45_C2_PD
39 37 20
RJ45_DN<2>
39 37 22
RJ45_DP<3>
24
RJ45_C3_PD
39 37 23
RJ45_DN<3>
37
MDI_M<2>
42
37
MDI_P<3>
43
37
MDI_M<3>
76
LED_LINK10
74
LED_LINK100
R346
R372
49.9
R404
49.9
1%
1/16W
MF
402 2
R413
49.9
1%
1/16W
MF
402 2
CHGND1
1%
1/16W
MF
402 2
2
SM
1
R355
(000)
64
(000)
63
(111)
61
(110)
60
(111)
59
(101)
58
(000)
0.01UF
20%
16V
2 CERM
402
44
JTAG_ENET_TDI
13
50
JTAG_ASIC_TDO_TP
39
49
JTAG_ASIC_TCK
13 39
JTAG_ASIC_TMS
13 39
JTAG_ASIC_TRST_L
13 39
46
47
30
C454
C477
0.01UF
20%
16V
2 CERM
402
C493
0.01UF
20%
16V
2 CERM
402
T1
1%
1/16W
MF
2 402
MDI2_PD
1
XFR-ENET-1000BT
49.9
1%
1/16W
MF
2 402
MDI1_PD
1
R428
49.9
1%
1/16W
MF
2 402
MDI0_PD
R406
49.9
1%
1/16W
MF
2 402
SEE CONFIG TABLES

(BELOW)
R381
CRITICAL
R735
75
MDI3_PD
5%
1/16W
MF
2 402
C505
R733
75
5%
1/16W
MF
2 402
R382
R347
75
75
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
ENET_CTAP_CHGND
100pF
10%
3KV
2 CERM
1808
PLACE RESISTORS CLOSE TO PHY
CHGND1
MARVELL 88E1111
CONFIG DEFINITIONS
5%
1/16W
MF
2 402
PIN
VDDO
LED_LINK10
LED_LINK100
LED_LINK1000
LED_DUPLEX
LED_RX
LED_TX
VSS
1%
1/16W
MF
2 402
CLK25M_XTAL_IN
TABLE_ALT_HEAD
COMMENTS:
BIT[2:0]
111
110
101
100
011
010
001
000
10/100/1000 ETHERNET
CONFIG INPUTS
PIN
CONFIG<0>
CONFIG<1>
CONFIG<2>
CONFIG<3>
CONFIG<4>
CONFIG<5>
CONFIG<6>
BIT[2]
PHYADR[2]
ENA_PAUSE
ANEG[3]
ANEG[0]
MODE[2]
DIS_FC
SEL_BDT
BIT[1]
PHYADR[1]
PHYADR[4]
ANEG[2]
ENA_XC
MODE[1]
DIS_SLEEP
INT_POL
BIT[0]
PHYADR[0]
PHYADR[3]
ANEG[1]
DIS_125
MODE[0]
MODE[3]
75/50 OHM

SIZE
33pF
TABLE_ALT_ITEM
Y3
APPLE COMPUTER INC.
TABLE_ALT_ITEM
197S0603
197S0037
ALTERNATE
Y3
ALT FOR SIWARD
DRAWING NUMBER
SCALE
REV.
051-6531
SHT
NONE
38
C457
Y3S LOAD CAPACITANCE IS 20PF
0.01UF
20%
16V
2 CERM
402
ENET_RSET
56 NC
13
Short shielded RJ-45
49.9
1%
1/16W
MF
402 2
LED_RX_SPN
68 NC
65
10
12
73 NC
70 NC
69
5
6
41
4.99K
REF DES
RJ45
RT-TH
R380
ALTERNATE
10
MDI_P<2>
197S0037
20%
6.3V
2 CERM
805
RJ45_DP<0>
MDI_M<1>
10K
197S0703
10uF
39 37 13
37
R335
BOM OPTION
CRITICAL
11
12
37
ALTERNATE FOR
PART NUMBER
0.1UF
20%
10V
2 CERM
402
J17
C754
39
97
PART NUMBER
8X4.5MM-SM
C555 1
C520
PLACE CAPS AT TRANSFORMER PINS 1, 4, 7 & 10
34
R427
20%
10V
2 CERM
402
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
GND
NO STUFF
C506
0.1UF
20%
10V
2 CERM
402
78
5%
1/16W
MF
402
53
ENET_VSSC
0.1UF
45
2.2uF
Q15
FERR-EMI-600-OHM
+2_5V_MARVELL_AVDD
49.9
C466
SM
32
5%
1/16W
MF
402
38
48
AVDD
L34
26
C488
0.1UF
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
72
GTX_CLK
66
OF
27 44
1
8
LM2594_IN
165MA MAX LOAD
D14
38 29
7
38
+1_95V_FW_DVDD
VIN
SM
FB
VOUT
GND ON/OFF
SDM20E40C
L51
LM2594
2
28 38
CRITICAL
U34
+5V_SLEEP
220uH
4
1
R447
L7
C577
0.1UF
5%
1/16W
MF
2 402
SM-1
+3V_FW_UF 38
10
400-OHM-EMI
SM-3
C546
C778
2.2UF
0.1UF
20%
10V
2 CERM
402
TABLE_ALT_HEAD
20%
10V
2 CERM
805
20%
10V
2 CERM
402
C818 1
D20
SM
10UF
N20P20%
50V
CERM 2
2320
20%
10V 2
POLY
SMD-3
C777
PHY PIN 61
ADJ 4
28 38
R494
1
R574
GND
C650
2.2UF
20%
10V
CERM 2
805
0.01UF
20%
2 16V
CERM
402
16.2K
FW_PLL_ADJ
C641 1
1%
1/16W
MF
2 402
10UF
20%
6.3V
2 CERM
805
R2
27.4K2
1
R555
1
28 38
CRITICAL
1
C646
G1
SIWARD ALT FOR FW OSC
R577
5%
1/16W
MF
603 2
5%
1/16W
MF
2 603
+1_95V_FW_PLL500VDD
+1_95V_FW_PLL400VDD
38
38
C810
20%
10V
CERM
603
1UF
C628
1UF
20%
1 10V
CERM
603
20%
10V
2 CERM
603
+1_95V_FW_DVDD
R485
28 38
1UF
1
PHY PIN 25
C808
1
20%
10V
CERM
603
38 +3V_FW_AVDD
0.1UF
20%
10V
2 CERM
402
1UF
5%
1/16W
MF
402
R564
38 +1_95V_FW_DVDD_TX0
22
FW_PHY_CNTL<1> 1
36 28
0.1UF
FW_LINK_CNTL<0> 13
37
FW_LINK_CNTL<1> 13
37
R469
22
CLKFW_PHY_PCLK
5%
1/16W
MF
603
C634
5%
1/16W
MF
402
R484
37 28
22
FW_PHY_CNTL<0>
5%
1/16W
MF
603
1UF
38 +1_95V_FW_DVDD_RX0
20%
10V
CERM
603
37 28
R547
PHY PIN 28
CLKFW_LINK_PCLK
13 36
5%
1/16W
MF
402
20%
10V
2 CERM
402
C627
5%
1/16W
MF
603
C629
PHY PIN 21
U37
28 38
38 +3V_FW_AVDD_PORT0
5%
1/16W
MF
603
1%
1/16W
MF
402 R1
197S0011
3.3
C591
R557
R575
+1_95V_FW_DVDD
197S0052
R556
3.3
5%
1/16W
MF
603
C645
R759
1UF
PHY PIN 50
BYP
COMMENTS:
C570
PHY PIN 40
FWPLL_BYP
+1_95V_FW_PLLVDD
SYM_VER2
OUT 5
+1_95V_FW_PLLVDD
20%
2 10V
CERM
402
PHY PIN 64
5%
1/16W
MF
603
VOUT = 1.22*(1+R2/R1)+ IADJ*R2

IADJ = 30NA AT 25C
IN
REF DES
0.1UF
20%
2 10V
CERM
805
C541
2.2UF
R470
BOM OPTION
PHY PINS 72,76
38 +1_95V_FW_DVDD_PORT1
CRITICAL
LTC1761ES5-BYP
SOT-23-1
ALTERNATE FOR
PART NUMBER
100UF
MBR0540
U36
PART NUMBER
TABLE_ALT_ITEM
C635 1
+3V_FW
38 29 28
CRITICAL
SC-59
1
28 +FW_PWR_OR
1
R576
10UF
20%
R436
AVDD
3.3
FW_PORT1_SEL
33
DVDD
1.8
DS0
DS1
LCLK
DVDD
3.3
CRITICAL
PLL
VDD
1.8
PLL
VDD
3.3
PCLK
U29
80
FW_PHY_LPS
LPS
PINT
PQFP
CNA
(SYM_VER1)
FW_PHY_LREQ
LREQ
SN0201029PFP
PWR CLASS = 100
R7811
FW_PC_PU
66
FW_PC_PD
67
68
(PC0 IS MSB, PC2 IS LSB)
PC0
PC1
PC2
CTL0
CTL1
1MA(MAX) BUS HOLDER EACH
C/LKON
402K
1%
1/16W
MF
402 2
14
77
FW_PHY_PD
74
FW_BMODE
TPA0+
TPA0-
(TXD-FWB)
PD
(TXD-FWB)
BMODE
TPA1+
TPA1-
(TXD-FWA)
(TXD-FWA)
37 FW_PHY_DATA<5>
17
37 FW_PHY_DATA<6>
19
37 FW_PHY_DATA<7>
20
75
FW_PHY_RESET_L
35
FW_INPUT_PD
1
R464
36
1K
78
FW_TESTM
73
FW_VREG_PD
C538 1
R4451
20%
6.3V
CERM 2
402
5%
1/16W
MF
402 2
0.22UF
1K
20%
2 10V
CERM
402
20%
2 10V
CERM
402
R740
470
5%
1/16W
MF
402 2
R546
SE
56.2
CLKFW_PHY_PCLK 28
FW_PINT
79
0 -> BILINGUAL PORT

1 -> A-ONLY PORT
13 37
FW_PHY_CNTL<0> 28
37
10
FW_PHY_CNTL<1> 28
37
FW_LKON
1K
DGND
46
FW_TPA0P
45
FW_TPA0N
53
FW_TPA1P
52
1%
1/16W
MF
2 402
C571 C605
1UF
20%
10V
2 CERM
603
1UF
20%
10V
CERM 2
603
R5161
R509
56.2
56.2
1%
1/16W
MF
402 2
1%
1/16W
MF
2 402
FW_TPA1N
59 NC
58 NC
42
FW_TPB0P
41
FW_TPB0N
TPBIAS0
TPBIAS1
TPBIAS2
47
FW_BIAS0
54
FW_BIAS1
48
R5101
56.2
1%
1/16W
MF
402 2
FW_TPB1P
FW_TPB1N
FW_TPB2_PD
C587
220PF
R0
R1
22
FW_R1
36 FW_XI
26 NC
PLLGND
1%
1/16W
MF
2 402
R524
56.2
1%
1/16W
MF
2 402
1K
5%
1/16W
MF
402 2
47
R496
FW_TPA1P
(TXD-FWA)
FW_TPA1N
(TXD-FWA)
6.34K1
2
1%
1/16W
MF
2 402
C614
220PF
1%
1/16W
MF
402
+3V_FW
R760
100
20%
6.3V
2 CERM
402
5%
1/16W
MF
2 402
VCC
G1
36 FW_OSC
OSC
SM-A
OE
OUT
CRITICAL
GND
(RXD-FWB) 29
37
FW_TPB0N
(RXD-FWB) 29
37
FW_TPB1P
(RXD-FWA) 29
37
FW_TPB1N
(RXD-FWA) 29
37
56.2
1%
1/16W
MF
2 402
28 29 38
5%
25V
CERM
402
R525
4.99K
1%
1/16W
MF
2 402
FIREWIRE
100K

PLACE NEAR PHY
5%
1/16W
MF
402 2

1 FW_OSC_EN
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
REV.
051-6531
SHT
NONE
R7611
SCALE
R522
NO STUFF
29 37
98.304M
CAPACITOR IN CONJUCTION WITH
INTERNAL PULLUP PROVIDES
RESET PULSE WHEN PHY FIRST
RECEIVES POWER
29 37
FW_TPB0P
C640
0.22UF
29 37
FWB_TPB0
29 37
4.99K
5%
1/16W
MF
402
R563
R4711
5%
25V
CERM
402
R758
FW_R0
(TXD-FWB)
56.2
FWB_TPB1
60 NC
23
(TXD-FWB)
FW_TPA0N
R495
27
FW_TPA0P
55
XI
XO
5%
1/16W
MF
2 402
R478
56.2
13
TESTM
VREG_PD
THRML
AGND
PAD
NC
56
SM
1%
1/16W
MF
402 2
36
TPB2+
TPB2-
(RXD-FWA)
RESETZ
R4861
TPB1+
TPB1-
28
5%
1/16W
MF
2 402
C539
0.1UF
0.1UF
PLACE NEAR PHY
5%
1/16W
MF
1 402
49
(RXD-FWA)
25
16
76
5%
1/16W
SM1
37 FW_PHY_DATA<4>
(RXD-FWB)
72
TPB0+
TPB0-
(RXD-FWB)
64
15
37 13 FW_LINK_DATA<6>
RP37
22
13
37 FW_PHY_DATA<3>
38
12
37 FW_PHY_DATA<2>
14
37 FW_PHY_DATA<1>
D0
D1
D2
D3
D4
D5
D6
D7
62
5%
1/16W
SM1
11
61
37 FW_PHY_DATA<0>
50
43
RP38
22
40
TPA2+
TPA2-
21
CPS
81
34
FW_CPS
C561
10K
TSB81BA3A
20%
2 10V
CERM
402
R459
1K
CLKFW_PHY_LCLK
(MAY PROVIDE POWER, OR

MAY REQUIRE UP TO 3W)
C804
0.1UF
20%
2 10V
CERM
402
SPEC SAID TO USE 10K

2
31 TX0
30
29
70
69
RX0
5%
1/16W
MF
2 402
18
5%
1/16W
MF
402 2
1K
5%
1/16W
MF
2 402
R4371
38 29 28 +FW_PWR_OR
0.1UF
R775
5%
1/16W
MF
402 2
1K
C540
R446
32
37 13
PHY PINS 4,14
R4441
IADJ = 30NA AT 25C
13
C586
2 6.3V
CERM
805
5%
1/16W
MF
2 402
1%
1/16W
MF
2 402
R1
36 13
1K
27.4K
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
DSX STRAP OPTIONS
20%
10V
CERM
603
71
FW_CORE_BYP
20%
6.3V
2 CERM
805
65
SHDN
BYP 3
GND 4
10UF
37
NC
C653
20%
10V
CERM 2
805
FW_CORE_ADJ
63
2.2UF
NC
ADJ 2
1%
1/16W
MF
2 402
R2
57
C642
NC
OUT 1
PHY PIN 38
51
NC
IN
44
20%
16V
2 CERM
402
MSOP
16.2K
39
0.01UF
24
LT1962-ADJ
28 44
OF
PORT POWER SWITCH
38 28 +3V_FW
1
CRITICAL
NDS9407
F2
CRITICAL
SOI
38 +FW_FUSE
7
2
38 +FW_SW
38 +3V_FW_ESD_ILIM
+3V_FW_ESD
C784
0.1UF
38 28
+FW_PWR_OR
D26
D28
BAV99DW
BAV99DW
C786
SOT23
1N5227B
0.001UF
20%
10V
2 CERM
402
20%
2 50V
CERM
402
SOT-363
5
D8
SOT-363
5
3
SM
B340B
5
1
R752
470K
+3V_PMU
C774
20%
16V
2 CERM
402
20%
16V
CERM 2
402
FW_PWR_GATE
D28
BAV99DW
SOT-363
2
R743
DP5
BAS16TW
SOT-363
1
6
L40
FERR-250-OHM
SM
Q25
+FW_PWR_PORTA
RUN_OR_AC
37 28 FW_TPA0P
37 28 FW_TPA0N
FERR-250-OHM
DP5
FW_TPA0N_CONN
38 FW_VGND0
CRITICAL
38 +FW_VP0
2
28 FW_TPB0P
FW_TPB0P_CONN
BREF
DP5
10K
39 38 FW_TPO0R
NC
SOT-363
4
3
(TPI0R)
37 28 FW_TPB0N
BAS16TW
R741
4
AREF
L71
SM
37
FW_TPA0P_CONN
SM
90-OHM-200MA
L50
BAS16TW
DCDC_EN
4
SYM_VER-1
39 34 33 32 19
15
13
SOT-363
11
2N7002DW
2
2
Q58
SOT-363
38
2N7002DW
PMU_POWER_UP_L
514S0059
FIREWIRE B - BILINGUAL
FW_PWREN_L
33 30
SM
6
D
PORT 0
330K
5%
1/16W
MF
2 402
20%
2 16V
CERM
402
SOT-363
2
1.5AMP-33V
100K
C792
0.01UF
D26
BAV99DW
F5
R736
POWER_UP
0.01UF
5%
1/16W
MF
402 2
C781
0.01UF
5%
1/16W
MF
2 402
29 38
SM-1
D29
SMB
400-OHM-EMI
5%
1/16W
MF
402
Q67
1.5A-24V
10K
L39
R751
+PBUS
FW_TPB0N_CONN
SOT-363
2
5
TPA
TPA(R)
TPA*
VG
SC
VP
TPB
TPB(R)
OUTPUT
INPUT
TPB*
10
31 30 27 AC_IN
AC_IN_FW_CNTL
5%
1/16W
MF
402
12
14
SYM_VER-1
SM
90-OHM-200MA
NO STUFF
L70
CRITICAL
R737
470K
C607
0.01UF
5%
1/16W
MF
2 402
20%
16V
CERM 2
402
NO STUFF
R472
1M
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
+3V_FW_ESD
C556
C528
0.1UF
20%
2 50V
CERM
805
5%
1/16W
MF
2 402
F-RT-SM
C803
1394B-Q41
0.01UF
J26
20%
16V
2 CERM
402
CRITICAL
CHGND1
0.01UF
20%
2 16V
CERM
402
CHGND6
29 38
CHGND1
R453
0
ENABLES PORT POWER WHEN MACHINE IS

RUNNING OR WHEN ASLEEP ON AC
D15
BAV99DW
BAV99DW
SOT-363
5
SOT-363
5
STATE
SHUTDOWN
(AC)
SLEEP
(AC)
RUN
(AC)
SHUTDOWN
(BATT)
SLEEP
(BATT)
RUN
(BATT)
PMU_POWER_UP_L
POWER_UP
DCDC_EN
AC_IN
1
1
2.99V
+3V_PMU
LTC4210_ON
C588
OFF
ON
ON
OFF
OFF
ON
5%
1/10W
FF
1 805
D12
1
1
0.01UF
20%
16V
CERM 2
402
D15
BAV99DW
BAV99DW
SOT-363
2
BREF SHOULD BE HARD CONNECTED TO

LOGIC GROUND FOR SPEED SIGNALING
AND CONNECTION DETECTION CURRENTS
PER 1394B V1.33
20%
16V
2 CERM
402
SOT-363
2
6
C606
0.01UF
D12
6
AREF NEEDS TO BE ISOLATED FROM

ALL LOCAL GROUNDS PER 1394B SPEC
SO WHEN A BILINGUAL DEVICE
IS PLUGGED TO BETA-ONLY DEVICE,
THERES NO DC PATH BETWEEN
THEM (TO AVOID GROUND OFFSET ISSUE)
FIREWIRE A
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
(PULL-DOWN RESISTOR)
CRITICAL
L43
260-OHM-330MA
+4_6V_BU +3V_PMU
37 28
FW_TPA1P
37 28
FW_TPA1N
SM1
SYM_VER-2
PORT 1
4
514-0057
CRITICAL
J23
CRITICAL
1394A
L44
260-OHM-330MA
SM1
37 28
FW_TPB1N
SYM_VER-2
F-RT-TH
39 37 FW_TPO1P
39 37 FW_TPO1N
37 28 FW_TPB1P
39 37 FW_TPI1P
39 37 FW_TPI1N
38 +FW_VP1
38
C807
0.01UF
20%
16V
2 CERM
402
R779
0
5%
1/10W
FF
2 805
TPO
TPO#
TPI
TPI#
C805
0.01UF
20%
16V
2 CERM
402
FIREWIRE PORTS
VP
FW_VGND1
VGND
7
10

CHGND6

CHGND6
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
29 44
1
+3V_PMU
+3V_PMU
R535
R505
470K 2
10K
R778
1
29 30 33
R492
10K
C643
SOFT_PWR_ON_L
10UF
22 23 30 34
20%
6.3V 2
CERM
805
5%
1/16W
MF
402
C574
0.1UF
20%
10V
CERM 2
402
0.1UF
100K
4
5%
1/16W
SM1
100K
INT_RESET_L
23
NUMLOCK_LED_L
INT_SUSPEND_REQ_L
8 30
R513
PMU_BYTE
CAPSLOCK_LED_L
23
39 23
KBD_Y<1>
85
39 23
KBD_Y<2>
84
39 23
KBD_Y<3>
83
39 23
KBD_Y<4>
82
39 23
KBD_Y<5>
81
39 23
KBD_Y<6>
80
39 23
KBD_Y<7>
79
PMU_NUMLOCK_LED_L
78
PMU_CAPSLOCK_LED_L
77
CHARGE_LED_L
76
31 30
39
2.2K 2
5%
1/16W
MF
402
30
R787
10K
2.2K 2
5%
1/16W
MF
402
5%
1/16W
SM1
R782
5%
1/16W
MF
402
9 13 30
RP40
100K
86
23 25 30 33 35 39
R518
1K
SLEEP
5%
1/16W
SM1
5%
1/16W
SM1
KBD_Y<0>
17 23 26 27 30
RP40
100K
3
C827
PART#
0.1UF
60
30 29
33
NC
34 30 23 22
39 25 14
PMU_CNVSS
75
PMU_POWER_UP_L
SOFT_PWR_ON_L
73
COMM_RING_DET_L
72
INT_WATCHDOG_L
71
39 23
KBD_X<0>
70
39 23
KBD_X<1>
69
14
30
5%
1/16W
MF
402
74
39 23
KBD_X<2>
68
39 23
KBD_X<3>
67
39 23
KBD_X<4>
66
39 23
KBD_X<5>
65
IC,PMU,V81B
U33
BOM OPTION
R585
30
100K 1
PMU_POWERUP_OK
44
P50_WRL_WR
U33
P51_WRH_BHE
M16C62
P52_RD
FLAS
P53_BCLK
P54_HLDA
P55_HOLD
P56_ALE
P57_RDY_CLKOUT
CPU_VCORE_HI_OC
INT_RESET_L
MAIN_RESET_L
43
42
41
38
37
34
33
32
31
30
29
28
P70_TXD2_SDA_TA0OUT
P71_RXD2_SCL_TA0IN_TB5IN
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P74_TA2OUT_W
P75_TA2IN_W
P76_TA3OUT
P77_TA3IN
5%
1/16W
MF
402
9 13 30
14 17 18 20 24 26 30 39
39 31 30
30
26
25
24
23
30 25
10K
PMU_NMI_BUTTON_L
5%
1/16W
SM1
23
30
14
RP41
10K
PMU_NMI_L
R768
14
31 30
7.15K1
PMU_SMB_DATA
14
1%
1/16W
MF
402
23 30
25 30
25 30
31 30
5%
1/16W
SM1
14
14
470K 1
5%
1/16W
MF
402
RP41
13 25 30
TPAD_RXD
TPAD_TXD
SYSTEM_CLK_EN
CPU_CLK_EN
PMU_CHARGE_V
PMU_CHRG_BATT_0
27
R592
2
PMU_BATT_DET_L
14
PMU_ACK_L
PMU_CLK
PMU_FROM_INT
PMU_TO_INT
PMU_REQ_L
PMU_LID_CLOSED_L
PMU_RESET_BUTTON_L
PMU_NMI_BUTTON_L
35
470K 1
7 34
PMU_INT_NMI
PMU_EPM
INT_PU_RESET_L
PMU_CPU_HRESET_L
39
36
P60_CTS0_RTS0
P61_CLK0
P62_RXD0
P63_TXD0
P64_CTS1_RTS1_CTS0_CLKS1
P65_CLK1
P66_RXD1
P67_TXD1
PMU_BATT1_DET_L_PU
NC
40
R788
30
(PMU_AP)
OMIT
P20_A0_D0
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P26_A6_D6_D5
P27_A7_D7_D6
DESCRIPTION
CPU_VCORE_HI_OC/PMU_AP should
have a pulldown for coming out of
reset. MLB will have a pull-up
to +3V_MAIN or +3V_SLEEP, which
will act as our pulldown since
both are off during PMU reset.
AVCC
P10_D8
P11_D9
P12_D10
P13_D11
P14_D12
P15_D13_INT3
P16_D14_INT4
P17_D15_INT5
QTY
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
97
P00_D0
P01_D1
P02_D2
P03_D3
P04_D4
P05_D5
P06_D6
P07_D7
R569
2
PMU_RESET_BUTTON_L
TABLE_5_ITEM
341S1008
20%
10V
CERM 2
402
CRITICAL
39 23
TABLE_5_HEAD
VCC
14 17 18 20 24 26 30 39
IO_RESET_L
RP40
1
MAIN_RESET_L
5%
1/16W
MF
402
RP40
30 25
20%
10V
CERM 2
402
14
100K 2
25 30 38
5%
1/16W
MF
402
C835 1
R536
1
4.7
+3V_PMU_AVCC
10K
5%
1/16W
MF
402
+3V_PMU
PMU_POWER_UP_L
5%
1/16W
MF
402
PMU_EPM
30 31 39
5%
1/16W
MF
402
R504
1
30
CHARGE_LED_L
R769
7.15K1
PMU_SMB_CLK
1%
1/16W
MF
402
23 30
23 30
+3V_SLEEP
RP41
14
10K
8
30
31
PMU_I2C_DATA
5%
1/16W
SM1
31
UNDERVOLTAGE RESET CIRCUIT
39 23
KBD_X<6>
64
39 23
KBD_X<7>
63
39 23
KBD_X<8>
61
39 23
+3V_PMU
KBD_X<9>
59
IO_RESET_L
58
39 23
KBD_COMMAND_L
57
39 30 23
KBD_CONTROL_L
56
R765
39 30 23
KBD_SHIFT_L
55
1K
39 30 23
KBD_OPTION_L
54
KBD_FUNCTION_L
53
30 27 26 23 17
5%
1/16W
MF
2 402
34
39 23
14
+3V_PMU_RESET
39 23
PMU_INT_L
52
KBD_ID
51
50
CPU_PLL_STOP_OC
C812 1
NC
0.1UF
20%
10V
CERM 2
402
39 35 33 30 25 23
CRITICAL
49
48
SLEEP
47
VCC
U51
MAX6804
INT_SUSPEND_ACK_L
46
30 8
INT_SUSPEND_REQ_L
45
PMU_KB_RESET_L
21
P30_A8_D7
P31_A9
P32_A10
P33_A11
P34_A12
P35_A13
P36_A14
P37_A15
P80_TA4OUT_U
P81_TA4IN_U
P82_INT0
P83_INT1
P84_INT2
P85_NMI
P86_XCOUT
P87_XCIN
19
18
17
16
15
P90_TB0IN_CLK3
P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN
P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
P100_AN0
P101_AN1
P102_AN2
P103_AN3
P104_AN4_KI0
P105_AN5_KI1
P106_AN6_KI2
P107_AN7_KI3
AVSS
GND
30
11
CLK10M_PMU_XIN
13
NO STUFF
R595
10M
R594
0
CLK10M_PMU_XOUT_UF
38 30 25
30
PMU_RESET_L
10
+3V_PMU_AVCC
96
7
PMU_CNVSS
BYTE
XOUT
XIN
RESET
VREF
CNVSS
VSS
5%
1/16W
MF
402
5%
1/16W
MF
402 2
PMU_BYTE
CLK10M_PMU_XOUT
12
62
PMU_SLEEP_LED_L
23
CPU_SMI_L
POWER_VALID
30
PMU_PME_L
14 26 30
INT_PEND_PROC_INT
14
PMU_NMI_L
30
PMU_BATT0_DET_L
100
89
88
87
14
PMU_POWERUP_OK
30
PMU_OOPS
30
PMU_AC_DET
U24
Y6
C664 1
12PF
5%
50V
CERM 2
402
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
PMU_I2C_CLK
30
PMU_I2C_DATA
30
PMU_SMB_CLK
30 31
PMU_SMB_DATA
30 31
197S0704
197S0041
5%
50V
CERM 2
402
197S0604
197S0041
39 30 23
39 30 23
KBD_SHIFT_L
KBD_OPTION_L
10
U24
ADAPTER
74LVC32
TSSOP
6 PMU_KB_RESET_L 30
39
Q11 (65W)
A29 (45W)
AIRLINE
TSSOP
8
PMU_KB_RESET_IN2
32
12PF
PMU_LID_CLOSED_L
HOOPER
ALT CRYSTAL SIZE
12PF
5%
50V
2 CERM
402
Y6
ALT FOR SIWARD
1%
1/16W
MF
2 402
R583
30
PMU_OOPS
R544
1
PIN VOLT
2.007V2.066V
2.558V2.661V
0.589V0.663V
3.19V3.28V
ID VOLT
RANGE
1.65V2.31V
2.31V2.97V
0.33V0.99V
2.97V3.30V
R491
20%
2 10V
CERM
402
52.3K
1%
1/16W
MF
2 402
5%
1/16W
MF
402 2
A29_DETECT
100K
1%
1/16W
MF
2 402
SYSTEM STATUS
RECOGNIZES AS Q11
FULL FUNCTIONS
RECOGNIZES AS A29
LIMITED FUNCTIONS
FULL FUNCTIONS
NO BATTERY CHARGING
RECOGNIZES AS HOOPER
LIMITED FUNCTIONS
100K
0.1UF
1
39
30
2
4
U27
Q22
LMC7211
2N7002
SM
1
R503
1%
1/16W
MF
2 402
31
PMU_AC_DET
402K
CRITICAL
A29_DET_L
2_34V_REF
SM
PMU
R476
1
R475

4.7M 2
5%
1/16W
MF
402

127K
1%
1/16W
MF
2 402

50MV OF HYSTERSIS
SIZE
DRAWING NUMBER
REV.
051-6531
SHT
NONE
100K 2
5%
1/16W
MF
402
SCALE
INT_PU_RESET_L
APPLE COMPUTER INC.
10K
5%
1/16W
MF
402
R5171
C558
100K
100K 1
R501
Y6
10K
5%
1/16W
MF
402
5%
1/16W
MF
402
C831
A29 DETECT CIRCUIT
ADAPTER_DET 31
74LVC32
30 23
5%
50V
2 CERM
402
R596
R562
30 25 13
TABLE_ALT_ITEM
14
30 26 14
PMU_PME_L
Y7S LOAD CAPACITANCE IS 12.5PF
TABLE_ALT_ITEM
CASE
32
CLK32K_PMU_XOUT_UF
C832
100K 1
+3V_PMU
U24
POWER_VALID
5%
1/16W
MF
402
COMMENTS:
Q11 ADAPTER DETECTION SCHEME
TABLE_ALT_HEAD
32
+3V_PMU
Y7
30
5%
1/16W
MF
2 402
SM-1
38 32 +4_85V_RAW
12PF
27 29 31
94
10.0000M
74LVC32
Y6S LOAD CAPACITANCE IS 12PF
C666 1
14
+3V_MAIN
R785
CRITICAL
AC_IN
R597
32.768K
R502
KBD_CONTROL_L12
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
30
39 30 23
10M
NC
+3V_PMU
TSSOP
11 PMU_KB_RESET_IN1
30 31 39
5%
1/16W
MF
402
25
R584
TPAD_TXD
R786
+3V_PMU
PART NUMBER
SOFT_PWR_ON_L13
1K
CRITICAL
34 30 23 22
PMU_BATT_DET_L
Keep crystal subcircuit close to PMU.
8X4.5MM-SM
14
R572
PMU_AC_IN
92
90
INT_PROC_SLEEP_REQ_L
NO STUFF
5%
1/16W
MF
402
THERM_L_OC
93
91
30
NC
98
1K
NC
NC
30 23
R593
10K
5%
1/16W
MF
402
CLK32K_PMU_XIN
99
TPAD_RXD
Keep crystal subcircuit close to PMU.
+5V_SLEEP
30 23
PMU_BATT1_DET_L_PU
10K
R573
CLK32K_PMU_XOUT
RP41
PMU_I2C_CLK
5%
1/16W
SM1
P40_A16
P41_A17
P42_A18
P43_A19
P44_CS0
P45_CS1
P46_CS2
P47_CS3
(CHARGE_I)
30
95
MR* RSET*
PMU KEYBOARD RESET CIRCUIT
NC
NC
20
SOT143
39 30
22
OF
30 44
1
1MSEC INTEGRATION TIME

PLACE U23 NEXT TO R460
DC INRUSH LIMITER
(POWER JACK, ETC. ON SEPARATE BOARD)
Q13
38 32
8
2
NO STUFF
R4142
C757
7
ADAPTER_DET 30
C458 1
330K
0.1UF
D4
D3
D2
D1
S1
0.1UF
5%
1/16W
MF
402 1
20%
50V
2 CERM
805
S3
S2
D4
D3
D2
D1
S3
S2
R396
PLACE CLOSE
TO DC INPUT
20K
5%
1/16W
MF
2 402
+24V_PBUS
V+
U23
1%
1/16W
MF
402 1
1%
1/16W
MF
402 2
C468
R363
10K
0.01UF
20%
16V
CERM 2
402
5%
1/16W
MF
2 402
NC
5%
1/16W
MF
2 402
NC
PG
NC1
NC2
OUT
GND
5
CRITICAL
AC_IN
31 30 29 27
SOT-363
31 30 29 27 AC_IN
SOT-363
R365
1M
57.6K
1%
1/16W
MF
402 1
AC_IN_L
10%
50V
2 X7R
603-1
R738
0.1%
1/16W
FF
2 603
0.1%
1/16W
FF
2 603
R7481
Q20
2N7002DW
31 30
A29_DETECT 5
R383
31
C775
20%
10V
2 CERM
603
1%
1W
MF
2512
Q65
5%
1/16W
MF
402 2
AC_IN_L
1UF
47K
5%
1/16W
MF
402 2
BATT_14V_GATE
BATT_24V_GATE
6
IF A29 ADAPTER USED,
ADJUST CURRENT SETTING
R7461
R7441
10K
5%
1/16W
MF
402 2
10K
SOT-363
R5121
Q20
TO-252
IF ADAPTER IS OVER 18V,

ADJUST CURRENT SETTING
2N7002DW
0.0252
1
S1
SUD45P03
S 3
5%
1/16W
MF
402 2
6
D
2
R460
5%
1/16W
MF
1 402
5%
1/16W
MF
402 2
D4
D3
D2
D1
GATE
OVER_18V_ADJ
SOT-363
AC_GTR_18V
470K
SOT-363
51.1K
31
2N7002DW
100K
S3
S2
R739
82.5K
1
G
32
R734
0.1%
1/16W
FF
603 2
1 1625_COMP
1%
1/16W
MF
402
ADAPTER_I_REG
+3V_PMU
42.2K
Q10
150
47K
5%
1/16W
MF
402
CRITICAL
Q76
SOI
R4901
A29_CURRENT_ADJ
R394
C883
0.1UF
D4
SI4435DY
R358
SOT-363
6
1
38 +BATT_14V_FUSE
CRITICAL
1%
1/16W
MF
402 CURRENT_THRESHOLD
0.1%
1/16W
MF
603 2
2N7002DW
10K
MAX4172_OUT 1
BAS16TW
SOT23-5
+BATT_24V_FUSE
Q24
DP4
R466
NC
R4541
Q21
2N7002DW
CRITICAL
2.21K
Q10
LMC7211
AC_DIV
10K
68K
38 31
ROUTE LTC1625_ITH CAREFULLY
U50
2 LMC7111
BCKFD_PROT_EN_L
SM
1%
1/16W
MF
402 1
20%
50V
CERM 2
805
RS-
CRITICAL
R499
0.1UF
AC_ENABLE_L
U15
R375
TSSOP
RS+
38 32 1V20_REF
PLACE R358 CLOSE TO LTC1625

LTC1625_ITH
IAC_FB
MAX4172
1
C592
+PBUS
+24V_PBUS
20%
10V
2 CERM
402
0.1%
1/16W
FF
603 2
47K
5%
1/16W
MF
1 402
C772
42.2K
BCKFD_PROT_GATE
102K
SM-2
2
R7471
R474
AC_ENABLE_GATE
470K
R3641
SM-2
GATE
4
R374
102K
F3
5AMP-125V
0.1UF
R3952
C572
1%
1/16W
MF
1 402
F4
5AMP-125V
+3V_PMU
39
20%
10V
CERM
402
20%
50V
2 CERM
603
+ADAPTER_SENSE
38
S1
+3V_PMU
IAC_RC_COMP
0.01UF
GATE
20%
50V
CERM 2
805
SOI
39
+ADAPTER
SI4435DY
SOI
CHARGE_LED_L 30
1%
1/16W
MF
402
Q16
SI4435DY
M-RT-SM
+BATT
0.1UF
DP4
J18
87438-0833
1K
+ADAPTER_SW
38
CRITICAL
BATTERY SWITCH-OVER CIRCUIT
C771
R742
U23 SENSE VOLTAGE DROP ACROSS R460
BAS16TW
DC POWER INPUT
R489
SOT-363
3
4
SOT-363
2
BATT_24PBUS_EN 5
BATT_14PBUS_EN
158K
1%
1/16W
MF
2 402
Q21
2N7002DW
AC_IN_L_RC
2N7002DW
DP4
BAS16TW
SOT-363
1
R7541
GREATER THAN 13.5V DETECT
R488
D9
4.7
5%
1/16W
MF
402 2
1N914
100K
SOT23
1%
1/16W
MF
402 2
R498
31
1772_ACOK_L
SWITCHER VOLTAGE CONTROL
SWITCHER CURRENT CONTROL
PMU SELECTS BETWEEN TWO VOLTAGES
5%
1/16W
MF
2 402
37 1772_CSSN
R567
R558
27.4K
10K
10K
1%
1/16W
MF
402 2
1%
1/16W
MF
2 402
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
R548
11 ACIN
12 ACOK
1772_ACIN
31 1772_ACOK_L
13 RFIN
15 VCTL
14 ICTL
(+3V_PMU)
1772_VCTL
1772_ICTL
4.12K
R565
1%
1/16W
MF
402 2
1772_IINP
1K
1%
1/16W
MF
402 2
BATTV_HIGH
R5611
R566
48.7K
R5421
1%
1/16W
MF
402 2
100K
22
BST 25
QSOP
CRITICAL
LX 23
DLO 21
PGND 20
1772_CCI
1772_CCS
R580
2N7002DW
BATTV_LOW
SOT-363
5.23K
SOT-363
R497
1K
1%
1/16W
MF
2 402
+3V_PMU
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
D10
C624
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
1772_BST_ESR
RC TIME IS 480K*10UF @ +3V_PMU
+24V_PBUS
SOT23
R774
4.7
5%
1/16W
MF
2 603
0.1UF
20%
25V
CERM 2
603
1772_CELLS
C608
6 7
0.1UF
38
1772_BST
Q63
C616
1772_CSIN
REF CLS
4
3
0.01UF
GND
8 9
1UF
C621
0.1UF
C630
0.1UF
10K
1UF
20%
10V
CERM 2
603
1%
1W
MF
2512
XW19
SM
100K
10%
2 50V
CERM
402
R543
SO-8
5%
1/16W
MF
603 2
C619
4.7UF
C564
2.2UF
20%
50V
2 CERM
1812
R511
1
5%
1/16W
MF
603 2
C631
C632
4.7UF
20%
25V
2 CERM
1206
1
C906
0.0022UF
IRF7811W
NO STUFF
R5591
1%
1/16W
MF
402 2
38
MBRS140T3
Q64
20%
2 25V
CERM
603
20%
25V
CERM 2
603
20%
50V
2 CERM
1812
+BATT_24V_FUSE
D30
SM
8
CRITICAL
6 7
C802
R4871
1772_REF
20%
2 10V
CERM
402
0.1UF
20%
10V
2 CERM
603
20%
2 16V
CERM
402
2.2UF
31 38
0.05 2
1
SM1
C817 1
C557
R763
10uH
2
5
C652
20%
50V
2 CERM
1812
+BATT_RSNS
L42
(GND)
1772_CSIP
C563
2.2UF
20%
50V
2 CERM
1812
CRITICAL
37
2.2UF
SM
1772_DLO
37
C562
IRF7805
1772_LX
20%
50V
2 CERM
1812
CRITICAL
1772_DHI
38
C547
2.2UF
20%
50V
CERM 2
805
1772_DLOV
BATT 17
SOT-363
20%
16V
CERM 2
402
1772_CCV_RC
4
2N7002DW
30 PMU_CHARGE_V
0.01UF
1%
1/16W
MF
402 2
2N7002DW
Q27
SOT-363
C622
1K
Q29
2N7002DW
R5261
Q29
1%
1/16W
MF
2 402
CSIP 19
CSIN 18
REF = 4.096V
Q27
5%
1/16W
MF
402 2
DHI 24
7 CCV
6 CCI
5 CCS
1772_CCV
1%
1/16W
MF
402 2
5%
1/16W
MF
402 2
100K
20%
6.3V 2
CERM
805
1K
BATT_LOW_L
R5491
10UF
1N914
5%
1/8W
FF
1206
U31
MAX1772 DLOV
10 ICHG
28 IINP
1772_ICHG
33
38 1772_LDO
26
CSSN
CELLS 16
LDO 2
R560
C579
20%
50V
2 CERM
1206
27
CSSP
1 DCIN
C593
0.47UF
20%
50V
CERM 2
1206
38 1772_DCIN
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
0.47UF
20%
50V
2 CERM1
1210
12.7K
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
C578
C600
1UF
R755
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
4.7
1772_CSSP 37
R571
+3V_PMU
SOT-363
C633
C618
C824
33UF
20%
2 25V
ELEC
SM1
4.7UF
20%
25V
CERM 2
1206
20%
25V
CERM 2
1206
20%
2 25V
CERM
1206
1
4.7UF
4.7UF
C617
4.7UF
20%
25V
2 CERM
1206
20%
25V
CERM 2
1206
5%
1/16W
MF
402 2
1772_CLS
R4731
4.12K
R5781
6
5%
1/16W
MF
402 2
38 1772_GND
+BATT
Q30
38 +BATT_VSNS
2N7002DW
CHARGE_DISABLE
SOT-363
SOT-363
100K
U38
2N7002DW
R5881
20%
10V
2 CERM
402
Q30
C615
0.1UF
30 PMU_CHRG_BATT_0
1%
1/16W
MF
402 2
+3V_PMU
100K
1%
1/16W
MF
402 2
BATT_LOW
R7491
499K
1%
1/16W
MF
2 402
6.34K
1%
1/16W
MF
402 2
CRITICAL
/ V
VCTL
100K
))
1%
1/16W
MF
402 2
REFIN
For 4.15V cells, VCTL = 0.123 REFIN
R570
100K
1%
1/16W
MF
2 402
31 30 A29_DETECT
C658
CHG
= (0.2048/R
_62
) * (V
ICTL
/ V
Q65
2N7002DW
+BATT_POS
(BATT_IN_PD)
SOT-363
39 BATT_CLK
FERR-EMI-100-OHM
39 38
PMU_SMB_CLK

30
SM

39 BATT_DATA
PMU_BATT_DET_L 30
L8
39
39 38 BATT_NEG
For 4.20V cells, VCTL = 0.245 REFIN
10%
2 16V
CERM
402
BATTERY CHARGER
L10
0.047uF
2
SM
3
D
L53
FERR-50-OHM
1
M-RT-SM
1V65_REF
R5991
= CELLS X (4.096 + (0.4096 * V
SM
87438-0833
BATT
FERR-EMI-100-OHM
J25
BATT_DIV
3
L9
CRITICAL
A29_CLS_ADJ
SM
R579
LMC7211
BATTERY
CONNECTOR
FERR-50-OHM
FERR-EMI-100-OHM
L12
PMU_SMB_DATA

30
SM
SIZE
REFIN
SM
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
31 44
1
CRITICAL
Q14
FDG6324L
SC70-6
+5V_MAIN
3
D2
4 S2
R426
1625_EXTVCC
38
G2
6
470K
5%
1/16W
MF
402 2
1625_ENABLE_L
6
CRITICAL
12.8V PBUS SUPPLY
D1
Q14
1
FDG6324L
5 G1
1625_ENABLE
C495
0.1UF
SC70-6
S1
+24V_PBUS
20%
2 10V
CERM
402
PBUS HOLD-UP CAPS
CONNECT LTC1625 TK PIN AT TOP-SIDE FET

KEEP VIN/TK LOOP SHORT
+3V_PMU
1625_INTVCC
2
R412
C537 1
1%
1/16W
MF
402 2
20%
10V
CERM 2
402
4
1V20_REF
LMC7211
1
1625_DIV
R4331
1M
C787
2.2UF
2.2UF
C485
R3792
LTC1625
VIN SSOP
BG
TK CRITICAL TG
SYNC VOSENSE
RUN/SS INTVCC
ITH
BOOST
FCB
SW
VPROG
10
13
7
11
1625_BST_ESR
SGND
C585 1
C626
2.2UF
2.2UF
20%
50V
CERM 2
1812
C801
2.2UF
R401
2.2
5%
1/16W
MF
2 603
12
14
1625_BST
C799 1
20%
35V 2
ELEC
SM-1
20%
35V 2
ELEC
SM-1
22uF
C569
C604
2.2UF
20%
2 50V
CERM
1812
22uF
C820
22uF
20%
2 50V
CERM
1812
C821
22uF
20%
2 35V
ELEC
SM-1
MBR0540
C750 1
20%
50V
CERM 2
1812
2.2UF
20%
2 50V
CERM
1812
C819
22uF
20%
2 35V
ELEC
SM-1
20%
2 35V
ELEC
SM-1
C509
0.22UF
L37
20%
2 25V
CERM
805
3
38
+PBUS
CRITICAL
1625_VSW
4700pF
20%
50V
CERM 2
1812
SM
CRITICAL
D3
SM
U18
20%
50V
CERM 2
1812
IRF7805
1625_TG
EXTVCC
16
15
2
3
5
1625_FCB 4
8
1625_VIN
1625_RUNSS
1625_COMP
31
5%
1/16W
MF
2 402
1N914
SOT23
R432
1
10K
D4
SM
CRITICAL
R402
38
U21
2
38 31
C644 1
Q59
5%
1/16W
MF
603 1
0.1UF
102K
NO STUFF
R4431
6 7
38
8.0UH-6.8A
PGND
1%
1/16W
MF
402
1%
1/16W
MF
402 2
C510
5%
25V
CERM 2
603
4.99K
1%
1/16W
MF
402 1
0.1UF
20%
50V
CERM 2
805
C463
C462
470pF
10%
50V
2 CERM
603
C461
4700pF
5%
25V
CERM 2
603
XW4
SM
1625_SGND
33UF
20%
25V 2
ELEC
SM1
1%
1/16W
MF
2 402
20%
2 25V
ELEC
SM1
C794
33UF
20%
2 25V
ELEC
SM1
MBRS140T3
2 3
R360
C536 1
10%
25V
2 CERM
402
20%
10V
2 CERM
1206
OMIT
33UF
158K
C769
D27
SM
C554
0.0047UF
4.7UF
SO-8
NO STUFF
R359
IRF7811W
1625_BG
C765 1
4.7UF
Q60
5%
1/16W
MF
2 402
C535
20%
2 25V
CERM
1206
CRITICAL
SM1
R392
WHEN +24V_PBUS IS BELOW ~13.44V,
38
COMP_RC
1625 IS SHUT-OFF
5 6
C822 1
16.2K
4.7UF
33UF
1%
1/16W
MF
2 402
20%
25V
CERM 2
1206
20%
25V 2
ELEC
SM1
C758
33UF
C793 1
20%
2 25V
ELEC
SM1
33UF
20%
25V 2
ELEC
SM1
1625_VFB
BACKUP BATTERY / USB CONNECTOR
+5V_MAIN
PMU SUPPLY
CRITICAL
BOOTSTRAP SYSTEM FROM

ADAPTER OR BATTERY
J11
54550-1490
F-RT-SM
15
38 31
1
2
+ADAPTER
+PBUS
DCDC_EN
390
+5V_MAIN
+BATT
NC
MBR0540
RIGHT_USB_DM
26 37 39
RIGHT_USB_DP
26 37 39
+24V_PBUS
38
+ADAPTER_OR_BATT
D19
SM
26 39
MBR0540
10
26 39
6 CRITICAL
C625
0.1UF
+PBUS IS BOTH AN INPUT AND OUTPUT TO BUBBA

24V IS AN OUTPUT FROM BUBBA
+4_85V_RAW
20%
50V
2 CERM
805
D11
SM
30 38
VTAP
+4_6V_BU
33 38
8
2
1
7
C599 1
0.1UF
20%
10V
CERM 2
402
R5211
294K
1%
1/16W
MF
402 2
R483
C613
470pF
10%
50V
2 CERM
603
+3V_PMU
U25
(+4_6V_BU)
4
1
NC
14
16
LP2951
SOI
IN
OUT
SENSE ERR
SHUT FDBK
GND
12
13
3V_PMU_VTAP
2
MBR0520LT
U30
D18
SOT23
NEC_RIGHT_USB_PWREN
6 CRITICAL
1N914
D7
SM
PLUS5VTAP
19 29 33 34 39
11
2 38 +ADAPTER_ILIM
5%
1/4W
FF
1210
D17
SM
R508
MBR0520LT
5%
1/16W
MF
2 603
LP2951
SOI-3.3V
IN
OUT
SENSE ERR
SHUT FDBK
GND
4
1
5
7
R468
1
5%
1/16W
MF
2 603
3V_PMU_SENSE
FB_4_85V_BU
+4_85V_ESR
38
R5411
100K
C568
2.2UF
1%
1/16W
MF
402 2
20%
10V
2 CERM
805
C553
+3V_PMU_ESR
38
0.1UF
20%
10V
2 CERM
402
C584
10UF
20%
6.3V
2 CERM
805
12.8V REGULATOR

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-6531
OF
32 44
1
3.3V/5V MAIN SUPPLY

+24V_PBUS
C516
2.2UF
20%
50V
CERM 2
1812
C508 1
C763
2.2UF
2.2UF
20%
50V
CERM 2
1812
C770 1
6 5
5 6
CRITICAL
38
Q61
4
R4561
5V_RSNS
C759
22UF
C756 1
20%
6.3V 2
TANT
CASE-D4
2
8
R520
1M
5%
1/16W
MF
2 402
C545
R457
5%
1/16W
MF
2 402
2 3
SSOP
TG1
TG2
25 BOOST1
BOOST2
26 SW1
SW2
23 BG1 CRITICAL
BG2
5V_SW
38
5V_BG
5 6
NO STUFF
R4631
1%
1/4W
FF
1206
SNS1+
SNS2+ 14
SNS1-
SNS2- 13
5V_VOSNS
5V_ITH
5V_RUNSS
VOSNS1
ITH1
RUN/
SS1
FCB
FREQSET
STBYMD
113K
C566
180pF
1%
1/16W
MF
402 2
C583
C533
0.0022UF
5%
50V
2 CERM
402
7
1
5
3707_FSET
0.047UF
38
19
5V_SNSM
Q72
20%
25V
2 CERM
805
SOI
R5291
R5391
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
10
3V_SW
22UF
2 3
3V_SNSP
37
3V_SNSM
VOSNS2 12
ITH2 11
RUN/ 15
SS2
330UF
22UF
20%
10V
CERM 2
1210
C620
3V_VOSNS
0.001uF
3V_ITH
3V_RUNSS
PGOOD 28
1
C823
20%
2 6.3V
POLY
SMD
C826 1
10
3V_BG
37
SI4888DY
C811
20%
2 10V
CERM
1210
MBRS140T3
3V_BOOST
17
5V_SNSP
20%
50V
CERM
402
18
C598
D34
SM
CRITICAL
0.22UF
5%
1/16W
MF
603 2
16
37
C532
38
0.0052
2
IHLP-5050
2.2
37
0.001uF
1
R482
2.2UF
20%
2 50V
CERM
1812
R515
4.7UH
1
C785
+3V_MAIN
10
LTC3707
27
5V_TG
5V_BOOST
3 2
24
U28
5%
1/16W
MF
2 603
20%
25V
CERM 2
805
SOI
21
EXT INT VIN 3.3

VCC VCC
VOUT
2.2
0.22UF
10
5%
1/16W
MF
2 402
20%
2 50V
CERM
1812
3V_RSNS
L41
MBR0540
3V_BOOST_ESR
C779
2.2UF
20%
2 50V
CERM
1812
SOI
D13
SM
NC
2.2UF
SI4888DY
+5V_MAIN
22
SI4888DY
R369
10
20%
10V
2 CERM
1210
5%
1/16W
MF
2 402
C800
CRITICAL
20%
2 10V
CERM
1206
5V_BOOST_ESR
6 5
Q52
R378
22UF
Q71
4
3V_TG
4.7UF
47K
CRITICAL
MBRS140T3
C760
D22
SM
1
1M
5%
1/16W
MF
402 2
MBR0540
3707_INTVCC
20%
10V
CERM 2
1210
330UF
D6
SM
2
IHLP-5050
1%
1/4W
FF
1206
3 2
4.7UH
0.0052
R431
C567
R477
5%
1/16W
MF
402 2
L38
R731
CRITICAL
C806
20%
2 50V
CERM
1812
CRITICAL
SOI
38
2.2UF
20%
50V
CERM 2
1812
SI4888DY
+5V_MAIN
2.2UF
20%
50V
CERM 2
1812
C611
0.0022UF
C612
20%
50V
CERM
402
NO STUFF
63.4K
180pF
10%
50V
2 CERM
402
R507
C590 1
1%
1/16W
MF
2 402
5%
50V
CERM 2
402
10%
50V
CERM 2
402
5V_ITH_RC
10%
16V
CERM 2
402
3707_FCB
SGND
R462
R481
21.5K
15K
1%
1/16W
MF
402 2
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L
C576
C560
100PF
1%
1/16W
MF
402 2
38
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
3V_ITH_RC
C610
20K
1M
35 33 DCDC_EN_L
LTC3707_START_RC
20K
1%
1/16W
MF
2 402
1%
1/16W
MF
2 402
3V_5V_OK
35
XW8
SM
SOT-363
R514
12.7K
3707_SGND
2N7002DW
5%
1/16W
MF
402
32 38
R519
5%
50V
CERM 2
402
Q23
R523
100PF
5%
1/16W
MF
2 402
POWERDOWN DELAY IS AROUND 4MS-15.6MS
+4_6V_BU
R467
20%
16V
CERM 2
402
3V START TO TURN ON ~25MS AFTER DCDC_EN_L
20
0.01UF
5%
50V
2 CERM
402
20%
10V
2 CERM
402
PGND
3707_STBY
0.1UF
C534
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD

220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
220PF
5%
2 25V
CERM
402
THERES NO 10UF INPUT CAP

BECAUSE Q21 IS PLACED AT
OUTPUT OF +3V_MAIN SWITCHER
R506
470K
5%
1/16W
MF
2 402
D16
DCDC_EN
R528
30 29
PMU_POWER_UP_L
35 33
DCDC_EN_L
+3V_MAIN
+3V_SLEEP
Q25
SOT-363
SOT-363
0.01UF
20%
16V
2 CERM
402
SLEEP
DCDC_EN
DCDC_EN_L
1 (2.99V)
R308
Run
5%
1/16W
MF
2 402
Sleep
Shutdown
+3V_PMU
+3V_PMU
+4_6V_BU
+3V_PMU
C662
0.01UF
1
+3V_SLP_ON
33 SLEEP_LS5
100K 2
C659
5) FIREWIRE PHY
10UF
20%
6.3V
2 CERM
805
4) FANS
5
1
+5V_MAIN
Q32
R3771
R3501
5%
1/16W
MF
402 2
5%
1/16W
MF
402 2
100K
R697
1
100K 2
5%
1/16W
MF
402
SLEEP_L_LS5 19
20%
10V
CERM
402
5V_SLEEP_PWREN
+5V_SLEEP
C697
10UF
20%
6.3V
2 CERM
805
TSOP
SI3443DV
Q43
3V_SLEEP_PWREN_L
1) CPU PLL Config Control
2) INTREPID - IIC AND PCI PULL-UPS
3) MAP31 - 3V RAIL (IF USING D3COLD)
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
TSOP
5) LVDS DDC PULL-UPS
SI3443DV
Q28
6) DVI LEVEL SHIFTERS & PULL-UPS & HPD

7) SOUND BOARD
8) BOOT BANGER
C639
9) HARD DRIVE (IF USING 3V LOGIC)
2200pF
2
10) WIRELESS (IF POWERING OFF IN SLEEP)
11) PMU - IIC Pull-ups

1
R298
100K
3 NO STUFF
5%
1/16W
MF
2 402
5%
50V
CERM
603
12) PCI PULL-UPS
Q79
2N7002DW
39 35 33 30 25 23
C694
100uF
SLEEP
2N7002DW
100K 2
5%
1/16W
MF
402
6 NO STUFF
SOT-363
SOT-363
S
1
27 34 35
100K 2
2N7002DW
SLEEP_NET 2
SOT-363
3.3V/5V REGULATOR
Q9
2N7002DW
100K 2
5%
1/16W
MF
402
SLEEP 1
5%
1/16W
MF
402
R367
1
33
Q79
R296
39 35 33 30 25 23
SLEEP_LS5
SLEEP_LS5_EN_L
Q9
R368
5
SLEEP_L_LS5_EN_L
4
+5V_MAIN
100K
0.1UF
5%
1/16W
MF
2 402
SOT-363
SLEEP_NET_INV5
C700
1
100K
C825
20%
2 10V
POLY
SMD-3
SI3443DV
R300
100uF
1
TSOP
5%
1/16W
MF
2 402
SLEEP LEVEL SHIFTER (3V -> 5V)
3) TRACKPAD
NO STUFF
Q81
SOT-363
470K
2) DVI
5V_HD_PWREN
5%
1/16W
MF
402
R309
4
38

SOT-363
ADDED FOR M10 POWER SEQUENCING

1
C456
0.01UF
20%
16V
2 CERM
402
20%
2 10V
POLY
SMD-3
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
+3V_SLEEP LOADS
5%
1/16W
MF
402
NO STUFF
1) OPTICAL DRIVE
+5V_HD_SLEEP 24
6 NO STUFF
100K 2
Q81
2N7002DW
2
1
20%
16V
CERM
402
23 SLEEP
2N7002DW
+3V_SLP_OK_L
VOLTAGE
+5V_SLEEP LOADS
39 35 33 30 25
3 NO STUFF
D
100K
+5V_MAIN
R538
5%
1/16W
MF
2 402
NO STUFF
State
1
35
R310
C623
SLEEP_L_LS5_NET
100K
PMU_POWER_UP_L
2N7002DW
R589
+3V_SLEEP
+5V_MAIN
DCDC_EN TRUTH TABLE
2N7002DW
0.01UF
20%
16V
2 CERM
402
1N914
SOT23
NO STUFF
Q23
SLEEP
C609
100K 2
5%
1/16W
MF
402
39 35 33 30 25 23
19 29 32 34 39
OF
33 44
1
+3V_MAIN
1.175V -> 1.025V
1.30V -> 1.10V
VCORE POWER SEQUENCING

CPU core follows CPU I/O voltage
NO STUFF
470K
R408
100K
38 23 16 15 8 7 5
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
DP2
BAS16TW
SOT-363
6
1
CPU_VCORE_PWR_SEQ
R322
5%
1/16W
MF
2 402
1%
1/16W
MF
2 402
34
VCORE_FAST<1>
34
VCORE_FAST<2>
3
5
VCORE_SLOW<2>
6
11
VCORE_SLOW<3>
10
VCORE_FAST<3>
14
VCORE_SLOW<4>
R267
R318
34 30
SM
VCORE_FAST<4>
13
VCORE_MUX_SEL
NO STUFF
R303 1R313 1R327 1R323 1R301

0
2N3904
SM
2
470K
470K
470K
470K
SEL
OE
R289
34
VCORE_VID<1>
34
VCORE_VID<2>
34
VCORE_VID<3>
R330 1R326
R305
0
470K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
<D4>
<D3>
<D2>
<D1>
<D4>
<D3>
<D2>
12
34
R302
8.2UF
SOT-363
5
2
VCORE_VCC
R3491
SOT-363
4
3
NO STUFF
C5
10UF
C699
10UF
20%
6.3V 2
CERM
805
C674
10UF
CRITICAL
C431
8.2UF
C234
10UF
20%
6.3V 2
CERM
805
10UF
20%
6.3V 2
CERM
805
20%
6.3V 2
CERM
805
8.2UF
8.2UF
C693 1
C13
10UF
10UF
20%
6.3V
CERM 2
805
10UF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
C116
C6
10UF
20%
6.3V
CERM 2
805
C695 1
10UF
20%
6.3V
CERM 2
805
10UF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
C445
8.2UF
20%
2 16V
TANT
CASE-D
C679 1
20%
2 16V
TANT
CASE-D
C680 1
10UF
20%
6.3V
CERM 2
805
CRITICAL
C444
8.2UF
20%
2 16V
TANT
CASE-D
20%
2 16V
TANT
CASE-D
20%
2 16V
TANT
CASE-D
CRITICAL
C441
C7
10UF
20%
6.3V
CERM 2
805
C430
8.2UF
20%
2 16V
TANT
CASE-D
CRITICAL
C432
C274
10UF
CRITICAL
C443
8.2UF
20%
2 16V
TANT
CASE-D
CRITICAL
MBR0530
38
R4071 C507 1
0
D2
SM
20%
10V
2 CERM
603
5%
1/16W
MF
402 2
+3V_MAIN
C498
1UF
20
PLACE C423 CLOSE

TO PINS 15 & 13!!
C689
C682 1
CRITICAL
C427
20%
2 16V
TANT
CASE-D
VCORE_BOOST
39 33 32 29 19 DCDC_EN
C2
20%
6.3V 2
CERM
805
CRITICAL
+5V_MAIN
38
39 38 34 5 CPU_VCORE_SLEEP
20%
6.3V
CERM 2
805
DP2
DP2
5%
1/16W
MF
2 402
+PBUS
BAS16TW
BAS16TW
Keep trace fat (40-100 mils) and short!!
35 33 27 19 SLEEP_L_LS5
R292
SEL = 0; Y1=A1
SEL = 1; Y1=B1
5%
1/16W
MF
2 402
<D1>
10UF
1K
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
34
NO_4XVCORE
R290
1/16W
MF
2 402
VCORE_VID<4>
GND
NO STUFF
NO STUFF
CRITICAL
15
VCORE_MUX_EN
39
NO STUFF
NO STUFF
Q17
CPU_VCORE_SEQ
34
5%
1/16W
MF
402
2N3904
3
7 CPU_VCORE_HI_OC
Q12
10K
5%
1/16W
MF
402 2
R288
U11
PI3B3257
A1 QSOP Y1
B1
Y2
A2
B2
A3
Y3
B3
A4
Y4
B4
34
CPU_VCORE_SEQ_L
VCC
SYM_VER-2
3
1
20%
10V
2 CERM
402
16
5%
1/16W
MF
2 402
34
NO_4XVCORE
VCORE_FAST<2> 34
1
NO_4XVCORE
0
VCORE_FAST<3> 34
5%
1
1/16W
NO_4XVCORE
MF
0
VCORE_FAST<4>
402
2
5%
1
0.1UF
10K
5%
1/16W
MF
2 402
100K
100K
VCORE_SLOW<1>
R356
R398
R329 1R325
470K
5%
1/16W
MF
2 402
5%
1/16W
MF
402 2
MAXBUS_SLEEP
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
R304
VCORE_FAST<1>
C439
1
1
+5V_MAIN
NO STUFF
NO STUFF
1
1
R328 1R324
R297 R314
470K
0
0
(approx. 7ms delay)
C285
10UF
C4
10UF
20%
6.3V
CERM 2
805
C3
10UF
20%
6.3V
CERM 2
805
C687 1
10UF
20%
6.3V
CERM 2
805
10UF
20%
6.3V
CERM 2
805
20%
6.3V
CERM 2
805
CRITICAL
15
XW15
SM
R397
5%
1/16W
MF
402 2
27.4K
1%
1/16W
MF
402 2
VCC
1UF
20%
10V
CERM 2
603
VCORE_SHDN_L
38
R366
14 INT_GPIO1_PU
10
VCORE_ILIM
(VCORE_GNDSNS) 11
34
16
MAX1717_AB_SEL
SKP/SDN
FBS
ILIM
GNDS
A/B
NO STUFF
5%
1/16W
MF
402
Q50
VCORE_VPLUS
V+
BST 22
DH 24
R337
38
VCORE_REF
REF
34
VCORE_VID<0>
34
VCORE_VID<1>
<D0>
38
VCORE_TON
TON
LX
23
38 VCORE_LX
38
VCORE_CC
CC
DL
14
38 VCORE_DL
D0
D1
D2
D3
D4
GND
13
MIN_LINE_WIDTH=10
21
MIN_LINE_WIDTH=10
20
34
VCORE_VID<2>
MIN_LINE_WIDTH=10
19
34
VCORE_VID<3>
MIN_LINE_WIDTH=10
18
34
VCORE_VID<4>
MIN_LINE_WIDTH=10
17
MAX1717 VID CAN TAKE 3.3V TO 5.5V INPUTS
R336 C529 1
470K
5%
1/16W
MF
2 402
C518
R4481
R3851
1%
1/16W
MF
402 2
1%
1/16W
MF
402 2
66.5K
0.01UF
20%
16V
CERM 2
402
12.7K
39 38
1UF
VCORE_TIME
VCORE_VGATE
R434
5%
25V
CERM 2
402
20%
10V
2 CERM
603
100K 2
38
C521
390K
5%
1/16W
MF
402
NO STUFF
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
NO CPU
NO CPU
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VDAC
D3 D2 D1 D0
D4=0 D4=1
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
VCORE_SEL_ON
R806
OUTPUT VOLTAGE
20%
50V
CERM 2
402
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
CRITICAL
SO-8
C768
0.0047uF
100
D25
B540C
10%
25V
CERM 2
402
2 3
5%
NO STUFF 1/4W
MF
1210 2
CRITICAL
CRITICAL
CRITICAL
CRITICAL
C728 1
C734 1
C733 1
C732 1
C885 1
20%
2V 2
TANT
7343
20%
2V 2
TANT
7343
20%
2V 2
TANT
7343
20%
2V 2
TANT
7343
20%
2V 2
TANT
7343
220UF
SM
CRITICAL
220UF
220UF
CRITICAL
CPU_VCORE_SNUB
CRITICAL
C731
220UF
C764
0.0022uF
NO STUFF 10%
50V
CERM
603
XW7
SM
C729
CRITICAL
220UF
20%
2 2V
TANT
7343
220UF
C884
220UF
20%
2 2V
TANT
7343
20%
2 2V
TANT
7343
Keep trace fat and short!!
GROUND SENSE VOLTAGE DIVIDER
R2
This allows for an offset to the ground sense to adjust the output voltage.
VREF = 2.0V, HENCE VOFFSET = 2.0V * (R1/(R1+R2)) AND VCORE = VDAC + VOFFSET.
34 38
R321
Q86
2N7002DW
SOT-363
PLACE THIS SHORT AT

PIN OF 1000uF CAP
CLOSEST TO CPU
3.01K
1%
1/16W
MF
2 402
R1
NOTE: R310 (R2) NO STUFFED FOR NO OFFSET CASE
XW3
SM
2 AB_SEL_LOW
38 34
NO STUFF
NO STUFF
SOT-363
R315
38 34
VCORE_GNDDIV
100K
1%
1/16W
MF
402
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
CRITICAL
BOM OPTION
RESISTOR
R321
1_30_VCORE
114S6343
RESISTOR
R321
1_32_VCORE
NO STUFF
R312
1
100
1%
1/16W
MF
402
FOR V-STEP:
Lo/Slow
0
>= 100K PD
<= 1K PD
J5
TABLE_5_ITEM
114S4023
38 34 VCORE_GNDSNS
NO STUFF
M-ST-SM-52465-1217
TABLE_5_ITEM
>= 100K PU
FMAX CONNECTOR
CRITICAL
2.05K2
R808
<= 1K PU
ROUTE AS DIFFERENTIAL PAIR
Q86
A/B_ =
38 VCORE_SNS
2N7002DW
5%
1/16W
MF
2 402
VCORE_GNDSNS
3
D
12
VCORE_VID<0>
34
VCORE_GNDDIV_TEST
11
VCORE_VID<1>
34
VCORE_GNDSNS_TEST
10
VCORE_VID<2>
34
30 +3V_PMU_RESET
VCORE_VID<3>
34
30 23 22 SOFT_PWR_ON_L
VCORE_VID<4>
34
VCORE SUPPLY
NC (RFU)
When A/B_ is high (fast): D4-D0 read as-is

When A/B_ is low (slow): <=1K-ohm -> 0
>=100K-ohm -> 1

SIZE
If all pull-ups are >=100K and all

pull-downs are <=1K, V A = V B .
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
REV.
051-6531 B
SHT
NONE
CRITICAL
C730
220UF
20%
2 2V
TANT
7343
220UF
OMIT
5%
1/16W
MF
402
Hi/Fast
IRF7832
SO-8
1 2
1%
1W
MF
2512
R807
D<4..0>
0.0012
CRITICAL
Connect MAX1717 GND pin 13

to GND at bottom-side FET
VCORE_GNDDIV
34 MAX1717_AB_SEL
R331
SM1
5 34 38 39
Q53
IRF7832
CPU_VCORE_SLEEP
CRITICAL
5%
1/16W
MF
402
1%
1/16W
MF
2 603
CRITICAL
Q55
5%
1/16W
MF
402
0.001UF
5%
1/16W
MF
402 2
162K
1%
1/16W
MF
2 402
5 6
2.2
R376
1.5K
CRITICAL
SO-8
1 2
R809
6 7
Q54
R415
14 38
1
VCORE_SEL_OFF_PU
IRF7832
XW5
SM
VCORE_OFFSET
R805
1
2 3
R7321
VCORE_GNDA
+5V_MAIN
7 8
VCORE_FB
220PF
L36
38 VCORE_GND
FB 4
TIME 3
VGATE 12
C512 1
C459
20%
25V
2 CERM
603
1.2UH-18.3A
0.1UF
470K
5%
1/16W
MF
2 402
10%
25V
2 CERM
402
38 VCORE_DH
CRITICAL
0.0047uF
SO-8-PWRPK
C455
5%
1/16W
MF
603
CRITICAL
2.2
CPU_VCORE_SLEEP_F
SI7860DP
SO-8-PWRPK
NO STUFF
1
R429
VCORE_BST 2
Q49
SI7860DP
QSOP
(VCORE_SNS)
VDD
U20
MAX1717
5%
1/16W
MF
402
CRITICAL
34 30 7 CPU_VCORE_HI_OC
R384
OF
34 44
1
+1_5V_SLEEP LOADS
1) AGP I/O - IF USING D3COLD
2) MAXBUS I/O - IF 1.5V INTERFACE
1.5V/2.5V SWITCHER
+1_5V_MAIN
R715
+1_5V_SLEEP
+1_5V_SLEEP_VIN
5%
1/16W
MF
603
+1_5V_MAIN LOADS
Q46
+2_5V_MAIN
THERES 100K PULL-UP ON PG 31 ALREADY
5%
1/16W
MF
603
1) FBCORE/FBIO IF USING D3COLD

2) INTREPID MEMORY I/O
1_5V_SLEEP_EN_L
R461
100K
C723 1
10UF
5%
1/16W
MF
402 2
C726
2200pF
20%
6.3V
CERM 2
805
5%
50V
2 CERM
603
R480
20
NO STUFF
38
MAX1715_VCC
DP3
20%
2 10V
CERM
805
5%
1/16W
MF
2 402
SOT-363
6
1
R455
R607
100K
33
DCDC_EN_L
330K 2
5%
1/16W
MF
2 402
MAX1715_ON_RC
C531
5%
1/16W
MF
2 402
MAX1715_TON
38 1_5V_ILIM
+PBUS
R4181
0.01UF
SLEEP_L_LS5_INV
20
VCC
VDD
35 38
CRITICAL
C544 1
11
25
BST1
26
DH1 CRITICAL DH2 17
27
LX1
10
4.7UF
20%
25V
CERM 2
1206
SOT-363
12
C519
4.7UF
2N7002DW
100K 2
1
CRITICAL
1
R493
20%
25V
CERM 2
1206
4.7
V+
NC_15
NC_23
NC_28
ILIM1
ILIM2
ON1
ON2
BST2
15
NC
23
NC
28
NC
1000PF
10%
25V
2 X7R
402
5%
1/16W
MF
402
CRITICAL
C559
4.7UF
+2_5V_MAIN
C582
5%
50V
CERM
603
C888
100K 2
SLEEP_L_LS5_INV 1
38
QSOP
Q82
R417
MAX1715_SKIP
MAX1715
3
35
U22
SOT-363
CRITICAL
33 SLEEP_L_LS5_NET
33
19 SLEEP_L_LS5
27
34
NO STUFF
R611
21
+PBUS
5 8
C709
NO STUFF
2N7002DW
35
10UF
2_5V_SLEEP_PWREN_L
158K
MAX1715_GND
C705
TSSOP
2200pF
+PBUS
1%
1/16W
MF
2 402
SI6467BDQ
20%
6.3V
CERM 2
805
R423
1%
1/16W
MF
402 2
Q85
100K 2
5%
1/16W
MF
402
158K
20%
16V
2 CERM
402
Q82
SLEEP
39 35 33 30 25 23
SM
38 2_5V_ILIM
5%
1/16W
5%
MF
1/16W
402
MF
402
DIODE
PROVIDE
PROVIDE
QUICK
SHUT-DOWN
2
POWER DOWN DELAY 1.5MS TO 3.5MS
1_5V_SLEEP_EN_L 35
CRITICAL
0
38
R709
6) PCI1510 CORE
R419
Q19
5) CLOCK SLEWING I/O
2N7002
100K
2 3
4) DDR MUXES
20%
2 10V
CERM
805
NO STUFF
3
D
R450
3) DDR SODIMMS - CORE/IO
C603
2.2UF
2.2UF
BAS16TW
2) GIGABIT ETHERNET - AVDDL

1
C581
R421
35 33 3V_5V_OK
1) MAP31 - FBCORE/FBIO IF USING D3HOT
5%
1/16W
MF
402
+5V_MAIN
+2_5V_SLEEP
+2_5V_MAIN LOADS
35
DP3
R712
SOT-363
4
3
1) INTREPID CORE
2) AGP I/O IF USING D3HOT
BAS16TW
NO STUFF
TSOP
DP3
38 +1_5V_LDO
+2_5V_SLEEP LOADS
+5V_MAIN
SI3446DV
SOT-363
5
2
BAS16TW
4.7UF
20%
25V
2 CERM
1206
20%
2 25V
CERM
1206
R479
18
4.7
2 38 2_5V_BOOST
5%
1/16W
MF
402
C886
1_5V_BOOST
38
10%
2 25V
X7R
402
6 5
20%
25V
2 CERM
603
Q57
IRF7805
38 1_5V_DH
L35
4.7UH
3 2
38
5.11K
C740
10UF
C751
150UF
20%
2 6.3V
CERM
805
C745
150UF
20%
2 6.3V
TANT
SMD-1
7 6
FB2 13
THRML
IRF7811W
SO-8
D23
SM
38
MBRS130LT3
1
2
C908
0.0022UF
10%
OMIT
50V
XW6
CERM
SM
402
38
35
6 7
CRITICAL
20%
25V
2 CERM
603
MAX1715_GND
Q69
IRF7805
38 2_5V_DH
SM
+2_5V_MAIN
CRITICAL
MAX1715_FB2
35
L45
4.7UH
2 3
38 2_5V_LX
SM4
R616
29
6 7
15.4K
R420
POSCAPS
CRITICAL
SO-8
C499
1UF
C907
C782
150UF
20%
2 6.3V
TANT
SMD-1
POSCAPS
POSCAPS
C780
150UF
C788
150UF
20%
2 6.3V
TANT
SMD-1
20%
2 6.3V
TANT
SMD-1
35
R672
10K
1%
1/16W
MF
2 402
2 3
20%
2 16V
CERM
402
MAX1715_GND
1%
1/16W
MF
2 402
MAX1715_FB2
0.022UF
20%
10V
2 CERM
603
20%
6.3V
2 CERM
805
MBRS130LT3
NO STUFF
10UF
D33
SM
IRF7811W
38 2_5V_DL
C809
Q68
5%
1/16W
MF
2 402
1_5V_DL
NO STUFF
C580
0.1UF
5%
1/16W
MF
402 2
FB1
AGND
R4221
Q56
35 38
R424
1%
1/16W
MF
2 402
OUT2 14
35
38
CRITICAL
10K
OUT1
PGOOD
REF
SKIP
2_5V_BST
5%
1/16W
MF
603
20%
2 6.3V
TANT
SMD-1
NO STUFF
R425
POSCAPS
TON
22
1_5V_FB
38 1_5V_LX
POSCAPS
19
SM4
1%
1/16W
MF
2 402
1_5V_FB
DL2
PGND
MAX1715_REF
38
16
DL1
38 1_5V_2_5V_OK
LX2
24
+1_5V_MAIN
SM
CRITICAL
C575
0.1UF
CRITICAL
+1_5V_MAIN
1_5V_BST
5%
1/16W
MF
603
1000PF
38
+1_8V_MAIN
CHANGE R424 BACK TO 10K, 1%, AND STUFF 5.11K FOR 1.5V OPERATION
CONNECTING 1_5V_FB TO GND, FORCES 1.8V OUTPUT
1.8V SWITCHER
+3V_MAIN
+1_8V_SLEEP
+1_8V_MAIN LOADS
3 6
1) INTREPID PLLS
CRITICAL
Q84
R190
39 35 33 30 25 23
SLEEP
CONTINUOUS MODE
22UF
20%
6.3V
CERM 2
1206
20%
6.3V 2
CERM
1206
R727 R797
4.7M
5%
1/16W
MF
2 402
5%
1/16W
MF
2 402
TSSOP
RT
PGOOD 2
RUN/SS
R810
Q83
2N7002DW
35 33
3V_5V_OK
SOT-363
CRITICAL
R803
15K
1
C890
100PF
5%
50V
2 CERM
402
1%
1/16W
MF
2 402
LTC3412_ITH_RC
1
C892
470PF
10%
50V
2 CERM
402
5%
1/16W
MF
2 402
1%
1/16W
MF
2 402
R799
1%
1/16W
MF
2 402
R800
75K
5%
2 25V
CERM
603
10 1_8V_SW 1
11
14
3) CPU PLL Config Straps

4) OPTIONAL VIDEO MEMORY (M10 PRO ONLY)
20%
6.3V 2
CERM
805
+1_8V_MAIN
C235
2200pF
2
1XW11 2
+1_8V_MAIN_LX_F
SM
JUMPER
OPEN
1_8V_SLEEP_PWREN_L
NO STUFF
R610
35 SLEEP_L_LS5_INV
100K 2
5%
1/16W
MF
402
15
VFB
110K
1000PF
10UF
OMIT
1.0UH-3.5A
THERM
SGND PGND PAD
LTC3412_VFB_DIV
C683
C276 1
232K
L75
C894
5%
NO STUFF 50V
1
C887
1000PF
CERM
603
10%
25V
2 X7R
402
1.5V/1.8V/2.5V SUPPLIES
22UF
17
R798
R627
LTC3412_VFB
1
1
38
SW
SOT-363
BURST MODE
NO STUFF
2N7002DW
ITH
SYNC/MODE
13
Q83
D
G
LTC3412_PGOOD
5%
2 50V
CERM
402
CRITICAL
3
LTC3412_ITH
LTC3412_SYNC
12
3V_5V_OK_INV
C893
22PF
5%
1/16W
MF
2 402
U58
5
100K
SVIN PVIN
LTC3412_RT
LTC3412_RUNSS
5%
1/16W
MF
2 402
1) MPC7450 - MAXBUS I/O - IF 1.8V INTERFACE

1
2) CPU JTAG & MaxBus Pull-ups
R802
LTC3412
100K
+1_8V_SLEEP LOADS
TSSOP
16
22UF
C93
SI6467BDQ
5%
1/16W
MF
402
C891
100K 2
1
1
C677
22UF
R801
20%
6.3V
2 CERM
1206
1%
1/16W
MF
2 402

OMIT
1%
1/16W
MF
2 402
XW1
SM
LTC3412_GND

2
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
20%
2 6.3V
CERM
1206
309K
OF
35 44
1
8
SIG_NAME
MAX_VIAS
CPU_AACK_L
MAXBUS
STUB_LENGTH
250.0000
CPU_ADDR<0..31>
DIGITAL SIGNALS
GROUP
INTREPID
CLOCKS
5 8
83 MHZ
5 8
SIG_NAME
MAX VIAS
MAX EXPOSED LENGTH
STUB_LENGTH
SYSCLK_CPU_UF
SYSCLK_CPU
200.0000
NET_SPACING_TYPE
PULSE PARAM
10 MIL SPACING
10 MIL SPACING
5 8
250.0000
10 MIL SPACING
5 8
INT_CPUFB_OUT
10 MIL SPACING
250.0000
10 MIL SPACING
5 8
INT_CPUFB_OUT_SHORT
10 MIL SPACING
CPU_BR_L
250.0000
10 MIL SPACING
5 8
INT_CPUFB_OUT_NORM
10 MIL SPACING
5 8
INT_CPUFB_IN_NORM
10 MIL SPACING
250.0000
CPU_DATA<0..31>
250
83 MHZ
6 8
INT_CPUFB_LONG
CPU_DATA<32..63>
250
83 MHZ
6 8
INT_CPUFB_IN
CPU_DBG_L
250.0000
5 8
SYSCLK_DDRCLK_A0_UF
CPU_DTI<0..2>
250
10 MIL SPACING
5 8
10 MIL SPACING
250.0000
CPU_GBL_L
CPU_QACK_L
5 8
250.0000
250.0000
10 MIL SPACING
5 8
250.0000
10 MIL SPACING
5 8
250.0000
10 MIL SPACING
5 8
250.0000
10 MIL SPACING
5 8
250.0000
10 MIL SPACING
5 8
CPU_QREQ_L
CPU_TA_L
CPU_TBST_L
10 MIL SPACING
CPU_HIT_L
CPU_TEA_L
250.0000
CPU_TS_L
250.0000
5 8
5 8
10 MIL SPACING
5 8
CPU_TSIZ<0..2>
250
5 8
CPU_TT<0..4>
250
5 8
CPU_WT_L
250.0000
5 8
MEM_DATA<7..0>
200
167 MHZ
9 10
RAM_DATA_A<7..0>
200
167 MHZ
10 11
RAM_DATA_B<7..0>
167 MHZ
10 11
MEM_DQS<0>
200
TOTAL LENGTH CONTROLLED BY SPREADSHEET
200
9 10
RAM_DQS_A<0>
200
10 11
RAM_DQS_B<0>
200
10 11
MEM_DQM<0>
200
9 10
RAM_DQM_A<0>
GROUP 1
PULSE_PARAM
CPU_BG_L
CPU_DRDY_L
NO_TEST
10 MIL SPACING
250
CPU_DRDY_L_UF
GROUP 0
NET_SPACING_TYPE
CPU_ARTRY_L
CPU_CI_L
MAX_EXPOSED_LENGTH
CLOCK LINE CONSTRAINTS
GROUP
200
10 11
RAM_DQM_B<0>
200
MEM_DATA<15..8>
200
167 MHZ
9 10
RAM_DATA_A<15..8>
200
167 MHZ
10 11
RAM_DATA_B<15..8>
167 MHZ
10 11
MEM_DQS<1>
RAM_DQS_A<1>
200
10 11
RAM_DQS_B<1>
200
10 11
200
9 10
10 11
10 MIL SPACING
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
SYSCLK_DDRCLK_A1_UF
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
SYSCLK_DDRCLK_B0_UF
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
SYSCLK_DDRCLK_B1_UF
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
200.0000
10 MIL SPACING
9 11
200.0000
10 MIL SPACING
9 11
200.0000
10 MIL SPACING
9 11
200.0000
10 MIL SPACING
9 11
SYSCLK_DDRCLK_A0
DDRCLK_A0
SYSCLK_DDRCLK_A0_L
DDRCLK_A0
SYSCLK_DDRCLK_A1
DDRCLK_A1
SYSCLK_DDRCLK_A1_L
DDRCLK_A1
SYSCLK_DDRCLK_B0
DDRCLK_B0
200.0000
10 MIL SPACING
9 11
SYSCLK_DDRCLK_B0_L
DDRCLK_B0
200.0000
10 MIL SPACING
9 11
SYSCLK_DDRCLK_B1
DDRCLK_B1
200.0000
10 MIL SPACING
9 11
SYSCLK_DDRCLK_B1_L
DDRCLK_B1
200.0000
10 MIL SPACING
9 11
200.0000
10 MIL SPACING
14
200.0000
10 MIL SPACING
14
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12 18
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12 17
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12 24 39
200.0000
10 MIL SPACING
12
200.0000
10 MIL SPACING
12 26
200.0000
10 MIL SPACING
12
INT_REF_CLK_OUT
INT_REF_CLK_IN
CLK66M_GPU_AGP_UF
CLK66M_GPU_AGP
INT_AGP_FB_OUT
INT_AGP_FB_IN
CLK33M_CBUS_UF
CLK33M_CBUS
SHOULD BE AT MOST 4 VIAS FOR CLK
CLK33M_AIRPORT_UF
CLK33M_AIRPORT
CLK33M_USB2_UF
CLK33M_USB2
INT_PCI_FB_OUT
MEM_DQM<1>
GROUP 2/3
200
10 11
RAM_DQM_B<1>
200
10 11
MEM_DATA<31..16>
200
RAM_DATA_B<31..16>
9 10
167 MHZ
10 11
167 MHZ
10 11
200
167 MHZ
9 10
RAM_DQM_A<3..2>
200
167 MHZ
10 11
RAM_DQM_B<3..2>
200
167 MHZ
10 11
MEM_DATA<47..32>
200
167 MHZ
9 10
RAM_DATA_A<47..32>
200
167 MHZ
10 11
200
4
200
167 MHZ
10 11
167 MHZ
9 10
167 MHZ
10 11
200
200
167 MHZ
200
167 MHZ
9 10
RAM_DQM_A<5..4>
200
167 MHZ
10 11
200
167 MHZ
10 11
MEM_DATA<55..48>
RAM_DATA_A<55..48>
RAM_DATA_B<55..48>
MEM_DQS<6>
RAM_DQS_B<6>
MEM_DQM<6>
RAM_DQM_A<6>
RAM_DQM_B<6>
200
167 MHZ
9 10
200
167 MHZ
10 11
167 MHZ
10 11
200
200
ETHERNET
10 11
200
MARVELL
9 10
200
10 11
200
RAM_DATA_A<63..56>
200
167 MHZ
10 11
RAM_DQS_B<7>
MEM_DQM<7>
200
200
167 MHZ
10 11
200
10 11
200
9 10
200
10 11
RAM_DQM_B<7>
200
10 11
RAM_ADDR<12..0>
MEM_BA<1..0>
RAM_BA<1..0>
MEM_CS_L<3..0>
RAM_CS_L<3..0>
MEM_CKE<3..0>
RAM_CKE<3..0>
MEM_RAS_L
RAM_RAS_L
83 MHZ
200
200
10 MIL SPACING
GPU_DVO_CLKP
10 MIL SPACING
CLK27M_GPU_XOUT
10 MIL SPACING
CLK27M_XTAL_IN
10 MIL SPACING
CLK27M_GPU_XIN
10 MIL SPACING
CLK18M_INT_XIN
10 MIL SPACING
14
CLK18M_INT_XOUT
10 MIL SPACING
14
CLK18M_XTAL_IN
10 MIL SPACING
14
CLK18M_INT_EXT
10 MIL SPACING
14
CLK25M_ENET_XIN
10 MIL SPACING
27
CLK25M_ENET_XOUT
10 MIL SPACING
27
10 MIL SPACING
26
10 MIL SPACING
26
THERES ANOTHER 280MIL LEG

7
19 20
200.0000
10 MIL SPACING
14 25 39
SND_CLKOUT
200.0000
10 MIL SPACING
14 25 39
CLKENET_PHY_RX
200.0000
CLKENET_LINK_RX
200.0000
CLKENET_PHY_GBE_REF
13 27
200.0000
27
10 MIL SPACING
13 27
200.0000
CLKENET_LINK_TX
200.0000
CLKENET_LINK_GTX
27
10 MIL SPACING
13 27
200.0000
CLKENET_PHY_GTX
200.0000
13
FIREWIRE
CLKFW_PHY_PCLK
10 MIL SPACING
13 27
200.0000
28
CLKFW_LINK_PCLK
200.0000
10 MIL SPACING
13 28
CLKFW_PHY_LCLK
200.0000
10 MIL SPACING
13 28
CLKFW_LINK_LCLK
200.0000
FW_XI
200.0000
10 MIL SPACING
28
FW_OSC
200.0000
10 MIL SPACING
28
13
SIGNAL CONSTRAINTS - PAGE 1
9 11
9
200
9 11
9

9 11
9
9 11
200.0000
9 11
MEM_MUXSEL_H<1..0>
9 10
MEM_MUXSEL_L<1..0>
9 10
RAM_MUXSEL_H
10
RAM_MUXSEL_L
10
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
REV.
051-6531
SHT
NONE
27
10 MIL SPACING
200.0000
200
RAM_WE_L
10 MIL SPACING
GPU_FBCLK1_L
9 11
200.0000
MEM_WE_L
10 MIL SPACING
GPU_FBCLK1
RAM_CAS_L
10 MIL SPACING
GPU_FBCLK0_L
9 11
200.0000
MEM_CAS_L
10 MIL SPACING
GPU_FBCLK0
9 10
10 MIL SPACING
GPU_SSCLK_IN
CLKENET_PHY_TX
10 11
200
RAM_DQM_A<7>
MEM_ADDR<12..0>
10 MIL SPACING
GPU_SSCLK_UF
CLKENET_LINK_GBE_REF
10 11
9 10
10 MIL SPACING
SND_SCLK
SOUND
200
167 MHZ
12
GPU_CLK27M_OUT
NEC_XT2
10 11
200
RAM_DQS_A<7>
10 MIL SPACING
GPU_CLK27M_UF
NEC_XT1
200
MEM_DQS<7>
200.0000
9 10
MEM_DATA<63..56>
RAM_DATA_B<63..56>
CRYSTALS
10 11
MEM_DQM<5..4>
RAM_DQS_A<6>
167 MHZ
200
RAM_DQM_B<5..4>
CONTROL
10 11
RAM_DQS_B<5..4>
ADDR
167 MHZ
RAM_DQS_A<5..4>
GROUP 7
200
10 11
MEM_DQM<3..2>
MEM_DQS<5..4>
GROUP 6
167 MHZ
MAP31
9 10
RAM_DQS_B<3..2>
RAM_DATA_B<47..32>
200
200
4
200
RAM_DQS_A<3..2>
GROUP 4/5
167 MHZ
MEM_DQS<3..2>
9 10
RAM_DQM_A<1>
RAM_DATA_A<31..16>
DDR
RAM
200
200
INT_PCI_FB_IN
OF
36 44
1
8
GROUP
SIG_NAME
AGP
Digital Signals (contd)
AGP BYTES 0-1
AGP BYTES 2-3
7
DELAY_RULE
MAX_VIAS MAX_EXPOSED_LENGTH STUB_LENGTH
GROUP
100
66 MHz
12 18
AGP_CBE<1..0>
100
66 MHz
12 18
AGP_AD_STB<0>
100
8 MIL SPACING
12 18
AGP_AD_STB_L<0>
100
8 MIL SPACING
12 18
AGP_AD<31..16>
5
5
4
AGP_AD_STB_L<1>
AGP_SBA<7..0>
AGP_SB_STB
AGP_SB_STB_L
AGP_FRAME_L
AGP_TRDY_L
AGP_DEVSEL_L
AGP_STOP_L
AGP_PAR
100
66 MHz
8 MIL SPACING
12 18
100
8 MIL SPACING
12 18
66 MHz
100.0000
8 MIL SPACING
12 18
100.0000
8 MIL SPACING
12 18
12 18
250.0000
12 18
250.0000
12 18
250.0000
12 18
250.0000
12 18
12 18
285.0000
12 18
AGP_GNT_L
250.0000
12 18
250.0000
12 18
250
19 20
GPU_DVO_HSYNC
19 20
GPU_DVO_VSYNC
19 20
FIREWIRE
SIG_NAME
DIFFERENTIAL_PAIR
MAX_EXPOSED_LENGTH
ENET_MDI0
MDI_P<0>
ENET_MDI0
MDI_M<1>
ENET_MDI1
SPACING DELETED BECAUSE
MDI_P<1>
ENET_MDI1
OF PHYSICAL CONSTRAINTS
MDI_M<2>
ENET_MDI2
AROUND MARVELL PHY
MDI_P<2>
ENET_MDI2
MDI_M<3>
ENET_MDI3
MDI_P<3>
ENET_MDI3
RJ45_DN<0>
RJ45_DP0
10 MIL SPACING
27 39
RJ45_DP<0>
RJ45_DP0
10 MIL SPACING
27 39
RJ45_DN<1>
RJ45_DP1
10 MIL SPACING
27 39
RJ45_DP<1>
RJ45_DP1
10 MIL SPACING
27 39
RJ45_DN<2>
RJ45_DP2
10 MIL SPACING
27 39
RJ45_DP<2>
RJ45_DP2
10 MIL SPACING
27 39
RJ45_DN<3>
RJ45_DP3
10 MIL SPACING
27 39
RJ45_DP<3>
RJ45_DP3
27 39
FW_TPA0N
FW_TPA0
FW_TPA0P
FW_TPA0
FW_TPB0N
FW_TPB0
FW_TPB0P
FW_TPB0
FW_TPI0N
FW_TPI0
FW_TPI0P
FW_TPI0
FW_TPO0N
FW_TPO0
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
MIN_LINE_WIDTH=3.4
10 MIL SPACING
27
27
FW_TPO0P
FW_TPO0
PCI_CBE<3..0>
MIN_DAISY_CHAIN
33 MHz
12 17 24 26 39
FW_TPA1N
FW_TPA1
500.0000
PCI_FRAME_L
MIN_DAISY_CHAIN
12 17 24 26 39
FW_TPA1P
FW_TPA1
500.0000
PCI_IRDY_L
MIN_DAISY_CHAIN
12 17 24 26 39
FW_TPB1N
FW_TPB1
500.0000
PCI_TRDY_L
MIN_DAISY_CHAIN
12 17 24 26 39
FW_TPB1P
FW_TPB1
500.0000
PCI_DEVSEL_L
MIN_DAISY_CHAIN
12 17 24 26 39
FW_TPI1N
FW_TPI1
PCI_STOP_L
MIN_DAISY_CHAIN
12 17 24 26 39
FW_TPI1P
FW_TPI1
12 17 24 26 39
FW_TPO1N
FW_TPO1
FW_TPO1P
FW_TPO1
100 MHZ
NEED TO MATCH DELAY TO 250
UIDE_DATA<7>
200
13 24
13 24
LVDS
LOWER
27
27
9 12 17 24 26 39
MIN_DAISY_CHAIN
27
27
33 MHz
200
27
27
MIN_DAISY_CHAIN
UIDE_DATA<15..8>
NET_SPACING_TYPE MAX_VIAS
MDI_M<0>
PCI_AD<31..0>
PCI_PAR
12 18
250.0000
GPU_DVOD<0..11>
ULTRA ATA-100
12 18
100
100
ETHERNET
12 18
AGP_REQ_L
AGP_RBF_L
PCI
66 MHz
250.0000
AGP_IRDY_L
DVO
100
28 29
28 29
28 29
28 29
28 29
28 29
28 29
28 29
INTERNAL LAYER
ER = 4.3 (DIELECTRIC CONSTANT)
W = 4MIL (TRACE WIDTH)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.57OHM
ZDIFF = 99.8OHM
29 39
29 39
29 39
CLKLVDS_LN
CLKLVDS_L
10 MIL SPACING
19 22 39
CLKLVDS_LP
CLKLVDS_L
10 MIL SPACING
19 22 39
200
100 MHZ
13 24
LVDS_L0N
LVDS_L0
10 MIL SPACING
19 22 39
UIDE_ADDR<2..0>
200
100 MHZ
13 24
LVDS_L0P
LVDS_L0
10 MIL SPACING
19 22 39
200.0000
13 24
LVDS_L1N
LVDS_L1
10 MIL SPACING
19 22 39
200.0000
13 24
LVDS_L1P
LVDS_L1
10 MIL SPACING
200.0000
13 24
LVDS_L2N
UIDE_DMACK_L
200.0000
13 24
UIDE_CS0_L
200.0000
13 24
200.0000
200.0000
200.0000
200.0000
UIDE_RST_L
29 39
UIDE_DATA<6..0>
UIDE_DIOW_L
Differential Signals
PULSE_PARAM
AGP_CBE<3..2>
AGP CONTROL
NO_TEST
AGP_AD<15..0>
AGP_AD_STB<1>
AGP SIDEBAND
NET_SPACING_TYPE
FOR FIREWIRE
W = 3.4MIL (TRACE WIDTH)
UIDE_DIOR_L
10 MIL SPACING
UIDE_CS1_L
UIDE_DMARQ
UIDE_IOCHRDY
10 MIL SPACING
UIDE_INTRQ
HD_DATA<15..0>
HD_ADDR<2..0>
HD_RESET_L
HD_DIOW_L
HD_DIOR_L
HD_DMACK_L
13 24
CLKLVDS_UP
CLKLVDS_U
10 MIL SPACING
19 22 39
13
LVDS_U0N
LVDS_U0
10 MIL SPACING
19 22 39
13 24
LVDS_U0P
LVDS_U0
10 MIL SPACING
19 22 39
13
LVDS_U1N
LVDS_U1
10 MIL SPACING
19 22 39
19 22 39
19 22 39
LVDS_U1P
LVDS_U1
10 MIL SPACING
LVDS_U2N
LVDS_U2
10 MIL SPACING
200.0000
24
LVDS_U2P
LVDS_U2
10 MIL SPACING
200.0000
24
TMDS_CONN_CLKN
CLKCONN_TMDS
10 MIL SPACING
22 39
200.0000
24
TMDS_CONN_CLKP
CLKCONN_TMDS
10 MIL SPACING
22 39
200.0000
24
TMDS_CLKN
CLKTMDS
10 MIL SPACING
20 22
HD_CS0_L
200.0000
24
TMDS_CLKP
CLKTMDS
10 MIL SPACING
HD_CS1_L
200.0000
24
TMDS_DN<0>
TMDS_D0
10 MIL SPACING
20 22 39
200.0000
13 24
TMDS_DP<0>
TMDS_D0
10 MIL SPACING
20 22 39
200.0000
24
TMDS_DN<1>
TMDS_D1
10 MIL SPACING
20 22 39
13 24
TMDS_DP<1>
TMDS_D1
10 MIL SPACING
20 22 39
TMDS_DN<2>
TMDS_D2
10 MIL SPACING
20 22 39
TMDS_DP<2>
TMDS_D2
10 MIL SPACING
20 22 39
10 MIL SPACING
HD_IOCHRDY
HD_INTRQ
10 MIL SPACING
33 MHZ
33 MHZ
TMDS
13 24
13 24
EIDE_CS0_L
13 24
EIDE_CS1_L
13 24
USB
13 24
13 24
EIDE_IOCHRDY
13 24
EIDE_INT
13 24
EIDE_RST_L
13 24
EIDE_DMACK_L
13 24
EIDE_DMARQ
13 24
33 MHZ
EIDE_OPTICAL_ADDR<2..0>
33 MHZ
24 39
24 39
EIDE_OPTICAL_CS0_L
24 39
EIDE_OPTICAL_CS1_L
24 39
EIDE_OPTICAL_RD_L
24 39
EIDE_OPTICAL_WR_L
24 39
24 39
EIDE_OPTICAL_INT
24 39
EIDE_OPTICAL_RST_L
24 39
24 39
EIDE_OPTICAL_DMA_RQ
24 39
ENET_LINK_RXD<7..0>
13 27
ENET_RX_DV
POWER
SUPPLIES
13 27
ENET_RX_ER
5
13 27
ENET_LINK_TXD<7..0>
13
ENET_PHY_TX_ER
13 27
ENET_LINK_TX_ER
13
ENET_PHY_TX_EN
13 27
ENET_LINK_TX_EN
13
ENET_MDIO
13 27
ENET_MDC
13 27
ENET_COL
13 27
ENET_CRS
13 27
THERMOSTAT
19 22 39
20 22
NEC_USB_DA
MIN_LINE_WIDTH=5
10 MIL SPACING
26
MIN_LINE_WIDTH=5
10 MIL SPACING
26
NEC_USB_DAP
NEC_USB_DA
USB_DEM
USB_DE
5 MIL SPACING
14
USB_DEP
USB_DE
5 MIL SPACING
14
NEC_USB_DBM
NEC_USB_DB
MIN_LINE_WIDTH=5
10 MIL SPACING
26
MIN_LINE_WIDTH=5
10 MIL SPACING
26
NEC_USB_DBP
NEC_USB_DB
USB_DFM
USB_DF
5 MIL SPACING
14
USB_DFP
USB_DF
5 MIL SPACING
14
BT_USB_DM
BT_USB_D
5 MIL SPACING
14 24 39
BT_USB_DP
BT_USB_D
5 MIL SPACING
14 24 39
NEC_USB_RSDM1
NEC_USB_RSD1
MIN_LINE_WIDTH=5
10 MIL SPACING
26
NEC_USB_RSDP1
NEC_USB_RSD1
MIN_LINE_WIDTH=5
10 MIL SPACING
26
NEC_USB_RSDM2
NEC_USB_RSD2
MIN_LINE_WIDTH=5
10 MIL SPACING
26
MIN_LINE_WIDTH=5
NEC_USB_RSDP2
NEC_USB_RSD2
10 MIL SPACING
26
MODEM_USB_DM
MODEM_USB_D
5 MIL SPACING
14 25 39
MODEM_USB_DP
MODEM_USB_D
5 MIL SPACING
14 25 39
LEFT_USB_DM
LEFT_USB
MIN_LINE_WIDTH=5
10 MIL SPACING
24 26 39
LEFT_USB_DP
LEFT_USB
MIN_LINE_WIDTH=5
10 MIL SPACING
24 26 39
RIGHT_USB_DM
RIGHT_USB
MIN_LINE_WIDTH=5
10 MIL SPACING
26 32 39
RIGHT_USB_DP
RIGHT_USB
MIN_LINE_WIDTH=5
10 MIL SPACING
26 32 39
1772_CSSN
1772_CSS
31
1772_CSSP
1772_CSS
31
1772_CSIN
1772_CSI
31
1772_CSIP
1772_CSI
31
3V_SNSM
3V_SNS
33
3V_SNSP
3V_SNS
33
5V_SNSM
5V_SNS
33
5V_SNSP
5V_SNS
33
THERM1_DM
THERM1
25
THERM1_DP
THERM1
25
THERM2_DM
THERM2
25
THERM2_DP
THERM2
25
THERM1_M_DM
THERM1_MAIN
THERM1_M_DP
THERM1_MAIN
FW_LINK_DATA<7..0>
13 28
THERM2_M_DM
THERM2_MAIN
FW_PHY_DATA<7..0>
28
THERM2_M_DP
THERM2_MAIN

W = 4MIL(USB 1.1)/ 5MIL(USB 2.0) (TRACE WIDTH)
S = 5MIL (USB 1.1) (SEPERATION OF DIFF TRACES)
S = 10MIL (USB 2.0) (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.5OHM (USB 1.1)/ 46.2OHM (USB 2.0)
ZDIFF = 89.3OHM (USB 1.1)/ 89.4OHM (USB 2.0)

FW_LINK_CNTL<1..0>
13 28
THERM1_A_DM
THERM1_ALT
25
28
THERM1_A_DP
THERM1_ALT
25
FW_LINK_LREQ
13
THERM2_A_DM
THERM2_ALT
25
FW_PHY_LREQ
13 28
THERM2_A_DP
THERM2_ALT
25
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SCALE
13 28
REV.
051-6531
SHT
NONE
INTERNAL LAYER (USB1.1/USB 2.0)
FW_PHY_CNTL<1..0>
FW_PINT

S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 53.37OHM
ZDIFF = 107.17OHM
19 22 39
NEC_USB_DAM
13 27
ENET_PHY_TXD<7..0>
FIREWIRE MII
19 22 39
19 22 39
24
EIDE_OPTICAL_DATA<15..0>
100 MHZ
EIDE_WR_L
ETHERNET MII
10 MIL SPACING
200
TOTAL UIDE+HD SKEW <500MIL
EIDE_RD_L
OPTICAL
10 MIL SPACING
CLKLVDS_U
24
EIDE_ADDR<2..0>
10 MIL SPACING
LVDS_L2
100 MHZ
EIDE_DATA<15..0>
INTREPID
LVDS_L2
LVDS_L2P
CLKLVDS_UN
UPPER
200
HD_DMARQ
EIDE
19 22 39
OF
37 44
1
POWER NET CONSTRAINTS

GROUP
SIG_NAME
VOLTAGE
MIN_LINE_WIDTH
GROUP
SIG_NAME
CPU_VCORE_SLEEP
CPU
MIN_NECK_WIDTH
CPU_AVDD
MAXBUS_SLEEP
MAIN/SLEEP
+24V_PBUS
BATTERY
CHARGER
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+BATT
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+PBUS
VOLTAGE=12.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+5V_MAIN
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+5V_SLEEP
VOLTAGE=5V
MIN_LINE_WIDTH=25
+3V_MAIN
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+3V_SLEEP
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+2_5V_MAIN
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+2_5V_SLEEP
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_8V_MAIN
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
+1_8V_SLEEP
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_MAIN
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_SLEEP
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_5V_LDO
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=1.5V
39
39
DDR RAM
INTREPID
PLLS
MIN_NECK_WIDTH=10
+3V_PMU
+1_5V_SLEEP_VIN
ADAPTER
VOLTAGE=24V
MIN_LINE_WIDTH=25
39
39
REFERENCE
35
MIN_NECK_WIDTH=10
35
+ADAPTER
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
31 32
+ADAPTER_SW
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
31
+ADAPTER_SENSE
VOLTAGE=24V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
31
+BATT_POS
VOLTAGE=16.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31 39
BATT_NEG
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31 39
1772_DCIN
VOLTAGE=24V
MIN_LINE_WIDTH=10
1772_LX
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31
+BATT_14V_FUSE
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31
+BATT_24V_FUSE
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31
+BATT_RSNS
VOLTAGE=12.6V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
31
+BATT_VSNS
VOLTAGE=12.6V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
31
1772_LDO
VOLTAGE=5.4V
MIN_LINE_WIDTH=10
31
1772_DLOV
VOLTAGE=5.4V
MIN_LINE_WIDTH=10
31
1772_GND
VOLTAGE=0V
MIN_LINE_WIDTH=10
31
CARDBUS
ATI M10
PMU
VOLTAGE=24V
MIN_LINE_WIDTH=10
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=25
GROUP
5 34 39
5
LTC1625
14V SWITCHER
5 7 8 15 16 23 34
11
MIN_NECK_WIDTH=10
9 10 15 16
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
14
+1_5V_INTREPID_PLL
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
8 12 14
+1_5V_INTREPID_PLL1
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
LTC3707
+1_5V_INTREPID_PLL2
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
5V SWITCHER
+1_5V_INTREPID_PLL3
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
+1_5V_INTREPID_PLL4
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=5
14
3V SWITCHER
SIG_NAME
VOLTAGE
1
MIN_LINE_WIDTH
MIN_NECK_WIDTH
1625_VIN
VOLTAGE=24V
MIN_LINE_WIDTH=10
1625_VSW
VOLTAGE=12.8V
MIN_LINE_WIDTH=25
1625_EXTVCC
VOLTAGE=5V
MIN_LINE_WIDTH=10
1625_INTVCC
VOLTAGE=5V
MIN_LINE_WIDTH=10
1625_SGND
VOLTAGE=0V
MIN_LINE_WIDTH=10
1V20_REF
VOLTAGE=1.2V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
31 32
3707_INTVCC
VOLTAGE=5V
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
33
5V_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
33
5V_RSNS
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
33
3V_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
33
MIN_NECK_WIDTH=10
33
+1_5V_INTREPID_PLL5
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=5
12
+1_5V_INTREPID_PLL6
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
12
3V_RSNS
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
+1_5V_INTREPID_PLL7
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
3707_SGND
VOLTAGE=0V
MIN_LINE_WIDTH=10
+1_5V_INTREPID_PLL8
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
14
2_5V_LX
MAX1715
32
MIN_NECK_WIDTH=10
32
32
32
32
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
VOLTAGE=2.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
35
INT_AGP_VREF
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
12 18
2_5V_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
35
INT_MEM_REF_H
VOLTAGE=0V
MIN_LINE_WIDTH=10
2_5V_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
35
UIDE_REF
VOLTAGE=0V
13
2_5V_DH
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
35
+VCC_CBUS_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=8
MIN_NECK_WIDTH REDUCED FOR TESTPOINTS
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
2_5V_DL
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
35
+VPP_CBUS_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
17
GPU_VCORE
VOLTAGE=1.2V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
18 19 39
1_5V_FB
+GPU_MEM
VOLTAGE=1.5V
MIN_LINE_WIDTH=8
VOLTAGE=2.5V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
18 21
1_5V_LX
+3V_GPU
VOLTAGE=1.5V
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
35
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
12 18 19 21
1_5V_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
35
1_5V_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
35
1_5V_DH
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
35
1_5V_DL
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
35
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
+1_5V_AGP
VOLTAGE=1.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
GPU_MEM_IO
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
17
12 15 16 18 19 21
21
21
VOLTAGE=1.8V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
18 19 20 21
+2_5V_GPU_PNLIO
VOLTAGE=2.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
21
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
21
+1_5V_GPU_VDD15
VOLTAGE=1.5V
MIN_LINE_WIDTH=20
19
VOLTAGE=1.8V
VOLTAGE=1.8V
VOLTAGE=1.2V
MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
GPU_VCORE_VDDCI
MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15
MIN_LINE_WIDTH=15
VOLTAGE=2.5V
VOLTAGE=1.8V
I341
+2_5V_GPU_A2VDD
+1_8V_GPU_AVDD
+1_8V_GPU_PNLPLL
+1_8V_GPU_PNLIO
+GPU_MCLK
+1_8V_GPU_AVDDQ
+1_8V_GPU_MEMPLL
I340
+3V_ATI_OSC_SLEEP
VOLTAGE=3.3V
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
I339
+3V_ATI_SS
VOLTAGE=1.5V
VOLTAGE=1.8V
MIN_LINE_WIDTH=20
MIN_LINE_WIDTH=10
I343
+GPU_VDD15_UF
+2_5V_SLEEP_NECK1
I347
+3V_SLEEP_NECK
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
I345
+1_5V_AGP_NECK
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
+1_8V_PVDD_NECK
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
I346
I344
GPU_VCORE_NECK
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
CONTROL
19 21
+1_5V_AGP_GPU
+1_8V_GPU_VDDDI
1.5V SWITCHER
21
+1_8V_GPU
VOLTAGE=1.8V
2.5V SWITCHER
33
INT_MEM_VREF
+1_8V_ATI_PVDD
I332
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH
MIN_NECK_WIDTH=10
+3V_INTREPID_USB
+GPU_MEMCORE
32
VOLTAGE=1.8V
+2_5V_INTREPID
GPU_MEM_IO_FLT
I331
+ADAPTER_ILIM
VOLTAGE=1.4V
VOLTAGE=1.25V
+1_8V_GPU_PLL
MIN_LINE_WIDTH
MIN_LINE_WIDTH=25
DDR_VREF
+3V_GPU_FLT
31
VOLTAGE
VOLTAGE=1.4V
35
1_5V_ILIM
MIN_LINE_WIDTH=8
35
2_5V_ILIM
MIN_LINE_WIDTH=8
35
MAX1715_TON
MIN_LINE_WIDTH=8
35
MAX1715_SKIP
MIN_LINE_WIDTH=8
35
MAX1715_REF
VOLTAGE=2.0V
MIN_LINE_WIDTH=8
MAX1715_VCC
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
35
MAX1715_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
35
35
21
21
18
MAX1717
+ADAPTER_OR_BATT
VOLTAGE=24V
MIN_LINE_WIDTH=10
32
+4_85V_RAW
VOLTAGE=4.85V
MIN_LINE_WIDTH=10
30 32
I336
I334
+4_6V_BU
VOLTAGE=4.6V
MIN_LINE_WIDTH=10
32 33
I333
+4_85V_ESR
VOLTAGE=4.85V
MIN_LINE_WIDTH=10
32
I335
+3V_PMU_ESR
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
32
I337
+3V_PMU_AVCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
I338
25 30
MISC
HD
+5V_HD_SLEEP
+HD_LOGIC_SLEEP
VOLTAGE=5V
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
24 33
MIN_NECK_WIDTH=10
24
I342
TRACKPAD
HALL EFFECT
VIDEO
+5V_TPAD_SLEEP
+3V_HALL_EFFECT
SOUND
MIN_LINE_WIDTH=10
23 39
LVDS
ENET_CTAP_CHGND
MIN_LINE_WIDTH=10
MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
22
+2_5V_SLEEP_NECK2
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
I351
+5V_INV_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
22 39
I349
+1_8V_SLEEP_NECK
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
+5V_DDC_SLEEP
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
22 39
+1_5V_SLEEP_NECK
+2_5V_GPU
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
I350
I352
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
22
+3V_LCD
VOLTAGE=3.3V
MIN_LINE_WIDTH=12
MIN_NECK_WIDTH=10
22
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
22
GPU_TV_GND1
VOLTAGE=0V
MIN_LINE_WIDTH=25
22
GPU_TV_GND2
VOLTAGE=0V
MIN_LINE_WIDTH=25
22
VOLTAGE=0V
MIN_LINE_WIDTH=25
22 39
VOLTAGE=0V
MIN_LINE_WIDTH=25
SILICON
IMIAGE
I353
I355
I354
MIN_NECK_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
VCORE_LX
VOLTAGE=1.4V
MIN_LINE_WIDTH=200
MIN_NECK_WIDTH=10
34
21
VCORE_DH
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
21
VCORE_DL
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
34
21
VCORE_BOOST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
21
VCORE_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
34
21
VCORE_ILIM
MIN_LINE_WIDTH=8
34
18
VCORE_REF
MIN_LINE_WIDTH=8
34
18
VCORE_TON
MIN_LINE_WIDTH=8
34
19
VCORE_CC
MIN_LINE_WIDTH=8
34
MIN_LINE_WIDTH=8
34 39
MIN_LINE_WIDTH=8
34
19
VCORE_FB
21
VOLTAGE=0V
MIN_LINE_WIDTH=10
23 39
KBD_LED2_OUT
VOLTAGE=0V
MIN_LINE_WIDTH=10
23 39
MIN_LINE_WIDTH=8
14 34
VCORE_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
34
VCORE_GNDSNS
VOLTAGE=0V
MIN_LINE_WIDTH=8
34
VCORE_SNS
VOLTAGE=1.4V
MIN_LINE_WIDTH=8
34
VCORE_GNDDIV
VOLTAGE=0V
MIN_LINE_WIDTH=8
1778_VIN
VOLTAGE=14V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
19
1778_VCC
VOLTAGE=5V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
19
1778_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
19
20
1778_BST
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
19
20
1778_BST_RC
VOLTAGE=5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=10
19
20
1778_TG
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
19
1778_BG
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
19
MIN_LINE_WIDTH=50
MIN_NECK_WIDTH=10
19
19
19
21
34
21
21
MIN_NECK_WIDTH=10
+3V_SI_PLLVCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
+3V_SI_AVCC
+3V_SI_VCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
21
LTC1778
GPU_VCORE_SW
88E1111
VOLTAGE=1.4V
VCORE_VGATE
19
22 39
KBD_LED1_OUT
VOLTAGE=5V
VCORE_TIME
19
MIN_LINE_WIDTH=10
+5V_INV_UF_SW
VOLTAGE=1.2V
1778_ION
MIN_LINE_WIDTH=8
19
1778_ITH
MIN_LINE_WIDTH=8
19
1778_ITH_RC
MIN_LINE_WIDTH=8
19
+2_5V_MARVELL
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
27
1_5V_2_5V_OK
MIN_LINE_WIDTH=8
35
FANL_GND
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
25 39
+2_5V_MARVELL_AVDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
27
1778_VFB
FANR_GND
MIN_LINE_WIDTH=8
19 39
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
25 39
+1_0V_MARVELL
VOLTAGE=1.0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
27
1778_FCB
MIN_LINE_WIDTH=8
19
LTC3405_SW
VOLTAGE=1.0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=8
27
1778_VRNG
MIN_LINE_WIDTH=8
19
LM2594_IN
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+3V_FW_ESD_ILIM
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
29
+3V_FW_ESD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
29
+FW_FUSE
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
+FW_SW
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
1_8V_VFB
MIN_LINE_WIDTH=8
+FW_PWR_OR
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
28 29
LTC3411_ITH_RC
MIN_LINE_WIDTH=8
+FW_VP0
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
LTC3411_ITH
MIN_LINE_WIDTH=8
+FW_PWR_PORTA
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
LTC3411_SYNC
MIN_LINE_WIDTH=8
+FW_VP1
VOLTAGE=33V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
LTC3411_SHDN
MIN_LINE_WIDTH=8
+3V_FW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28 29
+3V_FW_UF
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
LTC1962_INT_VIN
+3V_FW_AVDD_PORT2
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+3V_FW_AVDD_PORT1
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
28
+3V_FW_AVDD_PORT0
VOLTAGE=3.3V
MIN_NECK_WIDTH=10
+3V_FW_AVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
+1_95V_FW_DVDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_DVDD_RX0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_DVDD_TX0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_DVDD_PORT1
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_PLLVDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_PLL400VDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
+1_95V_FW_PLL500VDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
28
FW_VGND0
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
FW_VGND1
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
29
FW_TPO0R
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
29 39
NEC_AVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
+3V_NEC_VDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
26
+3V_CG_PLL_MAIN
VOLTAGE=3.3V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=8
14
+2_5V_CG_MAIN
VOLTAGE=2.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=8
14
+5V_SOUND_SLEEP
VOLTAGE=0V
VOLTAGE=5V
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=15
25
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
GND
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND1
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND2
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND3
CHGND1
VOLTAGE=0V
CHGND2
VOLTAGE=0V
CHGND3
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND4
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND5
39
CHGND4
CHGND5
VOLTAGE=0V
I/O AREA
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
VOLTAGE=0V
I/O AREA
MIN_NECK_WIDTH=10
VOLTAGE=1.8V
VOLTAGE=0V
MIN_LINE_WIDTH=10
+GPU_VDD15_NECK
+5V_DDC_SLEEP_UF
MIN_NECK_WIDTH=10
VOLTAGE=1.8V
I348
VOLTAGE=0V
TRACKPAD
MIN_LINE_WIDTH=10
22 39
FW
INVERTER
VOLTAGE=2.5V
MIN_NECK_WIDTH=10
SND_AGND
I/O AREA
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
TV_GND2
FAN GND
23 39
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=15
VOLTAGE=12.8V
TV_GND1
KB LED
VOLTAGE=3.3V
MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=15
VOLTAGE=1.8V
+12_8V_INV
+3V_LCD_SW
VOLTAGE=5V
VOLTAGE=1.8V
VCORE_VCC
21
21
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
CHGND6
CHGND6
VOLTAGE=0V
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12
27
USB 2.0
INTREPID
SSCG
MIN_LINE_WIDTH=25
LTC3411_VCC
VOLTAGE=3.3V
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
LTC3411_GND
VOLTAGE=0V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
1_8V_SW
VOLTAGE=1.8V
MIN_LINE_WIDTH=30
MIN_NECK_WIDTH=10
35
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
14
LTC1962_L3_VIN
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
LTC1962_L3_VOUT
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
28
LTC1962_1V5_VIN
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
28
LTC1962_1V5_VOUT
MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10
LTC3411
LTC1962
INT PLLS

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
OF
38 44
1
FUNCTIONAL TEST POINTS

FUNC_TEST=YES
FUNC_TEST=YES
JTAG_ASIC_TMS
FUNC_TEST=YES
JTAG_ASIC_TDI
FUNC_TEST=YES
JTAG_ASIC_TDO_TP
13 27
13
27
TMDS_CONN_CLKP
FUNC_TEST=YES
22 37
FUNC_TEST=YES
VGA_R 22
FUNC_TEST=YES
VGA_G
TV_C
22
FUNC_TEST=YES
TV_Y
22
FUNC_TEST=YES
TV_COMP
22
9 12 17 24 26 37
FUNC_TEST=YES
PCI_PAR
12 17 24 26 37
FUNC_TEST=YES
PCI_AD<8>
9 12 17 24 26 37
FUNC_TEST=YES
PCI_CBE<0>
12 17 24 26 37
FUNC_TEST=YES
PCI_AD<9>
22
EIDE_OPTICAL_CS0_L
PCI_CBE<1>
24 37
EIDE_OPTICAL_RST_L
12 17 24 26 37
23 30
FUNC_TEST=YES
KBD_Y<0>
23 30
+5V_INV_SW
KBD_Y<1>
24 37
22 38
FUNC_TEST=YES
LEFT_USB_DM
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
9 12 17 24 26 37
KBD_X<9>
24 37
FUNC_TEST=YES
EIDE_OPTICAL_CS1_L
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
PCI_AD<7>
FW_TPO1P
23 30
24 26 37
FUNC_TEST=YES
LEFT_USB_DP
29 37
24 26 37
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_ASIC_TCK
FUNC_TEST=YES
13 27
VGA_B
FUNC_TEST=YES
FUNC_TEST=YES
SND_TO_AUDIO
22
14 25
FUNC_TEST=YES
FUNC_TEST=YES
PCI_AD<10>
9 12 17 24 26 37
FUNC_TEST=YES
PCI_AD<11>
9 12 17 24 26 37
PCI_CBE<2>
EIDE_OPTICAL_WR_L
12 17 24 26 37
FUNC_TEST=YES
KBD_Y<2>
24 37
FUNC_TEST=YES
FW_TPO1N
23 30
RIGHT_USB_DM
29 37
26 32 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_ASIC_TRST_L
FUNC_TEST=YES
FUNC_TEST=YES
13 27
VGA_VSYNC
SND_SYNC
22
14 25
FUNC_TEST=YES
PCI_CBE<3>
FUNC_TEST=YES
12 17 24 26 37
KBD_Y<3>
24 37
FUNC_TEST=YES
FW_TPI1P
23 30
RIGHT_USB_DP
29 37
26 32 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
CPU_CHKSTP_OUT_L
FUNC_TEST=YES
5
VGA_HSYNC
DVI_DDC_CLK_UF
FUNC_TEST=YES
CPU_SRESET_L
FUNC_TEST=YES
SND_CLKOUT
22
14 25 36
FUNC_TEST=YES
22
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
PCI_AD<12>
9 12 17 24 26 37
AIRPORT_PCI_REQ_L
FUNC_TEST=YES
PCI_AD<13>
9 12 17 24 26 37
AIRPORT_PCI_GNT_L
EIDE_OPTICAL_INT
12 24
KBD_Y<4>
24 37
TPAD_F_TXD
12 24
FW_TPI1N
KBD_Y<5>
23
NEC_LEFT_USB_PWREN
29 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
23 30
CHARGE_LED_L
23 30
24 26
FUNC_TEST=YES
NEC_LEFT_USB_OVERCURRENT
30 31
24 26
FUNC_TEST=YES
FUNC_TEST=YES
CPU_HRESET_L
FUNC_TEST=YES
FUNC_TEST=YES
5 7 23
DVI_DDC_DATA_UF
PCI_AD<14>
22
FUNC_TEST=YES
FUNC_TEST=YES
AIRPORT_PCI_INT_L
9 12 17 24 26 37
TPAD_F_RXD
14 24
FUNC_TEST=YES
KBD_Y<6>
23
FUNC_TEST=YES
ADAPTER_DET
23 30
NEC_RIGHT_USB_PWREN
30 31
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_CPU_TMS
FUNC_TEST=YES
5 23
DVI_HPD_UF
FUNC_TEST=YES
FUNC_TEST=YES
INT_AUDIO_TO_SND
22
PCI_AD<15>
14 25
FUNC_TEST=YES
LID_CLOSED_L
FUNC_TEST=YES
9 12 17 24 26 37
24 37
FUNC_TEST=YES
KBD_Y<7>
23
SUTRO_ALS_GAIN_SW
23 30
26 32
FUNC_TEST=YES
23 24
26 32
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_CPU_TDI
LVDS_L0N
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
5 23
19 22 37
SND_SCLK
19 22 37
SND_HW_RESET_L
14 25 36
FUNC_TEST=YES
COMM_RESET_L
FUNC_TEST=YES
PCI_AD<16>
9 12 17 24 26 37
24 37
FUNC_TEST=YES
PCI_AD<17>
9 12 17 24 26 37
FUNC_TEST=YES
24 37
FUNC_TEST=YES
PCI_AD<18>
9 12 17 24 26 37
FUNC_TEST=YES
24 37
FUNC_TEST=YES
KBD_NUMLOCK_LED
14 25
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_CPU_TDO_TP
FUNC_TEST=YES
FUNC_TEST=YES
5
LVDS_L0P
14 25
COMM_SHUTDOWN
FUNC_TEST=YES
SUTRO_ALS_OUT
23
FUNC_TEST=YES
+BATT_POS
14 25
JTAG_CPU_TCK
FUNC_TEST=YES
5 23
LVDS_L1N
FUNC_TEST=YES
SND_HP_SENSE_L
19 22 37
14 25
FUNC_TEST=YES
COMM_RING_DET_L
BATT_CLK
14 25 30
19 29 32 33 34
FUNC_TEST=YES
FUNC_TEST=YES
KBD_LED1_OUT
31 38
FUNC_TEST=YES
FUNC_TEST=YES
DCDC_EN
23 24
BBANG_HRESET_L
23 38
23
FUNC_TEST=YES
KBD_LED2_OUT
31
23 38
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
JTAG_CPU_TRST_L
FUNC_TEST=YES
5 23 39
LVDS_L1P
FUNC_TEST=YES
SND_LIN_SENSE_L
19 22 37
FUNC_TEST=YES
PCI_AD<19>
14 25
FUNC_TEST=YES
9 12 17 24 26 37
KBD_ID
24 37
BATT_DATA
23 30
FUNC_TEST=YES
COMM_TXD_L
31
MAIN_RESET_L
14 17 18 20 24 26 30
14 25
FUNC_TEST=YES
FUNC_TEST=YES
LVDS_L2N
FUNC_TEST=YES
INT_I2C_DATA2
19 22 37
FUNC_TEST=YES
PCI_AD<20>
14 25
FUNC_TEST=YES
FUNC_TEST=YES
LVDS_L2P
INT_I2C_CLK2
19 22 37
CLKLVDS_LN
19 22 37
I293
14 25
38
FUNC_TEST=YES
FUNC_TEST=YES
CLKLVDS_LP
CHGND4
19 22 37
I294
SLEEP_LED
PCI_AD<21>
12 17 24 26 37
FUNC_TEST=YES
PCI_AD<22>
12 17 24 26 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
9 12 17 24 26 37
FUNC_TEST=YES
PCI_AD<23>
23 25
+5V_TPAD_SLEEP
24 37
+3V_HALL_EFFECT
24 37
KBD_CAPSLOCK_LED
24 37
FUNC_TEST=YES
COMM_TRXC
31 38
FUNC_TEST=YES
23 38
FUNC_TEST=YES
FUNC_TEST=YES
23
30 31
FUNC_TEST=YES
FANR_GND
25 38
COMM_GPIO_L
KBD_FUNCTION_L
24 37
24
FUNC_TEST=YES
AIRPORT_CLKRUN_L
24
14 25
FUNC_TEST=YES
ROM_RW_L
FUNC_TEST=YES
COMM_DTR_L
FUNC_TEST=YES
COMM_RTS_L
23 30
RF_DISABLE_L_SPN
14 25
FUNC_TEST=YES
PMU_BATT_DET_L
FUNC_TEST=YES
FUNC_TEST=YES
BATT_NEG
23 38
FUNC_TEST=YES
FUNC_TEST=YES
12 17 24 26 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
9 12 24
14 25
FUNC_TEST=YES
ROM_ONBOARD_CS_L
9 24
14 25
FUNC_TEST=YES
FUNC_TEST=YES
INT_I2C_CLK0
FUNC_TEST=YES
FUNC_TEST=YES
11 13 23
LVDS_U0N
PCI_AD<24>
19 22 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
9 12 17 24 26 37
KBD_CONTROL_L
24 37
FANL_GND
23 30
FUNC_TEST=YES
ROM_CS_L
COMM_RXD
25 38
9 12 24
14 25
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
INT_I2C_DATA0
FUNC_TEST=YES
INT_I2C_CLK1
13 14 25
LVDS_U1P
19 22 37
LVDS_U2N
17
LVDS_U2P
FUNC_TEST=YES
BT_USB_DM
PCI_AD<26>
14 24 37
BT_USB_DP
PCI_AD<27>
14 24 37
MODEM_USB_DM
FUNC_TEST=YES
PCI_AD<28>
14 25 37
FUNC_TEST=YES
PCI_AD<29>
FUNC_TEST=YES
19 22 37
MODEM_USB_DP
14 25 37
FUNC_TEST=YES
KBD_OPTION_L
FUNC_TEST=YES
9 12 17 24 26 37
9 12 17 24 26 37
FUNC_TEST=YES
FUNC_TEST=YES
19 22 37
KBD_COMMAND_L
24 37
23 30
FUNC_TEST=YES
PMU_KB_RESET_L
25
CLK33M_AIRPORT
24 37
FUNC_TEST=YES
9 12 17 24 26 37
FUNC_TEST=YES
9 12 17 24 26 37
FUNC_TEST=YES
FANR_PWM
FUNC_TEST=YES
25
AIRPORT_IDSEL
PWR_BUTTON_L
23 30
TMDS_DN<0>
FUNC_TEST=YES
TMDS_DP<0>
20 22 37
20 22 37
20 22 37
20 22 37
FUNC_TEST=YES
KBD_SHIFT_L
24 37
FUNC_TEST=YES
KBD_X<0>
24 37
I272
FANL_PWM
FUNC_TEST=YES
RJ45_DP<0>
23 30
FUNC_TEST=YES
25
FUNC_TEST=YES
+PBUS
KBD_X<1>
FUNC_TEST=YES
+24V_PBUS
23 30
38
FUNC_TEST=YES
27 37
FUNC_TEST=YES
GPU_VCORE
23 30
PCI_AD<31>
EIDE_OPTICAL_DMA_RQ
9 12 17 24 26 37
LVDS_DDC_CLK
19 22
PCI_AD<2>
9 12 17 24 26 37
19 22
BRIGHT_PWM
TV_GND1
PCI_AD<3>
9 12 17 24 26 37
PCI_AD<4>
9 12 17 24 26 37
PCI_AD<5>
PCI_TRDY_L
12 17 24 26 37
PCI_IRDY_L
12 17 24 26 37
9 12 17 24 26 37
PCI_DEVSEL_L
KBD_X<3>
24 37
TV_GND2
12 17 24 26 37
PCI_AD<6>
9 12 17 24 26 37
PCI_STOP_L
KBD_X<4>
24 37
I291
FUNC_TEST=YES
SND_AMP_MUTE
27 37
SND_HP_MUTE_INV
KBD_X<5>
24 37
KBD_X<6>
FUNC_TEST=YES
KBD_X<7>
KBD_X<8>
FUNC_TEST=YES
SRCLK_TP
I287
+1_8V_MAIN
14 25
FUNC_TEST=YES
38
MOD_SYNC
I278
27 37
14 25
FUNC_TEST=YES
+3V_PMU
23 30
FUNC_TEST=YES
38
FUNC_TEST=YES
23 30
22 38
1778_VFB
I280
27 37
FUNC_TEST=YES
+12_8V_INV
29 38
23 25 30 33 35
FUNC_TEST=YES
+5V_DDC_SLEEP
23 30
FUNC_TEST=YES
FW_TPO0R
FUNC_TEST=YES
VCORE_VID0
SLEEP
I279
27 37
FUNC_TEST=YES
19 38
22 38
I281
FUNC_TEST=YES
23 30
I282
FUNC_TEST=YES
VCORE_VID1
VCORE_MUX_EN
I286
34
26
FUNC_TEST=YES
SRMOD_TP
I288
I283

FUNC_TEST=YES
VCORE_VID2

26
25
FUNC_TEST=YES
TEB_TP
26
I285
FUNC_TEST=YES
VCORE_VID3
FUNC_TEST=YES
MOD_DTO
I277
25
I290
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
24 37
14 25
34 38
27 37
FUNC_TEST=YES
RJ45_DN<3>
24 37
MOD_CLKOUT
I276
VCORE_FB
23 30
FUNC_TEST=YES
14 25
FUNC_TEST=YES
27 37
FUNC_TEST=YES
24 37
5 34 38
FUNC_TEST=YES
RJ45_DP<3>
I289
MOD_BITCLK
I275
CPU_VCORE_SLEEP
FUNC_TEST=YES
RJ45_DN<2>
FUNC_TEST=YES
I292
23 30
FUNC_TEST=YES
RJ45_DP<2>
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
22 38
23 30
FUNC_TEST=YES
RJ45_DN<1>
FUNC_TEST=YES
FUNC_TEST=YES
12 17 24 26 37
5 23 39
18 19 38
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
22 38
FUNC_TEST=YES
22 37
KBD_X<2>
24 37
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
22
EIDE_OPTICAL_RD_L
12 17 24 26 37
FUNC_TEST=YES
FUNC_TEST=YES
LVDS_DDC_DATA
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
FUNC_TEST=YES
TMDS_CONN_CLKN
9 12 17 24 26 37
JTAG_CPU_TRST_L
I274
FUNC_TEST=YES
RJ45_DP<1>
14 25
I273
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
20 22 37
9 12 17 24 26 37
FUNC_TEST=YES
PCI_AD<30>
9 12 24
FUNC_TEST=YES
INT_MOD_DTI
FUNC_TEST=YES
24 37
ROM_OE_L
38
27 37
FUNC_TEST=YES
RJ45_DN<0>
FUNC_TEST=YES
FUNC_TEST=YES
20 22 37
FUNC_TEST=YES
TMDS_DP<2>
CLKLVDS_UP
FUNC_TEST=YES
FUNC_TEST=YES
TMDS_DN<2>
19 22 37
FUNC_TEST=YES
PCI_AD<1>
FUNC_TEST=YES
FUNC_TEST=YES
TMDS_DP<1>
19 22 37
FUNC_TEST=YES
PCI_AD<0>
FUNC_TEST=YES
FUNC_TEST=YES
TMDS_DN<1>
FUNC_TEST=YES
CLKLVDS_UN
24
23 25
FUNC_TEST=YES
FUNC_TEST=YES
9 12 17 24 26 37
I271
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
12 24 36
30
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
CBUS_DET_2_L
19 22 37
FUNC_TEST=YES
FANL_TACH
FUNC_TEST=YES
9 12 17 24 26 37
FUNC_TEST=YES
LVDS_U1N
FUNC_TEST=YES
17
PCI_AD<25>
19 22 37
FUNC_TEST=YES
FUNC_TEST=YES
CBUS_DET_1_L
LVDS_U0P
FUNC_TEST=YES
13 14 25
FUNC_TEST=YES
INT_I2C_DATA1
FUNC_TEST=YES
FUNC_TEST=YES
11 13 23
TEST_TP
26
I284
SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE
VCORE_VID4
OF
39 44
1
REVISION HISTORY
5/22
102) fixed NO STUFF BOM option for R291
103) add NO STUFF to R223 to correct startup level of GPU_VCORE_CNTL
104) add NO STUFF to R300 to complete 3V sequecing on wake from sleep fix
105) changed R376 to 158K and R321 to 2.74K to set CPU_VCORE offset to 35mV
*** rev 04 released for EVT ***
REV 0.01 - 03/06/2003

3/3
1)
3/10
2)
3)
4)
3/11
5)
6)
7)
8)
9)
10)
11)
12)
3/18
13)
14)
15)
16)
3/19
17)
18)
19)
20)
21)
Initial check-in of Enterprise schematic after conversion to Concept 14.2

added 8 new 10uF vcore caps
added jumpers at 1.5V, 1.8V, 2.5V, 3.3V, 5V, and PBUS supply outputs
added 8 more 0.1uF vcore byapass caps
removed
updated
changed
changed
changed
changed
changed
changed
dedicated boot banger circuit (U5400,U5200,RP46,U9,U1000)

firewire to phy to rev A prt number
cpu PLL config to 1083/833
reset to U56 (clock slewing chip) to MAIN_RESET_L
C550 to 138S0536 to limit AVL
Vcore stuffing options to 1.4V/1.025V using analog mux to support slewing
stuffing to set Vcore offset to 0mV by default
comments to eliminate references to L3 in power supply section
changed stuffing options for GPU PCI ID to 0x319

changed R164 (DAC1RSET) to 107 ohm pulldown
added 10K pulldown to U43 pin A21
changed fan controller to ADT7460
added pads for 0.1uF cap from +Adapter to digital gnd for EMC
added pads for 0 ohm between chassis and digital gnd near ENET connector for EMC
corrected path to correct for last checkin
removed BOM table for MAP31
REMOVED ALL RELATIVE_PROPAGATION_DELAY AND PROPAGATION_DELAY PROPERTIES TO
PRERPARE FOR CONSTRAINT BACK ANNOTATION
22) changed CHGND on R616 to CHGND1
23) ***BOARD RENUMBERED***
3/28
24) integrated M10 pages from Q16 schematic and renumbered them
4/10
25) updated physical constraints for M10 power nets
26) added DP7 for M10 power sequencing
27) added RP27,RP28,RP32, and RP57 for TMDS series termination
28) update PLL CFG high 0010 1.25GHz
low 1011 833MHz
29) update sscg/nosscg stuffing option on intrepid boot straps
30) removed D31 between +Batt and 24V_Pbus
31) add Vcore DAC resistors (R288,R289,R290,R292) for no mux case
32) change intrepid PLL LDO stuffing back to 1.8V main
33) change C640 and C646 to 0.01uF (Apple # 132S1047) for FW check config
34) change I2C pullups (R29 and R102) to 1K
35) changed bootrom part number to 341S1255
4/18
36) changed C756 to 128S0025 (Sanyo only 6.3V 330uF)
37) add pads for 90 ohm chokes to FWB path close to connector (route through the pads)
38)
changed Vcore inductor (L36) to molded core part (152S0125)
39) changed Pbus inductor (L37) to molded core part (152S0126)
40) added seperate 1_8V_GPU_TPVDD filter and LDO (U54)
4/21
41) replace disctrete LCL with single chip LCL filters (155S0154) for VGA (L ,L , and L )
42) add 165 ohm chokes on TMDS data pairs at connector (L ,L , and L )
43) move BS1 to bottom side
44) move CPU thermal sensor (Q39) to input 1 on fan controller and power supply sensor (Q66) to input 2
45) added trace from Vcore to fan controller ADC input
46) added FET inverters (Q78) to PWM outputs of fan controller (U3) to prevent spinup at boot
47) added FET (Q79) for +3V_Sleep for M10 power sequencing
4/27
48) changed TMDS data chokes to 90 ohm (155S0128)
49) changed C762 and C766 to 4.7uF 1206 caps
50) changed TMDS data chokes to 90 ohms (155S0128)
51) changed C762 and C766 to 4.7uF 1206
52) changed Q51 to Si7860DP (376S0119)
53) changed Q48 to Si7892DP (376S0120)
54) changed D24 to B340LB (371S0132)
55) changed L30 to 2.2uH Tokin inductor (152S0139)
56) added Q58, R307, and C515 for GPU Vcore control inverter
57) changed R416 to 2.2ohms
58) changed R364 to 102K
59) added 0.1uF 50V C883 to RS- of Max4172 (NO stuff)
60) changed D18 to 1N914
61) changed L38 and L41 to 4.7uH (152S0137)
62) added Q81, R308, R309, and R310 for power sequencing (no stuff)
63) changed Q49 and Q50 to Si7860DP (376S0119)
64) changed L36 to 1.2uH 18.3A (152S0125)
65) added R331 1mohm sense resistor to CPU Vcore
66) added C885 and C884 , 1000uF CPU Vcore outpur caps
67) added Q82, R607, R455, R417, and C886 for 1.5V sleep sequencing
68) added Q83 and 100K R608 for 1.8V sequencing
69) added 15.4K R616 and 10K R672 for 2.5V switcher feedback divider
70) changed pinout of sound connector for sousaphone
71) removed Q44 (5V sound sleep fet)
72) changed Q31 to invert headphone Mute to sousaphone
4/28
73) changed CPU_VCORE_SLEEP location back to across bypass caps to correct after adding reference resistor
74) changed D5 to schottky diode (MBR0540)
75) fixed unnamed net (LTC3411_SHDN_SEQ)
76) changed drain/source polarity of Q76 (FET from +BATT to Pbus)
4/28
77) moved XW15 to connect to CPU_VCORE_SLEEP_UF (before positioning resistor)
78) changed Fan control nets to FanL and FanR from Fan1 and Fan2
79) SWAPPED CONNECTIONS SO THAT OUTPUT 1 FROM FAN CONTROLLER CONNECTS TO
LEFT FAN (CPU) AND FAN 2 CONNECTS TO THE RIGHT FAN (GPU)
80) updated power constraints with new fan net names
4/28
81) change Q58 on pg19 to Q80 to consolidate parts
82) CHANGED U55 TO MM1571J FOR COST SAVINGS
83) changed L72,L73,L74 to 90 ohm ferrites
84) added 10K pullup to +5V_MAIN to SND_HP_MUTE
85) repinout Sousaphone connector
86) remore redundant pullups on FANL_TACH and FANR_TACH
87) added TP to all NC on NEC USB2 part for NAND tree testing
88)
added NEC_USB bomoption to 0 ohm resistor on NEC_AVSS_F
4/30
89) repinout Sousaphone connector (J12)
90) no stuff R322 to eliminate 3V_sleep pump up
91) updated various text notes with correct reference designators
5/1
92) change L30 to 152S0139 (Tokin CPI-1050-2R2) 11A
93) remove FANR_TACH functional test point
94) add CHGND4 and SLEEP_LED functional test points
95) swap INT_AUDIO_TO_SND and SND_TO_AUDIO on Sousaphone connector (J12)
5/6
96) remove NO STUFF on R477 (set 5V and 3.3V switcher in pulse skipping mode)
97) change R337 to 470K and remove No Stuff and no stuff R336 to change Vcore DAC to 1.35V/1.15V
98) change R321 to 499ohm to set 5mV Vcore offset
99) change L72,L73,L74 to 155S0165 (D part for EVT only)
5/7
100) no stuff Q79 to disable 3V_SLEEP sequencing to work around wake from sleep bug with M10
101) added BOM table to define correct part number for M10 without heatspreader (338S0133)
5/19/03
106) changed both AGP_NV_INT_L and AGP_ATI_INT_L to AGP_INT_L
107) removed redundant 3V_GPU pullup R687 (Intrepid side AGP_INT_L pullup)
108) added R699,R701,R707,R708 as 10k pulldowns to Intrepid USB ports A and C when NEC_USB is stuffed
109) changed SND_HP_MUTE_INV gate/inversion FETS to pullup to +3V_MAIN
110) added R711 as pullup to +3V_GPU on AUXWIN signal from M10 (U44)
111) added R698 as 0 ohm jumper between FW_PHY_PD and Intrepid
112) added U56, U57, R718,R714 for VGA Hsync and VGA Vsync buffering
113) changed L72,L73,L74 to 155S0164 (new high speed part)
114) added NO STUFF BOM option to R223 to correct for sense of GPU_VCORE_CNTL
115) added NO STUFF BOM option to R300 to avoid sleep wake problem
6/3/03
116) Intgrated new 1.8V switcher (LTC3412)(U58)(353S0650) and inductor (L75- 152S0142)
117) changed 2.5V_SLEEP FET (U48) and 1.8V_SLEEP FET (U6) to higher current part (Si6467BDQ - 376S0161)
118) added 10K pulldown (R720) on FW_PHY_PD_INT for when R698 is removed
119) changed R728 and R729 to 1210 0ohm resistors to support switching the entire memory bus between 1.8V and 2.5V
120) added R721 as jumper between +2_5V_SLEEP and +2_5V_GPU
6/4/03
121) NO STUFF R631 to remove MAIN_RESET_L from clock slewing chip
122) changed FWB connector to new part with extra ground tabs (514S0059)
6/5/03
123) changed I2C 0 and 1 pullups (RP12) to 2.2K to improve rise/fall times (sensor check config errors)
124) added CRITICAL flag to new 1.8V switcher (U58), inductor (L75), 1.8V sleep FET (U6), and 2.5V sleep FET (48)
125) removed gnd caps (C651 and C647) on I2S clock at sound connector (J12)
126) added LC filter on SND_SYNC for EMI (L77 and C895)
127) added LC filter on SND_CLKOUT for EMI (80 and C899)
128) added LC filter on INT_AUDIO_TO_SND for EMI (L81 and C896)
129) added LC filter on SND_TO_AUDIO for EMI (L82 and C897)
130) added LC filter on SND_AMP_MUTE for EMI (L76 and C898)
131) added LC filter on SND_HW_RESET_L for EMI (L78 and C900)
132) added LC filter on SND_SCLK for EMI (L79 and C901)
133) added C902 and R804 to prevent latch-up condition in GPU Vcore circuit when using powermiser
134) removed R331 (CPU Vcore positioning resistor)
135) changed C728,C729,C730,C731,C732,C733,C734,C884,C885 to 220uF Rubycon caps (128S0024)
136) add Vcore offset change circuit to modify offset in low (Q86,R805,R806,R807,R808,R809)
137) changed Q83 into dual (2N7002DW) and added R810 to invert 3V_5V_ON before switching RUN/SS
6/6/03
138) rotated J26 (FW B connector)
139) changed D29 to B340B (3A part - 371S0159)
6/9/03
140) modified Vcore offset select circuit with Takashis changes - changed Gnd reference to VCORE_GND_SNS
141) added double inverter to buffer THERM _L_OC (added Q87,R811,R812)
142) removed redundant pullup on THERM_L_OC (R780)
6/9/03
143) added cap on gate of the second FET in Q87 for possible turn on delay (C903)
144) changed inner shield of FWB connector J26 to connect to chassis gnd
145) changed R336 and R325 to 0 ohm to set Vcore VID to 1.3V/1.15V
146) changed R321 to 2.49K to set Vcore offset to +25mV
147) added 10 ohm resistor (R814) and 1uF cap (C904) to filter power to ADT7460 (Gary Leo)
6/10/03
148) changed R612 to 10K to prevent UIDE DMACK from floating
149) changed C80,C88,C81,C89,C82,C102,C79,C87 to NO STUFF (TMDS common-mode termination)
150) changed R205,R218,R211,R219,R210,R220,R204,R214 to 162 ohm 1% (TMDS common-mode termination)
151) changed RP27,RP32,RP28,RP57 to 10ohm (TMDS series termination)
*** released for EVT2 6/10/03 ***
7/2/03
199)
200)
201)
202)
203)
204)
205)
7/9/03
207)
208)
209)
210)
211)
212)
213)
7/22/03
214)
215)
216)
7/28/03
217)
218)
CHANGED J9 (CARDBUS) TO 516S0141 (NEW PIN PLATING SPEC)

CHANGED J20 (AIRPORT) TO 516S0142 (NEW PIN PLATING SPEC)
CHANGED J10 (OPTICAL DRIVE) TO 516S0140 (NEW PIN PLATING SPEC)
CHANGED J13 (HARD DRIVE) TO 516S0140 (NEW PIN PLATING SPEC)
CHANGED J12 (SOUND) TO 516S0144 (NEW PIN PLATING SPEC)
CHANGED J8 (MODEM) TO 516S0143 (NEW PIN PLATING SPEC)
ADDED BOM TABLE TO PUT 0 OHM 402 ON L77,L80,L81,L82,L76,L78,L79
CORRECTED C889 TO CONNECT TO INPUT (PIN 1) OF U55
REMOVED POWER JUMPERS XW25,XW17,XW16,XW10,XW14,XW18
CHANGED 197S0035 TO PRIMARY AND 197S0004 AS ALTERNATE
FOR
FOR
FOR
FOR
FOR
Y1
Y3
Y5
Y4
Y6
(INTREPID)
(ETHERNET)
(NEC USB2)
(LMU)
(PMU)
ADDED 1_32V_VCORE AND 1_30V_VCORE BOM OPTIONS FOR 2 DIFFERENT CPU VCORE SPECS
UPDATED CAP MATERIAL TYPES
CHANGED FROM 715 PIN TO 667 PIN SYMBOL FOR U44 (M10)
CHANGED TMDS TERMINATION FROM 2X 162 TO 2X 49.9 OHMS PER PAIR
CHANGED 126S0036 FROM ALT TO PRIMARY, REPLACING 126S0035 FOR CPU VCORE INPUT CAPS
*** RELEASED FOR PRODUCTION 7/28/03 ***

8/4/03
219)
220)
CHANGED R99 TO NO STUFF TO FIX I2C ADDRESS OF SIL1162 TMDS TRANSMITTER

CHANGED R321 TO 4.02K 1% FOR 1_30_VCORE (40MV OFFSET) AND TO 6.34K 1% FOR
1_32_VCORE (60MV OFFSET)
221) CHANGED R304 TO 470K AND R329 AND R325 TO 0 OHM TO CHANGE LOW VID TO 1.05V
ON VCORE
222) CHANGED C611 TO 2200PF, C610 TO 100PF, AND R519 TO 12.7K 1% TO INCREASE
IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
223) NO STUFF C590 TO INCREASE IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
224) CHANGED C583 TO 2200PF, C576 TO 100PF, AND R481 TO 15.0K 1% TO INCREASE
IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
225) NO STUFF C566 TO INCREASE IMMUNITY TO 3.3V PGOOD SIGNAL DROPOUT
9/4/03
228)
229)
230)
ADDED 197S0052 AS ALTERNATE FOR G1 (98 MHZ FW OSCILLATOR)

CHANGED C728-C734,C884,C885 TO 128S0022 TO REMOVE DUPLICATE PART NUMBER
CHANGED C883 TO 132S0100 TO CORRECT FOR USE OF OEM PART NUMBER
B
6/13/03
152)
153)
154)
155)
156)
fixed NO STUFF on R291

removed NO STUFF from C80,C88,C81,C89,C82,C102,C79,C87 (TMDS common-mode termination)
removed NO STUFF from R638 (pullup on slewing chip FSEL)
removed NO STUFF from C903 (cap on input to second part of THERM_OC_L buffer)
CHANGED R321 TO 1K FOR VCORE OFFSET OF 12MV (VCORE = 1.30V -30MV/+100MV)
*** released for EVT2 6/13/03 ***

6/18/03
157) changed R228 to pullup to 1.8V for DVO interface conpatibility
158) added R234 and INT_TMDS option to maintain internal TMDS capability
159) changed L30 to 3 pin symbol
160) added U5 to use as external TMDS transmitter (DVI)
161) added R41 to create +3V_GPU_SI power for SIL1162 (U5)
162) added L14, C130, C132, and C165 for 3V AVCC filtering for SIL1162 (U5)
163) added L13, C14, C129, C131, C133 for 3V PVCC filtering for SIL1162 (U5)
164) added L15, C255, C233, C218 for 3V Vcc filtering for SIL1162 (U5)
165) added R235 and R237 as options for MAIN_RESET_L to U5
166) added R231. R232, and C284 for Vref for U5
167) added R66, R99, R202, R212, R222, R224, R88, R110, R223 as straps for U5
168) added RP58, RP59, RP60, RP61 for series termination of SIL1162 TMDS output
169) added L16, C304, C327, C647 for filtering GPU VDDR4
170) added R255 and R251 to strap GPU_DVODMODE correctly for 1.8V DVO
171) added R268 to connect L16 to +3V_GPU_FLT when not using SIL1162
172) added C681, C668, C678, C651 to filter the thermal sensor diff pairs
6/19/03
173) changed GPU_MEM_IO to +GPU_MEM to connect ATI Vref to correct memory voltage
174) swapped TMDS CLKN and CLKP on RP57 and RP58 for layout
175) swapped DN<0> and DP<0> on RP27 for layout
176) corrected un-named nets in TMDS common-mode filters
177) added physical constriants for new Silicon Image power rails
178) CHANGED C728,C731,C734,C733,C730,C732,C729,C885,C885 TO 128S0022
(124S0024 WILL BE DELETED AS A DUPLICATE IN THE LIBRARY)
6/23/03
179) NO STUFFed C895,C899,C896,C897,C898,C900, and C901 to fix no sound problem
180) changed C890 to 100pF for improved transient response (Takashi)
181) Removed bypass traces on FWB chokes and stuffed L70 and L71
182) CHANGED R491 TO 52.3K 1%, R475 TO 127K 1%, AND R476 TO 4.7M 5% IN A29
ADAPTER DETECT CIRCUIT DIVIDERS TO REDUCE SHUTDOWN CURRENT
183) added R331 as CPU Vcore sense resistor (1 mohm 1% 2512)
184) No STUFFed C651 and C678
185) added C688,C690,C846,C905 for thermal pair filtering at fan controller
186) added C906 to prevent shoot-thru on Q64 (currently NO STUFFed)
187) added C907 to prevent shoot-thru on Q68 (currently NO STUFFed)
188) changed R517 to 100K
189) changed GND reference for input side of Q86 to digital GND (the other FET in Q856 remains on VCORE_GNDSNS
6/24/03
190) added C908 to prevent gate shoot-thru on Q56
191) added R279 to power TMDS PLL from LVDS filter when using external TMDS transmitter
192) changed R325 to 470K to set the low Vcore to 1.10V
193) stuffed Vcore offset switch (R807,R805,R809,Q86)
194) changed R809 to 1.5K 1% to set low Vcore offset to 10mV
195) changed R321 to 3.01K 1% to set high Vcore offset to 30mV
6/25/03
196) rotated L70 and L71 for layout (PCB symbol problem)
197) changed Q53,Q54,Q55 to IRF7832 (376S0148) for better thermal performance
198) NO STUFFed C908 (Q56 gate shoot-thru cap)
*** released for DVT 6/26/03 ***

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE

OF
40 44
1
8
*** Signal Cross-Reference for the entire design ***
27D2< 38B3>
12C5< 12D1< 12D4< 15D6< 16C8<
18C6< 18D6< 19A8< 19B4<> 19D5<>
21B8< 21D6< 38C3>
+1_5V_AGP_GPU
21C5< 38C3>
+1_5V_AGP_NECK
19B4<> 38B3>
+1_5V_GPU_VDD15 19D3< 38C3>
+1_5V_INTREPID_PLL 8D6< 12D4< 12D8< 14D6<> 38D3>
+1_5V_INTREPID_PLL1 14C3< 38D3>
+1_5V_INTREPID_PLL2 14D3< 38D3>
+1_5V_INTREPID_PLL3 14D3< 38D3>
3V_SNSM
3V_SNSP
3V_SW
3V_TG
3V_VOSNS
5V_BG
5V_BOOST
5V_BOOST_ESR
5V_HD_PWREN
5V_ITH
5V_ITH_RC
5V_RSNS
5V_RUNSS
33C4< 37A2>
33C4< 37A2>
33C4<> 38D1>
33D4<>
33C4<>
33C5<>
33C5<>
33D6<>
33A8<>
33C5<>
33C6<
33D7< 38D1>
33C5<
AGP_SBA<5>
12B2<> 18C6>
AGP_SBA<6>
12B2<> 18C6>
AGP_SBA<7>
12B2<> 18C6<>
AGP_SB_STB
12B2<> 12B2< 18C6<>
AGP_SB_STB_L
12A2<> 12A2< 18C6<>
AGP_ST<0>
12A2<> 18C6<
AGP_ST<1>
12A2<> 18C6<
AGP_ST<2>
12A2<> 18C6<
AGP_STOP_L
12B2<> 12C2< 18B7<>
AGP_STP_L
18C6<
AGP_SUS_STAT_L_PU 18C6<
AGP_TRDY_L
12B2<> 12C2< 18B7<>
AGP_WBF_L
12A4<> 12B2< 18B7>
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL5
+1_5V_INTREPID_PLL6
+1_5V_INTREPID_PLL7
+1_5V_INTREPID_PLL8
CPU_DATA<60>
CPU_DATA<61>
6B8<> 8B3< 8B4<>

6B8<> 8B3< 8B4<>
ENET_ENERGY_DET
ENET_HSDACM
6A8<> 8B3< 8B4<>

6A8<> 8B3< 8B4<>
5C3< 8A4<> 8C2< 36D5>
5C3> 8A4< 8C2< 36D5>
36D5>
5C3< 8A4<>
36D5>
5C3< 8A4<>
5C3< 8A4<>
5B2< 5C3<
5A3< 7A4<
5A3< 5C2<
5A7<> 8B6<> 36D5>
5A7> 8B6< 8D2< 36D5>
7A7<>
5B3< 5C2< 7A5< 7A8< 23A2<> 39C8>
ENET_HSDACP
27A7<>
ENET_LINK_RXD<0> 13C5< 27C7>
ENET_LINK_RXD<7..0> 37A5>
ENET_LINK_RXD<3> 13C5< 27B7>
ENET_LINK_TXD<0> 13B4< 13D5>
AIRPORT_CLKRUN_L 24C6<> 39C1>

AIRPORT_IDSEL
24C5<> 39B1>
AIRPORT_PCI_GNT_L 12D7<> 24D5<> 39C4>
AIRPORT_PCI_INT_L 14B5<> 14D7< 24D5<> 39C4>
AIRPORT_PCI_REQ_L 12A7< 12D7<> 24D6<> 39D4>
CPU_DATA<62>
CPU_DATA<63>
CPU_DBG_L
CPU_DRDY_L
CPU_DRDY_L_UF
CPU_DTI<0>
CPU_DTI<0..2>
CPU_DTI<1>
CPU_DTI<2>
CPU_EDTI
CPU_EMODE0_L
CPU_EMODE1_L
CPU_GBL_L
CPU_HIT_L
CPU_HRESET_INV
CPU_HRESET_L
5V_SLEEP_PWREN
5V_SNSM
5V_SNSP
5V_SW
5V_TG
33A8<>
33C5< 37A2>
33C5< 37A2>
33C5<> 38D1>
33C5<>
+1_5V_LDO
35D8< 38D6>
+1_5V_MAIN
38D6>
+1_5V_SLEEP
38D6>
+1_5V_SLEEP_NECK 21A3<> 38B3>
+1_5V_SLEEP_VIN 35D8<> 38D6>
+1_8V_ATI_PVDD
19C5<> 21B6< 21B6< 21D6<> 38C3>
+1_8V_ATI_TPVDD 21D2<>
+1_8V_DVO_F
21B2<
+1_8V_GPU
18A7< 19D8< 20A5< 21A2< 21A6<
21B1< 21B6< 21C8< 21D6< 21D8< 38C3>
+1_8V_GPU_AVDD
21D5< 38C3>
5V_VOSNS
1625_BG
1625_BST
1625_BST_ESR
1625_COMP
1625_DIV
1625_ENABLE
1625_ENABLE_L
1625_EXTVCC
1625_FCB
1625_INTVCC
33C5<>
32C5<>
32C5<
32C5<>
31D2< 32C6<
32C8<
32D7<>
32D6<>
32D5<> 38D1>
32C6<
32C5<> 38D1>
AIRPORT_PME_L_TP 24D5<>
AMP_CONTROL
25C5<> 25D5<>
ATI_AGP_FBSKEW<0> 19C2< 19C7<>
ATI_AGP_FBSKEW<1> 19C2< 19C7<>
ATI_BUS_CFG<0>
19B2< 19C7<>
ATI_BUS_CFG<1>
19B2< 19C7<>
ATI_BUS_CFG<2>
19B2< 19C7<>
ATI_CLK27M_IN
18C1< 19B7<
ATI_CLK27M_OSC
18D2<
ATI_CLK27M_OSC_SS 18B2< 18D1<
ATI_DBI_HI_PU
18C6<>
CLK25M_XTAL_IN
27A7<
CLK27M_GPU_XIN
36B1>
CLK27M_GPU_XOUT 36B1>
CLK27M_XTAL_IN
36B1>
CLK32K_PMU_XIN
30B3<>
CLK32K_PMU_XOUT 30B3<>
CLK32K_PMU_XOUT_UF 30B2<>
CLK33M_AIRPORT
12D8< 24D5<> 36C1> 39B1>
CLK33M_AIRPORT_UF 12C7<> 36C1>
CLK33M_CBUS
12D8< 17A7< 36C1>
CLK33M_CBUS_UF
12C7<> 36C1>
CPU_L1TSTCLK
CPU_L2TSTCLK
CPU_LSSD_MODE
CPU_MCP_L
CPU_M_DM
CPU_M_DP
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFG<4>
5B2< 5B3<
5B3< 5C2<
5B3< 5C2<
5B3< 5D2<
25A8< 25B6<
25B6< 25B8<
5C3< 7D3<
5C3< 7D3<
5C3< 7D3<
5C3< 7D3<
5C3< 7D3<>
+1_8V_GPU_AVDDQ 21D4< 21D7< 38C3>

+1_8V_GPU_MEMPLL 21B5< 38C3>
+1_8V_GPU_PLL
21D5< 38C3>
+1_8V_GPU_PNLIO 21A5< 38C3>
+1_8V_GPU_PNLPLL 21B5< 38C3>
+1_8V_GPU_TP_PLL 21B4< 21D1<
1625_RUNSS
1625_SGND
1625_TG
1625_VFB
1625_VIN
1625_VSW
32C6<
32B7<> 38D1>
32C5<>
32B5<>
32C6< 38D1>
32C4<> 38D1>
1772_ACIN
1772_ACOK_L
1772_BST
1772_BST_ESR
1772_CCI
1772_CCS
1772_CCV
1772_CCV_RC
1772_CELLS
1772_CLS
1772_CSIN
31B5<
31B5<> 31C4<>
31B4<>
31C3<
31B5<>
31B5<
31B5<>
31B5<
31B4<
31A4<
31B4<> 37A2>
18C6<>
21A3<
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>
19C7<>
19D5<> 22C8<
18A6<>
18A7<
18A7<
18D3<
21D6<>
19D6<>
19D6<>
CLK33M_USB2
12C8< 26B7< 36C1>
CLK33M_USB2_UF
12C7<> 36C1>
CLK66M_AGP_15V_TP 12C4>
CLK66M_GPU_AGP
12C8< 18B7< 36C1>
CLK66M_GPU_AGP_UF 12C7<> 36C1>
CLKENET_LINK_GBE_REF 13C5< 27C8< 36B1>
+1_8V_GPU_VDDDI 21C7< 21D4< 38C3>

+1_8V_MAIN
38D6> 39A2>
+1_8V_MAIN_LX_F 35A4<>
+1_8V_PVDD_NECK 19B5<> 38B3>
+1_8V_SLEEP
38D6>
+1_8V_SLEEP_NECK 21A3<> 38B3>
+1_95V_FW_DVDD
28C4< 28C7<> 28D5< 38A3>
+1_95V_FW_DVDD_PORT1 28D6< 38A3>
+1_95V_FW_DVDD_RX0 28C5< 38A3>
+1_95V_FW_DVDD_TX0 28C5< 38A3>
+1_95V_FW_PLL400VDD 28D5< 38A3>
ATI_DBI_LO_PU
ATI_DVODMODE
ATI_GPIO7_SPN
ATI_GPIO8_PD
ATI_GPIO9_SPN
ATI_GPIO10_SPN
ATI_GPIO11_SPN
ATI_GPIO12_SPN
ATI_GPIO13_SPN
ATI_HSYNC
ATI_MEMTEST
ATI_MEMVMODE0
ATI_MEMVMODE1
ATI_OSC_OE
ATI_PVDD_BYP
ATI_R2SET
ATI_RSET
+1_95V_FW_PLL500VDD 28D5< 38A3>

+1_95V_FW_PLLVDD 28D5< 28D7<> 38A3>
+2_5V_CG_MAIN
14C6< 38A3>
+2_5V_GPU
21A7< 21B6< 21D3< 21D7< 21D8<
38B3>
1772_CSIP
1772_CSSN
1772_CSSP
1772_DCIN
1772_DHI
31B4<> 37A2>
31C5< 37A2>
31C5< 37A2>
31B5< 38C6>
31B4<>
ATI_RSTB_MSK
ATI_SSCLK_IN
ATI_SSCLK_UF
ATI_TESTEN
ATI_TMDS_CLKN
18C6<>
18B1< 19B7<>
18B1<>
19B7<
19B7> 20B4<
CLKENET_LINK_GTX 13C5<> 36A1>

CLKENET_LINK_RX 13D5< 27C8< 36B1>
CLKENET_LINK_TX 13D5< 27D8< 36A1>
CLKENET_PHY_GBE_REF 27C7<> 36B1>
CLKENET_PHY_GTX 13C6< 27C7< 36A1>
CLKENET_PHY_RX
27C7<> 36B1>
CLKENET_PHY_TX
27D7<> 36B1>
CLKFW_LINK_LCLK 13C3<> 36A1>
CLKFW_LINK_PCLK 13C3<> 28C3< 36A1>
CLKFW_PHY_LCLK
13C2< 28B8< 36A1>
CLKFW_PHY_PCLK
28B4> 28C3< 36A1>
CLKLVDS_LN
19B5> 22A4<> 37C2>
CLKLVDS_LP
19B5> 22A4<> 37C2>
CLKLVDS_UN
19B5> 22A4<> 37C2>
CLKLVDS_UP
19B5> 22A4<> 37C2>
COMM_DTR_L
14C2> 25D1<> 39B2>
+2_5V_GPU_A2VDD
+2_5V_GPU_PNLIO
+2_5V_INTREPID
31B4<>
31B4<> 38C6>
31A5<> 38C6>
31B5<>
31B5<>
31B5<
31C4<> 38C6>
31B4<> 38C6>
31B5<>
31B5<
19A5<> 38B1>
19A5<> 38B1>
19A4<> 38B1>
19A5< 38B1>
19A5< 19A7<> 38B1>
19A5< 38B1>
19A5<> 38B1>
ATI_TMDS_CLKP
19B7> 20B4<
ATI_TMDS_DN<0>
19B7> 20B4<
ATI_TMDS_DN<1>
19B7> 20A4<
ATI_TMDS_DN<2>
19B7> 20A4<
ATI_TMDS_DP<0>
19B7> 20B4<
ATI_TMDS_DP<1>
19B7> 20A4<
ATI_TMDS_DP<2>
19B7> 20A4<
ATI_TPVDD_BYP
21D1<>
ATI_VSYNC
19D5<> 22C8<
ATI_X1CLK_SKEW<0> 19C2< 19C7<>
ATI_X1CLK_SKEW<1> 19B2< 19C7<>
BATTV_HIGH
31B7<>
BATTV_LOW
31B8<>
BATT_14PBUS_EN
31C1<>
BATT_14V_GATE
31C1<>
BATT_24PBUS_EN
31C2<>
BATT_24V_GATE
31C1<>
COMM_GPIO_L
COMM_RESET_L
COMM_RING_DET_L
COMM_RTS_L
COMM_RXD
COMM_SHUTDOWN
COMM_TRXC
COMM_TXD_L
COMP_DISABLE
COMP_ENABLE
COMP_RC
14C2<> 25D2<> 39C2>

14C5<> 25C4<> 39C4>
14B5<> 14C7< 25C3<> 30C6<> 39C4>
14C2> 25D1<> 39B2>
14C2<> 25D1<> 39B2>
14C5<> 25C4<> 39C4>
14C2<> 25D2<> 39C2>
14C2<> 25D2<> 39C2>
22C2<>
22C1<>
32C6<
CPU_TSIZ<1>
5A7> 8B6<>
CPU_TSIZ<2>
5A7> 8B6<>
CPU_TS_L
5C7<> 8D2< 8D6<> 36D5>
CPU_TT<0>
5A7<> 8B6<>
CPU_TT<0..4>
36C5>
CPU_TT<1>
5A7<> 8B6<>
CPU_TT<2>
5A7<> 8B6<>
CPU_TT<3>
5A7<> 8B6<>
CPU_TT<4>
5A7<> 8B6<>
CPU_VCORE_HI_OC 7B8< 30D4<> 34C8< 34D7<
CPU_VCORE_PWR_SEQ 34D8<>
+3V_ATI_SS
18B2< 38C3>
+3V_CG_PLL_MAIN 14C6< 38A3>
+3V_FW
28A3< 28D7<> 29D5< 38A3>
+3V_FW_AVDD
28C6< 38A3>
+3V_FW_AVDD_PORT0 28C6< 38A3>
+3V_FW_AVDD_PORT1 28C6< 38A3>
1772_DLO
1772_DLOV
1772_GND
1772_ICHG
1772_ICTL
1772_IINP
1772_LDO
1772_LX
1772_REF
1772_VCTL
1778_BG
1778_BST
1778_BST_RC
1778_FCB
1778_GND
1778_ION
1778_ITH
CPU_AACK_L
CPU_ADDR<0>
CPU_ADDR<0..31>
CPU_ADDR<1>
CPU_ADDR<2>
CPU_ADDR<3>
5A7< 8B6<> 8C2< 36D5>

5C7<> 8D6<>
36D5>
5C7<> 8D6<>
5C7<> 8D6<>
5C7<> 8D6<>
CPU_VCORE_SEQ
CPU_VCORE_SEQ_L
CPU_VCORE_SLEEP
+3V_FW_AVDD_PORT2 28D6< 38A3>

+3V_FW_ESD
29B3<> 29D2<> 38B3>
+3V_FW_ESD_ILIM 29D4< 38B3>
+3V_FW_UF
28D7<> 38A3>
+3V_GPU
12D1< 18B8< 18C5< 18C7< 18D6<
19C4< 19C5< 19C7< 19D7< 21A6< 21B1<
38C3>
+3V_GPU_FLT
21B2< 38C3>
+3V_GPU_SI
20C4< 20C8< 20D8<
+3V_HALL_EFFECT 23C6<> 38B6> 39C4>
+3V_INTREPID_USB 14C3< 38D3>
+3V_LCD
22B4<> 38B6>
+3V_LCD_SW
22A4<> 38B6>
+3V_MAIN
38D6>
+3V_NEC_VDD
26D7< 26D7< 38A3>
+3V_PMU
38D6> 39A2>
+3V_PMU_AVCC
25A4< 30B6< 30D5<> 38C6>
+3V_PMU_ESR
32A2< 38C6>
+3V_PMU_RESET
30B7< 34A3<>
+3V_SI_AVCC
20C7< 38B3>
+3V_SI_PLLVCC
20C7< 38B3>
+3V_SI_VCC
20C6< 38B3>
+3V_SLEEP
38D6>
+3V_SLEEP_NECK
21A3<> 38B3>
+3V_SLP_OK_L
33B4<>
+3V_SLP_ON
33A5<>
+4_6V_BU
32A3<> 33B6< 38C6>
1778_ITH_RC
19A7< 38B1>
1778_SHDN_L
19A6<
1778_SHDN_L_D3COLD 19A7<>
1778_TG
19A5<> 38B1>
1778_VCC
19A5<> 38B1>
1778_VFB
19A2< 19A5< 38B1> 39A1>
1778_VIN
19A5< 38B1>
1778_VRNG
19A5< 38B1>
3405_MODE
27D5<
3405_VFB
27D4<>
3707_FCB
33C5<
3707_FSET
33C5<
3707_INTVCC
33D4<> 38D1>
3707_SGND
33B5<> 38D1>
3707_STBY
33C5<>
A29_CLS_ADJ
31A5<>
A29_CURRENT_ADJ 31C4<>
A29_DETECT
30A2< 31A5<> 31C4<>
A29_DET_L
30A3<
AB_SEL_LOW
34A6<>
AC_DIV
31C8<
AC_ENABLE_GATE
31D6<>
AC_ENABLE_L
31C6<>
AC_GTR_18V
31C4<>
AC_IN
27B8<> 29C7< 30B3< 31C5<> 31C7<>
AC_IN_FW_CNTL
29C7<>
AC_IN_L
31C2<> 31C6<>
BATT_CLK
BATT_DATA
BATT_DIV
BATT_LOW
BATT_LOW_L
BATT_NEG
BBANG_HRESET_L
BBANG_JTAG_TCK
BBANG_TCK_EN
BCKFD_PROT_EN_L
BCKFD_PROT_GATE
31A4<> 39C3>
31A4<> 39C3>
31A5<
31A6<>
31B6<>
31A4<> 38C6> 39C3>
23A4< 23C4<> 39C1>
23B3< 23C4<>
23B3<
31C6<>
31D6<>
BRIGHT_PWM
BRIGHT_PWM_UF
BT_USB_DM
BT_USB_DP
CAPSLOCK_LED
CAPSLOCK_LED_L
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<6>
CBUS_ADDR<7>
CBUS_ADDR<8>
CBUS_ADDR<9>
22A1<> 39A7>
22A2<>
14B1< 24B2<> 37B2> 39B6>
14C1< 24B2<> 37B2> 39B6>
23A8<
23B8< 30C7<
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
+4_85V_ESR
+4_85V_RAW
+5V_DDC_SLEEP
+5V_DDC_SLEEP_UF
+5V_HD_SLEEP
+5V_INV_SW
AC_IN_L_RC
31C2<>
ADAPTER_DET
30A4< 31D8<> 39C2>
ADAPTER_I_REG
31D3<>
ADT7460_ADR_EN_L 25B3<>
ADT7460_FAN1_PWM 25B3<>
ADT7460_FAN2_PWM 25B3<>
CBUS_ADDR<10>
CBUS_ADDR<11>
CBUS_ADDR<12>
CBUS_ADDR<13>
CBUS_ADDR<14>
CBUS_ADDR<15>
17B4> 17C1<>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
17B1<> 17B4>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<10>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<17>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<20>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<25>
CPU_ADDR<26>
CPU_ADDR<27>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_ARTRY_L
CPU_AVDD
CPU_BG_L
CPU_BR_L
CPU_BUS_VSEL
5C7<> 8D6<>
5C7<> 8C6<>
5C7<> 8C6<>
5C7<> 8C6<>
5C7<> 8C6<>
5C7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8C6<>
5B7<> 8B6<>
5A7<> 8B6<> 8D2< 36D5>
5C3< 38D3>
5C7< 8C2< 8D6<> 36D5>
5C7> 8D2< 8D6< 36D5>
5C3< 7A6<
ADT7460_THERM
25A5<> 25B3<>
ADT7460_VCC
25C4<
ADT7460_VCORE_MON 5C8<> 25B4<>
AGP8X_DET_PU
18C6<>
AGP_AD<0>
12D2<> 18C7<>
AGP_AD<15..0>
37D5>
AGP_AD<1>
12C2<> 18C7<>
AGP_AD<2>
12C2<> 18C7<>
AGP_AD<3>
12C2<> 18C7<>
AGP_AD<4>
12C2<> 18C7<>
AGP_AD<5>
12C2<> 18C7<>
AGP_AD<6>
12C2<> 18C7<>
AGP_AD<7>
12C2<> 18C7<>
AGP_AD<8>
12C2<> 18C7<>
AGP_AD<9>
12C2<> 18C7<>
AGP_AD<10>
12C2<> 18C7<>
AGP_AD<11>
12C2<> 18C7<>
AGP_AD<12>
12C2<> 18C7<>
AGP_AD<13>
12C2<> 18C7<>
AGP_AD<14>
12C2<> 18C7<>
AGP_AD<15>
12C2<> 18C7<>
AGP_AD<16>
12C2<> 18C7<>
AGP_AD<31..16>
37D5>
AGP_AD<17>
12C2<> 18C7<>
AGP_AD<18>
12C2<> 18C7<>
AGP_AD<19>
12C2<> 18C7<>
AGP_AD<20>
12C2<> 18C7<>
AGP_AD<21>
12C2<> 18C7<>
AGP_AD<22>
12C2<> 18C7<>
AGP_AD<23>
12C2<> 18C7<>
AGP_AD<24>
12C2<> 18C7<>
AGP_AD<25>
12C2<> 18D7<>
AGP_AD<26>
12C2<> 18D7<>
AGP_AD<27>
12B2<> 18D7<>
AGP_AD<28>
12B2<> 18D7<>
AGP_AD<29>
12B2<> 18D7<>
AGP_AD<30>
12B2<> 18D7<>
AGP_AD<31>
12B2<> 18D7<>
AGP_AD_STB<0>
12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB<1>
12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB_L<0> 12A2<> 12B2< 18D6<> 37D5>
AGP_AD_STB_L<1> 12A2<> 12A2< 18D6<> 37D5>
AGP_ATI_RESET_L 18B7<
AGP_ATI_VREF
18B7<
AGP_ATI_VREFG
18B7<
AGP_BUSY_L
12C4<> 12D2< 18D6>
AGP_CBE<0>
12B2<> 18B7<>
AGP_CBE<1..0>
37D5>
AGP_CBE<1>
12B2<> 18B7<>
AGP_CBE<2>
12B2<> 18B7<>
AGP_CBE<3..2>
37D5>
AGP_CBE<3>
12B2<> 18C7<>
AGP_DEVSEL_L
12B2<> 12C2< 18B7<> 37D5>
AGP_FRAME_L
12B2<> 12C2< 18B7<> 37D5>
AGP_GNT_L
12C2< 12D2<> 18B7< 37D5>
AGP_INT_L
14B5<> 18B7<>
AGP_IRDY_L
12B2<> 12C2< 18B7<> 37D5>
AGP_PAR
12B2<> 18B7> 37D5>
AGP_PIPE_L
12A2<> 12B2<
AGP_RBF_L
12A2<> 12C2< 18C6> 37D5>
AGP_REQ_L
12C2< 12D2<> 18B7<> 37D5>
AGP_SBA<0>
12B2< 18C6>
AGP_SBA<7..0>
37D5>
AGP_SBA<1>
12B2<> 18C6>
AGP_SBA<2>
12B2<> 18C6>
AGP_SBA<3>
12B2<> 18C6>
AGP_SBA<4>
12B2<> 18C6>
CBUS_ADDR<16>
CBUS_ADDR<17>
CBUS_ADDR<18>
CBUS_ADDR<19>
CBUS_ADDR<20>
CBUS_ADDR<21>
CBUS_ADDR<22>
CBUS_ADDR<23>
CBUS_ADDR<24>
CBUS_ADDR<25>
CBUS_ADDR_16_UF
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_CE1_L
CBUS_CE2_L
CBUS_DATA<0>
CBUS_DATA<1>
CBUS_DATA<2>
CBUS_DATA<3>
CBUS_DATA<4>
CBUS_DATA<5>
CBUS_DATA<6>
CBUS_DATA<7>
CBUS_DATA<8>
CBUS_DATA<9>
CBUS_DATA<10>
CBUS_DATA<11>
CBUS_DATA<12>
CBUS_DATA<13>
CBUS_DATA<14>
CBUS_DATA<15>
CBUS_DET_1_L
CBUS_DET_2_L
CBUS_INPACK_L
CBUS_INT_L
CBUS_IORD_L
CBUS_IOWR_L
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_OE_L
CBUS_PCI_GNT_L
CBUS_PCI_IDSEL
CBUS_PCI_PERR_L
CBUS_PCI_REQ_L
CBUS_PCI_RESET_L
CBUS_PCI_SERR_L
CBUS_READY
CBUS_REG_L
CBUS_RESET_L
CBUS_SUSPEND_PU
CBUS_VCCD0_L
CBUS_VCCD1_L
CBUS_VPPD0
CBUS_VPPD1
CBUS_VS1
CBUS_VS2
CBUS_WAIT_L
CBUS_WE_L
CBUS_WP_L
CG_ADDRSEL
CG_CLKOUT
CG_FSEL
CG_LOCK
17B1<> 17B4<
17B2<> 17B4>
17B2<> 17B4>
17B2<> 17B4>
17B2<> 17B4>
17B2<> 17B4>
17A4> 17B2<>
17A4> 17B2<>
17A4> 17B2<>
17A4> 17B2<>
17B5<>
17B2<> 17C4<
17B2<> 17C4<
17C1<> 17C4>
17B4> 17C2<>
17A1<> 17A4<>
17A1<> 17A4<>
17A1<> 17A4<>
17A4<> 17C1<>
17A4<> 17C1<>
17A4<> 17C1<>
17A4<> 17C1<>
17A4<> 17C1<>
17A2<> 17A4<>
17A2<> 17A4<>
17A2<> 17A4<>
17A4<> 17C2<>
17A4<> 17C2<>
17A4<> 17C2<>
17A4<> 17C2<>
17A4<> 17C2<>
17C2<> 17C4< 39B8>
17A2<> 17C4< 39B8>
17B2<> 17B4<
14B5<> 14B7< 17A7<>
17B2<> 17C4>
17B2<> 17C4>
17A7< 17A7<>
17A7< 17A7<>
17A7< 17A7<>
17A7< 17A7<>
17A7< 17A7<>
17A7<> 17A7<
17C1<> 17C4>
12D7<> 17A7<
17B7<
17B7<> 17D7<
12A7< 12D7<> 17A7>
17A7<
17B7> 17D7<
17B1<> 17C4<
17B2<> 17C4>
17B2<> 17C4>
17A7< 17D7<
17C4<>
17C4<>
17C4<>
17C5<>
17B2<> 17C4<>
17B2<> 17C4<>
17B2<> 17B4<
17B1<> 17C4>
17A1<> 17B4<
14B7<
14B6<>
14B7< 14C5<>
14B7<>
CPU_CHKSTP_OUT_L
CPU_CHKS_L
CPU_CI_L
CPU_CLKOUT_SPN
CPU_CLK_EN
CPU_DATA<0>
CPU_DATA<0..31>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<12>
CPU_DATA<13>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>
CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<32>
CPU_DATA<32..63>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
5B3<> 5C2< 39D8>

5A3< 5D2<
5A7> 8B6<> 36D5>
5C3>
8A6< 30C4<>
6D8<> 8D4<>
36D5>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6D8<> 8D4<>
6C8<> 8D4<>
6C8<> 8D4<>
6C8<> 8D4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<>
6C8<> 8C4<> 8D8<
36D5>
6C8<> 8C4<> 8D8<
6C8<> 8C4<> 8D8<
6C8<> 8C4<> 8D8<
6B8<> 8C4<> 8D8<
6B8<> 8C4<> 8D8<
6B8<> 8B4<> 8D8<
6B8<> 8B4<> 8D8<
6B8<> 8B4<> 8C8<
6B8<> 8B4<> 8C8<
6B8<> 8B4<> 8C8<
6B8<> 8B4<> 8C8<
6B8<> 8B4<> 8C8<
6B8<> 8B4<> 8B8<
6B8<> 8B4<> 8B8<
6B8<> 8B4<> 8B8<
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8A8< 8B4<>
6B8<> 8B3< 8B4<>
6B8<> 8B3< 8B4<>
6B8<> 8B3< 8B4<>
6B8<> 8B3< 8B4<>
DVI_TURN_ON_BASE 22D2<
EEPROM_ADDR
23D4<
EEPROM_WP_PD
23D3<>
EIDE_ADDR<0>
13B7> 24B8<
EIDE_ADDR<2..0> 37B5>
EIDE_ADDR<1>
13B7> 24B8<
EIDE_ADDR<2>
13B7> 24B8<
EIDE_CS0_L
13B7> 24B8< 37B5>
EIDE_CS1_L
13B7> 24B8< 37B5>
EIDE_DATA<0>
13C7<> 24C8<
EIDE_DATA<15..0> 37B5>
EIDE_DATA<1>
13C7<> 24C8<
EIDE_DATA<2>
13C7<> 24C8<
EIDE_DATA<3>
13C7<> 24C8<
EIDE_DATA<4>
13C7<> 24C8<
EIDE_DATA<5>
13B7<> 24B8<
EIDE_DATA<6>
13B7<> 24C8<
EIDE_DATA<7>
13B7<> 24C8<
EIDE_DATA<8>
13B7<> 24D8<
EIDE_DATA<9>
13B7<> 24D8<
EIDE_DATA<10>
13B7<> 24D8<
EIDE_DATA<11>
13B7<> 24D8<
EIDE_DATA<12>
13B7<> 24D8<
EIDE_DATA<13>
13B7<> 24C8<
EIDE_DATA<14>
13B7<> 24C8<
EIDE_DATA<15>
13B7<> 24C8<
EIDE_DMACK_L
13A7<> 24A8< 37B5>
EIDE_DMARQ
13A7< 24B8< 37B5>
EIDE_INT
13A7< 24A8< 37B5>
EIDE_IOCHRDY
13B7< 24A8< 37B5>
EIDE_OPTICAL_ADDR<0> 24A5<> 24B7< 39A4>
EIDE_OPTICAL_ADDR<2..0> 37B5>
EIDE_OPTICAL_CS0_L 24A5<> 24B7< 37B5> 39D4>
EIDE_OPTICAL_CS1_L 24A6<> 24B7< 37B5> 39D4>
EIDE_OPTICAL_DATA<0> 24A5<> 24C7< 39C4>
EIDE_OPTICAL_DATA<15..0> 37B5>
EIDE_OPTICAL_DATA<5> 24A5<> 24B7< 39C4>
EIDE_OPTICAL_DATA<7> 24A5<> 24C7< 39B4>
EIDE_OPTICAL_DATA<8> 24A6<> 24D7< 39B4>
EIDE_OPTICAL_DMAACK_L 24A6<> 24A7< 37A5> 39A4>
EIDE_OPTICAL_DMA_RQ 24A6<> 24B7< 37A5> 39A4>
EIDE_OPTICAL_INT 24A5<> 24A7< 37A5> 39D4>
EIDE_OPTICAL_IOCHRDY 24A5<> 24A7< 37A5> 39D4>
EIDE_OPTICAL_RD_L 24A6<> 24A7< 37B5> 39A4>
EIDE_OPTICAL_RST_L 24A7< 24B5<> 37A5> 39D4>
EIDE_OPTICAL_WR_L 24A5<> 24A7< 37A5> 39D4>
EIDE_RD_L
13A7> 24A8< 37B5>
EIDE_RST_L
13B7> 24A8< 37B5>
EIDE_WR_L
13A7> 24A8< 37B5>
ENET_COL
13C5< 27B7> 37A5>
ENET_COMA
27B7<>
ENET_CRS
13C5< 27B7> 37A5>
ENET_CTAP_CHGND 27A1< 38A6>
14D3< 38D3>
12D3< 38D3>
12D6< 38D3>
8D5< 38D3>
14D3< 38D3>
21D4< 21D7< 38C3>

21A5< 38C3>
9A8< 10D3< 10D5< 10D7< 10D8< 15D7<
16B8< 38D3>
+2_5V_MAIN
38D6>
+2_5V_MARVELL
27B8< 27C4<> 38B3>
+2_5V_MARVELL_AVDD 27C4< 38B3>
+2_5V_SLEEP
38D6>
+2_5V_SLEEP_NECK1 19C4<> 38B3>
+2_5V_SLEEP_NECK2 21A3<> 38B3>
+3V_ATI_OSC_SLEEP 18D2< 38C3>
CG_RESET_L
CHARGE_DISABLE
37D5>
37D5>
37D5>
37D5>
14B7<
31A7<>
39B7>
39B7>
39B7>
39A7>
5
CHARGE_LED_L
30C6<> 30D7< 31D8<> 39D2>
CHGND1
38A6>
CHGND2
38A6>
CHGND3
38A6>
CHGND4
38A6> 39B6>
CHGND5
38A6>
CHGND6
38A6>
CLK10M_PMU_XIN
30B6<
CLK10M_PMU_XOUT 30B6<
CLK10M_PMU_XOUT_UF 30B7<
CLK18M_INT_EXT
14A6<> 36B1>
CLK18M_INT_XIN
14A5< 36B1>
CLK18M_INT_XOUT 14A5<> 36B1>
CLK18M_XTAL_IN
14A5< 36B1>
CLK25M_ENET_XIN 27A7< 36B1>
CLK25M_ENET_XOUT 27A7<> 36B1>
+1_0V_MARVELL
+1_5V_AGP
LCD_DIGON_L
LCD_PWREN_L
22A6<
22A5<>
LED_LINK10
LED_LINK100
LED_RX_SPN
LEFT_USB_DM
LEFT_USB_DP
LID_CLOSED_L
LM2594_IN
LT1962_INT_ADJ
LT1962_INT_BYP
LTC1625_ITH
LTC1962_1V5_VIN
27B5<>
27B5<>
27B5>
24B2<>
24B2<>
23A7<>
28D8<>
14D6<
14D6<>
31D3<>
38A1>
ENET_LINK_TXD<7..0> 37A5>
18A6<>
22B8<> 38B6>
22A8<> 38B6>
18A6< 19A3<> 19B5<> 19D4< 38C3>
39B2>
GPU_VCORE_CNTL
19A3<>
GPU_VCORE_CNTL_L 19A4< 19B7<>
GPU_VCORE_NECK
19B5<> 38B3>
GPU_VCORE_PWR_SEQ 19A8<>
GPU_VCORE_SEQ
19A8<
GPU_VCORE_SEQ_L 19A8<
GPU_VCORE_SW
19A4<> 38B1>
GPU_VCORE_VDDCI 18A5< 38C3>
GPU_Y
19D6<> 22B8<
HD_ADDR<0>
24C2<> 24C3<
HD_ADDR<2..0>
37C5>
LTC1962_1V5_VOUT
LTC1962_INT_VIN
LTC1962_L3_VIN
LTC1962_L3_VOUT
LTC3405_SW
CPU_PLL_CFGEXT
7D4<>
CPU_PLL_FS00
7C4<>
CPU_PLL_FS01
7C4<
CPU_PLL_FS10
7C4<
CPU_PLL_STOP_BASE 7C7<
CPU_PLL_STOP_OC 7C4<> 7C8<> 30B6<>

ENET_LINK_TXD<6> 13A4< 13D5>
ENET_LINK_TXD<7> 13A4< 13D5>
ENET_LINK_TX_EN 13D5<> 37A5>
ENET_LINK_TX_ER 13D5<> 37A5>
ENET_MDC
13C5> 27B7< 37A5>
ENET_MDIO
13C5<> 27B7<> 37A5>
ENET_PHY_TXD<0> 13B5< 27C7<
ENET_PHY_TXD<7..0> 37A5>
ENET_PHY_TXD<6> 13A5< 27C7<
ENET_PHY_TXD<7> 13A5< 27C7<
ENET_PHY_TX_EN
13D6< 27C7< 37A5>
HD_ADDR<1>
HD_ADDR<2>
HD_CS0_L
HD_CS1_L
HD_DATA<0>
HD_DATA<15..0>
HD_DATA<1>
HD_DATA<2>
HD_DATA<3>
HD_DATA<4>
HD_DATA<5>
HD_DATA<6>
HD_DATA<7>
HD_DATA<8>
HD_DATA<9>
HD_DATA<10>
HD_DATA<11>
24C2<> 24C3<
24B3< 24C1<>
24C2<> 24C3< 37B5>
24B3< 24C1<> 37B5>
24C2<> 24D3<
37C5>
24C2<> 24D3<
24D2<> 24D3<
24D2<> 24D3<
24C3< 24D2<>
24C3< 24D2<>
24C3< 24D2<>
24C3< 24D2<>
24C3< 24D1<>
24C3< 24D1<>
24C3< 24D1<>
24D1<> 24D3<
CPU_PMONIN_L
CPU_PULLDOWN
CPU_PULLUP
CPU_QACK_L
CPU_QREQ_L
CPU_SHD0_L
CPU_SHD1_L
CPU_SMI_L
CPU_SRESET_L
CPU_SRWX_L
CPU_TA_L
CPU_TBEN
CPU_TBST_L
CPU_TEA_L
CPU_TSIZ<0>
CPU_TSIZ<0..2>
ENET_PHY_TX_ER
ENET_RSET
ENET_RST_L
ENET_RX_DV
ENET_RX_ER
ENET_VSSC
EXT_SWING
FANL_GND
FANL_PWM
FANL_TACH
FANR_GND
FANR_PWM
FANR_TACH
FB_4_85V_BU
FP_PWR_EN
FP_PWR_EN_L
HD_DATA<12>
HD_DATA<13>
HD_DATA<14>
HD_DATA<15>
HD_DIOR_L
24B3< 24D1<>
24B3< 24D1<>
24C1<> 24C3<
24B3< 24C1<>
24A3< 24C2<> 37B5>
HD_DIOW_L
HD_DMACK_L
HD_DMARQ
HD_INTRQ
HD_IOCHRDY
HD_RESET_L
24A3<
24A3<
13C6<
13C6<
24A3<
24A3<
HIGH_VCORE
HIGH_VCORE_DIV
HPD_4V_REF
HPD_BASE
HPD_ON
19A2<>
19A3<
22C3<
22C1<
22C2<>
5A3< 5C2<
5A2< 5A3< 5A3< 5C7<>
5A3< 5C2<
5B3< 8B6<> 36D5>
5B3> 8B6< 8C2< 36D5>
5A7<> 5D2<
5A7<> 5D2<
5B3< 5C2< 30C4<>
5B2< 5B3< 39C8>
5A3< 5C2<
5B3< 8A4<> 8D2< 36D5>
5B3< 5D2< 8A6<>
5A7> 8B6<> 36D5>
5B3< 8A4<> 8C2< 36D5>
5A7> 8B6<>
36D5>
14B5<> 27B7<>
27A7<>
13D6< 27C7< 37A5>

27A5<
27B7<
13D5< 27B7> 37A5>
13C5< 27B7> 37A5>
27A7<>
20A5<>
25A3<> 38B6> 39B3>
25A3<> 25B2<> 39B3>
25A3<> 25B2< 39B3>
25B2<> 38B6> 39B3>
25A2<> 25B1<> 39B3>
25B2< 25B2<>
32A5<
19C6<> 22A6< 22B3<>
22B3<>
GPU_SSCLK_UF
GPU_THERM_DM
36C1>
18A6<>
GPU_THERM_DP
GPU_TV_GND1
GPU_TV_GND2
GPU_VCORE
24C1<>
24C2<>
24C2<>
24C1<>
24C1<>
24D2<>
37B5>
37B5>
37B5>
37B5>
37B5>
37B5>
1
MEM_DATA<63..56> 36A5>
MEM_DATA<57>
9B8<> 10C1<>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<62>
9B8<>
9B8<>
9B8<>
9B8<>
9B8<>
10C1<>
10C1<>
10C1<>
10B1<>
10B1<>
MEM_DATA<63>
MEM_DQM<0>
MEM_DQM<1>
MEM_DQM<2>
MEM_DQM<3..2>
MEM_DQM<3>
9B8<>
9C6<>
9C6<>
9C6<>
36B5>
9C6<>
10B1<>
10C7<> 36C5>
10B7<> 36C5>
10C5<>
38A1>
14D7<> 38A1>
38A1>
38A1>
27D4<> 38B3>
MEM_DQM<4>
MEM_DQM<5..4>
MEM_DQM<5>
MEM_DQM<6>
MEM_DQM<7>
9C6<>
36B5>
9C6<>
9C6<>
9C6<>
10C3<>
LTC3411_GND
LTC3411_ITH
LTC3411_ITH_RC
LTC3411_SHDN
LTC3411_SYNC
LTC3411_VCC
LTC3412_GND
LTC3412_ITH
LTC3412_ITH_RC
LTC3412_PGOOD
LTC3412_RT
38A1>
38A1>
38A1>
38A1>
38A1>
38B1>
35A6<>
35A6<>
35A6<
35A4<>
35A6<
MEM_DQS<0>
MEM_DQS<1>
MEM_DQS<2>
MEM_DQS<3..2>
MEM_DQS<3>
MEM_DQS<4>
MEM_DQS<5..4>
MEM_DQS<5>
MEM_DQS<6>
MEM_DQS<7>
MEM_MUXSEL_H<0>
9C6<>
9C6<>
9C6<>
36B5>
9C6<>
9C6<>
36B5>
9C6<>
9C6<>
9C6<>
9B6<>
10C7<> 36C5>
10B7<> 36C5>
10C5<>
LTC3412_RUNSS
LTC3412_SYNC
LTC3412_VFB
LTC3412_VFB_DIV
LTC3707_START_RC
LVDS_DDC_CLK
35A6<>
35A6<>
35A6<>
35A6<
33B6<>
19C5<> 22B5<> 39A7>
MEM_MUXSEL_H<1..0> 36A5>
MEM_MUXSEL_H<1> 9B6<> 10A4<
MEM_MUXSEL_L<0> 9B6<> 10A6<
MEM_MUXSEL_L<1..0> 36A5>
MEM_MUXSEL_L<1> 9B6<> 10A4<
MEM_RAS_L
9A5< 9C6<> 36A5>
LVDS_DDC_DATA
LVDS_L0N
LVDS_L0P
LVDS_L1N
LVDS_L1P
LVDS_L2N
LVDS_L2P
LVDS_L3N_TP
LVDS_L3P_TP
LVDS_U0N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
LVDS_U3N_TP
19C5<> 22B5<> 39A7>

19B5> 22B4<> 37C2> 39C7>
19B5> 22B4<> 37C2> 39C7>
19B5> 22B4<> 37C2> 39C7>
19B5> 22B4<> 37C2> 39C7>
19B5> 22B4<> 37C2> 39C7>
19B5> 22B4<> 37C2> 39C7>
19B5>
19B5>
19C5> 22A4<> 37C2> 39B7>
19C5> 22A4<> 37C2> 39B7>
19C5> 22A4<> 37C2> 39B7>
19C5> 22A4<> 37C2> 39B7>
19B5> 22A4<> 37B2> 39B7>
19B5> 22A4<> 37B2> 39B7>
19B5>
MEM_WE_L
MLB_ALS_GAIN_SW
MLB_ALS_OP_COMP
MLB_ALS_OP_IN
MLB_ALS_OUT
MLB_ALS_OUT_FB
MLB_PHOTODIODE
MODEM_USB_DM
MODEM_USB_DP
MOD_BITCLK
MOD_CLKOUT
MOD_DTO
MOD_SYNC
MPIC_CPU_INT_L
NEC_AMC_TP
NEC_AVDD
26B3< 37A2> 39D1>

26A3< 37A2> 39D1>
39C4>
38B3>
10B3<>
10C1<> 36B5>
10B1<> 36A5>
10B3<>
10C1<> 36B5>
10B1<> 36A5>
10A6<
9A5< 9C6<> 36A5>

23C4<> 23C8<>
23D7<
23D7<
23C4<> 23D6<
23D7<>
23D8<>
14B1< 25C3<> 37A2> 39B6>
14B1< 25C3<> 37A2> 39B6>
14A2< 25C3<> 39B1>
14A2< 25C4<> 39A1>
14A2< 25C4<> 39A1>
14A2< 25C3<> 39A1>
5B2< 5B3< 14B5>
26A5<
26D6< 38A3>
HPD_ON_RC
22C2<
HPD_PWR_SNS_EN
19C7<> 22C3<>
HPD_PWR_SW
22C2<>
IAC_FB
31D4<
IAC_RC_COMP
31D4<
INTREPID_ACS_REF 8A6<
INT_AGPPVT
12D4<>
INT_AGP_FB_IN
12C4< 36C1>
INT_AGP_FB_OUT
12C4<> 36C1>
INT_AGP_VREF
12B4< 12D4<> 18D5< 38D3>
INT_AUDIO_TO_SND 14B2< 25D8< 39C6>
INT_AUDIO_TO_SND_F 25D7<> 25D7<
INT_CPUFB_IN
8A6< 8B6< 36D1>
INT_CPUFB_IN_NORM 8A4< 36D1>
INT_CPUFB_LONG
8A4< 36D1>
INT_CPUFB_OUT
8A6<> 8A6< 36D1>
INT_CPUFB_OUT_NORM 8A4< 36D1>
LVDS_U3P_TP
MAIN_RESET_L
CPU_WT_L
5A7> 8B6<> 36C5>
CSLOT_ADDR3_SPN 13B7>
CSLOT_CE1_L_SPN 13C7>
CSLOT_CE2_L_SPN 13C7>
CSLOT_IORD_L_SPN 13C7>
CSLOT_IOWAIT_L_PU 13C7<
CSLOT_IOWR_L_SPN 13C7>
CSLOT_OE_L_SPN
13C7>
CSLOT_WE_L_SPN
13C7>
CURRENT_THRESHOLD 31C4<
CY25811_S0
18B2<
CY25811_S1
18B2<
DCDC_EN
19A7<> 29C7<> 32B7<> 33B6<> 34C8<>
39C1>
DCDC_EN_L
33B6< 33B7<> 35C7<>
DDC_CLK_ISO
22D4<>
DDR_VREF
11D1< 11D3<> 11D5<> 11D6<> 11D8<>
38D3>
DVI_DDC_CLK
22D4<>
DVI_DDC_CLK_UF
22C5<> 22D3<> 39C7>
DVI_DDC_DATA
22C4<>
FW_LINK_DATA<3> 13D3<> 28A8<

FW_LINK_DATA<4> 13C3<> 28A8<
FW_LINK_LREQ
13C3<> 37A5>
FW_LKON
13C3<> 28B5<>
FW_OSC
28A4< 36A1>
FW_OSC_EN
28A3<
FW_PC_PD
28B7<
FW_PC_PU
28B7<
FW_PHY_CNTL<0>
28B4<> 28C3<
FW_PHY_CNTL<1..0> 37A5>
FW_PHY_CNTL<1>
28B4<> 28C3<
FW_PHY_DATA<0>
28B8<>
FW_PHY_DATA<7..0> 37A5>
FW_PHY_DATA<1>
28B8<>
FW_PHY_DATA<2>
28B8<>
FW_PHY_DATA<3>
28A8<>
FW_PHY_DATA<4>
28A8<>
FW_PHY_DATA<5>
28A8<>
FW_PHY_DATA<6>
28A8<>
INT_CPUFB_OUT_SHORT 8A5< 36D1>

INT_DDRCLK2_N_TP 9B6<>
INT_DDRCLK2_P_TP 9B6<>
INT_DDRCLK5_N_TP 9B6<>
INT_DDRCLK5_P_TP 9B6<>
INT_ENET_RST_L
14B5<> 27B8<
INT_EXTINT3_PU
14B5<> 14B7<
INT_EXTINT8_PU
14B5<> 14C7<
INT_EXTINT10_PU 14A7< 14B5<>
FW_PHY_DATA<7>
FW_PHY_LPS
FW_PHY_LREQ
FW_PHY_PD
FW_PHY_PD_INT
28A8<>
13C3<> 28B8<
13C2< 28B8< 37A5>
14C5< 28B8<
14A7< 14C5<>
MDI2_PD
MDI3_PD
MDI_M<0>
MDI_M<1>
MDI_M<2>
MDI_M<3>
MDI_P<0>
MDI_P<1>
MDI_P<2>
MDI_P<3>
MEM_ADDR<0>
MEM_ADDR<12..0>
MEM_ADDR<1>
MEM_ADDR<2>
MEM_ADDR<3>
MEM_ADDR<4>
MEM_ADDR<5>
MEM_ADDR<6>
MEM_ADDR<7>
MEM_ADDR<8>
MEM_ADDR<9>
MEM_ADDR<10>
MEM_ADDR<11>
MEM_ADDR<12>
MEM_BA<0>
MEM_BA<1..0>
MEM_BA<1>
27B4<
27B3<
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
27B5<> 37D2>
9B5< 9D6<>
36A5>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9B5< 9D6<>
9A5< 9D6<>
9A5< 9D6<>
9A5< 9D6<>
9A5< 9D6<>
9A5< 9D6<>
36A5>
9A5< 9C6<>
NEC_PCI_INTA_L
26A7< 26B7>
NEC_PCI_INTB_L
26A7< 26B7>
NEC_PCI_INTC_L
26A7< 26B7>
NEC_PCI_PERR_L
26B7<> 26C8<
NEC_PCI_SERR_L
26B7> 26C8<
NEC_PME_L
26A7> 26B7<
NEC_PPON3_TP
26B5>
NEC_PPON4_TP
26B5>
NEC_PPON5_TP
26B5>
NEC_RIGHT_USB_OVERCURRENT 26C1< 32A7<> 39C1>
NEC_RIGHT_USB_PWREN 26B5<> 32A7<> 39C1>
NEC_RREF
26B5<>
NEC_SMI_L_TP
26A7>
NEC_USB_DAM
26B4< 26C3<> 37B2>
NEC_USB_DAP
26A4< 26C3<> 37B2>
NEC_USB_DBM
26A4< 26C3<> 37B2>
NEC_USB_DBP
26A4< 26C3<> 37B2>
NEC_USB_RSDM1
26C5<> 37B2>
NEC_USB_RSDM2
26C5<> 37B2>
NEC_USB_RSDP1
26C5<> 37B2>
NEC_USB_RSDP2
26C5<> 37B2>
NEC_XT1
26D5< 36B1>
NEC_XT2
26D5<> 36B1>
NEC_XT2_R
26D4<
NTEST1_TP
26B5<
NUMLOCK_LED
23B8<
NUMLOCK_LED_L
23B8< 30C7<
DVI_DDC_DATA_UF
DVI_HPD
DVI_HPD_DIV
DVI_HPD_UF
DVI_TRUN_ON_ILIM
DVI_TURN_ON
FW_PHY_RESET_L
FW_PINT
FW_PLL_ADJ
FW_PORT1_SEL
FW_PWREN_L
FW_PWR_GATE
28A8<
13C3<> 28B4> 37A5>
28C7<
28B6<
29C6<>
29D6<>
INT_MEM_REF_H
9B6< 38D3>
INT_MEM_VREF
9A7< 9B6<> 38D3>
INT_MOD_BITCLK_UF 14A3<> 14A7<
INT_MOD_CLKOUT_UF 14A3<> 14B7<
INT_MOD_DTI
14A2< 25C3<> 39B1>
INT_MOD_DTI_UF
14A7<
MEM_CAS_L
MEM_CKE<0>
MEM_CKE<3..0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
9A5< 9C6<> 36A5>

9B6<> 9C5<
36A5>
9B6<> 9C5<
9B6<> 9C5<
9B6<> 9C5<
OVER_18V_ADJ
PCI1510_VR_EN_L
PCI_AD<0>
FW_R0
FW_R1
FW_TESTM
FW_TPA0N
FW_TPA0N_CONN
FW_TPA0P
FW_TPA0P_CONN
FW_TPA1N
FW_TPA1P
FW_TPB0N
FW_TPB0N_CONN
FW_TPB0P
FW_TPB0P_CONN
FW_TPB1N
FW_TPB1P
FW_TPB2_PD
FW_TPI0N
FW_TPI0P
FW_TPI1N
FW_TPI1P
FW_TPO0N
FW_TPO0P
FW_TPO0R
FW_TPO1N
FW_TPO1P
FW_VGND0
FW_VGND1
FW_VREG_PD
FW_XI
GAIN_SETTING2
GPU_AGP_TEST
GPU_AUXWIN
GPU_B
GPU_C
GPU_CLK27M_OUT
GPU_CLK27M_UF
GPU_COMP
GPU_CORE_OK
GPU_DVI_DDC_CLK
GPU_DVI_DDC_DATA
GPU_DVOD<0>
GPU_DVOD<0..11>
GPU_DVOD<1>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<10>
GPU_DVOD<11>
GPU_DVOD_DE
GPU_DVO_CLKP
GPU_DVO_HSYNC
GPU_DVO_VSYNC
GPU_FBCLK0
GPU_FBCLK0_L
GPU_FBCLK1
GPU_FBCLK1_L
GPU_G
GPU_HPD
GPU_MEM_IO
GPU_MEM_IO_FLT
GPU_R
GPU_SSCLK_IN
28A5<>
28A5<>
28A7<
28B1<> 29C4<> 37D2>
29C3<>
28B1<> 29C4<> 37D2>
29C3<>
28B1<> 29A4<> 37C2>
28B1<> 29A4<> 37C2>
28B1<> 29C4<> 37D2>
29C3<>
28B1<> 29C4<> 37D2>
29C3<>
28B1<> 29A4<> 37C2>
28B1<> 29A4<> 37C2>
28A5<>
37C2>
37C2>
29A3<> 37C2> 39D2>
29A3<> 37C2> 39D2>
37C2>
37C2>
29C2<> 38A3> 39A3>
29A3<> 37C2> 39D2>
29A3<> 37C2> 39D2>
29C2<> 38A3>
29A3<> 38A3>
28A7<
28A5<> 36A1>
23C7<>
18D6<
19C5<>
19D6<> 22D8<
19D6<> 22A8<
36C1>
36C1>
19D6<> 22A8<
19A6<> 19D4<> 21D2<> 21D7<>
19C5<> 22D3<>
19C5<> 22C3<>
19D7<> 20B7<
37D5>
19D7<> 20B7<
19D7<> 20B7<
19D7<> 20B7<
19D7<> 20B7<
19D7<> 20A7<
19D7<> 20A7<
19D7<> 20A7<
19D7<> 20A7<
19D7<> 20A7<
19D7<> 20A7<
19D7<> 20A7<
19C7<> 20A7<
19C7<> 20A7< 36B1>
19C7<> 20A7< 37C5>
19C7<> 20A7< 37C5>
36B1>
36B1>
36B1>
36B1>
19D6<> 22D8<
19C5< 22C3<>
38C3>
21C2< 38C3>
19D6<> 22D8<
36B1>
INT_MOD_DTO_UF
14A3<> 14B7<
INT_MOD_SYNC_UF 14A3<> 14A7<
INT_PCI_FB_IN
12C7< 36C1>
INT_PCI_FB_OUT
12C7<> 36C1>
INT_PEND_PROC_INT 14A5> 30C4<>
INT_PROC_SLEEP_REQ_L 14A5< 30B4<>
INT_PU_RESET_L
13D3< 25D4<> 30A2< 30C4<>
INT_REF_CLK_IN
14A5< 14B5< 36C1>
INT_REF_CLK_OUT 14A5> 14B7< 36C1>
INT_RESET_L
9B3< 13D3< 30C7< 30D4<>
INT_ROM_CS_L
12A6< 12C7>
INT_ROM_OE_L
12A6< 12C7>
INT_ROM_RW_L
12A6< 12C7>
INT_SND_CLKOUT
14A3<>
INT_SND_SCLK
14A3<>
INT_SND_SYNC
14B3<>
INT_SND_TO_AUDIO 14B3<>
INT_SUSPEND_ACK_L 8B6> 30B6<>
INT_SUSPEND_REQ_L 8B6< 30B6<> 30C7<
INT_TST_MONIN_PD 13C2< 13C5<
INT_TST_MONOUT_TP 13C5>
INT_TST_PLLEN_PD 13C5< 13D2<
INT_WATCHDOG_L
14A5> 30C6<>
INV_ON_PWM
19C6<> 22A3<
IO_RESET_L
17A7< 23D6< 26B8< 27B8< 30C6<>
30D7<
JTAG_ASIC_TCK
13C5< 13D2< 27A5< 39D8>
JTAG_ASIC_TDI
13C5< 13D2< 39D8>
JTAG_ASIC_TDO_TP 27A5> 39D8>
JTAG_ASIC_TMS
13C5< 13D2< 27A5< 39D8>
JTAG_ASIC_TRST_L 13C2< 13C5< 27A5< 39D8>
JTAG_CPU_TCK
5B2< 5B3< 23B2> 39C8>
JTAG_CPU_TDI
5B2< 5C3< 23D4<> 39C8>
JTAG_CPU_TDO_TP 5C3> 39C8>
JTAG_CPU_TMS
5B2< 5B3< 23C4<> 39C8>
JTAG_CPU_TRST_L 5A3< 5B3< 23D4<> 39B1> 39C8>
JTAG_ENET_TDI
13C5> 13D2< 27A5<
KBD_CAPSLOCK_LED 23A7<> 39B4>
KBD_COMMAND_L
23A5< 23A7<> 30C6<> 39B4>
KBD_CONTROL_L
23A5< 23A7<> 30A8< 30C6<> 39B4>
KBD_FUNCTION_L
23A5< 23A7<> 30B6<> 39B4>
KBD_ID
23A7<> 23B5< 30B6<> 39C4>
KBD_LED1_OUT
23A5<> 23A7<> 38B6> 39C2>
KBD_LED2_OUT
23A5<> 23A7<> 38B6> 39C2>
KBD_LED_EN
23A5<>
KBD_LED_SET
23A5<
KBD_NUMLOCK_LED 23B7<> 39C3>
KBD_OPTION_L
23A5< 23B7<> 30A8< 30B6<> 39B4>
KBD_SHIFT_L
23A5< 23B7<> 30A8< 30C6<> 39B4>
KBD_X<0>
23A5< 23B7<> 30C6<> 39B4>
KBD_X<1>
23A5< 23B7<> 30C6<> 39B4>
KBD_X<2>
23B5< 23B7<> 30C6<> 39B4>
KBD_X<3>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<4>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<5>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<6>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<7>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<8>
23B5< 23B7<> 30C6<> 39A4>
KBD_X<9>
23B5< 23B7<> 30C6<> 39D3>
KBD_Y<0>
23B7<> 30D6<> 39D3>
KBD_Y<1>
23B7<> 30D6<> 39D3>
KBD_Y<2>
23B7<> 30D6<> 39D3>
KBD_Y<3>
23B7<> 30D6<> 39D3>
KBD_Y<4>
23B7<> 30D6<> 39D3>
KBD_Y<5>
23B7<> 30D6<> 39D3>
KBD_Y<6>
23B7<> 30C6<> 39C3>
KBD_Y<7>
23B7<> 30C6<> 39C3>
MEM_CS_L<0>
MEM_CS_L<3..0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
MEM_DATA<0>
MEM_DATA<7..0>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DATA<8>
MEM_DATA<15..8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<15>
MEM_DATA<16>
MEM_DATA<31..16>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<30>
MEM_DATA<31>
MEM_DATA<32>
MEM_DATA<47..32>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<46>
MEM_DATA<47>
MEM_DATA<48>
MEM_DATA<55..48>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<51>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<54>
MEM_DATA<55>
MEM_DATA<56>
9C5< 9C6<>
36A5>
9C5< 9C6<>
9C5< 9C6<>
9C5< 9C6<>
9D8<> 10C7<>
36C5>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
36C5>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10C7<>
9D8<> 10B7<>
9C8<> 10B7<>
9C8<> 10B7<>
9C8<> 10B7<>
9C8<> 10C5<>
36C5>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10C5<>
9C8<> 10B5<>
9C8<> 10B5<>
9C8<> 10B5<>
9C8<> 10C3<>
36B5>
9C8<> 10C3<>
9C8<> 10C3<>
9C8<> 10C3<>
9C8<> 10C3<>
9C8<> 10C3<>
9C8<> 10C3<>
9B8<> 10C3<>
9B8<> 10C3<>
9B8<> 10C3<>
9B8<> 10C3<>
9B8<> 10C3<>
9B8<> 10C3<>
9B8<> 10B3<>
9B8<> 10B3<>
9B8<> 10B3<>
9B8<> 10C1<>
36B5>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
9B8<> 10C1<>
34D8<
34D8<
5C2< 5D8<> 34C1< 34D2< 38D3> 39B2>
MAX4172_OUT
MAXBUS_SLEEP
31D4<>
5A2< 5D1< 5D5< 7B7< 7D8< 8B8< 8C3<
8C8< 8D1< 8D8< 15D8< 16D8< 23B3<
23B3< 34D8< 38D3>
27B4<
27B4<
10B5<>
10C3<>
FWB_TPB0
28A3<
FWB_TPB1
28A4<
FWPLL_BYP
28C8<>
FW_BIAS0
28A5<>
FW_BIAS1
28A5<>
FW_BMODE
28B7<
FW_CORE_ADJ
28C8<
FW_CORE_BYP
28C7<>
FW_CPS
28B7<
FW_INPUT_PD
28A7<
FW_LINK_CNTL<0> 13C3<> 28C3<
FW_LINK_CNTL<1..0> 37A5>
FW_LINK_CNTL<1> 13C3<> 28C3<
FW_LINK_DATA<0> 13D3<> 28B8<
FW_LINK_DATA<7..0> 37A5>
MAX1715_FB2
MAX1715_GND
MAX1715_ON_RC
MAX1715_REF
MAX1715_SKIP
MAX1715_TON
MAX1715_VCC
MAX1717_AB_SEL
19B5>
14C7< 17A7< 17D5< 18C8< 20B8<
24D6<> 26B8< 30D4<> 30D7< 39C1>
35B1< 35B4<
35B5<> 35C5< 38C1>
35C7<>
35B5<> 38C1>
35C4< 38C1>
35C5< 38C1>
35D5< 38C1>
34A7< 34C6<
10B5<>
NEC_AVSS_F
26A5< 26B4<
NEC_CRUN_L
26A7<>
NEC_IDSEL
26B7<
NEC_IO_RESET_L
26B7< 26B7<
NEC_LEFT_USB_OVERCURRENT 24B2<> 26C1< 39D1>
NEC_LEFT_USB_PWREN 24B2<> 26B5<> 39D1>
NEC_LEGC
26A7<
NEC_MAIN_RESET_L 26A7< 26B7<
NEC_NANDTESTEN_TP 26A5<
NEC_NANDTESTOUT_TP 26A4<>
NEC_NC1_TP
26B5<>
NEC_NC2_TP
26B5<>
NEC_OCI<1>
26B5< 26C3<
NEC_OCI<2>
26B5< 26C3<
NEC_OCI<3>
26B5<
NEC_OCI<4>
26B5<
NEC_OCI<5>
26B5<
32A4< 38C6>
30B4< 32A4<> 38C6>
22D3<> 22D5<> 38B6> 39A2>
22D6< 38B6>
24D1<> 33A7<> 38C6>
22B2<> 38B6> 39D1>
+5V_INV_UF_SW
22B2<> 38B6>
+5V_MAIN
38D6>
+5V_SLEEP
38D6>
+5V_SOUND_SLEEP 38B6>
+5V_TPAD_SLEEP
23C7<> 38B6> 39C4>
+12_8V_INV
22B1<> 38B6> 39A2>
+24V_PBUS
38D6> 39B2>
+ADAPTER
31D8<> 32B7< 38D6>
+ADAPTER_ILIM
32B6<> 38C6>
+ADAPTER_OR_BATT 32A5<> 38C6>
+ADAPTER_SENSE
31D5<> 38C6>
+ADAPTER_SW
31D6<> 38C6>
+BATT
38D6>
+BATT_14V_FUSE
31D1<> 38C6>
+BATT_24V_FUSE
31B1< 31D2<> 38C6>
+BATT_POS
31A4<> 38C6> 39C3>
+BATT_RSNS
31B2< 38C6>
+BATT_VSNS
31A4< 38C6>
+FW_FUSE
29D7<> 38A3>
+FW_PWR_OR
28B8< 28D8<> 29D5<> 38A3>
+FW_PWR_PORTA
29C5< 38A3>
+FW_SW
29D5<> 38A3>
+FW_VP0
29C2<> 38A3>
+FW_VP1
29A3<> 38A3>
+GPU_MCLK
21C7< 21D4< 38C3>
+GPU_MEM
18A6<> 18B8< 21B4< 21B7< 21C6<
21C8< 21D2< 38C3>
+GPU_MEMCORE
21C5< 38C3>
+GPU_VDD15_NECK 19B5<> 38B3>
+GPU_VDD15_UF
19B5<> 19D4<> 38C3>
+HD_LOGIC_SLEEP 24C2<> 38C6>
+PBUS
38D6> 39B2>
+VCC_CBUS_SW
17B1<> 17B2<> 17D2<> 38D3>
+VPP_CBUS_SW
17B1<> 17B2<> 17D2<> 38C3>
1V20_REF
31C7< 32C8< 38D1>
1V65_REF
31A5<
1_5V_2_5V_OK
35C5> 38B1>
1_5V_BOOST
35C6<> 38C1>
1_5V_BST
35C5<> 38C1>
1_5V_DH
35C5<> 38C1>
1_5V_DL
35B5<> 38C1>
1_5V_FB
35B5< 35B7< 38C1>
1_5V_ILIM
35C5<> 38C1>
1_5V_LX
35B5<> 38C1>
1_5V_SLEEP_EN_L 35C7<> 35D7<>
1_8V_SLEEP_PWREN_L 35A3<>
1_8V_SW
35A5<> 38A1>
1_8V_VFB
38A1>
2_5V_BOOST
35C4<> 38D1>
2_5V_BST
35C4<> 38D1>
2_5V_DH
35C4<> 38D1>
2_5V_DL
35B4<> 38D1>
2_5V_ILIM
35C5<> 38C1>
2_5V_LX
35B4<> 38D1>
2_5V_SLEEP_PWREN_L 35C2<>
2_34V_REF
30A4<
3V_5V_OK
33B4<> 35A8<> 35D6<
3V_5V_OK_INV
35A8<>
3V_BG
33C4<>
3V_BOOST
33C4<>
3V_BOOST_ESR
33D3<>
3V_ITH
33C4<>
3V_ITH_RC
33C3<
3V_PMU_VTAP
32B3<
3V_RSNS
33D2< 38D1>
3V_RUNSS
33C4<
3V_SLEEP_PWREN_L 33A3<>
CPU_VCORE_SLEEP_F 34C2<>
CPU_VCORE_SNUB
34B3<
22C5<> 39C7>
22C4<>
22C3<
22C3< 22C5<> 39C7>
22D2<
22D3<>
INT_EXTINT13_PU
INT_EXTINT14_PU
INT_EXTINT16_PU
INT_GPIO1_PU
INT_GPIO9_PU
INT_GPIO12_PU
INT_GPIO15_PU
INT_I2C_CLK0
INT_I2C_CLK1
INT_I2C_CLK2
INT_I2C_DATA0
INT_I2C_DATA1
INT_I2C_DATA2
INT_JTAG_TEI
14B5<> 14B7<
14B5<> 14C7<
14B5<> 14B7<
14C5<> 14C7< 34C8<
14A7< 14B5<>
14B5<> 14B7<
14B5<> 14C7<
11A3<> 11A8<> 13C2< 13C3<> 23D2<
23D4<> 39B8>
13C2< 13C3<> 14B7< 25B4< 39B8>
14A2<> 25C4<> 25D7<> 39C6>
11A3<> 11A8<> 13C2< 13C3<> 23D2<>
23D4<> 39B8>
13B2< 13C3<> 14B7< 25B4<> 39B8>
14A2<> 25C4<> 25C7<> 39C6>
13C2< 13C5<
MDI0_PD
MDI1_PD
PCI_AD<31..0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCI_CBE<0>
PCI_CBE<3..0>
PCI_CBE<1>
PCI_CBE<2>
PCI_CBE<3>
PCI_DEVSEL_L
PCI_FRAME_L
31C3<>
17C7<
9C3< 12D6<> 17C7<> 24B5<> 26D7<>
39B6>
37C5>
9C3< 12D6<> 17C7<> 24B6<> 26D7<>
39A6>
9C3< 12D6<> 17C7<> 24C5<> 26D7<>
39A6>
9C3< 12D6<> 17C7<> 24C6<> 26C7<>
39A6>
9C3< 12D6<> 17C7<> 24C5<> 26C7<>
39A6>
9C3< 12D6<> 17C7<> 24C6<> 26C7<>
39A6>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39A6>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39D5>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39C5>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
9C3< 12C6<> 17C7<> 24C5<> 26C7<>
39C5>
9C3< 12C6<> 17C7<> 24C6<> 26C7<>
39C5>
9C3< 12C6<> 17B7<> 24C5<> 24D4<
26C7<> 39C5>
9C3< 12C6<> 17B7<> 24C6<> 26C7<>
39C5>
9B3< 12C6<> 17B7<> 24C5<> 26C7<>
39C5>
12C6<> 17B7<> 24C6<> 26C7<> 39C5>
12C6<> 17B7<> 24C5<> 26C7<> 39B5>
12C6<> 17B7<> 24C6<> 26C7<> 39B5>
9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
9C1<> 12C6<> 17B7<> 24C6<> 26C7<>
39B5>
9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
9C1<> 12C6<> 17B7<> 24D6<> 26C8<>
39B5>
9C1<> 12C6<> 17B7<> 24C5<> 26C7<>
39B5>
9C1<> 12C6<> 17B7<> 24D6<> 26B7<>
39B5>
9C1<> 12C6<> 17B7<> 24D5<> 26B7<>
39B5>
9C1<> 12C6<> 17B7<> 24D6<> 26B7<>
39A5>
12C7<> 17B7<> 24C5<> 26B7<> 39D4>
37C5>
12C7<> 17B7<> 24C6<> 26B7<> 39D4>
12C7<> 17B7<> 24C6<> 26B7<> 39D4>
12C7<> 17B7<> 24C6<> 26B7<> 39D4>
12B7< 12C7<> 17A7<> 24C5<> 26B7<>
37C5> 39A5>
12B7< 12C7<> 17B7<> 24C5<> 26B7<>
37C5> 39A5>
41
8
PCI_IRDY_L
12B7< 12C7<> 17B7<> 24C6<> 26B7<>

37C5> 39A5>
PCI_PAR
12C7<> 17B7<> 24C5<> 26B7<> 37C5>

39D4>
PCI_STOP_L
12A7< 12C7<> 17B7<> 24C5<> 26B7<>
37C5> 39A5>
PCI_TRDY_L
12B7< 12C7<> 17A7<> 24C5<> 26B7<>
37C5> 39A5>
PLL_STOP_L
7C4<> 7C8<>
PMU_ACK_L
14C2< 30C4<>
PMU_AC_DET
30A4< 30B4<>
PMU_AC_IN
30B4<>
PMU_BATT0_DET_L 30B4<>
PMU_BATT1_DET_L_PU 30B4<> 30D2<
PMU_BATT_DET_L
30B3< 30D2< 31A4<> 39C3>
PMU_BYTE
30B6< 30C7<
PMU_CAPSLOCK_LED_L 30C6<>
PMU_CHARGE_V
30C4<> 31B8<>
PMU_CHRG_BATT_0
PMU_CLK
PMU_CNVSS
PMU_CPU_HRESET_L
PMU_EPM
PMU_FROM_INT
PMU_I2C_CLK
PMU_I2C_DATA
PMU_INT_L
PMU_INT_NMI
PMU_KB_RESET_IN1
30C4<> 31A8<>
14C2<> 30C4<>
30B6< 30C7<
23A4< 23C4<> 30C4<>
30D2< 30D4<>
14C2<> 30C4<>
30B4<> 30C2<
30B4<> 30C2<
14B5<> 14B7< 30B6<>
14B5<> 14B7< 30D4<>
30A7<>
PMU_KB_RESET_IN2 30A7<>
PMU_KB_RESET_L
30A6> 30B7< 39B2>
PMU_LID_CLOSED_L 23A8< 23C4<> 30B2< 30C4<>
PMU_NMI_BUTTON_L 25C1< 30C2< 30C4<>
PMU_NMI_L
30C2< 30C4<>
PMU_NUMLOCK_LED_L 30C6<>
PMU_OOPS
30B2< 30B4<>
PMU_PME_L
14B5<> 26B8< 30B2< 30C4<>
PMU_POWERUP_OK
30B4<> 30D2<
PMU_POWER_UP_L
29C7<> 30C6<> 30D7< 33B8<
PMU_REQ_L
14B7< 14C2> 30C4<>
PMU_RESET_BUTTON_L 25B1< 30C4<> 30D2<
PMU_RESET_L
30B6<>
PMU_SLEEP_LED
23C4<>
PMU_SLEEP_LED_L 23C2<> 30C4<>
PMU_SMB_CLK
30B4<> 30C2< 31A3<
PMU_SMB_DATA
30B4<> 30C2< 31A2<
PMU_TO_INT
14C2<> 30C4<>
POWER_UP
29C7<>
POWER_VALID
30B2< 30C4<>
PWR_BUTTON_L
23A7<> 25C2< 39B2>
RAM_ADDR<0>
9B4< 11B5<> 11B6<>
RAM_DATA_B<17>
RAM_DATA_B<18>
RAM_DATA_B<19>
RAM_DATA_B<20>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DATA_B<23>
RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DATA_B<26>
RAM_DATA_B<27>
RAM_DATA_B<28>
RAM_DATA_B<29>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
10C6<>
11C3<>
11C3<>
11C3<>
11D5<>
11C5<>
11C5<>
11C5<>
11C3<>
11C3<>
11C3<>
11C3<>
11C5<>
11C5<>
SND_SCLK_F
SND_SYNC
VCORE_GNDSNS
34A2<> 34A4< 38B1>
VCORE_GNDSNS_TEST 34A3<>
VCORE_ILIM
34C6<> 38C1>
VCORE_LX
34B5<> 38C1>
VCORE_MUX_EN
34D5<> 39A2>
VCORE_MUX_SEL
34D5<>
VCORE_REF
34B6<> 38C1>
VCORE_SEL_OFF_PU 34B6<>
VCORE_SEL_ON
34B6<>
VCORE_SHDN_L
34C6<>
VCORE_SLOW<1>
34D6<
RAM_DATA_B<30>
10C6<> 11C5<>
RAM_DATA_B<31>
10C6<> 11C5<>
RAM_DATA_B<32>
10D4<> 11B3<>
RAM_DATA_B<47..32> 36B5>
RAM_DATA_B<33>
10C4<> 11B3<>
ST7_PB6_PD
23B2< 23C4<>
ST7_RESET_L
23D5<>
ST7_SENSOR4_SCK_PD 23B2< 23D4<>
ST7_SENSOR4_SDA_PD 23B2< 23D4<>
ST7_SENSOR5_SCK_PU 23B2< 23D4<>
VCORE_SLOW<2>
VCORE_SLOW<3>
VCORE_SLOW<4>
VCORE_SNS
VCORE_TIME
34D6<
34D6<
34D6<
34A1<> 38B1>
34B4<> 38B1>
RAM_DATA_B<34>
10C4<> 11B3<>
RAM_DATA_B<35>
10C4<> 11B3<>
RAM_DATA_B<36>
10C4<> 11B5<>
RAM_DATA_B<37>
10C4<> 11B5<>
RAM_DATA_B<38>
10C4<> 11B5<>
RAM_DATA_B<39>
10C4<> 11B5<>
RAM_DATA_B<40>
10C4<> 11B3<>
RAM_DATA_B<41>
10C4<> 11B3<>
RAM_DATA_B<42>
10C4<> 11A3<>
RAM_DATA_B<43>
10C4<> 11A3<>
RAM_DATA_B<44>
10C4<> 11B5<>
RAM_DATA_B<45>
10C4<> 11B5<>
RAM_DATA_B<46>
10C4<> 11A5<>
RAM_DATA_B<47>
10C4<> 11A5<>
RAM_DATA_B<48>
10D2<> 11A3<>
RAM_DATA_B<55..48> 36B5>
RAM_DATA_B<49>
10C2<> 11A3<>
ST7_SENSOR5_SDA_PU 23B2< 23D4<>

ST7_SLEEP_LED_H 23C2<> 23C4<>
ST7_XTAL_IN
23C5<
STOP_AGP_L
12D2< 12D4<>
SUPPLY_M_DM
25B6< 25B8<
SUPPLY_M_DP
25B6< 25B8<
SUTRO_ALS_GAIN_SW 23C4<> 24B2<> 39C2>
SUTRO_ALS_OUT
23C4<> 24B2<> 39C2>
SYSCLK_CPU
5C3< 8A6< 36D1>
SYSCLK_CPU_UF
8A6<> 36D1>
SYSCLK_DDRCLK_A0 9D4< 11D8<> 36D1>
VCORE_TON
VCORE_VCC
VCORE_VGATE
VCORE_VID0
VCORE_VID1
VCORE_VID2
34B6< 38C1>
34C6< 38C1>
14B5< 14B7< 34B4> 38B1>
39A3>
39A3>
39A3>
VCORE_VID3
VCORE_VID4
VCORE_VID<0>
VCORE_VID<1>
VCORE_VID<2>
VCORE_VID<3>
VCORE_VID<4>
VGA_B
VGA_G
VGA_HSYNC
VGA_HSYNC_BUF
39A3>
39A3>
34A2<>
34A2<>
34A2<>
34A2<>
34A2<>
22C6<>
22C5<>
22C6<>
22C8<>
VGA_R
VGA_VSYNC
VGA_VSYNC_BUF
ZV_LCDDATA20_PU
22C5<> 22D7< 39D7>

22C5<> 22C7< 39D7>
22C8<>
19C7<>
RAM_DATA_B<50>
RAM_DATA_B<51>
RAM_DATA_B<52>
RAM_DATA_B<53>
RAM_DATA_B<54>
10C2<>
10C2<>
10C2<>
10C2<>
10C2<>
11A3<>
11A3<>
11A5<>
11A5<>
11A5<>
RAM_DATA_B<55>
10C2<> 11A5<>
RAM_DATA_B<56>
10C2<> 11A3<>
RAM_DATA_B<63..56> 36A5>
RAM_DATA_B<57>
10C2<> 11A3<>
RAM_DATA_B<58>
10C2<> 11A3<>
RAM_DATA_B<59>
10C2<> 11A3<>
11A5<>
11A5<>
11A5<>
11A5<>
11D6<> 36C5>
RAM_DQM_A<1>
RAM_DQM_A<2>
RAM_DQM_A<3..2>
RAM_DQM_A<3>
RAM_DQM_A<4>
RAM_DQM_A<5..4>
RAM_DQM_A<5>
RAM_DQM_A<6>
RAM_DQM_A<7>
RAM_DQM_B<0>
RAM_DQM_B<1>
10C7<>
10B6<>
36B5>
10C5<>
10B4<>
36B5>
10C3<>
10B2<>
10C1<>
10C8<>
10C8<>
11D6<> 36C5>
11C6<>
RAM_DQM_B<2>
RAM_DQM_B<3..2>
RAM_DQM_B<3>
RAM_DQM_B<4>
RAM_DQM_B<5..4>
RAM_DQM_B<5>
10C6<>
36B5>
10C6<>
10C4<>
36B5>
10C4<>
11C5<>
RAM_CKE<0>
9A3< 9C4< 11B6<>
RAM_CKE<3..0>
36A5>
RAM_CKE<1>
9A3< 9C4< 11B8<>
RAM_CKE<2>
9A3< 9C4< 11C5<>
RAM_CKE<3>
9A3< 9C4< 11C3<>
RAM_CS_L<0>
9C4< 11B8<>
RAM_CS_L<3..0>
36A5>
RAM_CS_L<1>
9C4< 11B6<>
RAM_CS_L<2>
9C4< 11B3<>
RAM_CS_L<3>
9C4< 11B5<>
RAM_DATA_A<0>
10C8<> 11D8<>
RAM_DATA_A<7..0> 36C5>
RAM_DATA_A<1>
10C8<> 11D8<>
RAM_DATA_A<2>
10C8<> 11D8<>
RAM_DATA_A<3>
10B8<> 11D8<>
RAM_DATA_A<4>
10B8<> 11D6<>
RAM_DATA_A<5>
10B8<> 11D6<>
RAM_DATA_A<6>
10B8<> 11D6<>
RAM_DATA_A<7>
10B8<> 11D6<>
RAM_DATA_A<8>
10B8<> 11D8<>
RAM_DATA_A<15..8> 36C5>
RAM_DATA_A<9>
10C7<> 11D8<>
RAM_DATA_A<10>
10C7<> 11D8<>
RAM_DATA_A<11>
10C7<> 11D8<>
RAM_DATA_A<12>
10C7<> 11D6<>
RAM_DATA_A<13>
10C7<> 11D6<>
RAM_DATA_A<14>
10C7<> 11D6<>
RAM_DQM_B<6>
RAM_DQM_B<7>
RAM_DQS_A<0>
RAM_DQS_A<1>
RAM_DQS_A<2>
RAM_DQS_A<3..2>
RAM_DQS_A<3>
RAM_DQS_A<4>
RAM_DQS_A<5..4>
RAM_DQS_A<5>
RAM_DQS_A<6>
RAM_DQS_A<7>
RAM_DQS_B<0>
RAM_DQS_B<1>
RAM_DQS_B<2>
RAM_DQS_B<3..2>
RAM_DQS_B<3>
RAM_DQS_B<4>
RAM_DQS_B<5..4>
RAM_DQS_B<5>
RAM_DQS_B<6>
RAM_DQS_B<7>
RAM_MUXSEL_H
RAM_MUXSEL_L
RAM_RAS_L
RAM_WE_L
RF_DISABLE_L_SPN
RAM_DATA_A<15>
10C7<> 11D6<>
RAM_DATA_A<16>
10C6<> 11D8<>
RAM_DATA_A<31..16> 36B5>
RAM_DATA_A<17>
10C6<> 11C8<>
RAM_DATA_A<18>
10C6<> 11C8<>
RAM_DATA_A<19>
10B6<> 11C8<>
RIGHT_USB_DM
RIGHT_USB_DP
RJ45_C0_PD
RJ45_C1_PD
RJ45_C2_PD
RJ45_C3_PD
RAM_DATA_A<20>
10B6<> 11D6<>
RAM_DATA_A<21>
10B6<> 11C6<>
RAM_DATA_A<22>
10B6<> 11C6<>
RAM_DATA_A<23>
10B6<> 11C6<>
RAM_DATA_A<24>
10B6<> 11C8<>
RAM_DATA_A<25>
10C5<> 11C8<>
RAM_DATA_A<26>
10C5<> 11C8<>
RAM_DATA_A<27>
10C5<> 11C8<>
RAM_DATA_A<28>
10C5<> 11C6<>
RAM_DATA_A<29>
10C5<> 11C6<>
RAM_DATA_A<30>
10C5<> 11C6<>
RAM_DATA_A<31>
10C5<> 11C6<>
RAM_DATA_A<32>
10C4<> 11B8<>
RAM_DATA_A<47..32> 36B5>
RAM_DATA_A<33>
10C4<> 11B8<>
RAM_DATA_A<34>
10C4<> 11B8<>
RAM_DATA_A<35>
10C4<> 11B8<>
RAM_DATA_A<36>
10B4<> 11B6<>
RAM_DATA_A<37>
10B4<> 11B6<>
RAM_DATA_A<38>
10B4<> 11B6<>
RAM_DATA_A<39>
10B4<> 11B6<>
RAM_DATA_A<40>
10B4<> 11B8<>
RAM_DATA_A<41>
10D3<> 11B8<>
RAM_DATA_A<42>
10C3<> 11A8<>
RAM_DATA_A<43>
10C3<> 11A8<>
RAM_DATA_A<44>
10C3<> 11B6<>
RAM_DATA_A<45>
10C3<> 11B6<>
RAM_DATA_A<46>
10C3<> 11A6<>
RAM_DATA_A<47>
10C3<> 11A6<>
RAM_DATA_A<48>
10C2<> 11A8<>
RAM_DATA_A<55..48> 36B5>
RAM_DATA_A<49>
10C2<> 11A8<>
RAM_DATA_A<50>
10C2<> 11A8<>
RAM_DATA_A<51>
10C2<> 11A8<>
RAM_DATA_A<52>
10B2<> 11A6<>
RAM_DATA_A<53>
10B2<> 11A6<>
RAM_DATA_A<54>
10B2<> 11A6<>
RAM_DATA_A<55>
10B2<> 11A6<>
RAM_DATA_A<56>
10B2<> 11A8<>
RAM_DATA_A<63..56> 36A5>
RAM_DATA_A<57>
10D1<> 11A8<>
RAM_DATA_A<58>
10C1<> 11A8<>
RAM_DATA_A<59>
10C1<> 11A8<>
RAM_DATA_A<60>
10C1<> 11A6<>
RAM_DATA_A<61>
10C1<> 11A6<>
RAM_DATA_A<62>
10C1<> 11A6<>
RAM_DATA_A<63>
10C1<> 11A6<>
RAM_DATA_B<0>
10C8<> 11D3<>
RAM_DATA_B<7..0> 36C5>
RAM_DATA_B<1>
10C8<> 11D3<>
RAM_DATA_B<2>
10C8<> 11D3<>
RAM_DATA_B<3>
10C8<> 11D3<>
RAM_DATA_B<4>
10C8<> 11D5<>
RAM_DATA_B<5>
10C8<> 11D5<>
RAM_DATA_B<6>
10C8<> 11D5<>
RAM_DATA_B<7>
10C8<> 11D5<>
RAM_DATA_B<8>
10C8<> 11D3<>
RAM_DATA_B<15..8> 36C5>
RAM_DATA_B<9>
10C8<> 11D3<>
RAM_DATA_B<10>
10C8<> 11D3<>
RAM_DATA_B<11>
10C8<> 11D3<>
RAM_DATA_B<12>
10C8<> 11D5<>
RAM_DATA_B<13>
10C8<> 11D5<>
RAM_DATA_B<14>
10C8<> 11D5<>
RAM_DATA_B<15>
10C8<> 11D5<>
RAM_DATA_B<16>
10C6<> 11D3<>
RAM_DATA_B<31..16> 36B5>
RJ45_DN<0>
27B2<> 37D2> 39B3>
RJ45_DN<1>
27B2<> 37D2> 39B3>
RJ45_DN<2>
27B2<> 37D2> 39A3>
RJ45_DN<3>
27B2<> 37D2> 39A3>
RJ45_DP<0>
27B2<> 37D2> 39B3>
RJ45_DP<1>
27B2<> 37D2> 39B3>
RJ45_DP<2>
27B2<> 37D2> 39A3>
RJ45_DP<3>
27B2<> 37D2> 39A3>
ROM_CS_L
9B3< 12A5< 24B6<> 39B1>
ROM_OE_L
9B3< 12A5< 24C5<> 39B1>
ROM_ONBOARD_CS_L 9B3< 24C6<> 39B1>
ROM_RW_L
9B3< 12A5< 24C6<> 39B1>
ROM_WP_L
9B3<
RSDM3_TP
26C5>
RSDM4_TP
26C5>
RSDM5_TP
26C5>
RSDP3_TP
26C5>
RSDP4_TP
26C5>
RSDP5_TP
26C5>
RUN_OR_AC
29C6<>
SI_A2
20B7<
SI_DDC_CLK
19C5<> 20B7<
SI_DDC_DATA
19C5<> 20B7<
SI_EDGE
20B7<
SI_MSEN
20B5<>
SI_PD
20B7<
SI_RST
20B7<
SI_TMDS_CLKN
20B5<> 20C4<
SI_TMDS_CLKP
20B5<> 20C4<
SI_TMDS_DN<0>
20B5<> 20C4<
SI_TMDS_DN<1>
20B5<> 20C4<
SI_TMDS_DN<2>
20A5<> 20B4<
SI_TMDS_DP<0>
20B5<> 20C4<
SI_TMDS_DP<1>
20B5<> 20C4<
SI_TMDS_DP<2>
20A5<> 20B4<
SI_VREF
20A5< 20A7<
SLEEP
23C4<> 25C6<> 30B6<> 30D7< 33A4<
33A6< 33B3< 33B8<> 35B3< 35D2< 39A1>
11B8<>
11B6<>
11B8<>
11B6<>
11B8<>
11B6<>
11B8<>
11B6<>
11B8<>
11B8<>
11B6<>
11B8<>
11B8<>
SYSCLK_DDRCLK_A0_L 9D4< 11D8<> 36D1>

SYSCLK_DDRCLK_A0_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A0_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A1 9D4< 11A6<> 36D1>
SYSCLK_DDRCLK_A1_L 9D4< 11A6<> 36D1>
SYSCLK_DDRCLK_A1_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_A1_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B0 9D4< 11D3<> 36D1>
SYSCLK_DDRCLK_B0_L 9C4< 11D3<> 36C1>
SYSCLK_DDRCLK_B0_L_UF 9B6<> 9C5< 36D1>
SYSCLK_DDRCLK_B0_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B1 9D4< 11A5<> 36C1>
SYSCLK_DDRCLK_B1_L 9D4< 11A5<> 36C1>
SYSCLK_DDRCLK_B1_L_UF 9B6<> 9D5< 36D1>
SYSCLK_DDRCLK_B1_UF 9B6<> 9D5< 36D1>
SYSCLK_LA_TP
8A6<>
SYSTEM_CLK_EN
14A5< 14B7< 30C4<>
TEB_TP
26A5< 39A4>
TEST_TP
26A5< 39A4>
THERM1_A_DM
25A6< 25A8< 37A2>
THERM1_A_DP
25A6< 25A8< 37A2>
THERM1_DM
25A5< 25B5< 25B5<> 37A2>
THERM1_DP
THERM1_M_DM
THERM1_M_DP
THERM2_A_DM
THERM2_A_DP
THERM2_DM
THERM2_DP
THERM2_M_DM
THERM2_M_DP
THERM_INV
THERM_L_OC
25A5< 25B5< 25B5<> 37A2>

37A2>
37A2>
25A6< 25A8< 37A2>
25A6< 25A8< 37A2>
25A5< 25B5< 25B5<> 37A2>
25A5< 25B5< 25B5<> 37A2>
37A2>
37A2>
25A5<>
25A4<> 30B4<>
TMDS_CLKN
TMDS_CLKP
TMDS_CLK_CMF
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CONN_DN<0>
20B3< 20C1< 20C3< 22B7<> 37B2>

20B3< 20C2< 20C3< 22C7<> 37B2>
20C1<
22B6<> 22C7<> 37B2> 39A8>
22C6<> 22C7<> 37B2> 39D7>
22C7<> 22D6<>
10C2<> 11A5<> 36B5>

10C2<> 11A5<> 36A5>
10B8<> 11D8<> 36C5>
10C7<> 11D8<> 36C5>
10B6<> 11C8<>
36B5>
10C5<> 11C8<>
10B4<> 11B8<>
36B5>
10C3<> 11A8<>
10B2<> 11A8<> 36B5>
10C1<> 11A8<> 36A5>
10C8<> 11D3<> 36C5>
10C8<> 11D3<> 36C5>
10C6<> 11C3<>
36B5>
10C6<> 11C3<>
10C4<> 11B3<>
36B5>
10C4<> 11B3<>
10C2<> 11A3<> 36B5>
10C2<> 11A3<> 36A5>
10A3< 10A5< 10B1<> 10B3<> 36A5>
10A3< 10A5< 10B5<> 10B7<> 36A5>
9A4< 11B5<> 11B6<> 36A5>
9A4< 11B3<> 11B8<> 36A5>
24D6<> 39C1>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
TMDS_CONN_DP<0>
TMDS_CONN_DP<1>
TMDS_CONN_DP<2>
TMDS_D0_CMF
TMDS_D1_CMF
TMDS_D2_CMF
TMDS_DN<0>
37B2>
26A3< 32A7<> 37A2> 39D1>

26A3< 32A7<> 37A2> 39D1>
27B2<>
27B2<>
27B2<>
27B2<>
TV_GND1
TV_GND2
TV_Y
UIDE_ADDR<0>
UIDE_ADDR<2..0>
UIDE_ADDR<1>
22B6<>
22A6<>
22A6<>
13D7<>
37C5>
13D7<>
UIDE_ADDR<2>
UIDE_CS0_L
UIDE_CS1_L
UIDE_DATA<0>
UIDE_DATA<6..0>
UIDE_DATA<1>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<4>
UIDE_DATA<5>
UIDE_DATA<6>
UIDE_DATA<7>
UIDE_DATA<8>
UIDE_DATA<15..8>
UIDE_DATA<9>
UIDE_DATA<10>
UIDE_DATA<11>
UIDE_DATA<12>
UIDE_DATA<13>
UIDE_DATA<14>
UIDE_DATA<15>
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_DMACK_L
UIDE_DMARQ
UIDE_INTRQ
UIDE_IOCHRDY
UIDE_REF
UIDE_RST_L
USB2_PCI_GNT_L
USB2_PCI_INT_L
USB2_PCI_REQ_L
USB_D1M
USB_D1P
USB_D2M
USB_D2P
USB_DAM
USB_DAP
USB_DBM
USB_DBP
USB_DCM
USB_DCP
USB_DDM
USB_DDP
USB_DEM
USB_DEP
USB_DFM
USB_DFP
USB_OC_AB_L
USB_OC_CD_L
USB_OC_EF_L
USB_PWREN_AB_L
USB_PWREN_CD_L
USB_PWREN_EF_L
VCORE_BOOST
VCORE_BST
VCORE_CC
VCORE_CNTL_RC
VCORE_DH
VCORE_DL
VCORE_FAST<1>
VCORE_FAST<2>
VCORE_FAST<3>
VCORE_FAST<4>
VCORE_FB
VCORE_GND
VCORE_GNDA
13D7<> 24B4<
13C7<> 24C4< 37C5>
13C7<> 24B4< 37C5>
13D7<> 24D4<
37C5>
13D7<> 24D4<
13D7<> 24D4<
13D7<> 24D4<
13D7<> 24C4<
13D7<> 24C4<
13D7<> 24C4<
13D7<> 24C4< 37C5>
13D7<> 24C4<
37C5>
13D7<> 24C4<
13D7<> 24C4<
13D7<> 24D4<
13D7<> 24B4<
13D7<> 24B4<
13D7<> 24C4<
13D7<> 24B4<
13C7<> 24A4< 37C5>
13C7<> 24A4< 37C5>
13C7<> 24A4< 37C5>
13C7<> 37C5>
13C7< 37C5>
13C7< 24A4< 37C5>
13C7<> 38D3>
13C7<> 24A4< 37C5>
12C7<> 26B7<
14B5<> 14C7< 26A8<
12A7< 12D7<> 26B7>
14C1< 26A5> 26B4<
14C1< 26A4< 26A5>
14D1< 26A4< 26A5>
14D1< 26A4< 26A5>
14B2<> 14D2< 26A5>
14B2<> 14D2< 26A5>
14B2<> 14D2<
14B2<> 14D2<
14B2<> 14C2< 26A5>
14B2<> 14C2< 26A5>
14B2<> 14C2<
14B2<> 14C2<
14B2< 14B2<> 37B2>
14B2<> 14C2< 37B2>
14B2< 14B2<> 37B2>
14B2< 14B2<> 37B2>
14B2< 14C7<
14B2< 14C7<
14B2< 14D7<
14B2<> 14C7<
14B2<> 14C7<
14B2<> 14D7<
34C4<> 38C1>
34C5<> 38C1>
34B6<> 38B1>
19A3<>
34B5<> 38C1>
34B5<> 38C1>
34D3< 34D5<
34D3< 34D5<
34D3< 34D5<
34D3< 34D5<
34B5< 38B1> 39A2>
34B5<> 38B1>
34B6<>
11C6<>
11B6<>
11A6<>
11A6<>
11A6<>
11D5<>
11D5<>
36B5>
36A5>
36C5>
36C5>
11C5<>
11B5<>
VCORE_GNDDIV
34A4< 34B5< 38B1>
VCORE_GNDDIV_TEST 34A3<>
25C7<> 25D7<
14B1< 25D8< 39D6>
25D6<> 25D7<
22D1< 23A8< 30A8< 30C6<> 30D7<
34A3<>
SRCLK_TP
26A5> 39A4>
SRMOD_TP
26A5< 39A4>
ST7_ICP_SEL_PD
23A2< 23D6<
ST7_KBD_LED_OUT 23A4< 23C4<>
ST7_OSC1
23D5<
ST7_OSC2
23D5<>
10C2<>
10C2<>
10C2<>
10C2<>
10B8<>
36A5>
9B4< 11B3<>
9B4< 11B5<>
9B4< 11B3<>
9B4< 11B5<>
9B4< 11B3<>
9B4< 11B5<>
9B4< 11B3<>
9B4< 11B5<>
9A4< 11B3<>
9A4< 11B3<>
9A4< 11B5<>
9A4< 11B3<>
9A4< 11B3<>
36A5>
9A4< 11B5<>
9A4< 11B5<>
25C7< 25D7<>
14B1< 25D8< 39D6>
SND_SYNC_F
SND_TO_AUDIO
SND_TO_AUDIO_F
SOFT_PWR_ON_L
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DQM_A<0>
RAM_ADDR<12..0>
RAM_ADDR<1>
RAM_ADDR<2>
RAM_ADDR<3>
RAM_ADDR<4>
RAM_ADDR<5>
RAM_ADDR<6>
RAM_ADDR<7>
RAM_ADDR<8>
RAM_ADDR<9>
RAM_ADDR<10>
RAM_ADDR<11>
RAM_ADDR<12>
RAM_BA<0>
RAM_BA<1..0>
RAM_BA<1>
RAM_CAS_L
34B8<
34B8<
34B8<
34B8<
34B8<
22D7<
22D7<
22C7<
34D4<>
34D4<>
34D4<>
34D4<>
39D7>
39D7>
39D7>
11B6<>
11B6<> 36A5>
SLEEP_LED
SLEEP_LED_I
SLEEP_LED_L
SLEEP_LED_SW_L
SLEEP_LED_UF
SLEEP_LS5
SLEEP_LS5_EN_L
SLEEP_L_LS5
SLEEP_L_LS5_EN_L
SLEEP_L_LS5_INV
SLEEP_L_LS5_NET
SLEEP_NET
SLEEP_NET_INV
SMC_TP
SND_AGND
SND_AMP_MUTE
SND_AMP_MUTE_F
SND_AMP_MUTE_L
SND_CLKOUT
SND_CLKOUT_F
SND_HP_MUTE
SND_HP_MUTE_INV
SND_HP_MUTE_L
SND_HP_SENSE_L
SND_HW_RESET_L
SND_HW_RESET_L_F
SND_LIN_SENSE_L
SND_SCLK
11B5<>
23C1< 25C7<> 39B6>

23D1<
23D2<
23C2<>
23C1<
33A5<> 33A8<
33A5<>
19A7<> 27A8<> 33A5<> 34C8<> 35C8<
33A6<>
35A3< 35C2< 35C8<>
33B3<> 35C8<>
33A3<>
33A3<>
26B5<
25C7<> 38B6>
25C8< 25D6<> 39A4>
25C7< 25D6<>
14C5<> 25D5<>
14B1< 25D8< 36B1> 39D6>
25C7<> 25D7<
25C5<>
25C5<> 25C6<> 39A4>
14C5<> 25C4<>
14B5<> 25D6<> 39C6>
14A7< 14B5<> 25C8< 39C6>
25C6<> 25C7<
14B5<> 25D6<> 39C6>
14B1< 25C8< 36B1> 39C6>
22B7<> 22D5<>
22B6<> 22D5<>
22B7<> 22D6<>
22B7<> 22D5<>
22B6<> 22D5<>
20B1<
20B1<
20A1<
20B1< 20B3< 20C3< 22C8<>
39B8>
TMDS_DN<1>
20A3< 20B1< 20C3< 22B8<>
39A8>
TMDS_DN<2>
20A1< 20A3< 20B3< 22B7<>
39A8>
TMDS_DP<0>
20B2< 20B3< 20C3< 22B8<>
39A8>
TMDS_DP<1>
20A3< 20B2< 20C3< 22B8<>
39A8>
TMDS_DP<2>
20A2< 20A3< 20B3< 22B7<>
39A8>
TPAD_F_RXD
23A7<> 39C4>
TPAD_F_TXD
23A7<> 39C4>
TPAD_RXD
23A8< 30C2< 30C4<>
TPAD_TXD
23A8< 30B2< 30C4<>
TPS2211_SHDN_L_PU 17C4<
TV_C
22A6<> 39D6>
TV_COMP
22A6<> 39D6>
37B2>
37B2>
37B2>
37B2>
37B2>
38B6> 39A7>
38B6> 39A7>
39D6>
24C4<
24C4<

SIZE
APPLE COMPUTER INC.
DRAWING NUMBER
SHT
NONE
REV.
051-6531
SCALE

B
OF
42
42
44
19
19
5
5
5
16
16
16
16
16
16
16
16
C335
C336
CAP
CAP
16
16
C503
C504
CAP
CAP
27
27
C671
C672
CAP
CAP
21
21
C839
C840
CAP
CAP
26
26
L28
L29
IND
IND
22
22
R29
R30
RES
RES
14
24
R197
R198
RES
RES
8
9
C337
C338
C339
C340
C341
C342
C343
C344
C345
C346
C347
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
16
19
21
5
5
5
5
5
5
5
5
C505
C506
C507
C508
C509
CAP
CAP
CAP
CAP
CAP
27
27
34
33
32
C673
C674
C675
C676
C677
CAP
CAP
CAP
CAP
CAP
23
34
23
22
35
C841
C842
C843
C844
C845
CAP
CAP
CAP
CAP
CAP
26
26
26
26
26
C510
C511
C512
C513
C514
C515
CAP
CAP
CAP
CAP
CAP
CAP
32
27
34
25
19
19
C678
C679
C680
C681
C682
C683
CAP
CAP
CAP
CAP
CAP
CAP
25
34
34
25
34
35
C846
C847
C848
C849
C850
C851
CAP
CAP
CAP
CAP
CAP
CAP
25
21
21
21
21
21
24
24
7
13
24
24
18
18
23
23
20
R199
R200
R201
R202
R203
R204
R205
R206
R207
R208
R209
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
9
18
18
20
19
20
20
5
8
8
12
16
16
16
14
16
C348
C349
C350
C351
C352
CAP
CAP
CAP
CAP
CAP
16
16
16
16
16
C516
C517
C518
C519
C520
CAP
CAP
CAP
CAP
CAP
33
27
34
35
27
C684
C685
C686
C687
C688
CAP
CAP
CAP
CAP
CAP
22
22
14
34
25
C852
C853
C854
C855
C856
CAP
CAP
CAP
CAP
CAP
21
21
21
21
21
19
22
22
22
27
35
34
32
33
29
29
33
31
29
29
35
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
CAP
CAP
CAP
CAP
CAP
IND_3P
IND
IND
IND
IND
IND
IND_3P
IND_3P
IND
IND
IND
IND
IND
FILTER_4P
FILTER_4P
IND
R31
R32
R33
R34
R35
R36
R37
R38
R39
R40
R41
C179
C180
C181
C182
C183
L30
L31
L32
L33
L34
L35
L36
L37
L38
L39
L40
L41
L42
L43
L44
L45
R42
R43
R44
R45
R46
RES
RES
RES
RES
RES
25
18
18
18
18
R210
R211
R212
R213
R214
RES
RES
RES
RES
RES
20
20
20
22
20
C184
C185
C186
C187
C188
C189
C190
C191
C192
C193
C194
C195
C196
C197
C198
C199
C200
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
16
16
19
19
5
5
5
5
5
5
5
5
16
16
14
16
14
C353
C354
C355
C356
C357
C358
CAP
CAP
CAP
CAP
CAP
CAP
14
16
16
16
16
21
C689
C690
C691
C692
C693
C694
C695
C696
C697
C698
C699
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
34
25
14
14
34
33
34
22
33
14
34
C857
C858
C859
C860
C861
C862
C863
C864
C865
C866
C867
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
21
21
21
21
21
21
21
21
21
21
21
23
23
23
23
29
28
21
21
21
21
21
34
11
11
11
11
11
11
29
34
11
35
IND
IND
IND
IND
IND
IND
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
L46
L47
L48
L49
L50
L51
C359
C360
C361
C362
C363
C521
C522
C523
C524
C525
C526
C527
C528
C529
C530
C531
L52
L53
L54
L55
L56
IND
IND
IND
IND
IND
23
31
26
21
21
R47
R48
R49
R50
R51
R52
R53
R54
R55
R56
R57
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
7
7
14
14
13
13
18
18
18
26
5
R215
R216
R217
R218
R219
R220
R221
R222
R223
R224
R225
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
8
12
12
20
20
20
19
20
19
20
8
C364
C365
C366
C367
C368
C369
CAP
CAP
CAP
CAP
CAP
CAP
21
16
16
16
16
16
C532
C533
C534
C535
C536
C537
CAP
CAP
CAP
CAP
CAP
CAP
33
33
33
32
32
32
C700
C701
C702
C703
C704
C705
CAP
CAP
CAP
CAP
CAP
CAP
33
21
22
22
21
35
C868
C869
C870
C871
C872
C873
CAP
CAP
CAP
CAP
CAP
CAP
21
21
21
21
21
21
C201
C202
C203
C204
C205
C206
C207
C208
C209
C210
C211
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
5
5
5
16
16
16
16
16
16
16
16
C538
C539
C540
C541
C542
C543
C544
C545
C546
C547
C548
C549
C550
C551
C552
C553
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
28
28
28
28
11
21
35
33
28
31
11
11
11
11
22
32
C706
C707
C708
C709
C710
C711
C712
C713
C714
C715
C716
C717
C718
C719
C720
C721
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP_P
22
22
19
35
22
25
22
22
22
21
21
22
22
19
19
19
C874
C875
C876
C877
C878
C879
C880
C881
C882
C883
C884
C885
C886
C887
C888
C889
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP
CAP
CAP
CAP
21
21
21
21
21
21
21
21
19
31
34
34
35
35
35
21
R58
R59
R60
R61
R62
R63
R64
R65
R66
R67
R68
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
5
5
5
5
23
24
24
5
20
14
24
R226
R227
R228
R229
R230
R231
R232
R233
R234
R235
R236
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
8
8
19
19
12
20
20
20
19
20
19
24
18
24
5
5
24
R237
R238
R239
R240
R241
R242
RES
RES
RES
RES
RES
RES
20
9
10
19
5
10
R75
R76
R77
R78
R79
RES
RES
RES
RES
RES
24
24
12
26
5
R243
R244
R245
R246
R247
RES
RES
RES
RES
RES
10
14
19
19
19
C217
C218
C219
C220
C221
C222
CAP
CAP
CAP
CAP
CAP
CAP
16
20
19
19
19
19
32
27
29
31
30
35
C722
C723
C724
C725
C726
C727
CAP
CAP
CAP
CAP
CAP
CAP
21
35
22
21
35
10
C890
C891
C892
C893
C894
C895
CAP
CAP
CAP
CAP
CAP
CAP
35
35
35
35
35
25
CAP
CAP
CAP
CAP
CAP
CAP
16
16
18
18
18
18
C223
C224
C225
C226
C227
C228
C229
C230
C231
C232
C233
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
5
5
5
16
16
16
16
16
16
19
20
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
CAP
CAP
CAP
CAP
CAP
CAP
16
16
16
16
16
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
C554
C555
C556
C557
C558
C559
CAP
CAP
CAP
CAP
CAP
C386
C387
C388
C389
C390
C391
C392
C393
C394
C395
C396
C397
C398
C399
C400
C401
C402
TRA_FDG6324L 22
TRA_2N7002 22
TRA_2N7002DW 33
TRA_2N7002DW 31
TRA_SI3443DV 22
TRA_2N3904 34
C576
C577
C578
C579
C580
C581
CAP
CAP
CAP
CAP
CAP
CAP
33
28
31
31
35
35
C744
C745
C746
C747
C748
C749
CAP
CAP_P
CAP
CAP
CAP
CAP
22
35
22
10
10
22
Q13
Q14
Q15
Q16
Q17
Q19
Q20
Q21
Q22
Q23
Q24
TRA_SI4435DY 31
TRA_FDG6324L 32
TRA_2N7002DW 27
TRA_SI4435DY 31
TRA_2N3904 34
TRA_2N7002 35
TRA_2N7002DW 31
TRA_2N7002DW 31
TRA_2N7002 30
TRA_2N7002DW 33
TRA_SI4435DY 31
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
20
12
14
14
24
20
20
20
5
5
5
C245
C246
C247
C248
C249
C250
C251
C252
C253
C254
C255
C256
C257
C258
C259
C260
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
9
16
12
16
16
16
16
19
19
19
20
19
5
5
16
16
16
16
16
16
16
21
21
16
21
21
21
21
21
22
16
16
14
21
21
16
16
14
21
21
34
21
21
C582
C583
C584
C585
C586
C587
C588
C589
C590
C591
C592
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
35
33
32
32
28
28
29
11
33
28
31
C750
C751
C752
C753
C754
C755
C756
C757
C758
C759
C760
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP
CAP
32
35
10
10
27
27
33
31
32
33
33
19
19
34
21
19
19
19
19
19
19
14
14
21
14
21
26
15
34
34
34
14
34
25
19
25
33
34
C430
C431
C432
C433
C434
C435
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
34
34
34
14
21
21
11
19
33
34
32
19
25
34
32
33
31
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
16
16
16
16
16
16
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP_P
CAP
CAP
R265
R266
R267
R268
R269
R270
R271
R272
R273
R274
R277
R278
R279
R281
R284
R286
R287
R288
R289
R290
R291
R292
R293
R294
R295
R296
R297
CAP
CAP
CAP
CAP
CAP
CAP
C761
C762
C763
C764
C765
C766
C767
C768
C769
C770
C771
5
5
20
14
24
14
12
18
18
5
5
5
5
20
14
12
14
14
14
24
13
18
18
5
8
8
8
C261
C262
C263
C264
C265
C266
31
11
11
11
11
33
32
31
11
11
35
TRA_2N7002DW 29 33
TRA_2N7002DW 25
TRA_2N7002DW 31
TRA_SI3443DV 33
TRA_2N7002DW 31
TRA_2N7002DW 31
TRA_2N7002DW 25
TRA_SI3443DV 33
TRA_2N3906 23
TRA_2N7002DW 22 23
TRA_SI3446DV 25
TRA_SI3446DV 25
TRA_2N7002DW 22
TRA_2N3904 25
TRA_TP0610 22
TRA_2N7002DW 22
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
35
16
16
16
14
16
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
Q25
Q26
Q27
Q28
Q29
Q30
Q31
Q32
Q33
Q35
Q36
Q37
Q38
Q39
Q40
Q41
R97
R98
R99
R100
R101
R102
R103
R104
R105
R106
R107
R108
R109
R110
R111
R112
R113
R114
R115
R116
R117
R118
R119
R120
R121
R122
R123
CAP
CAP
CAP
CAP
CAP
CAP
C593
C594
C595
C596
C597
C598
C599
C600
C601
C602
C603
CAP
25
CAP
25
CAP
25
CAP
25
CAP
25
CAP
25
CAP
19
CAP
25
CAP
25
CAP
25
CAP
31
CAP
35
CAP
35
DIODE
27
DIODE_SCHOT 34
DIODE_SCHOT 32
DIODE
32
DIODE_SCHOT 19
DIODE_SCHOT 33
DIODE_SCHOT 32
ZENER
29
DIODE
31
DIODE
31
DIODE_SCHOT 32
DIODE_DUAL_6P 29
DIODE_SCHOT 33
DIODE_SCHOT_3P2 28
DIODE_DUAL_6P 29
DIODE
33
DIODE_SCHOT 32
DIODE
32
DIODE_SCHOT 32
DIODE_SCHOT 28
DIODE_SCHOT 22
DIODE_SCHOT 33
DIODE_SCHOT 35
DIODE_SCHOT 19
DIODE
34
Q7
Q8
Q9
Q10
Q11
Q12
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
C896
C897
C898
C899
C900
C901
C902
C903
C904
C905
C906
C907
C908
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
19
19
9
21
10
19
19
21
19
19
19
19
19
19
19
19
14
C403
C404
C405
C406
C407
C408
C409
C410
C411
C412
C413
C414
C415
C416
C417
C418
C419
C420
C421
C422
C423
C424
C425
C426
C427
C428
C429
34
34
34
34
34
34
34
10
10
10
10
22
35
10
10
10
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
34
35
16
16
16
16
16
16
16
16
16
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
R248
R249
R250
R251
R252
R253
R254
R255
R256
R257
R258
R259
R260
R261
R262
R263
R264
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
C728
C729
C730
C731
C732
C733
C734
C735
C736
C737
C738
C739
C740
C741
C742
C743
14
24
12
26
26
5
5
5
20
14
14
14
13
24
24
24
26
C234
C235
C236
C237
C238
C239
C240
C241
C242
C243
C244
33
28
31
31
31
11
33
33
32
32
28
28
31
11
30
35
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
18
18
18
18
18
18
5
5
5
16
16
18
18
20
20
20
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
R80
R81
R82
R83
R84
R85
R86
R87
R88
R89
R90
R91
R92
R93
R94
R95
R96
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
C560
C561
C562
C563
C564
C565
C566
C567
C568
C569
C570
C571
C572
C573
C574
C575
IND
21
IND
21
FILTER_4P 29
FILTER_4P 29
FILTER_4P 22
FILTER_4P 22
FILTER_4P 22
IND
35
IND
25
IND
25
IND
25
IND
25
IND
25
IND
25
IND
25
PHOTODIODE_2P 23
TRA_2N7002DW 7
TRA_2N7002DW 7
TRA_2N7002 7
TRA_2N3904 7
TRA_2N3904 19
TRA_2N3904 19
RES
RES
RES
RES
RES
RES
16
16
16
16
16
16
L68
L69
L70
L71
L72
L73
L74
L75
L76
L77
L78
L79
L80
L81
L82
PD1
Q1
Q2
Q3
Q4
Q5
Q6
R69
R70
R71
R72
R73
R74
16
16
16
16
16
16
16
21
21
21
16
16
16
16
21
21
21
21
21
16
16
21
21
21
21
21
21
21
21
21
21
21
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
IND
IND
IND
IND
IND
IND
IND
IND
IND
IND
IND
C212
C213
C214
C215
C216
C370
C371
C372
C373
C374
C375
C376
C377
C378
C379
C380
C381
C382
C383
C384
C385
L57
L58
L59
L60
L61
L62
L63
L64
L65
L66
L67
D26
D27
D28
D29
D30
D33
DIODE_DUAL_6P 29
DIODE_SCHOT 32
DIODE_DUAL_6P 29
DIODE_SCHOT 29
DIODE_SCHOT 31
DIODE_SCHOT 35
Q42
Q43
Q44
Q45
Q46
Q47
TRA_2N3904 22
TRA_SI3443DV 33
TRA_2N3904 22
TRA_TP0610 22
TRA_SI3446DV 35
TRA_2N3904 25
R124
R125
R126
R127
R128
R129
RES
RES
RES
RES
RES
RES
13
14
18
18
5
5
R298
R299
R300
R301
R302
R303
RES
RES
RES
RES
RES
RES
33
21
33
34
34
34
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
16
16
16
20
5
5
5
5
5
16
16
5
5
5
5
5
5
34
16
16
16
16
16
16
16
16
16
16
16
16
20
20
20
20
20
25
25
5
5
5
5
14
16
16
16
16
16
16
16
14
5
5
5
5
5
5
5
5
16
16
16
12
16
16
16
16
20
C267
C268
C269
C270
C271
C272
C273
C274
C275
C276
C277
C278
C279
C280
C281
C282
C284
C285
C286
C287
C288
C289
C290
C291
C292
C293
C294
C295
C296
C297
C298
C299
C300
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
C311
C312
C313
C314
C315
C316
C317
C318
C319
C320
C321
C322
C323
C324
C325
C326
C327
C328
C329
C330
C331
C332
C333
C334
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
16
16
19
19
19
5
5
34
5
35
16
16
16
16
16
19
20
34
16
16
16
16
16
16
16
16
16
16
16
16
16
19
19
19
19
19
21
19
19
19
8
16
16
19
16
16
16
16
16
16
16
16
16
16
16
16
16
16
19
21
19
19
19
19
19
19
16
C436
C437
C438
C439
C440
C441
C442
C443
C444
C445
C446
C447
C448
C449
C450
C451
C452
C453
C454
C455
C456
C457
C458
C459
C460
C461
C462
C463
C464
C465
C466
C467
C468
C469
C470
C471
C472
C473
C474
C475
C476
C477
C478
C479
C480
C481
C482
C483
C484
C485
C486
C487
C488
C489
C490
C491
C492
C493
C494
C495
C496
C497
C498
C499
C500
C501
C502
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
21
21
21
34
22
34
27
34
34
34
21
21
19
22
21
19
22
27
27
34
33
27
31
34
9
32
32
32
27
27
27
17
31
25
9
27
27
19
22
27
27
27
25
9
16
11
11
19
22
32
27
27
27
11
11
27
27
27
19
32
27
27
34
35
22
27
27
C604
C605
C606
C607
C608
C609
C610
C611
C612
C613
C614
C615
C616
C617
C618
C619
C620
C621
C622
C623
C624
C625
C626
C627
C628
C629
C630
C631
C632
C633
C634
C635
C636
C637
C638
C639
C640
C641
C642
C643
C644
C645
C646
C647
C648
C649
C650
C651
C652
C653
C654
C655
C656
C657
C658
C659
C660
C661
C662
C663
C664
C665
C666
C667
C668
C669
C670
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
32
28
29
29
31
33
33
33
33
32
28
31
31
31
31
31
33
31
31
33
31
32
32
28
28
28
31
31
31
31
28
28
23
23
23
33
28
28
28
30
32
28
28
21
23
26
28
25
31
28
23
23
23
26
31
33
23
26
33
23
30
26
30
26
25
22
23
C772
C773
C774
C775
C776
C777
C778
C779
C780
C781
C782
C783
C784
C785
C786
C787
C788
C789
C790
C791
C792
C793
C794
C795
C796
C797
C798
C799
C800
C801
C802
C803
C804
C805
C806
C807
C808
C809
C810
C811
C812
C813
C814
C815
C816
C817
C818
C819
C820
C821
C822
C823
C824
C825
C826
C827
C828
C829
C830
C831
C832
C833
C834
C835
C836
C837
C838
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP_P
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
31
17
29
31
17
28
28
33
35
29
35
17
29
33
29
32
35
17
17
17
29
32
32
17
17
17
17
32
33
32
31
29
28
29
33
29
28
35
28
33
30
17
23
23
23
31
28
32
32
32
32
33
31
33
33
30
23
26
26
30
30
26
26
30
26
26
26
D34
DP1
DP2
DP3
DP4
DP5
DP6
DP7
F1
F2
F3
F4
F5
FL1
FL2
FL3
G1
G2
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J20
J22
J23
J24
J25
J26
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
L18
L21
L22
L23
L24
L25
L26
L27
DIODE_SCHOT 33
DPAK3P
19
DPAK3P
34
DPAK3P
35
DPAK3P
31
DPAK3P
29
DPAK3P
19
DPAK3P
21
FUSE
22
FUSE
29
FUSE
31
FUSE
31
FUSE
29
FILTER_LC 22
FILTER_LC 22
FILTER_LC 22
OSC
28
OSC
18
CON_F1ST_S2MT_SM 14
CON_3RTSM_125 25
CON_F14RT_S2MT_SM 24
CON_3RTSM_125 25
CON_12
34
CON_4RT_WRIB 22
CON_F16ST_D_SMA 25
CON_M80ST_D4MT_SM 17
CON_M50SM_5MM 24
CON_F30ST_D_SM 25
CON_M50SM_5MM 24
CON_F30RT_T6MT_TH1 22
CON_F5RT_MINIDIN_TH 22
CON_10STSM_5087 25
CON_RJ45_SHORT_4MT_TH 27
CON_M8RT_S_SM 31
CON_F200RT_DDRDIMM_SM1 11
CON_F80ST_D4MT_SM 24
CON_F200RT_DDRDIMM_SM2 11
CON_F6RT_S4MT_TH1 29
CON_M8RT_S_SM 31
CON_F9RT_1394B_S6MT_SMA 29
IND
14
IND
18
IND
18
IND
18
IND
27
IND
22
IND
28
IND
31
IND
31
IND
31
IND
23
IND
31
IND
20
IND
20
IND
20
IND
21
IND
14
FILTER_4P 22
IND
14
IND
22
IND
19
IND
22
IND
22
IND
22
Q48
Q49
Q50
Q51
Q52
Q53
Q54
Q55
Q56
Q57
Q58
Q59
Q60
Q61
Q62
Q63
Q64
Q65
Q66
Q67
Q68
Q69
Q71
Q72
Q73
Q74
Q75
Q76
Q77
Q78
Q79
Q80
Q81
Q82
Q83
Q84
Q85
Q86
Q87
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
TRA_SI7892DP 19
TRA_SI7860DP 34
TRA_SI7860DP 34
TRA_SI7860DP 19
TRA_SI4888DY 33
TRA_IRF7832 34
TRA_IRF7832 34
TRA_IRF7832 34
TRA_IRF7811W 35
TRA_IRF7805 35
TRA_2N7002DW 29
TRA_IRF7805 32
TRA_IRF7811W 32
TRA_SI4888DY 33
TRA_2N3904 25
TRA_IRF7805 31
TRA_IRF7811W 31
TRA_2N7002DW 31
TRA_2N3904 25
TRA_NDS9407 29
TRA_IRF7811W 35
TRA_IRF7805 35
TRA_SI4888DY 33
TRA_SI4888DY 33
TRA_2N3906 23
TRA_2N3906 23
TRA_2N7002DW 23
TRA_SUD45P03 31
TRA_SI3446DV 19
TRA_2N7002DW 25
TRA_2N7002DW 33
TRA_2N7002DW 19
TRA_2N7002DW 33
TRA_2N7002DW 35
TRA_2N7002DW 35
TRA_SI6467BDQ 35
TRA_SI6467BDQ 35
TRA_2N7002DW 34
TRA_2N7002DW 25
RES
22
RES
7
RES
7
RES
7
RES
7
RES
23
RES
14
RES
24
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
7
RES
14
R130
R131
R132
R133
R134
RES
RES
RES
RES
RES
5
8
8
8
8
R135
R136
R137
R138
R139
R140
R141
R142
R143
R144
R145
R146
R147
R148
R149
R150
R151
R152
R153
R154
R155
R156
R157
R158
R159
R160
R161
R162
R163
R164
R165
R166
R167
R168
R169
R170
R171
R172
R173
R174
R175
R176
R177
R178
R179
R180
R181
R182
R183
R184
R185
R186
R187
R188
R189
R190
R191
R192
R193
R194
R195
R196
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
8
8
8
18
5
8
8
8
8
8
13
12
12
5
7
8
8
8
8
13
14
14
12
18
18
5
8
8
8
8
8
8
8
14
12
12
12
18
18
8
8
8
8
8
8
12
18
8
8
8
12
12
12
18
18
35
9
12
12
12
18
8
R304
R305
R306
R307
R308
R309
R310
R311
R312
R313
R314
R315
R316
R317
R318
R319
R320
R321
R322
R323
R324
R325
R326
R327
R328
R329
R330
R331
R332
R333
R334
R335
R336
R337
R338
R339
R340
R341
R342
R343
R344
R345
R346
R347
R348
R349
R350
R351
R352
R353
R354
R355
R356
R357
R358
R359
R360
R361
R362
R363
R364
R365
R366
R367
R368
R369
R370
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
34
34
19
19
33
33
33
19
34
34
34
34
19
22
34
27
22
34
34
34
34
34
34
34
34
34
34
34
19
27
27
27
34
34
9
19
19
19
22
27
27
27
27
27
17
34
33
19
19
27
27
27
34
9
31
32
32
27
27
31
31
31
34
33
33
33
27
PCB_STANDOFF 4
CAP
22
CAP
34
CAP
34
CAP
34
CAP
34
CAP
34
CAP
34
CAP
5
CAP
16
CAP
16
CAP
18
CAP
5
CAP
34
CAP
20
CAP
14
C16
C17
C18
C19
C20
C21
CAP
CAP
CAP
CAP
CAP
CAP
16
16
16
16
16
16
C22
C23
C24
C25
C26
CAP
CAP
CAP
CAP
CAP
16
16
16
5
16
C27
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
16
16
16
16
16
16
16
16
16
16
18
5
5
5
5
16
16
16
16
5
5
5
C49
C50
C51
C52
C53
C54
CAP
CAP
CAP
CAP
CAP
CAP
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C82
C83
C84
C85
C86
C87
C88
C89
C90
C91
C92
C93
C94
C95
C96
C97
C98
C99
C100
C101
C102
C103
C104
C105
C106
C107
C108
C109
C110
C111
C112
C113
C114
C115
C116
C117
C118
C119
C120
C121
C122
C123
C124
C125
C126
C127
C128
C129
C130
C131
C132
C133
C134
C135
C136
C137
C138
C139
C140
C141
C142
C143
C144
C145
C146
C147
C148
C149
C150
C151
C152
C153
C154
C155
C156
C157
C158
C159
C160
C161
C162
C163
C164
C165
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
BS1
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C66
C67
C68
C69
C70
C71
C72
C73
C74
C75
C76
C77
C78
C79
C80
C81
C166
C167
C168
C169
C170
C171
C172
C173
C174
C175
C176
C177
C178
*** Part Cross-Reference for the entire design ***
B
43
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
27
27
17
31
31
34
33
33
32
27
27
27
31
R539
R540
RES
RES
33
26
R716
R717
RES
RES
25
25
U2
U3
SN74AUC1G08 23
ADT7460
25
R541
R542
R543
R544
R545
RES
RES
RES
RES
RES
32
31
31
30
26
R718
R719
R720
R721
R722
RES
RES
RES
RES
RES
22
25
14
21
21
R546
R547
R548
R549
R550
R551
RES
RES
RES
RES
RES
RES
28
28
31
31
23
26
R723
R724
R725
R726
R727
R728
RES
RES
RES
RES
RES
RES
25
22
25
25
35
21
U4
U5
U7
U9
U10
U11
U12
U13
U14
U15
U16
SN74AUC1G08 23
SIL1162
20
VREG_LT1962 14
CBTV4020 10
CBTV4020 10
PI3B3257 34
CBTV4020 10
CBTV4020 10
LTC3405
27
COMPARATOR_LMC7211 31
LTC1778
19
R384
R385
R386
R387
R388
RES
RES
RES
RES
RES
34
34
9
9
19
R552
R553
R554
R555
R556
RES
RES
RES
RES
RES
23
25
26
28
28
R729
R730
R731
R732
R733
RES
RES
RES
RES
RES
21
24
33
34
27
U17
U18
U19
U20
U21
FEPR_1MX8 9
LTC1625
32
PWR_CNTRL_TPS2211 17
MAX1717
34
R389
R390
R391
R392
R393
R394
R395
R396
R397
R398
R399
R400
R401
R402
R403
R404
R405
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
19
19
22
32
27
31
31
31
34
34
15
22
32
32
27
27
25
R557
R558
R559
R560
R561
R562
R563
R564
R565
R566
R567
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
28
31
31
31
31
30
28
28
31
31
31
R734
R735
R736
R737
R738
R739
RES
RES
RES
RES
RES
RES
31
27
29
29
31
31
R740
R741
R742
R743
R744
RES
RES
RES
RES
RES
28
29
31
29
31
U22
U23
U24
U25
U26
U27
U28
U29
U30
U31
U32
MAX1715
35
AMP_MAX4172 31
7432
22 30
VREG_LP2951 32
PCI1510GGU 17
LTC3707
33
TSB81BA3A 28
VREG_LP2951 32
MAX1772
31
EEPROM_16KX8_M24128B 23
R568
R569
R570
R571
R572
R573
RES
RES
RES
RES
RES
RES
23
30
31
31
30
30
R745
R746
R747
R748
R749
R750
RES
RES
RES
RES
RES
RES
24
31
31
31
31
17
U33
U34
U35
U36
U37
U38
M16C62
30
VREG_LM2594 28
MAX1916
23
LTC1761
28
VREG_LT1962 28
R406
R407
R408
R409
R410
RES
RES
RES
RES
RES
27
34
34
9
19
24
32
27
31
34
19
35
35
35
35
35
35
35
35
35
32
27
27
34
19
33
32
32
34
27
28
28
27
28
28
28
28
31
31
31
23
23
30
30
30
26
23
31
33
R751
R752
R753
R754
R755
R756
R757
R758
R759
R760
R761
R762
R763
R764
R765
R766
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
29
29
17
31
31
17
17
28
28
28
28
17
31
17
30
17
UPD720101_FBGA 26
OPAMP_MAX4236EUTT 23
CLK_GEN_CY28512 14
APOLLO_MPC7445_360 5 6
RAGE_MBLTY_M10_CSP64_667 18 19 21
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
U39
U40
U42
U43
U44
R411
R412
R413
R414
R415
R416
R417
R418
R419
R420
R421
R422
R423
R424
R425
R426
R427
R428
R429
R430
R431
R432
R433
R434
R435
R436
R437
R438
R574
R575
R576
R577
R578
R579
R580
R581
R582
R583
R584
R585
R586
R587
R588
R589
R590
R591
R592
R593
R594
R595
RES
RES
RES
RES
RES
RES
26
26
30
30
30
30
30
30
23
31
26
24
24
24
23
23
35
14
35
35
24
24
17
30
30
23
23
23
23
31
28
23
23
30
29
28
30
26
26
9
11
24
24
32
28
28
28
28
34
11
35
19
24
29
31
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
INTREPID 8 9 12 13 14 15
CLK_GEN_CY25811 18
TRANSCEIVER_88E1111 27
OPAMP_LMC7111 31
MAX6804
30
FEPR_256KX8_ST72264_BGA 23
VREG_MM1571J 21
VREG_MM1571J 21
741G32
22
741G32
22
LTC3412
35
SHORT
35
SHORT
19
SHORT
34
SHORT
32
SHORT
34
SHORT
35
SHORT
34
SHORT
33
SHORT
25
JUMPER
35
SHORT
22
SHORT
22
SHORT
34
SHORT
31
SHORT
19
SHORT
19
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
R596
R597
R598
R599
R600
R601
R602
R603
R605
R606
R607
R609
R610
R611
R612
R613
R767
R768
R769
R770
R771
R772
R773
R774
R775
R776
R777
R778
R779
R781
R782
R783
R784
U45
U46
U47
U49
U50
U51
U52
U54
U55
U56
U57
U58
XW1
XW2
XW3
XW4
XW5
XW6
XW7
XW8
XW9
XW11
XW12
XW13
XW15
XW19
XW20
XW21
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
35
33
33
24
28
31
35
33
33
28
27
R614
R615
R616
R617
R618
R619
R621
R622
R623
R624
R625
R626
R627
R629
R630
R631
R632
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
14
23
35
23
23
23
13
14
25
13
14
13
35
13
13
14
14
R634
R636
R638
R639
R640
RES
RES
RES
RES
RES
14
14
14
8
8
R785
R786
R787
R788
R789
R790
R791
R792
R793
R794
R795
R796
R797
R798
R799
R800
R801
R802
R803
R804
R805
R806
R807
R808
R809
R810
R811
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
30
30
30
30
26
26
26
26
26
26
26
26
35
35
35
35
35
35
35
19
34
34
34
34
34
35
25
XW22
XW23
XW24
XW27
XW28
XW29
XW30
XW31
Y1
Y3
Y4
Y5
Y6
Y7
ZT1
ZT2
ZT3
ZT4
ZT5
ZT6
ZT7
ZT8
ZT9
ZT10
ZT11
ZT12
ZT13
SHORT
19
SHORT
19
SHORT
19
SHORT
21
SHORT
21
SHORT
21
SHORT
21
SHORT
5
CRYSTAL
14
CRYSTAL
27
CRYSTAL
23
CRYSTAL
26
CRYSTAL
30
CRYSTAL_4PIN 30
HOLE_VIA 4
MTGHOLE
4
HOLE_VIA 4
MTGHOLE
4
MTGHOLE
4
MTGHOLE
4
HOLE_VIA 4
HOLE_VIA 4
HOLE_VIA 4
MTGHOLE
4
MTGHOLE
4
HOLE_VIA 4
HOLE_VIA 4
RES
RES
RES
RES
RES
RES
31
33
32
28
28
28
R641
R642
R643
R644
R645
R646
RES
RES
RES
RES
RES
RES
8
8
8
8
8
8
R812
R813
R814
RP1
RP2
RP3
RES
RES
RES
RPAK4P
RPAK4P
RPAK4P
25
25
25
14
24
24
ZT14
ZT15
ZT16
ZT17
ZT18
ZT19
HOLE_VIA
HOLE_VIA
MTGHOLE
HOLE_VIA
HOLE_VIA
HOLE_VIA
4
4
4
4
4
4
R472
R473
R474
R475
R476
R477
R478
R479
R480
R481
R482
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
29
31
31
30
30
33
28
35
35
33
33
R483
R484
R485
R486
R487
R488
R489
R490
R491
R492
R493
R494
R495
R496
R497
R498
R499
R500
R501
R502
R503
R504
R505
R506
R507
R508
R509
R510
R511
R512
R513
R514
R515
R516
R517
R518
R519
R520
R521
R522
R523
R524
R525
R526
R527
R528
R529
R530
R531
R532
R533
R534
R535
R536
R537
R538
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
32
28
28
28
31
31
31
31
30
30
35
28
28
28
31
31
31
9
30
30
30
30
30
33
33
32
28
28
31
31
30
33
33
28
30
30
33
33
32
28
33
28
28
31
25
33
33
26
26
23
23
23
30
30
25
33
R647
R649
R650
R651
R652
R653
R654
R655
R656
R657
R658
R659
R660
R661
R662
R663
R664
R665
R666
R667
R668
R669
R670
R671
R672
R673
R674
R675
R676
R677
R678
R679
R680
R681
R682
R683
R684
R685
R686
R688
R689
R690
R691
R692
R693
R694
R695
R696
R697
R698
R699
R700
R701
R702
R703
R704
R705
R706
R707
R708
R709
R710
R711
R712
R713
R714
R715
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
8
22
22
8
8
8
8
22
14
8
8
8
8
22
22
22
8
8
8
8
8
8
22
22
35
8
8
8
8
8
8
25
22
22
14
8
8
8
22
22
25
22
22
25
5
22
25
22
33
14
14
22
14
5
22
22
22
22
14
14
35
25
19
35
25
22
35
RP4
RP5
RP6
RP7
RP8
RP9
RP10
RP11
RP12
RP13
RP14
RP15
RP16
RP17
RP18
RP19
RP20
RP21
RP22
RP23
RP24
RP25
RP26
RP27
RP28
RP29
RP30
RP31
RP32
RP33
RP34
RP35
RP36
RP37
RP38
RP39
RP40
RP41
RP42
RP43
RP44
RP45
RP46
RP47
RP48
RP49
RP50
RP51
RP52
RP53
RP54
RP55
RP56
RP57
RP58
RP59
RP60
RP61
SH1
SP1
SP2
SP3
SP4
SP5
SP6
T1
U1
RPAK4P
24
RPAK4P
24
RPAK4P
14
RPAK4P
14
RPAK4P
14
RPAK4P
24
RPAK4P
24
RPAK4P
24
RPAK4P
13
RPAK4P
24
RPAK4P
13
RPAK4P
13
RPAK4P
13
RPAK4P
12
RPAK4P
12
RPAK4P
12
RPAK4P
12
RPAK4P
8
RPAK4P
12
RPAK4P
8
RPAK4P
8 14
RPAK4P
9
RPAK4P
9
RPAK2P
20
RPAK2P
20
RPAK4P
14
RPAK4P
9
RPAK4P
9
RPAK2P
20
RPAK4P
9
RPAK4P
9
RPAK4P
9
RPAK4P
9
RPAK4P
28
RPAK4P
28
RPAK10P2C 17
RPAK4P
30
RPAK4P
30
RPAK10P2C 23
RPAK10P2C 23
RPAK4P
25
RPAK4P
26
RPAK4P
14
RPAK4P
14
RPAK4P
14
RPAK4P
24
RPAK4P
24
RPAK4P
14
RPAK4P
23 26
RPAK4P
23
RPAK4P
26
RPAK4P
26
RPAK4P
14
RPAK2P
20
RPAK2P
20
RPAK2P
20
RPAK2P
20
RPAK2P
20
SHLD_3P_EMI 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
SPKR_CLIP_P84 4
XFR_ENET_1000BT 27
SN74AUC1G04 7
ZT20
ZT21
ZT22
ZT23
ZT24
ZT25
ZT26
ZT27
ZT28
ZT29
ZT30
ZT31
ZT32
ZT33
ZT34
ZT35
ZT36
ZT37
ZT38
ZT39
ZT40
ZT41
ZT42
ZT43
ZT44
ZT45
ZT46
ZT47
ZT48
ZT49
ZT50
ZT51
ZT52
ZT53
ZT54
ZT55
ZT56
ZT57
ZT58
ZT59
ZT60
ZT61
ZT62
ZT63
ZT64
ZT65
ZT66
ZT67
ZT68
ZT69
ZT70
ZT71
ZT72
ZT73
ZT74
ZT75
ZT76
ZT77
ZT78
ZT79
ZT80
ZT81
ZT82
ZT83
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
R455
R456
R457
R458
R459
R460
R461
R462
R463
R464
R465
R466
R467
R468
R469
R470
R471
R371
R372
R373
R374
R375
R376
R377
R378
R379
R380
R381
R382
R383
R439
R440
R441
R442
R443
R444
R445
R446
R447
R448
R449
R450
R451
R452
R453
R454
B
44

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8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO

LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED

INTERNAL CONNECTORS - DVD,

MARVELL GIGABIT ETHERNET PHY

FIREWIRE A/B CONNECTORS, PORT POWER LIMITER

INTREPID MEMORY INTERFACE / BOOT ROM

200PIN DDR MEMORY SODIMM CONNECTORS

INTREPID ENET/FW/UATA/EIDE INTERFACES

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

SIL1162 TMDS TRANSMITTER

PMU (POWER MANAGEMENT UNIT)

BATTERY CHARGER AND CONNECTOR

12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY

3.3V / 5V SYSTEM POWER SUPPLIES

CPU CORE VOLTAGE POWER SUPPLY

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK

SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF

FUNCTIONAL TEST POINTS

DIMENSIONS ARE IN MILLIMETERS

Apple Computer Inc.

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

DO NOT SCALE DRAWING

THIRD ANGLE PROJECTION

NOTICE OF PROPRIETARY PROPERTY

J3 (SHARE WITH BLUETOOTH)

2:1 DDR MUXES

(INTERNAL MEM) (INTERNAL MEM)

(INTERNAL MEM) (INTERNAL MEM)

LCD Panel S-Video

DDR SDRAM DIMM 0

J3 (SHARE WITH LEFT USB)

SYSTEM BLOCK DIAGRAM

DDR SDRAM DIMM 1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE COMPUTER INC.

POWER SYSTEM ARCHITECTURE

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

TURNS ON OUTPUT @ 2.4V

MAP31 DDR I/O

HOLDS BOTH RUN/SS AT GND

TURNS CONTROL TO RUN/SS

12.8V CHARGES BACKUP BATTERY

TURNS ON AS LOW AS 0.8V/TYP 1.5V

INTERNAL ZENER CLAMP TO 6V

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL

1M & 0.1UF @14V, IT TAKES

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

24V IS OUTPUT ONLY FROM

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS

AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

WHEN ONLY BATTERY IS CONNECTED

POWER BLOCK DIAGRAM

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

APPLE COMPUTER INC.

THICKNESS : 1.2 MM / 0.047 IN