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Instructor: ChaoChao-Ching Ho
National Yunlin University of Science and Technology
Reference
Rizzoni
KVL
KCL
P =VI
VI =II2R
REQ R1 R2 RN
Rk
Vk
Vs
R1 R2 Rk RN
REQ
1
1 / R1 1 / R2 1 / RN
1 / Rk
Ik
Is
1 / R1 1 / R2 1 / Rk 1 / RN
Robotic Embedded System Lab 2012
()()
((Norton Equivalent
q
Circuit))
N
RN
N
RN
(doping)
N(-)
N(
)
P(+)
Robotic Embedded System Lab 2012
Covalent Bonding ( )
Covalent bonding is a bonding of two or more atoms by
the interaction of their valence electrons.
N-type
yp
P-type
yp
Wiley/Razavi/Fundamentals of Microelectronics
P
N()P
()()(Fig 9.5)
P-N
P
N
(drift) Is
;
(diffusion) Id
()
Fig 99.5
Fig.
5
Offset voltage:
g V
250C 0.6V
(barrier potential)
Depletion
p
zone to insulating
g state
At the junction, free electrons
f
from
the
th N-type
Nt
material
t i l fill
holes from the P-type material.
This creates an insulating
layer in the middle of the
diode called the depletion
p
zone.
How To g
get rid of the depletion
p
zone?
PN
+N - P
+P- N
(rectifier diode)
Wiley/Razavi/Fundamentals of Microelectronics
Fig.
g 9.9
id I d I 0 I 0 (e qv / kT 1)
D
Wiley/Razavi/Fundamentals of Microelectronics
(Zener Diode)
Open
(
(nA)
)
Robotic Embedded System Lab 2012
id I d I 0 I 0 (e qvD / kT 1)
Constant-voltage
g diode model.
R
Reverse
b
breakdown
kd
characteristic
h
t i ti
Wiley/Razavi/Fundamentals of Microelectronics
(breakdown)
1A (1A)
1N4001
(V)
50
1N40052
100
1N40054
200
1N4004
400
1N4005
600
1N4006
800
1N4007
1000
3A (3A)
1N5400
(V)
50
1N5401
100
1N5402
200
1N5403
400
1N5404
600
1N5407
800
1N5408
1000
(Ideal
(
Diode Model))
Fig. 9.11
Fig 9.12-14
VD0
iD=?
VD<0
(
)
1.
2.
3.
(ONOFF)
9.1 (
()
)
VD=?
Fig. 9.15
Fig 9.16
Fig.
9 16
Robotic Embedded System Lab 2012
9.1
VD
How=?
VD=?
Fig. 9.17
Q
Question:
if R2 is removed,, will the diode
conduct? If v =0
9.2 (
()
)
If v =0
VD=?
Fig. 9.18
Fig. 9.19
Q
Question:
decide D1 and D2 is conducting
g
or not?
1.
2.
3.
4.
v1=0 V, v2=0 V
v1=5 V,, v2=5 V
v1=0 V, v2=5 V
v1=55 V,
V v2=00 V
Neither
Both
D2 only
D1 only
Figure
g
9.22
(Offset
(
Diode Model))
=0.6VDC(Fig 9.23)
VD0.6
0 6
0
0.6V
6V
VD<0.6
9.4
()
(
)
Find minimum value of v1=?
V =0.6
0.6 V
V D1, D2?
Fig 9.30
datasheet
Fig.
g 9.30 Load line analysis
y & equivalent
q
circuit of a diode
vT iD RT vD
1
1
iD vD
vT i.e., y ax b
RT
RT
Robotic Embedded System Lab 2012
Ex 9.5
vD
rD
iD
(
(Conductance)
)
i D
1
rD v D
0.6V
9.6 (
qVD / kT
)
iD I 0 e
rD=?
iD I 0 e
qvD / kT
IQ I 0e
qvQ / kT
IQ
kT
50 103
vQ
0.025 ln(
) 0.731V
log e
14
q
I0
10
1 iD
rD vD
( IQ ,VQ )
I 0 (e qvD / kT )
vD
(I
Q ,VQ )
1 1014 0.731/0.025
e
2 S rD 0.5
rD 0.025
Robotic Embedded System Lab 2012
q qVQ / kT
I0
e
kT
9.6 (
qVD / kT
)
iD I 0 e
rD=?
1 iD
rD vD
( IQ ,VQ )
I 0 (e qvD / kT )
vD
(I
iD I 0 e qvD / kT I Q I 0 e
Q ,VQ )
q qVQ / kT
I0
e
kT
qvQ / kT
IQ
50 103
kT
vQ
llog e
0.025
0 025 ln(
l (
) 0.731
0 731V
14
q
I0
10
1 1014 0.731/0.025
e
2 S rD 0.5
rD 0.025
Robotic Embedded System Lab 2012
9.7
()
(
)
Find vL=?
vL vS 0.6V
RL
vS v
RS rD RL
vS 0.6V
9.7
Vs=0.6V
100
0.65A
DC()
()
DC
ACDC
(Fig 9.45)
(A)
(B)
(C)
(D)
(Half-Wave Rectifier)
9.7
AC
DC1/
vDC
vP T /2
1 T /2
2
vP sin(t )dt sin( t )dt
T 0
T 0
T
T /2
vP 1
2
1
cos(( t ) vP
T 2
T 0
T
Robotic Embedded System Lab 2012
Fig 9.39
Fig
g 9.39
Center-tap typeRobotic Embedded System Lab 2012 Bridge type
The Full
Full-Wave
Wave Bridge Rectifier
(Full-Wave Rectifier))
(
/2N2NN
(Isolation)
(Isolation)
DC
(Bridge
(
g Rectifier))
vDC
IC (Fig 9.419.42)
AC(Fig 9.43)DC
2/
2/
2v ppeak T /2
2 T /2
2
2
v peak sin(
i (t )dt
sin(
i ( t )dt v peak
0
0
T
T
T
Average
g & RMS values Fig.
g 4.19, pp
pp. 172
1
x(t )
T
'
x(t )dt
'
xrms
Fig.
g 9.41
Fig.
g 9.42
Vs>0
D1D3
Vs<0
D2D4
Robotic Embedded System Lab 2012
Fig.
g 9.43
Twice the Offset voltage
(
)()
9.8 ()
Find
1 Peakk current ipeak= ?
1.
2. Average current iaverage= ?
20V(rms)
50
i peak
v peak
RL
2vrms
RL
T /2
T
v
1
1
peak
i i (t )dt
sin(t )dt 0dt
T 0
T 0 RL
T /2
T /2
v peak cos((t )
v peak (1 1) v peak
2
TR
TR
9.9 ()
Find
1 Loadd resistance
1.
i
RL= ?
2. RMS source voltage Vrms= ?
50V
5A
Solution
RL
vL
iL
T /2
T
1
1
vL v peak sin((t )dt v peak sin((t )dt v peak sin((t )dt
T 0
T0
T /2
50V
T
T
0
T
T
9.9E
Prove
2 Nv peak
1 DC
1.
C output VL=
Fig 9.39
vL
T
T /2
T
1
1
N v peak sin(t ) dt N v peak sin(t )dt v peak sin(t )dt
T 0
T0
T /2
T
0
T /2
Vpeak= 2
Vrms 0.6 2
Two diodes, D1 , D4
v 0.6
0 6V
vZ 5V
VD 0.6V
0.6V
-5V<VD<0.6V
VD -5V
5V
5V
-5V
(Zener
(
Diode)
)
Zener Diode
iL
VZ
RL
iL iS iZ
iS
vS VZ
RS
be constrained
PZ iZVZ
RL ,min RL RL.max
()
( )
DC
(ripple voltage)
RC(Fig
9.44)
)
(fluctuation)
(Zener
Diode)
Diode)
( )
()
( )
()
(current sink)
(
)
()
()
()
()
()
9.10 ()
Find
1. ?
2 ?
2.
50
24V
12V
250
1. iz = is - iL
2 iz = is
2.
Robotic Embedded System Lab 2012
9.11 ()
Find RL,min RL,max ?
50 V
IL
R
RL,minIL
RL,maxIL
VZ 14 V , PZ 5 W
Rmin
Rmax
VZ
Is IZ
I Z 0
VZ
I s PZ / VZ
14
11.7
(50 14) / 30
PZ 5[W ]
14
16.6
(50 14) / 30 5 / 14
9.12 (
(
vripple RL)
50
14V+100mV
8V
10
v1
150
vs v1 v1 v1 vZ
RS
RL
rZ
14 v1 v1 v1 8
50
150 10
v1 8.53V
Robotic Embedded System Lab 2012
v2
vripple v2
RS
v2 v2
RL rZ
100mV v2 v2 v2
50
150 10
v2 15.8mV
v2
15 8
15.8
100mV 100
IC ((Voltage
g Regulator)
g
)
(Chap 12.3)
IC
(th
(three-terminal
t
i l voltage
lt
regulator)IC
l t ) IC
78xxxx
2V
IC78057V-35V
5V(0 2V)
5V(0.2V)
7805
1.
2.
3.
9V
10
1.
2.
3.
12V
5/12 42% 24V5/24 21%
5/12=42%24V5/24=21%
1Amp
IC
(Fig 9.54)
Vmax v L (t ) Vmax
Zener Limitingg
Zener diodes can used for limiting just as normal
diodes. Recall in previous chapter studies about
limiters. The difference to consider for a zener limiter
i its
is
it zener breakdown
b
kd
characteristics.
h
t i ti
()
()
RL
v L (t )
v S (t )
rS RL
Fig 9.58
Robotic Embedded System Lab 2012
=vmax
Fig 9.60
Diode Clampers
p (()
)
A diode clamper adds a DC level to an AC voltage. The
capacitor charges to the peak of the supply minus the diode
d
drop.
O
Once
charged,
h
d the
th capacitor
it acts
t like
lik a battery
b tt
in
i series
i
with the input voltage. The AC voltage will ride along with
the DC voltage. The polarity arrangement of the diode
determines whether the DC voltage is negative or positive.
Source voltage
Output voltage
(The
(
Diode Clamp)
p)
Fig 9.61
RC T
(Fig 9.62)
v out (t ) v S (t ) V peak
Source voltage
g
Clamp voltage
Fig
9.61DC(
)
v (t ) v (t ) (V
V )
out
peak
DC
v out (t ) v S (t ) V peak
Fig
Fi 9.63
9 63
DC
- +
9.13 ()
vS DC3 VvDC=?
Clamp voltage
(The
(
Diode Clamp)
p)
( g
(light-emitting
g diode,, LED)
)
1
1.
2.
3.
2V0.6V
How Light
g Emitting
g Diodes Work
p
photons
LED Advantages
g
LEDs5 V
9.14 ()
Find
1. PLED=?
2. RS=?
?
3. Ps=?
40mA
5V
1.7V
(Photo
(
Diode))
(photodiode)
n p
(solar
(solar cell)
cell)
pn
Optical
p
Diodes
The p
photodiode is used to vary
y current by
y the amount of
light that strikes it. It is placed in the circuit in reverse
bias. As with most diodes when in reverse bias, no current
flows when in reverse bias,
bias but when light strikes the
exposed junction through a tiny window, reverse current
increases proportional to light intensity.
General schematic
of a residential PV
system with battery
storage
Robotic Embedded System Lab 2012
Figure
g
9.70
iD
VD
I<0
v>0
LED Vr=2V
( p
(Opto-Coupler)
p )
+
(opto-isolator)
(galvanized isolation)
(!)
(!)
(Motor Driver)
Opto
Opto-isolators
isolators
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