ECE5325: Smart Sensor and Fuel Cell Laboratory #1

SIMPLORER Environments
Objectives: To become familiar with Simplorer environments. To conduct a mixed signal simulation

ffd1 sine1 comp1 realqty_bitsig1

Q=>BS
D Q Flip flop QB

ffd2
D Q Flip flop QB

ampl := 1 freq := 1.0k

thres := 0 val1 := 1 val2 := -1

thres := 0.0

Figure 1. Mixed signal circuit to be constructed and tested.

* All the components shown in Figure 1 are available in the Simplorer library.

I.

Invoke Simplorer, click on Create New Project, give the name of the project(enter the file name, dont need to enter the project title), and click OK. Then click Schematics on left panel. Gather all the circuits components: Sine source in basic_vhdlams>Tools>Time Functions>Sine Wave Comparator in basic_vhdlams>Blocks>Signal Processing Blocks>Comparator Real to Bit converter (Q=>BS) in Tools>Omnicasters>Quantity-Signal>Real-Bit Flip-flop ffd in Digital>Flip-flops>D-Flip flop>Basic D-Flip flop Ground [Schematic]Connect>GND. Interconnect the components as shown in Figure 1, using WIRE command in [Schematic]>Connect>Wire Double click component whose parameter need to be set Sine1: FREQ =1.0k AMPL=1 Comparator1: vthresh =0.0, val1=1, val2=-1 Realqty_bitsig1: thres=0.0

II.

III.

IV.

Make the parameters visible by selecting Output/Display property and setting the parameter Show property from No Display to Name:=Value. Position the component label and parameters as shown in Figure 1.

V.

Set the simulation parameters. [Schematic]Simulation>Parameters In the dialog box, determine the appropriate time for the following: Simulation End Time[s]- Tend : ? Minimum Time Steps [s] Hmin: ? Maximum Time Step [s] Hmax: ?

So that the following wave form are obtained:

1 0 -1
0 1m 2m 3m 4m 5m

sine1.val

6m t [s]

Sine1 output waveform Note: the scaling factor of 1. In Simplorer, the source polarity is opposite of the SPICE convention.

1.3 0 -0.5 -1.3 0 1m 2m 3m 4m 5m

comp1.val

6m t [s]

Comparator output waveform

1.2
0.4

ffd1.q

-0.2
0 1m 2m 3m 4m 5m 6m t [s]

FF1 output waveform

1.2 0.8
0.4

ffd2.q

-0.2
0 1m 2m 3m 4m 5m 6m t [s]
FF2 output waveform

Homework (Due next lab meeting)

1. Display and examine the VHDL-AMS code of the Comparator and FF. Explain why do you need the Real (QUANTITY) to bit (SIGNAL) converter.

2.

Display the code of the Q=>BS, to understand how the conversion is done.

REFERENCES

1. 2. 3.

Simulation System SIMPLORER VHDL-AMS Tutorial, English Edition, 2003 Ansoft Corporation. Simulation System SIMPLORER v.6.0 User Manual, English Edition, 1996-2002, Ansoft Corporation. Simulation System SIMPLORER 6.0 Getting Started, English Edition, 1996-2002, Ansoft Corporation.