EC-2-5EC7-1

EXPERIMENT NO.1
Object:- Op-Amp characteristics and get data for input bias current, measure the outputoffset voltage and reduce it to zero and calculate slew rate.

Apparatus Required:S.no 1. 2. 3. 4. 5. 6 Components Op-amp Dual trace supply Function Generator Resistors Capacitors CRO (0-30) MHz 1 Range IC 741 (0-30) V (0-1) MHz 1 1 1 Quantity

Theory:An operational amplifier or op-amp is a linear integrated circuit that has a very high voltage gain, high input impedance and low output impedance. Op-amp is basically a differential amplifier whose basic function is to amplify the difference between two input signals. Op-amp has five basic terminals, that is, two input terminals, one o/p terminal and two power supply terminals. Pin2 is called the inverting input terminal and it gives opposite polarity at the output if a signal is applied to it. It produces a phase shift of 180o between input and output. Pin3 is called the non-inverting terminal that amplifies the input signal without inversion, i.e., there is no phase shift or i/p is in phase with o/p. The op-amp usually amplifies the difference between the voltages applied to its two input terminals. Two further terminals pins 7 and 4 are provided for the connection of positive and negative power supply voltages respectively. Terminals 1 and 5 are used for dc offset. The pin 8 marked NC indicates No Connection.

Manual No

EC-2-1

Course Code Page No Prepared by Approved by

5EC7 Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)

Name

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Name

sign Date Rev No

Sign

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

Study of op-amp
Offset Null Inverting i/p Non Inverting i/p V-

1 2

8 7

N/C V+

IC 741
3 4 6
O/p

Offset Null

Block schematic of op-amp

V2 V1
-

Diff amp

Diff amp

Buffer & level translator

O/p driver

V0

Figure: - 1.1 Block diagram of Op. amp.

The block diagram of op-amp shows 2 difference amplifiers, a buffer for less loading, a level translator for adjusting operating point to original level and o/p stage. An ideal op-amp should have the following characteristics: 1. 2. 3. 4. 5. Infinite bandwidth infinite input resistance infinite open loop gain zero output resistance zero offset.

Op-amps have two operating configurations; open loop and closed loop. In open loop configuration, it can operate as a switch but gain is uncontrolled. In closed loop configuration, gain can controlled by feedback resistance Rf and input resistance Rin.

1.1 Parameters of OPAMP: Manual No EC-2-1 Course Code Page No Prepared by Approved by Name sign Date Rev No Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)
Name Sign

5EC7

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

The various important parameters of OPAMP are follows: 1.1.1 Input Offset Voltage: Input offset voltage is defined as the voltage that must be applied between the two input terminals of an OPAMP to null or zero the output figure 1.1, shows that two dc voltages are applied to input terminals to make the output zero. Vio = Vdc1 - Vdc2 Vdc1 and Vdc2 are dc voltages and RS represents the source resistance. Vio is the difference of Vdc1 and Vdc2. It may be positive or negative. For a 741C OPAMP the maximum value of Vio is 6mV. It means a voltage 6 mV is required to one of the input to reduce the output offset voltage to zero. The smaller the input offset voltage the better the differential amplifier, because its transistors are more closely matched. 1.1.2 Input offset Current: The input offset current Iio is the difference between the currents into inverting and noninverting terminals of a balanced amplifier. Iio = | IB1 - IB2 | The Iio for the 741C is 200nA maximum. As the matching between two input terminals is improved, the difference between IB1 and IB2 becomes smaller, i.e. the Iio value decreases further. For a precision OPAMP 741C, Iio is 6 nA 1.1.3 Input Bias Current: The input bias current IB is the average of the current entering the input terminals of a balanced amplifier i.e. IB = (IB1 + IB2 ) / 2 For 741C IB(max) = 700 nA and for precision 741C IB = 7 nA

Figure: - 1.1

1.1.4. Differential Input Resistance: (Ri) Ri is the equivalent resistance that can be measured at either the inverting or non-inverting Manual No EC-2-1 Course Code Page No Prepared by Approved by Name sign Date Rev No Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)
Name Sign

5EC7

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

input terminal with the other terminal grounded. For the 741C the input resistance is relatively high 2 M. For some OPAMP it may be up to 1000 G ohm. 1.1.5. Input Capacitance: (Ci) Ci is the equivalent capacitance that can be measured at either the inverting and non-inverting terminal with the other terminal connected to ground. A typical value of Ci is 1.4 pf for the 741C. 1.1.6. Offset Voltage Adjustment Range: 741 OPAMP have offset voltage null capability. Pins 1 and 5 are marked offset null for this purpose. It can be done by connecting 10 K ohm pot between 1 and 5 as shown in figure 21

Figure: - 1.2 Offset Voltage Adjustment

By varying the potentiometer, output offset voltage (with inputs grounded) can be reduced to zero volts. Thus the offset voltage adjustment range is the range through which the input offset voltage can be adjusted by varying 10 K pot. For the 741C the offset voltage adjustment range is 15 mV. 1.1.7. Input Voltage Range : Input voltage range is the range of a common mode input signal for which a differential amplifier remains linear. It is used to determine the degree of matching between the inverting and non-inverting input terminals. For the 741C, the range of the input common mode voltage is 13V maximum. This means that the common mode voltage applied at both input terminals can be as high as +13V or as low as 13V. 1.1.8. Common Mode Rejection Ratio (CMRR). CMRR is defined as the ratio of the differential voltage gain Ad to the common mode voltage gain ACM CMRR = Ad / ACM. For the 741C, CMRR is 90 dB typically. The higher the value of CMRR the better is the Manual No EC-2-1 Course Code Page No Prepared by Approved by Name sign Date Rev No Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)
Name Sign

5EC7

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

matching between two input terminals and the smaller is the output common mode voltage. 1.1.9. Supply voltage Rejection Ratio: (SVRR) SVRR is the ratio of the change in the input offset voltage to the corresponding change in power supply voltages. This is expressed in or in decibels, SVRR can be defined as SVRR io Where is the change in the input supply voltage and io is the corresponding change in the offset voltage. For the 741C, SVRR = 150 V / V. For 741C, SVRR is measured for both supply magnitudes increasing or decreasing simultaneously, with R3 10K. For same OPAMPS, SVRR is separately specified as positive SVRR and negative SVRR. 1.1.10. Large Signal Voltage Gain: Since the OPAMP amplifies difference voltage between two input terminals, the voltage gain of the amplifier is defined as

Because output signal amplitude is much larger than the input signal the voltage gain is commonly called large signal voltage gain. For 741C is voltage gain is 200,000 typically. 1.1.11. Output voltage Swing: The ac output compliance PP is the maximum unclipped peak to peak output voltage that an OPAMP can produce. Since the quiescent output is ideally zero, the ac output voltage can swing positive or negative. This also indicates the values of positive and negative saturation voltages of the OPAMP. The output voltage never exceeds these limits for a given supply voltages +VCC and ?VEE. For a 741C it is 13 V. 1.1.12. Output Resistance: (RO) RO is the equivalent resistance that can be measured between the output terminal of the OPAMP and the ground. It is 75 ohm for the 741C OPAMP. 1.1.13. Output Short circuit Current : In some applications, an OPAMP may drive a load resistance that is approximately zero. Even its output impedance is 75 ohm but cannot supply large currents. Since OPAMP is low power device and so its output current is limited. The 741C can supply a maximum short circuit output current of only 25mA.

1.1.14. Supply Current : IS is the current drawn by the OPAMP from the supply. For the 741C OPAMP the supply current is 2.8 m A. Manual No EC-2-1 Course Code Page No Prepared by Approved by Name sign Date Rev No Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)
Name Sign

5EC7

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

Design:
Vin = Vout [Unity Gain] & Rin = & Rf = 0

Circuit Diagram
+12V U1 6 IC 741 Vo

2 3 I1

4
1V/1KHz -12V

Figure: - 1.3 slew rate measurement Circuit

Result: We have successfully Op-Amp characteristics and get data for input bias current,
measure the output-offset voltage and reduce it to zero and calculate slew rate.

Viva Question
1. What is Slew Rate? 2. What is the golden rule of op-amps? 3. Is the golden rule always true? 4. How can the op-amp make its inputs equal, if it can only change its output? 5. What are parameters for op-amp? 6. Why do op-amps have a DC offset voltage? 7. How does a designer minimize the effects of the DC offset voltage? 8. Why do op-amps have a (input) bias current and (input) offset current? 9. How does a designer minimize the effects of the bias currents? 10. How does a designer minimize the effects of the offset currents? 11. How do the :A741, TL081 and TLE2037 op-amps compare with respect to DC offset characteristics? 12. How would a designer choose which op-amp to use for a particular DC signal application? What is the reference voltage for the comparator in the given circuit? Manual No EC-2-1 Course Code Page No Prepared by Approved by Name sign Date Rev No Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)
Name Sign

5EC7

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Date

Vivekananda Institute of Technology, Jaipur

EC-2-5EC7-1

Figure: - 1.4 13. Which kind of input makes the summing amplifier circuit possible? 14. What is the formula for power gain when input gain & output gain?
15. Explain pin diagram of Opm 741- IC.

Manual No

EC-2-1

Course Code Page No Prepared by Approved by

5EC7 Kratika sharma Lecturer (ECE) Sanjiv Kumar HOD (ECE)

Name

Experiment No No of Pages

1 7
09-01-2013

09-01-2013

Name

sign Date Rev No

Sign

Date

Vivekananda Institute of Technology, Jaipur