VCC

U5
W4
W5
W6
W7

14
13
12
11

D0
D1
D2
D3

7
1
2
9
10
15

CLK

Li
Rcs

U6
IW8
IW9
IW10
IW11

3
4
5
6

Q0
Q1
Q2
Q3

W0
W1
W2
W3

CLK
OE1
OE2
E1
E2
MR

14
13
12
11
7
1
2
9
10
15

CLK

Li
Rcs

74HC173
Instruction Register

RN1

D0
D1
D2
D3

IW4
IW5
IW6
IW7

3
4
5
6

Q0
Q1
Q2
Q3

1
2
3
4
5
6
7
8

W0
W1
W2
W3
W4
W5
W6
W7

CLK
OE1
OE2
E1
E2
MR

16
15
14
13
12
11
10
9
10k

74HC173
Instruction Register
VCC

U9:C

U9:D

10

CLR

RN2

13
8

11

NOP

Rcs

12
74HC00

1
2
3
4
5
6
7
8

W8
W9
W10
W11
W12
W13
W14
W15

74HC00
Rcs

16
15
14
13
12
11
10
9
10k

U8
4
3
2
1
15
14
13
12

FLpos
FLneg
FLz
FLnz
FLcy
FLncy
FLkp
FLnkp

11
10
9
7

J0
J1
J2

U7

D0
D1
D2
D3
D4
D5
D6
D7

3
4
5
6

CLK

A
B
C
OE

Ejm

7
10
2
9
1

VCC

U9:A

D0
D1
D2
D3

Rcs

14
13
12
11
15

Q0
Q1
Q2
Q3
RCO

IW0
IW1
IW2
IW3

ENP
ENT
CLK
LOAD
MR

74HC00

74HC161
Controller/Sequencer

74HC251
Flag Select

U10
IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

10
9
8
7
6
5
4
3
25
24
21
23
2
20
22
27
1

VCC

U11

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

J0
J1
J2
Ejm
Lpc
Epl
Eph
Li

CE
OE
PGM
VPP

10
9
8
7
6
5
4
3
25
24
21
23
2
20
22
27
1

VCC

VCC

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

Lsz
S0u
S1u
S2u
S3u
Mu
Eu
Lu

CE
OE
PGM
VPP

10
9
8
7
6
5
4
3
25
24
21
23
2
20
22
27
1

VCC

D0
D1
D2
D3

7
10
2
9
1

VCC
Cpc
CLK
Lpc
CLR

W4
W5
W6
W7

ENP
ENT
CLK
LOAD
MR

3
4
5
6
7
10
2
9
1

CLK
Lpc
CLR

74HC161
Program Counter - Low

2
3
4
5
6
7
8
9

CE
OE
PGM
VPP

14
13
12
11
15

Q0
Q1
Q2
Q3
RCO

C4
C5
C6
C7

ENP
ENT
CLK
LOAD
MR

3
4
5
6

Ewt
Swt

7
10
2
9
1

CLK
Lpc
CLR

14
13
12
11
15

Q0
Q1
Q2
Q3
RCO

C8
C9
C10
C11

3
4
5
6

W0
W1
W2
W3
W4
W5
W6
W7

2
3
4
5
6
7
8
9

CLK
Lpc
CLR

A0
A1
A2
A3
A4
A5
A6
A7

19
1

Epl

14
13
12
11
15

Q0
Q1
Q2
Q3
RCO

C12
C13
C14
C15

ENP
ENT
CLK
LOAD
MR
74HC161
Program Counter - High

18
17
16
15
14
13
12
11

B0
B1
B2
B3
B4
B5
B6
B7

C0
C1
C2
C3
C4
C5
C6
C7

CE
AB/BA
74HC245
Program Counter - Low

U23
W8
W9
W10
W11
W12
W13
W14
W15

18
17
16
15
14
13
12
11

B0
B1
B2
B3
B4
B5
B6
B7

11
18

D0
D7

1
19
12
2
3
9

Ltd
CLK
Etd
CLR

8
17
7
13
6
14
5
15
4
16

Q0
Q7
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7

S0
S1
CLK
OE1
OE2
MR

W8
W9
W10
W11
W12
W13
W14
W15

74HC299
Temporary Data Register

74HC245
W-Bus Transceiver

U24
W8
W9
W10
W11
W12
W13
W14
W15

U35:A

2
3
4
5
6
7
8
9

1
11
1

3
2
74HC08

U25

D0
D1
D2
D3
D4
D5
D6
D7

19
18
17
16
15
14
13
12

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14
ADR15

W0
W1
W2
W3
W4
W5
W6
W7

2
3
4
5
6
7
8
9

74HC574
Memory Address Register

ADR0
ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14

U39:A

10
9
8
7
6
5
4
3
25
24
21
23
2
26
1

1
3

20
27
22

2
Erm

74HC00

19
18
17
16
15
14
13
12

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

ADR0
ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7

CLK
OE
74HC574
Memory Address Register

U28

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

W0
W1
W2
W3
W4
W5
W6
W7

ADR0
ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ADR8
ADR9
ADR10
ADR11
ADR12
ADR13
ADR14

CE
WE
OE

10
9
8
7
6
5
4
3
25
24
21
23
2
26
27

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14

20
22
1

ADR15
Erm

62256
Memory - High

U39:B

D0
D1
D2
D3
D4
D5
D6
D7

11
1

CLK
OE

U27

ADR15

D0
D1
D2
D3

7
10
2
9
1

74HC161
Program Counter - High

CE
AB/BA

Lmr

Eio
Lio
Sio
CS0

CE
OE
PGM
VPP

W12
W13
W14
W15

ENP
ENT
CLK
LOAD
MR

74HC161
Program Counter - Low

C8
C9
C10
C11
C12
C13
C14
C15

18
17
16
15
14
13
12
11

B0
B1
B2
B3
B4
B5
B6
B7

A0
A1
A2
A3
A4
A5
A6
A7

CLK

HLT
NOP

U19

D0
D1
D2
D3

U22

19
1

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

27C64
Control ROM 6

W8
W9
W10
W11

CE
AB/BA

2
3
4
5
6
7
8
9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

20
22
27
1

VCC

74HC245
Program Counter - High

W0
W1
W2
W3
W4
W5
W6
W7

10
9
8
7
6
5
4
3
25
24
21
23
2

U21

A0
A1
A2
A3
A4
A5
A6
A7

19
1

Eph

IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

CS1
CS2
Rfk
Rcy
Scy
Ccy
Ncy
Lcy

U20
W8
W9
W10
W11
W12
W13
W14
W15

CE
OE
PGM
VPP

U18

D0
D1
D2
D3

Ltu
Ec
Lc
Eb
Lb
Ea
Asr
Asl

U15
11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

U17
C0
C1
C2
C3

14
13
12
11
15

Q0
Q1
Q2
Q3
RCO

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

27C64
Control ROM 3

27C64
Control ROM 5

U16
3
4
5
6

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

20
22
27
1

VCC

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

27C64
Control ROM 4

W0
W1
W2
W3

10
9
8
7
6
5
4
3
25
24
21
23
2

U14

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

20
22
27
1

IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

Erm
Lrm
Lmr
Etd
Ltd
Swt
Ewt
Cpc

27C64
Control ROM 2

U13
10
9
8
7
6
5
4
3
25
24
21
23
2

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

CE
OE
PGM
VPP

27C64
Control ROM 1

IW0
IW1
IW2
IW3
IW4
IW5
IW6
IW7
IW8
IW9
IW10
IW11

U12

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

11
12
13
15
16
17
18
19

D0
D1
D2
D3
D4
D5
D6
D7

W0
W1
W2
W3
W4
W5
W6
W7

CE
OE
VPP
27C256
Memory - Low

CLK

6
5

Lrm

74HC00

U30
11
18

CYin

1
19
12
2
3
9

Asl
Asr
CLK
Ea
CLR

U31

D0
D7

8
17
7
13
6
14
5
15
4
16

Q0
Q7
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7

S0
S1
CLK
OE1
OE2
MR

11
18

Q0ac
Q7ac

W0
W1
W2
W3
W4
W5
W6
W7

1
19
12
2
3
9

Lb
CLK
Eb
CLR

U32

D0
D7
S0
S1
CLK
OE1
OE2
MR

74HC299
Accumulator

8
17
7
13
6
14
5
15
4
16

Q0
Q7
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7

11
18
W0
W1
W2
W3
W4
W5
W6
W7

D0
D7

1
19
12
2
3
9

Lc
CLK
Ec
CLR

74HC299
B Register

S0
S1
CLK
OE1
OE2
MR

U35:B

2
3
4
5
6
7
8
9

CLK

11
1

6
5

Ltu

74HC08

19
18
17
16
15
14
13
12

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

UB0
UB1
UB2
UB3
UB4
UB5
UB6
UB7

UB0 1
UB1 22
UB2 20
UB3 18

U38:A
CYin
Ncy

1
CYaluin

U35:C

CLK
OE

8
10

Lu

6
5
4
3
8

S0u
S1u
S2u
S3u
Mu

74HC86

2
3
4
5
6
7
8
9

D0
D1
D2
D3
D4
D5
D6
D7

Eu

LuCLK 11
1

74HC08

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

19
18
17
16
15
14
13
12

W0
W1
W2
W3
W4
W5
W6
W7

CLK
OE
74HC574
ALU Output Register

U37

A0
A1
A2
A3

F0
F1
F2
F3

B0
B1
B2
B3

A=B
CN+4
G
P

9
10
11
13

UF0
UF1
UF2
UF3

W4
W5
W6
W7

14
16
17
15

2
23
21
19

UB4 1
UB5 22
UB6 20
UB7 18

U26:A
1

CN

UF0
UF1
UF2
UF3
UF4
UF5
UF6
UF7

CLK

U36
2
23
21
19

W0
W1
W2
W3
W4
W5
W6
W7

U34

D0
D1
D2
D3
D4
D5
D6
D7

74HC574
Temporary ALU Register

W0
W1
W2
W3

8
17
7
13
6
14
5
15
4
16

74HC299
C Register

U33
W0
W1
W2
W3
W4
W5
W6
W7

Q0
Q7
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7

6
5
4
3
8

S0u
S1u
S2u
S3u
Mu

74HC08

B0
B1
B2
B3

A=B
CN+4
G
P

9
10
11
13

UF4
UF5
UF6
UF7

U38:B

14
16
17
15

4
6

CYout

Ncy

74HC86

S0
S1
S2
S3
M

NOTE: This AND gate corrects for a weird

bug in the 74HC181 model when in subtract
mode. Without it the results are not correct
when there is a borrow between the upper
and lower 4 bits of the numbers being
subtracted.

74HC181
Arithmetic Logic Unit

F0
F1
F2
F3

CN

S0
S1
S2
S3
M

A0
A1
A2
A3

74HC181
Arithmetic Logic Unit

74HC08

12

9
10
11
12

11

D0
D1
D2
D3
D4
D5
D6
D7

11
10
9
7

Asl
Asr
Ccy

U43:A

CLR

U44:A

A
B
C
OE

CLK

IO0

19
1

18
17
16
15
14
13
12
11

IP00
IP01
IP02
IP03
IP04
IP05
IP06
IP07

74HC08

W0
W1
W2
W3
W4
W5
W6
W7

CE
AB/BA

2
3
4
5
6
7
8
9
19
1

IO1

74HC245
Input Port 0

U51

A0
A1
A2
A3
A4
A5
A6
A7

18
17
16
15
14
13
12
11

B0
B1
B2
B3
B4
B5
B6
B7

IP10
IP11
IP12
IP13
IP14
IP15
IP16
IP17

W0
W1
W2
W3
W4
W5
W6
W7

CE
AB/BA

2
3
4
5
6
7
8
9
11
1

IO2

74HC245
Input Port 1

U26:B

2
3
4
5
6
7
8
9

CLK

SioCLK

Sio

11
1

74HC08

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

19
18
17
16
15
14
13
12

OP20
OP21
OP22
OP23
OP24
OP25
OP26
OP27

W0
W1
W2
W3
W4
W5
W6
W7

CLK
OE

IO3

2
3
4
5
6
7
8
9

19
18
17
16
15
14
13
12

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

1
2
3

6
4
5

FLncy

74HC74
Carry Flag
Register

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

19
18
17
16
15
14
13
12

OP30
OP31
OP32
OP33
OP34
OP35
OP36
OP37

CLK
OE
74HC574
Output Port 3

U54:C

A
B
C

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

E1
E2
E3

15
14
13
12
11
10
9
7

10
8
IO2
IO3

IO0

74HC00

U54:D
13
11

74HC238
I/O Port Selector

CLK
OE

D0
D1
D2
D3
D4
D5
D6
D7

11
1

U55

D0
D1
D2
D3
D4
D5
D6
D7

FLcy

U52

D0
D1
D2
D3
D4
D5
D6
D7

74HC574
Output Port 2

U53
W0
W1
W2
W3
W4
W5
W6
W7

CLK

Lcy

U29
B0
B1
B2
B3
B4
B5
B6
B7

FLnz

Scy

U49
A0
A1
A2
A3
A4
A5
A6
A7

74HC74
Sign/Zero
Flag Register

Rcy

2
3
4
5
6
7
8
9

FLz

74HC251
Carry Output Selector

W0
W1
W2
W3
W4
W5
W6
W7

CLK

U42
4
3
2
1
15
14
13
12

VCC

74HC4078

CYout
Q7ac
Q0ac

U41:B

U40

13
UF4
UF5
UF6
UF7

FLpos

74HC74
Sign/Zero
Flag Register

2
3
4
5

13

UF0
UF1
UF2
UF3

FLneg

A
B
C
OE
74HC251
Carry Input Selector

FLncy

CLK

13

Lsz

CYin

11

10

UF7

12

CLK

CLR

11
10
9
7

CS0
CS1
CS2

U41:A

VCC

D0
D1
D2
D3
D4
D5
D6
D7

FLcy
Q0ac
Q7ac

U35:D

U56
4
3
2
1
15
14
13
12

VCC

12

IO1

74HC00

74HC574
I/O Port Selector

U54:A
U54:B
4

CLK

Eio

Lio

74HC00
74HC00

U45
KY8
KY9
KY10
KY11
KY12
KY13
KY14
KY15
VCC

10
11
12
13
1
2
3
4
5

D0
D1
D2
D3
D4
D5
D6
D7

U48
Q0
Q1
Q2
EO
GS

9
7
6
15
14

1
3

K0

K1

K2

2
4
5
9

EI
4532

IP00
IP01
IP02
IP03

2
3
4
5
6
7
8
9
11
1

10

D0
D1
D2
D3
D4
D5
D6
D7

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

19
18
17
16
15
14
13
12

IP00
IP01
IP02
IP03
IP04
IP05
IP06
IP07

CLK
OE
74HC574
Keypad Input Register

K3

U46

12
11

14

Kp

13
74HC32

EI
4532
Hex Keypad Input

1
2
3
4
5
6
7
8

RN4
16
15
14
13
12
11
10
9

10k

U50:A
Q

12
11

CLK
Q

74HC74

Rfk

RN3
KY0
KY1
KY2
KY3
KY4
KY5
KY6
KY7

10

4
2

KY8
KY9
KY10
KY11
KY12
KY13
KY14
KY15

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10
9
10k

Note: Jumper to left = 2 keypresses to

set keypress flag (to input 1 byte at
a time) Jumper to right = 1 keypress to
set keypress flag (input 1 nibble at a time)

U50:B

GS

15

U47:D

EO

VCC

9
7
6

Q0
Q1
Q2

FLkp

CLK

13

D0
D1
D2
D3
D4
D5
D6
D7

10
11
12
13
1
2
3
4

KY0
KY1
KY2
KY3
KY4
KY5
KY6
KY7

74HC74

FLnkp