STV9556

7.5 NS TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER

FEATURES
s s s s

s s

s s s s s

Triple-channel video amplifier Supply voltage up to 115 V 80V Output dynamic range Perfect for PICTURE BOOST application requiring high video amplitude Pinning for easy PCB layout Supports DC coupling (optimum cost saving) and AC coupling applications. Built-in Voltage Gain: 20 (Typ.) Rise and Fall Times: 7.5 ns (Typ.) Bandwidth: 50 MHz (Typ.) Very low stand-by power consumption Perfectly matched with the STV921x preamplifiers

above is required, ensuring a maximum quality of the still pictures or moving video. Perfecly matched with the STV921x ST preamplifiers, it provides a highly performant and very cost effective video system.

DESCRIPTION
The STV9556 is a triple-channel video amplifier designed in a 120V-high voltage technology and able to drive in DC-coupling mode the 3 cathodes of a CRT monitor. The STV9556 supports PICTURE BOOST applications where video amplitude up to 50V or

CLIPWATT 11 (Plastic Package) ORDER CODE: STV9556

PIN CONNECTIONS
11 10 9 8 7 6 5 4 3 2 1 OUT1 OUT2 OUT3 GNDP VDD GNDS GNDA IN3 VCC IN2 IN1

Version 4.1
September 2003 1/24

Table of Contents
1 2 3 4 5 6 BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.1 6.2 7 8 9 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 TYPICAL PERFORMANCE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 INTERNAL SCHEMATICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

10 APPLICATION HINTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 10.1 How to choose the high supply voltage value (VDD) in DC coupling mode . . . . . . . . . . 12 10.2 Arcing Protection: schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 10.3 Arcing protection: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 10.4 Video response optimization: schematics in DC-coupling mode . . . . . . . . . . . . . . . . . . . 14 10.5 Video response optimization: outputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.6 Video response optimization: inputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.7 Video response optimization: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 10.8 AC - Coupling mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10.9 Stand-by mode, spot suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10.10 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 11 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

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STV9556

BLOCK DIAGRAM

OUT1 GNDP 11 8

OUT2 10

OUT3 9

STV9556
VDD VDD 7 GNDP VDD GNDP

VCC 3

VREF 6 GNDS 1 5 2 IN2 4 IN3

IN1 GNDA

PIN DESCRIPTION
Pin 1 2 3 4 5 6 7 8 9 10 11 Name IN1 IN2 VCC IN3 GNDA GNDS VDD GNDP OUT3 OUT2 OUT1 Video Input (channel 1) Video Input (channel 2) Low Supply Voltage Video Input (channel 3) Ground Analog Ground Substrat High Supply Voltage Ground Power Video output (channel 3) Video output (channel 2) VIdeo output (channel 1) Function

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ABSOLUTE MAXIMUM RATINGS

Symbol VDD VCC VESD IOD IOG VIN Max VIN Min TJ TSTG High supply voltage Low supply voltage ESD susceptibility Human Body Model (100pF discharged through 1.5K) EIAJ norm (200pF discharged through 0) Output source current (pulsed < 50s) Output sink current (pulsed < 50s) Maximum Input Voltage Minimum Input Voltage Junction Temperature Storage Temperature Parameter Value 120 16.5 2 300 80 80 VCC + 0.3 - 0.5 150 -20 + 150 Unit V V kV V mA mA V V C C

THERMAL DATA
Symbol Rth (j-c) Rth (j-a) Parameter Junction-Case Thermal Resistance (Max.) Junction-Ambient Thermal Resistance (Typ.) Value 3 35 Unit C/W C/W

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STV9556

ELECTRICAL CHARACTERISTICS
Symbol VDD VCC IDD IDDS ICC VOUT dVOUT/dVDD dVOUT/dT dVOUT/dT RIN VSATH VSATL G LE VREF Parameter High supply voltage Low supply voltage VDD supply current VDD stand-by supply current VCC supply current DC output voltage High voltage supply rejection Output voltage drift versus temperature Output voltage matching versus temperature (Note 2) Video input resistor Output saturation voltage to supply Output saturation voltage to GND Video Gain Linearity error Internal voltage reference VOUT = 50V VCC : switched off (<1.5V) VOUT: low (Note 1) VOUT = 50V VIN = 1.90 V VOUT = 50V VOUT = 80V VOUT = 80V VOUT = 50V I0 =-60mA (Note 3) I0 =60mA (Note 3) VOUT = 50V 17 V<VOUT<VDD-15 V 77 Test Conditions Min. 20 10 Typ 110 12 25 60 60 80 0.5 15 1 2
VDD - 6.5

Max 115 15

Unit V V mA A mA

SUPPLY parameters (VCC = 12V, VDD = 110V, Tamb = 25 C, unless otherwise specified)

STATIC parameters (VCC = 12V, VDD = 110V, Tamb = 25 C) 83 V % mV/C mV/C k V V 8 % V

11 20 3 5.6

Note 1: The STV9556 goes into stand-by mode when Vcc is switched off (<1.5V). In stand-by mode, Vout is set to low level. Note 2: Matching measured between each channel. Note 3: Pulsed current width < 50s

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STV9556 ELECTRICAL CHARACTERISTICS (continued)

Symbol tR tF OSR OSF G BW tSET CTL CTH tPB OSPB Rise time Fall time

Parameter

Test Conditions VDC=50V, V=40VPP VDC=50V, V=40VPP

Min.

Typ 7.2 8.2 5 0

Max

Unit ns ns % %

DYNAMIC parameters (see Figure 1)

Overshoot, white to black transition Overshoot, black to white transition Low frequency gain matching (Note 4) Bandwidth at -3dB 2.5% Settling time Low frequency crosstalk High frequency crosstalk Rise/fall time VDC = 50V, f=1MHz VDC=50V, V=20VPP VDC=50V, V=40VPP VDC=50V, V=20VPP f = 1 MHz VDC=50V, V=20VPP f = 20MHz VDC=50V, V=60VPP

5 50 15 50 32 10 9

% MHz ns dB dB ns %

DYNAMIC parameter in PICTURE BOOST condition (Note 5) Overshoot white to black or black to white VDC=50V, V=60VPP transition

Note 4: Matching measured between each channel. Note 5: PICTURE BOOST condition (video amplitude at 50V or above) is used in some applications when displaying still picture or moving video. In this condition the high level of contrast improves the pictures quality at the expense of the video performances (tR, tF and Overshoot) which are slightly deteriorated.

Figure 1. AC test circuit

12V VCC 50
1

110V VDD VDC OUT RP = 200

11 8

IN VREF

CL=8pF GNDP

STV9556

GNDA

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STV9556

6
6.1

THEORY OF OPERATION
General

The STV9556 is a three-channel video amplifier supplied by a low supply voltage: VCC (typ.12V) and a high supply voltage: VDD (up to 115V). The high values of VDD supplying the amplifier output stage allow direct control of the CRT cathodes (DC coupling mode). In DC coupling mode, the application schematic is very simple and only a few external components are needed to drive the cathodes. In particular, there is no need of the DC-restore circuitry which is used in classical AC coupling applications. The output voltage range is wide enough (Figure 2) to provide simultaneously : Cut-off adjustment (typ. 25V) Video contrast (typ. up to 40V), Brightness (with the remaining voltage range). In normal operation, the output video signal must remain inside the linear region whatever the cut-off, brightness and contrast adjustments are. Figure 2. Output signal, level adjustments
VDD 15V (A) Top Non-Linear Region (B) Cut-off Adjust. (25V Typ.) (C) Brightness Adjust. (10V Typ.) Linear region Blanking pulse (D) Contrast Adjust. (40V Typ.) Video Signal

17V GND

(E) Bottom Non-Linear Region

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STV9556
6.2 Output voltage

A very simplified schematic of each STV9556 channel is shown in Figure 3. The feedback network of each channel is integrated with a typical built-in voltage gain of G=20 (40k/2k). The output voltage VOUT is given by the following formula: VOUT = (G+1) x VREF - (G x VIN) for G = 20 and VREF = 5.6V, we have VOUT = 117.6 - 20 x VIN Figure 3. Simplified schematic of one channel
VDD 40k 2k IN VREF

OUT

GNDA

GNDP

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STV9556

POWER DISSIPATION
PTOT = PSTAT + PDYN.

The total power dissipation is the sum of the static DC and the dynamic dissipation: The static DC power dissipation is approximately: PSTAT = VDD x IDD + VCC x ICC The dynamic dissipation is, in the worst case (1 pixel On/ 1 pixel Off pattern): PDYN = 3 VDD x CL x VOUT(PP) x f x K (see Note 6) where f is the video frequency and K the ratio between the active line and the total horizontal line duration. Example: for VDD = 110V, VCC = 12V, IDD = 25mA, ICC = 60mA, VOUT = 40 VPP, f = 40MHz, CL = 8pF and K = 0.72. We have: PSTAT = 3.47W and PDYN = 3.04W Therefore: PTOT = 6.51W.
Note 6: This worst thermal case must only be considered for TJmax calculation. Nevertheless, during the average life of the circuit, the conditions are closer to the white picture conditions.

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TYPICAL PERFORMANCE CHARACTERISTICS

VDD=110V, VCC=12V, CL=8pF, RP=200, V=40VPP, unless otherwise specified - see Figure 1 Figure 4. STV9556 pulse response
7.2 overshoot = 5%

Figure 5. V OUT versus VIN

120 100 80 Vout (V) 60 40 20

8.2 overshoot = 0%

0 0 1 2 3 Vin (V) 4 5 6

Figure 6. Power dissipation vs frequency

8.00 7.00 Power dissipation (W) 6.00 Vdd=100 4.00 3.00 2.00 1.00 0.00 10 20 30 Frequency (MHz) (72% active time) 40 50 Vdd=110V

Figure 7. Speed versus temperature

9 Tf

Speed (ns)

5.00 Vdd=90

8.5

7.5

Tr

7 50 60 70 80 Case Temperature (C) 90 100

Figure 8. Speed versus offset

STV9556 Speed vs Offset (Vdc) 10 9 Speed (ns)

Figure 9. Speed versus load capacitance

13 12 11 Speed (ns) 10 Tf 9 Tr 8

8 Tf 7 Tr 6 40 45 50 55 Offset (Vdc) 60 65 70

7 6 8 10 12 14 Load capacitor (pF) 16 18 20

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STV9556

INTERNAL SCHEMATICS
Figure 11. RGB outputs
VDD VCC

Figure 10. RGB inputs

OUT IN pins 1, 2, 4 pins 9, 10, 11

GNDS GNDS

Figure 12. VDD

VDD

Figure 13. VCC

VCC

GNDS

GNDS

Figure 14. GNDP

Figure 15. GNDA

GNDA GNDP GNDS GNDS

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STV9556

10 APPLICATION HINTS
10.1 How to choose the high supply voltage value (VDD) in DC coupling mode The VDD high supply voltage must be chosen carefully. It must be high enough to provide the necessary video adjustment but set to minimum value to avoid unecessary power dissipation. Example (see Figure 2): The following example shows how the optimum VDD voltage value is determined: Cut-off adjustment range (B) : 25V Max contrast (D) : 40V Case 1: 10V Brightness (C) adjusted by the preamplifier : VDD = A + B + C + D + E VDD = 15V + 25V + 10V + 40V + 17V = 107V Case 2: 10V Brightness (C) adjusted by the G1 anode: VDD = A + B + D + E VDD = 15V + 25V + 40V + 17V = 97V 10.2 Arcing Protection: schematics As the amplifier outputs are connected to the CRT cathodes, special attention must be given to protect them against possible arcing inside the CRT. Protection must be considered when starting the design of the video CRT board. It should always be implemented before starting to adjust the dynamic video response of the system. The arcing network that we recommend (see Figure 16) provides efficient protection without deteriorating the amplifier video performances. The total resistance between the amplifier and the CRT cathode (R10+R11) protects the device against overvoltages. We recommend to use R10+R11 > 200 . Spark gaps are strongly recommended for arcing protection.

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STV9556
Figure 16. Arcing protection network (one channel)
VDD R19(**) C12(*) 100nF/250V VDD 33-40 D12 FDH400 OUT R10 110/0.5W C29(***) 0.22F GNDP R29(***) 1-10 L1 0.33H D13 FDH400 R11 110/0.5W F1 Spark gap 200V C24 4.7F/150V C18 100nF

CRT

STV9556

GNDS GNDA

(*): To be connected as close as possible to the device (**): R19 must be mandatorily used (***): Ground separation network

10.3 Arcing protection: layout and decoupling Several layout precautions have to be considered to get the optimum arcing protection: Sparkgap grounding: when an arc occurs, the energy must flow through the CRT ground without reaching the amplifier. This is obtained by connecting the sparkgap grounding (point B) to the CRT ground (socket) via a wide/short trace. Conversely the point B must be connected to the amplifier ground via a longer/narrower trace. Grounding separation: In order to set apart the amplifer ground and CRT ground, the R29/C29 network (Figure 16) can be used. Amplifier grounding: The 3 grounds GNDS, GNDA and GNDP must be connected together as close as possible to the device.

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STV9556
10.4 Video response optimization: schematics in DC-coupling mode The dynamic video response is optimized by carefully designing the supply decoupling of the video board (see Section 10.7), the tracks (see Section 10.7), then by adjusting the input/output component network (see Section 10.5). For dynamic measurements such as rise/fall time and bandwidth, a 8pF load is used (total load including the parasitic capacitance of the PC board and CRT Socket). When used in kit with the STV921x preamplifier from ST, the preamplifier bandwidth register (BW, register 13) must be set to minimum (o dec) for an application with t R/tF>5.5ns. Figure 17. Video response optimization for one channel - DC coupling application
C11 4.7F Reference Input Network #1 C1 1.5nF C10(*) 100nF VCC C12(*) 100nF R19(***) VDD 33-40 C24 4.7F VDD

STV9556
IN

STV921x

OUT R1(**) 51 C2 10pF

+ VREF

GNDS

OUT R10

L1

R11

CRT

110 0.33H 110

GNDA

GNDP

Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13) must be set to minimum value (0 dec) (*): To be connected as close as possible to the device (**): R1 must be not be higher than 100 (***): R19 must be mandatorily used 2 other Input Networks (Network #2 and #3 below) can be used in replacement of the reference Input Network #1. See Application note AN1510 for complete description. Input Network #2 L1 0.33H IN R1 82 C2 10pF R1 33 C2 15pF IN Input Network #3

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STV9556
10.5 Video response optimization: outputs networks The output network (R10/L1/R11) is used to adjust the amplifier video performances. Once R10 and R11 resistors are set to protect the application against arcing (R10 + R11>200), it is possible to increase the bandwidth by increasing L1. 10.6 Video response optimization: inputs networks The input network also plays an important role in the device dynamic behaviour. We recommend to use the reference input network #1, which is described in Figure 17, but 2 other networks (#2 and #3) can be used to better match the required performances and the video board layout. Refer to the application note referenced AN1510 for the complete description of these input networks. 10.7 Video response optimization: layout and decoupling The decoupling of VCC and VDD through good quality HF capacitors (respectively C10 and C12) close to the device is necessary to improve the dynamic performance of the video signal. Careful attention has to be given to the three output channels of the amplifier. Capacitor: The parasitic capacitive load on the amplifier outputs must be as small as possible. Figure 9 from Section 8 clearly shows the deterioration of the tR/tF when the capacitive load increases. Reducing this capacitive load is achieved by moving away the output tracks from the other tracks (especially ground) and by using thin tracks (<0.5mm), see Figure 17. Cross talk: Output and input tracks must be set apart. The STV9556 pin-out allows the easy separation of input and output tracks on opposite sides of the amplifier (see Figure 21). Length: Connection between amplifier output and cathode must be as short and direct as possible.

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STV9556
10.8 AC - Coupling mode The STV9556 can be used in AC-Coupling mode in kit with the TDA9207/9212 preamplifier from ST. As for the DC-coupling mode, the STV9556 drives perfectly the video signal in PICTURE BOOST conditions. A typical schematic is given on the Figure 18 below. Figure 18. Video response optimization for one channel - AC coupling application
C11 4.7F Reference Input Network #1 (****) C1 1.5nF OUT IN R1(**) 51 C2 10pF + VREF GNDS Vrestore Cut-off GNDA GNDP C10(*) 100nF VCC C12(*) 100nF R19(***) VDD 33-40 C24 4.7F VDD

STV9556
OUT

C
R10 L1 C1 1 F R11 110 CRT

TDA9207

110 0.33H

DC Restore circuitry Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13) must be set to minimum value (0 dec) (*): To be connected as close as possible to the device (**): R1 must be not be higher than 100 (***): R19 must be mandatorily used (****): Input Networks #2 and #3 can be used as well

The advantage of such an architecture is to use smaller VDD and therefore to have smaller power consumption. This is due to the fact that the STV9556 provides only the video signal and not the cut-off adjustment. The disadvantage is to have an application with more components (DC restore circuitry). Note that it is mandatory to keep the output video signal (point C) inside the linear area of the amplifier (from 17V to VDD - 15V).

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10.9 Stand-by mode, spot suppression The usual way to set a monitor in stand-by mode is to switch-off the Vcc (12V). The STV9556 has an extremely low power consumption (I DDS = 60A when VCC<1.5V) in stand-by mode and the outputs are set to low level (white picture). To avoid the display of a spot effect during the switch-off phase, it is necessary to adjust the G1 circuitry (Resistors Rx and Cx, see Figure 19) to pull the G1 voltage to low value for a long enough period of time. Figure 19. Stand-by mode, spot effect

+80V

Cathode 0V -30V G1 -120V EHT (27kV) Case #1: Low Rx.Cx A spot might appear during the switch-off phase Case #2: High Rx.Cx No spot effect

Typical G1 generator circuitry R1 Cx -120V Rx -30V G1

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10.10 Conclusion Video response is always a compromise between several parameters. For example, the rise/fall time improvement leads to the overshoot deterioration. The recommended way to optimize the video response is: 1 To set R10+R11 for arcing protection (min. 200 ) 2. To adjust R20 and R10+R11. Increasing their value increases the tR/tF values and decrease the overshoot 3. To adjust L1 Increasing L1 speeds up the device but increases the overshoot. 4. To adjust the input network for the final dynamic tunning (e.g.: critical damping) We recommend our customers to use the schematic shown on Figure 23 as a starting point for the video board and then to apply the optimization they need.

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STV9556
Figure 20. STV9556/9555/9553 + TDA9210/STV9211 + STV9936S/P DC-coupling demonstration board: Silk Screen and Trace

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STV9556

Figure 21. Outputs trace (from figure 19)

Figure 22. CRT socket trace (from figure 19)

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HS C1 110V R29 39 8V 12V 10nF/250V 4.7F/160V 110V 7 D2 FDH400 11 110/0.25W FDH400 D7 U2

C24

R1 100

BLK ABL R4 2.7 U1 C8 C7 100nF 3 BLK Vcc Vdd HS/CLP C31 1.5nF R9 1 In1 D10 110V 0.33H 110/0.25W F2 200V R R15 GK F4 200V G B Out1
C23

R25 100 100pF C26 100pF R11 2.7 47F/25V C10 C18

5V

D1 R2 15 C3 100nF 1 IN1 ABL IN2 VCCP 17 C33 1.5nF 10pF R13 51 2 In2 110/0.25W 110V D9
C25 10pF

Blue 5V D4 1N4148 C4 100nF 3 OUT1 18 RK CRT small neck C9 100nF 4 GNDL C6 100nF 5 IN3 STV9556 Out2 0.33H 110/0.25W D12 FDH400 10 R14 FDH400 L2 6 GNDA GNDP C36 1.5nF R17 51 5V R19 2.7k 4 In3 110/0.25W D13 FDH400 GNDA GNDS GNDP Out3 9 R22 FDH400 L3 R23 OUT3 SDA SCL SCL 5 6 8 C13 100pF J10 110V J7 C21 10nF/250V optional G1 R27 150/0.25W D11 1N4004 12V 8V 110V J16 C16 47F/25V C15 BLK 3.3V R37 51 ABL C27 47F/25V 3V0 ZD1 C27 47F/25V 47F/25V RadAB20 5V 1 2 3 HS1 C20 4.7nF/1kV R31 GND C14 100nF SDA C12 100pF I2C R28 0 5V Heater FBLK R47 100 11 R40 100 R21 2.7k 12 13 14 VCCA OSD1 OSD2 OSD3 TDA9210 L4 1H 3.3V 1 2 3 4
10pF

1N4148 20 19 51 R6 R7 L1 2

D3

J1

R3 75

1N4148

Green D5 R8 15 1N4148 R12 15 OUT2 16 C5 100nF 15 C22 100nF R16 2.7 7 8 R46 5.6k C35 10nF 9 R45 15k 10

1 2 3 4 5 6

R5 75

5V

D6

video

Red

1N4148

R10 75

D8

1N4148

SDA

R38 100

U3

BK F1 200V

SDA

AVSS

16

0.33H 110/0.25W

9 H2

5 G1

7 G2 10 H1

1 GND

VS R43 1M C2 C37 100F/25V 100nF R36 330 R32 330 R33 330 R34 330 J17 G1 HEATER VS HS HFLY Power 7 6 5 4 3 2 1 Sync 1 2 3 4 5 6 7 8

R35 100

VS

VCO

14

Vco R44 5.6k C34 10nF

HFLY R41 100

4 HFLY

AVDD 13

AVdd

4.7nF/2kV C19 F3 1.5

3.3V

L5 1H

DVDD FBLK

12

C28 100nF

DVSS BOUT

11

C32

TEST GOUT

10

30/0.5W

100F/25V

8 OVDD ROUT 9

STV9936S/P

J8 G2

STMicroelectronics Monitor Business Unit - Video application CMG - Imaging and Display Division (IDD) 12, rue Jules Horowitz - B.P. 217 38019 Grenoble cedex - FRANCE

EVALCRT52/STV955x demoboard (AB25)

Version 1.4
Wednesday October 3, 2001

12 GND

SCL

R39 100

SCL

RP

15

Rp

Figure 23.STV9556/55/53 + STV9936S/P + TDA9210/STV9211 DC-coupling demo-board schematic

Rev. C

STV9556

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STV9556

11 PACKAGE MECHANICAL DATA

11 PIN - CLIPWATT

V1 A C V2 V1 V1 L3 V1 L2 L1
V

H3 H2 H1

Shaded area ewposed from plastic body Typical 30 m

R2 R R1

R3 D R3 R3 B LEAD#1 M1 M G G1 F

F1

Dimensions A B C D E F F1 G G1 H1 H2 H3 L L1 L2 L3 M M1 R

Millimeters Min. 2.95 0.95 1.3 0.49 0.78 1.6 16.9 18.55 19.9 17.7 14.35 10.9 5.4 2.34 2.34 1.45 Typ. 3 1 0.15 1.5 0.515 0.8 0.05 1.7 17 12 18.6 20 17.9 14.55 11 5.5 2.54 2.54 Max. 3.05 1.05 1.7 0.55 0.86 0.1 1.8 17.1 18.65 20.1 18.1 14.65 11.1 5.6 2.74 2.74 Min. 0.116 0.037 0.051 0.0.019 0.03 0.063 0.665 0.73 0.783 0.696 0.564 0.429 0.212 0.092 0.092 0.057

Inches Typ. 0.118 0.039 0.006 0.059 0.02 0.031 0.002 0.067 0.669 0.472 0.732 0.787 0.704 0.572 0.433 0.216 0.1 0.1 Max. 0.12 0.041 0.061 0.021 0.034 0.004 (6) 0.071 0.673 0.734 0.791 (5) 0.712 0.576 0.437(5) 0.22 0.107 0.107 -

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STV9556
Millimeters Min. 3.2 0.65 Typ. 3.3 0.3 0.5 0.7 10deg. 5deg. 75deg. Max. 3.4 0.75 Min. 0.126 0.025 Inches Typ. 0.13 0.012 0.019 0.027 10deg. 5deg. 75deg. Max. 0.134 0.029

Dimensions R1 R2 R3 S V V1 V2

Note 5: H3 and L2 do not include mold flash or protrusions Mold flash or protrusions shall not exceed 0.15mm per side. Note 6: No intrusions allowed inwards the leads

Critical dimensions: Lead split (M1) Total length (L)

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