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CSE 490/590

Spring 2013

Homework #2 Solutions


Problem #5

In the 1970`s, memory was limited. Hence, programs had to be smaller to Iit into memory. The
use oI CISC allowed programs to be smaller and still perIorm the same amount oI work as larger
program on a RISC machine.


Problem #6






Problem #7















Problem #8
15 . 2
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CPI Overall
CPI Overall
Cvcles F CPI Overall
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Iaster is re architectu Newer
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Count n Instructio Let
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IC
IC
CPI IC
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Speedup
CPI
CPI
Multiplv Shift Integer Branch Load Store
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CPI IC
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Speedup
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CPI
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Problem #10


Problem #11

For 8, 16, and 32 processors, the speedups are 3.902, 4.923, and 5.664 respectively. As N
increases, the returns are diminishing. Hence, 4 processors might be a reasonable number to use.

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ns IC
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CPI ExecTime
ns IC
IC
CPI ExecTime
CPI
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Multiplv Shift Integer Branch Load Store
CPI CPI
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Problem #15




times 5.83 than more no by increased is machine RISC on the IC when the is point breakeven the Hence,
83 . 5 ICR ICR, Ior olving : IC Breakeven
125
3 1000
50
7 000 1
: IC Breakeven
CPI IC ICR CPI IC
: IC Breakeven
24 by decreased is machine RISC on the CPI when the is point breakeven the Hence,
1.76 CPIR CPIR, Ior olving : CPI Breakeven
125
7 C 300 3
50
7 000 1
: CPI Breakeven
CPI IC CPI IC
: CPI Breakeven
41 by increased is machine RISC on the Irequency clock when the is point breakeven the Hence,
1.41 FR FR, Ior olving : Frequency Breakeven
50
3 300 3
50
7 000 1
: Frequency Breakeven
CPI IC CPI IC
: Frequency Breakeven
77 . 1
2 . 79
140
Speedup
2 . 79
10 125
3 3300 CPI IC
Time Execution
140
10 50
7 1000 CPI IC
Time Execution
CPI IC
Time Execution
t Improvemen e PerIormanc Total
RISC CISC CISC CISC
CISC RISC CISC CISC
RISC RISC CISC CISC
6
RISC
6
CISC
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RISC CISC
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Problem #16

The MIPS perIormance metric does not take into account instruction count. Hence, it is a poor
measure oI perIormance since various instructions on diIIerent processors may perIorm diIIerent
amounts oI work. For example, a CISC machine which executes Iewer instructions in a program
is likely to have a lower MIPS rating than a RISC machine running the same program in the
same amount oI time. The RISC machine will have a higher rating, but the perIormance oI the
two machines is identical.

MIPS is a useIul metric when comparing the perIormance oI two processors which are running
the same program (in terms oI machine language) iI the two processors implement the same
instruction set. Note that it doesn`t account Ior other important Iactors, such as memory system
perIormance, which play a critical role in system perIormance.


Problem #17

MFLOPS is a poor measure oI perIormance since it does not capture any oI the three Iactors in
the iron law oI processor perIormance. Floating point instructions makeup a subset oI an
architecture's instruction set. Furthermore, diIIerent implementations have diIIerent variants oI
Iloating point instructions, some which do more work than others. This is similar to what is
encountered when evaluating the MIPS perIormance metric.

The MFLOPS perIormance metric may be useIul when comparing the perIormance oI programs
that require a similar number and type oI Iloating point instructions. All in all, though, the
MFLOPS perIormance metric oIIers very limited value.


Problem #19
Deep Pipeline


Problem #21
Branch Prediction


Problem #22
Execution Time


Problem #27
Pipelined Processor

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