74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

January 2008

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Features
Non-inverting buffers Bidirectional data path A outputs sink 24mA B outputs sink 64mA

General Description
The 74F245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for busoriented applications. Current sinking capability is 24mA at the A Ports and 64mA at the B Ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active HIGH) enables data from A Ports to B Ports; Receive (active LOW) enables data from B Ports to A Ports. The Output Enable input, when HIGH, disables both A and B Ports by placing them in a High Z condition.

Ordering Information
Order Number
74F245SC 74F245SJ 74F245MSA 74F245MTC 74F245PC

Package Number
M20B M20D MSA20 MTC20 N20A

Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard.

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

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74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Connection Diagram

Logic Symbols

IEEE/IEC

Truth Table
Inputs OE
L L H

T/R
L H X

Output
Bus B Data to Bus A Bus A Data to Bus B High Z State

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Unit Loading/Fan Out

Pin Names
OE T/R A0A7 B0B7

Description
Output Enable Input (Active LOW) Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs

U.L. HIGH/LOW
1.0/2.0 1.0/2.0 3.5/1.083 150/40 (38.3) 3.5/1.083 600/106.6 (80)

Input IIH/IIL Output IOH/IOL

20A/1.2mA 20A/1.2mA 70 A/0.65mA 3 mA/24mA (20mA) 70A/0.65mA 12mA/64mA (48mA)

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

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74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.

Symbol
TSTG TA TJ VCC VI II Storage Temperature

Parameter
Ambient Temperature Under Bias Junction Temperature Under Bias VCC Pin Potential to Ground Pin Input Voltage(1) Input Current(1) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max.) ESD Last Passing Voltage (Min.)

Rating
65C to +150C 55C to +125C 55C to +150C 0.5V to +7.0V 0.5V to +7.0V 30mA to +5.0mA 0.5V to VCC 0.5V to +5.5V twice the rated IOL (mA) 4000V

Note: 1. Either voltage limit or current limit is sufficient to protect inputs.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.

Symbol
TA VCC Free Air Ambient Temperature Supply Voltage

Parameter

Rating
0C to +70C +4.5V to +5.5V

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

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74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

DC Electrical Characteristics
Symbol
VIH VIL VCD VOH

Parameter
Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 10% VCC 10% VCC 5% VCC

VCC

Conditions
Recognized as a HIGH Signal Recognized as a LOW Signal

Min.
2.0

Typ.

Max.

Units
V

0.8 1.2 2.4 2.0 2.7 0.5 0.55 5.0 7.0 0.5 50 4.75 3.75 1.2 70 650 60 100 70 95 85 150 225 500 90 120 110

V V V

Min. Min.

IIN = 18mA IOH = 3mA (An) IOH = 15mA (Bn) IOH = 3mA (An)

VOL IIH IBVI IBVIT ICEX VID IOD IIL IIL + IOZL IOS IZZ ICCH ICCL ICCZ

Output LOW Voltage Input HIGH Current

10% VCC 10% VCC

Min. Max. Max. Max. Max. 0.0 0.0 Max. Max. Max. Max. 0.0V Max. Max. Max.

IOL = 24mA (An) IOL = 64mA (Bn) VIN = 2.7V VIN = 7.0V (OE, T/R) VIN = 5.5V (An, Bn) VOUT = VCC (An, Bn) IID = 1.9A, All Other Pins Grounded VIOD = 150mV, All Other Pins Grounded VIN = 0.5V (T/R, OE) VOUT = 2.7V (An, Bn) VOUT = 0.5V (An, Bn) VOUT = 0V (An) VOUT = 0V (Bn) VOUT = 5.25V(An, Bn) VO = HIGH VO = LOW VO = HIGH Z

V A A mA A V A mA A A mA A mA mA mA

Input HIGH Current Breakdown Test Input HIGH Current Breakdown (I/O) Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current

IIH + IOZH Output Leakage Current

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

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74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

AC Electrical Characteristics
TA = +25C, VCC = +5.0V, CL = 50pF Symbol
tPLH, tPHL tPZH, tPZL tPHZ, tPLZ

TA = 55C to +125C, TA = 0C to +70C, CL = 50pF CL = 50pF Min.

2.0 2.0 2.5 3.0 2.0 2.0

Parameter
Propagation Delay, An to Bn or Bn to An Output Enable Time Output Disable Time

Min.
2.5 2.5 3.0 3.5 2.0 2.0

Typ.
4.2 4.2 5.3 6.0 5.0 5.0

Max.
6.0 6.0 7.0 8.0 6.5 6.5

Max.
7.5 7.5 9.0 10.0 9.0 10.0

Min.
2.0 2.0 2.5 3.0 2.0 2.0

Max.
7.0 7.0 8.0 9.0 7.5 7.5

Units
ns ns ns

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 5

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions
13.00 12.60 11.43
20 B 11 A

9.50 10.65 7.60 10.00 7.40 2.25

1 PIN ONE INDICATOR

0.51 0.35
0.25
M

10

1.27
C B A

1.27

0.65

LAND PATTERN RECOMMENDATION

2.65 MAX

SEE DETAIL A

0.33 0.20
0.10 C SEATING PLANE

0.75 0.25 (R0.10) (R0.10)

8 0

X 45

0.30 0.10

NOTES: UNLESS OTHERWISE SPECIFIED

GAGE PLANE

0.25 1.27 0.40 (1.40)

A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 E) LANDPATTERN STANDARD: SOIC127P1030X265-20L F) DRAWING FILENAME: MKT-M20BREV3

SEATING PLANE

DETAIL A
SCALE: 2:1

Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 6

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions (Continued)

Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 7

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions (Continued)

Figure 3. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 8

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions (Continued)

Figure 4. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 9

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

Physical Dimensions (Continued)

26.92 24.89

PIN #1

7.11 6.09

(0.97)

1.78 1.14

7 TYP

3.43 3.17 5.33 MAX

7 TYP

7.87

2.54 0.36 0.56

.001[.025] C

3.55 3.17 0.38 MIN

7.62 10.92 MAX 0.20 0.35

NOTES:

Figure 5. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specications do not expand the terms of Fairchilds worldwide terms and conditions, specically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/

1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 10

74F245 Octal Bidirectional Transceiver with 3-STATE Outputs

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Rev. I32

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1988 Fairchild Semiconductor Corporation 74F245 Rev. 1.4.0

www.fairchildsemi.com 11