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AE2406 AVIONICS LAB VII SEM AERONAUTICAL ENGINEERING

PREPARED BYMr.M.MAGESH

AE2405 AVIONICS LAB VII Seme !er Aer"


Lab Manual and Study Guide:
License Communications, Avionics, Radar Technology for FCC

Avionics for Aviators:

Lab Manual

Study Guide

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CYCLE I - (0(5 MICROPROCESSORS 1. Addition and Subtraction of 8-bit and 16-bit numbers. 2. Sorting of Data in Ascending & Descending order. 3. Sum of a given series with and without carry. . !reatest in a given series & "u#ti-byte addition in $%D mode. &. 'nterface (rogramming with digit ) segment Dis(#ay & Switches & *+D,s. 6. 16 %hanne# Ana#og to Digita# %onverter & !eneration of -am(. S/uare. 0riangu#ar wave by Digita# to Ana#og %onverter. CYCLE II - DIGITAL ELECTRONICS ). Addition1Subtraction of binary numbers. 8. "u#ti(#e2er1Demu#ti(#e2er %ircuits. 3. +ncoder1Decoder %ircuits. 14. 0imer %ircuits. Shift -egisters. $inary %om(arator %ircuits. CYCLE III - AVIONICS DATA BUSES 11. Study of Different Avionics Data $uses. 12. "'*-Std 5 1&&3 Data $uses %onfiguration with "essage transfer. 13. "'*-Std 5 1&&3 -emote 0ermina# %onfiguration.

). INTRODUCTION TO (0(5
'60+* 848& is one of the most (o(u#ar 8-bit micro(rocessor ca(ab#e of addressing 6 7$ of memory and its architecture is sim(#e. 0he device has 4 (ins. re/uires 8& 9 (ower su((#y and can o(erate with 3":; sing#e (hase c#oc<.

ALU *Ar+!,me!+- L".+- U/+!01 0he 848&A has a sim(#e 8-bit A*= and it wor<s in coordination with the accumu#ator. tem(orary registers. & f#ags and arithmetic and #ogic circuits. A*= has the ca(abi#ity of (erforming severa# mathematica# and #ogica# o(erations. 0he tem(orary registers are used to ho#d the data during an arithmetic and #ogic o(eration. 0he resu#t is stored in the accumu#ator and the f#ags are set or reset according to the resu#t of the o(eration. 0he f#ags are affected by the arithmetic and #ogic o(eration. 0hey are as fo##ows> Sign f#ag After the e2ecution of the arithmetic - #ogic o(eration if the bit D) of the resu#t is 1. the sign f#ag is set. 0his f#ag is used with signed numbers. 'f it is 1. it is a negative number and if it is 4. it is a (ositive number. ?ero f#ag 0he ;ero f#ag is set if the A*= o(eration resu#ts in ;ero. 0his f#ag is modified by the resu#t in the accumu#ator as we## as in other registers. Au2i##ary carry f#ag 'n an arithmetic o(eration when a carry is generated by digit D3 and (assed on to D . the au2i##ary f#ag is set. @arity f#ag After arithmetic 5 #ogic o(eration. if the resu#t has an even number of 1,s the f#ag is set. 'f it has odd number of 1,s it is reset. %arry f#ag 'f an arithmetic o(eration resu#ts in a carry. the carry f#ag is set. 0he carry f#ag a#so serves as a borrow f#ag for subtraction. T+m+/. %/2 -"/!r"$ '/+! 0his unit synchroni;es a## the micro(rocessor o(eration with a c#oc< and generates the contro# signa#s necessary for communication between the

micro(rocessor and (eri(hera#s. 0he contro# signa#s -D AreadB and C- AwriteB indicate the avai#abi#ity of data on the data bus. I/ !r'-!+"/ re.+ !er %/2 2e-"2er 0he instruction register and decoder are (art of the A*=. Chen an instruction is fetched from memory it is #oaded in the instruction register. 0he decoder decodes the instruction and estab#ishes the se/uence of events to fo##ow. Re.+ !er %rr%# 0he 848& has si2 genera# (ur(ose registers to store 8-bit data during (rogram e2ecution. 0hese registers are identified as $. %. D. +. : and *. they can be combined as $%. D+ and :* to (erform 16-bit o(eration. A--'m'$%!"r Accumu#ator is an 8-bit register that is (art of the A*=. 0his register is used to store 8-bit data and to (erform arithmetic and #ogic o(eration. 0he resu#t of an o(eration is stored in the accumu#ator. Pr".r%m -"'/!er 0he (rogram counter is a 16-bit register used to (oint to the memory address of the ne2t instruction to be e2ecuted. S!%-3 4"+/!er 't is a 16-bit register which (oints to the memory #ocation in -1C memory. ca##ed the Stac<.

C"mm'/+-%!+"/ $+/e 848& micro(rocessor (erforms data transfer o(erations using three communication #ines ca##ed buses. 0hey are address bus. data bus and contro# bus.

Address bus 5 it is a grou( of 16-bit #ines genera##y identified as A4 5 A1&. 0he address bus is unidirectiona# i.e.. the bits f#ow in one direction from micro(rocessor to the (eri(hera# devices. 't is ca(ab#e of addressing 2 16 memory #ocations.

Data bus 5 it is a grou( of 8 #ines used for data f#ow and it is bidirectiona#. 0he data ranges from 44 5 DD. %ontro# bus 5 it consist of various sing#e #ines that carry synchroni;ing signa#s. 0he micro(rocessor uses such signa#s for timing (ur(ose.

2*A0. ( BIT DATA ADDITION


AIM1 0o add two 8 bit numbers stored at consecutive memory #ocations.

&

ALGORITHM1 1. 2. 3. . 'nitia#i;e memory (ointer to data #ocation. !et the first number from memory in accumu#ator. !et the second number and add it to the accumu#ator. Store the answer at another memory #ocation.

RESULT1

S0A-0

0hus the 8 bit numbers stored at &44 & &41 are added and the resu#t stored at &42 & &43. E%F 44:

E:*F

&44:

EAF

E"F

E:*FE:*F81

EAFEAF8E"F

's there a %arry H

E%FE%F81

E:*FE:*F81

5LO6 CHART1

E"F

EAF

E:*FE:*F81

E"F

E%F

6
S0G@

6G I+S

PROGRAM1 ADDRESS OPCODE LABEL 144 S0A-0 141 142 MNEMONICS OPERAND "9' %. 44 *J' :. &44 COMMENT %#ear % reg. 'nitia#i;e :* reg. to

143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 OBSERVATION1 '6@=0 &44 &41 &42 &43 *1

&44 "G9 '6J ADD K6% A. " : " *1 0ransfer first data to accumu#ator 'ncrement :* reg. to (oint ne2t memory *ocation. Add first number to acc. %ontent. Kum( to #ocation if resu#t does not yie#d carry. 'ncrement % reg. 'ncrement :* reg. to (oint ne2t memory *ocation. 0ransfer the resu#t from acc. to memory. 'ncrement :* reg. to (oint ne2t memory *ocation. "ove carry to memory Sto( the (rogram

'6'6J "G9 '6J "G9 :*0

% : ". A : ". %

G=0@=0

2*B0. ( BIT DATA SUBTRACTION


AIM1

0o Subtract two 8 bit numbers stored at consecutive memory #ocations. ALGORITHM1 1. 2. 3. . 'nitia#i;e memory (ointer to data #ocation. S0A-0 !et the first number from memory in accumu#ator. !et the second number and subtract from the accumu#ator. 'f the resu#t yie#ds a borrow. the content of the acc. is com(#emented and 41: is added to it A2,s com(#ementB. A register E%F 44: is c#eared and the content of that reg. is incremented in case there is a borrow. 'f there is no borrow the content of the acc. is direct#y ta<en as the resu#t. &. Store the answer at ne2t memory E:*F #ocation. &44: RESULT1

EAF

E"F

0hus the 8 bit numbers stored at &44 & &41 are subtracted and the resu#t stored at &42 & &43. E:*FE:*F81

EAFEAF-E"F

's there a $orrow H %om(#ement EAF Add 41: to EAF E%FE%F81

E:*FE:*F81

5LO6 CHART1

E"F

EAF

E:*FE:*F81

E"F

E%F

3
S0G@

6G

I+S

PROGRAM1 ADDRESS OPCODE LABEL 144 S0A-0 142 142 MNEMONICS OPERAND "9' %. 44 *J' :. &44 COMMENT %#ear % reg. 'nitia#i;e :* reg. to 14

143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 111 112 113 OBSERVATION1 '6@=0 &44 &41 &42 &43

&44 "G9 '6J S=$ K6% A. " : " *1 0ransfer first data to accumu#ator 'ncrement :* reg. to (oint ne2t mem. *ocation. Subtract first number from acc. %ontent. Kum( to #ocation if resu#t does not yie#d borrow. 'ncrement % reg. %om(#ement the Acc. content Add 41: to content of acc. 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer the resu#t from acc. to memory. 'ncrement :* reg. to (oint ne2t mem. *ocation. "ove carry to mem. Sto( the (rogram

'6%"A AD' *1 '6J "G9 '6J "G9 :*0

% 41: : ". A : ". %

G=0@=0

11

7*A0. ( BIT DATA MULTIPLICATION


AIM1 0o mu#ti(#y two 8 bit numbers stored at consecutive memory #ocations and store the resu#t in memory. ALGORITHM1 LOGIC1 "u#ti(#ication can be done by re(eated addition. 1. 2. 3. . &. 6. ). 8. 'nitia#i;e memory (ointer to data #ocation. "ove mu#ti(#icand to a register. "ove the mu#ti(#ier to another register. %#ear the accumu#ator. Add mu#ti(#icand to accumu#ator Decrement mu#ti(#ier -e(eat ste( & ti## mu#ti(#ier comes to ;ero. 0he resu#t. which is in the accumu#ator. is stored in a memory #ocation.

RESULT1 0hus the 8-bit mu#ti(#ication was done in 848&( using re(eated addition method.

12

5LO6 CHART1
S0A-0

E:*F &44 $ " E:*F E:*F81

A 44

% 44 EAF EAF 8E"F

's there any carry I+S % %81 $ $-1

6G

6G

'S $L4 I+S A

13

A
E:*FE:*F81

E"F

EAF

E:*FE:*F81

E"F

E%F

S0G@

PROGRAM1 ADDRESS OPCODE LABEL 144 S0A-0 141 142 143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 111 112 113 11 11& 116 OBSERVATION1 '6@=0 &44 &41 &42 &43 1& G=0@=0 *1 MNEMONICS *J' "G9 '6J "9' "9' ADD K6% OPERAND :. &44 $. " : A. 44: %. 44: " 6+J0 COMMENT 'nitia#i;e :* reg. to &44 0ransfer first data to reg. $ 'ncrement :* reg. to (oint ne2t mem. *ocation. %#ear the acc. %#ear % reg for carry Add mu#ti(#icand mu#ti(#ier times. Kum( to 6+J0 if there is no carry 'ncrement % reg Decrement $ reg Kum( to *1 if $ is not ;ero. 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer the resu#t from acc. to memory. 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer the resu#t from % reg. to memory. Sto( the (rogram

6+J0

'6D%K6? '6J "G9 '6J "G9 :*0

% $ *1 : ". A : ". %

7*B0. ( BIT DIVISION


AIM1 0o divide two 8-bit numbers and store the resu#t in memory. ALGORITHM1 LOGIC1 Division is done using the method -e(eated subtraction. 1. *oad Divisor and Dividend 2. Subtract divisor from dividend 3. %ount the number of times of subtraction which e/ua#s the /uotient . Sto( subtraction when the dividend is #ess than the divisor .0he dividend now becomes the remainder. Gtherwise go to ste( 2. &. sto( the (rogram e2ecution. RESULT1 0hus an A*@ was written for 8-bit division using re(eated subtraction method and e2ecuted using 848& ( <its

16

5LO6CHART1
S0A-0

$ 44 E:*F &44 A " E:*F E:*F81 " A-"

E$F E$F 81 6G

'S AM4 I+S A A8 "

$ $-1

E:*FE:*F81

E"F

EAF

E:*FE:*F81

E"F

E$F

S0G@

1)

PROGRAM1 ADDRESS 144 141 142 143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 111 112 OBSERVATION1 S.NO 1 2 ADD-+SS &44 &41 &44 &41 INPUT DA0A OUTPUT DA0A *GG@ OPCODE LABEL MNEMO NICS "9' *J' "G9 '6J S=$ '6K6% ADD D%'6J "G9 '6J "G9 :*0 OPERA ND $.44 :. &44 A." : " $ *GG@ " $ : ".A : ".$ COMMENTS %#ear $ reg for /uotient 'nitia#i;e :* reg. to &44: 0ransfer dividend to acc. 'ncrement :* reg. to (oint ne2t mem. *ocation. Subtract divisor from dividend 'ncrement $ reg Kum( to *GG@ if resu#t does not yie#d borrow Add divisor to acc. Decrement $ reg 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer the remainder from acc. to memory. 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer the /uotient from $ reg. to memory. Sto( the (rogram

ADD-+SS &42 &43 &42 &43

18

4*A0. )6 BIT DATA ADDITION


AIM1 0o add two 16-bit numbers stored at consecutive memory #ocations. ALGORITHM1 1. 2. 3. . 'nitia#i;e memory (ointer to data #ocation. !et the first number from memory and store in -egister (air. !et the second number in memory and add it to the -egister (air. Store the sum & carry in se(arate memory #ocations.

RESULT1 0hus an A*@ (rogram for 16-bit addition was written and e2ecuted in 848&( using s(ecia# instructions.

13

5LO6 CHART1
S0A-0

E*F E:F ED+F

E 4&4 :F E 4&1 :F E:*F

E*F E:F

E 4&2:F E 4&3:F

EAF44:

E:*FE:*F8ED+F

's there a %arryH

6G

I+S
EAFEAF81

E 4& FE *F

E 4&&F E:F

E 4&6F

EAF

S0G@

24

PROGRAM1 ADDRESS OPCODE LABEL 444 S0A-0 441 442 443 44 44& 446 44) 448 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 *GG@ MNEMONICS OPERAND *:*D 4&4: J%:! *:*D "9' DAD K6% '6S:*D S0A :*0 COMMENT *oad the augend in D+ (air through :* (air.

4&2: A. 44: D *GG@ A 4& : 4&6:

*oad the addend in :* (air. 'nitia#i;e reg. A for carry Add the contents of :* @air with that of D+ (air. 'f there is no carry. go to the instruction #abe#ed *GG@. Gtherwise increment reg. A Store the content of :* @air in 4& :A*S$ of sumB Store the carry in 4&6: through Acc. A"S$ of sumB. Sto( the (rogram.

OBSERVATION1 '6@=0 DA0A G=0@=0 DA0A

ADD-+SS 4&4: 4&1: 4&2: 4&3:

ADD-+SS 4& : 4&&: 4&6:

21

4*B0. )6 BIT DATA SUBTRACTION


AIM1 0o subtract two 16-bit numbers stored at consecutive memory #ocations. ALGORITHM1 1. 2. 3. . &. RESULT1 0hus an A*@ (rogram for subtracting two 16-bit numbers was written and e2ecuted. 'nitia#i;e memory (ointer to data #ocation. !et the subtrahend from memory and transfer it to register (air. !et the minuend from memory and store it in another register (air. Subtract subtrahend from minuend. Store the difference and borrow in different memory #ocations.

22

5LO6 CHART1
S0A-0

E*F E:F ED+F

E 4&4 :F E 4&1 :F E:*F

E*F E:F

E 4&2:F E 4&3:F

E:*FE:*F-ED+F

's there a borrowH

6G

I+S
E%FE%F81

E 4& FE *F

E 4&&F E:F

E 4&6F

E%F

S0G@

23

PROGRAM1 ADDRESS OPCODE LABEL 444 441 442 443 44 44& 446 44) 448 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 41& 416 41) 418 413 41A OBSERVATION1 ADD-+SS 4&4: 4&1: 4&2: 4&3: S0A-0

MNEMO NICS "9' *:*D J%:! *:*D "G9 S=$ "G9 "G9 S$$ "G9 S:*D K6% '6"G9 S0A :*0

OPER COMMENTS AND %. 44 'nitia#i;e % reg. 4&4: *oad the subtrahend in D+ reg. @air through :* reg. (air. *oad the minuend in :* reg. @air. "ove the content of reg. * to Acc. Subtract the content of reg. + from that of acc. "ove the content of Acc. to reg. * "ove the content of reg. : to Acc. Subtract content of reg. D with that of Acc. 0ransfer content of acc. to reg. : Store the content of :* (air in memory #ocation 8&4 :. 'f there is borrow. go to the instruction #abe#ed 6+J0. 'ncrement reg. % 0ransfer the content of reg. % to Acc. Store the content of acc. to the memory #ocation &46: Sto( the (rogram e2ecution. G=0@=0 DA0A

4&2: A. * + *. A A. : D :. A 4& : 6+J0 % A. % 4&6:

6+J0

'6@=0 DA0A

ADD-+SS 4& : 4&&: 4&6:

5*A0. )6 BIT MULTIPLICATION


AIM1 0o mu#ti(#y two 16 bit numbers and store the resu#t in memory. ALGORITHM1 1. 2. 3. . !et the mu#ti(#ier and mu#ti(#icand. 'nitia#i;e a register to store (artia# (roduct. Add mu#ti(#icand. mu#ti(#ier times. Store the resu#t in consecutive memory #ocations.

RESULT1 0hus the 16-bit mu#ti(#ication was done in 848&( using re(eated addition method.

2&

5LO6CHART1 S0A-0 * : E 4&4F E 4&1F

S@ :*

* :

E 4&2F E 4&3F

D+

:*

:*4444 $%4444

:*:*8S@

NO

's %arry f#ag setH YES $%$%81

D+D+81

NO

's ?ero f#ag setH YES

26

E 4& F E 4&&F

* :

E 4&6F E 4&)F

% $

S0G@

2)

ADDRESS OPCODE LABEL MNEM

8444 441 442 443 44 44& 446 44) 448 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 41& 416 41) 418 413 41A 41$ 41% 41D 41+ 41D 424 421 422 423 42 OBSERVATION1
'6@=0

S0A-0

OPERAN COMMENTS O D N I C S *:*D 4&4 *oad the first 6o. in stac< (ointer through :* reg. (air S@:* *:*D J%:! *J' *J'

4&2

*oad the second 6o. in :* reg. (air & +2change with D+ reg. (air.

:. 4444: %#ear :* & D+ reg. (airs. $. 4444: S@ 6+J0 $ D A.+ D *GG@ 4& A. % 4&6 A. $ 4&) Add S@ with :* (air. 'f there is no carry. go to the instruction #abe#ed 6+J0 'ncrement $% reg. (air Decrement D+ reg. (air. "ove the content of reg. + to Acc. G- Acc. with D reg. 'f there is no ;ero. go to instruction #abe#ed *GG@ Store the content of :* (air in memory #ocations 4& & 4&&. "ove the content of reg. % to Acc. Store the content of Acc. in memory #ocation 4&6. "ove the content of reg. $ to Acc. Store the content of Acc. in memory #ocation 4&6. Sto( (rogram e2ecution

*GG@

DAD K6% '6J D%J "G9 G-A K6? S:*D "G9 S0A "G9 S0A :*0
G=0@=0

6+J0

28

ADD-+SS

DA0A

ADD-+SS

DA0A

4&4 4&1 4&2


4&3

4& 4&& 4&6


4&)

5*B0. )6- BIT DIVISION


AIM1 0o divide two 16-bit numbers and store the resu#t in memory using 848& mnemonics. ALGORITHM1 1. 2. 3. . &. !et the dividend and divisor. 'nitia#i;e the register for /uotient. -e(eated#y subtract divisor from dividend ti## dividend becomes #ess than divisor. %ount the number of subtraction which e/ua#s the /uotient. Store the resu#t in memory.

RESULT1 0hus the 16-bit Division was done in 848&( using re(eated subtraction method.

23

5LO6CHART1
S0A-0 * E 4&1F : E 4&2F

:*

D+

* E 4&4F : E 4&1F

$% 4444:

*N AA- + *A

A: AA- :- $orrow :A

$%$%8 1

's %arry f#ag set H

6G

I+S
A

34

$%$%- 1 :*:*8D+

*E 4& F :E 4&&F

A%

E 4&6F A

A$

E 4&)F A

S0G@

31

PROGRAM1 ADDRESS OPCODE LABEL 444 441 442 443 44 44& 446 44) 448 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 41& 416 41) 418 413 41A 41$ 41% 41D 41+ 41D 424 421 OBSERVATION1 '6@=0 ADD-+SS DA0A 4&4 4&1 4&2 4&3 S0A-0

MNEM ONICS *:*D J%:! *:*D *J'

OPERA ND 4&2

COMMENTS *oad the first 6o. in stac< (ointer through :* reg. (air

4&4 $. 4444:

*oad the second 6o. in :* reg. (air & +2change with D+ reg. (air. %#ear $% reg. (air.

*GG@

"G9 S=$ "G9 "G9 S$$ "G9 '6J K6% D%J DAD S:*D "G9 S0A "G9 S0A :*0

A. * + *. A A. : D :. A $ *GG@ $ D 4& A. % 4&6 A. $ 4&)

"ove the content of reg. * to Acc. Subtract reg. + from that of Acc. "ove the content of Acc to *. "ove the content of reg. : Acc. Subtract reg. D from that of Acc. "ove the content of Acc to :. 'ncrement reg. @air $% 'f there is no carry. go to the #ocation #abe#ed *GG@. Decrement $% reg. (air. Add content of :* and D+ reg. (airs. Store the content of :* (air in 4& & 4&&. "ove the content of reg. % to Acc. Store the content of Acc. in memory 4&6 "ove the content of reg. $ to Acc. Store the content of Acc. in memory 4&). Sto( the (rogram e2ecution.

G=0@=0 ADD-+SS DA0A 4& 4&& 4&6 4&) 32

6*A0. LARGEST ELEMENT IN AN ARRAY


AIM1 0o find the #argest e#ement in an array. ALGORITHM1 1. @#ace a## the e#ements of an array in the consecutive memory #ocations. 2. Detch the first e#ement from the memory #ocation and #oad it in the accumu#ator. 3. 'nitia#i;e a counter AregisterB with the tota# number of e#ements in an array. . Decrement the counter by 1. &. 'ncrement the memory (ointer to (oint to the ne2t e#ement. 6. %om(are the accumu#ator content with the memory content Ane2t e#ementB. ). 'f the accumu#ator content is sma##er. then move the memory content A#argest e#ementB to the accumu#ator. +#se continue. 8. Decrement the counter by 1. 3. -e(eat ste(s & to 8 unti# the counter reaches ;ero 14. Store the resu#t Aaccumu#ator contentB in the s(ecified memory #ocation. RESULT1 0hus the #argest number in the given array is found out.

33

5LO6 CHART1 S0A-0 E:*F E 144:F

E$F 4 : EAF E:*F E:* E:*F 8 1

6G

'S EAF M E:*FH

I+S

EAF E:*F E$F E$F-1

'S E$F L 4H

6G I+S

E 14&F EAF S0G@

PROGRAM1 ADDRE SS 441 442 443 44 44& 446 44) 448 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 OBSERVATION1 '6@=0 ADD-+SS DA0A 144 141 142 143 14 G=0@=0 ADD-+SS DA0A 14& OPCO DE LABEL MNEM ONICS *J' "9' *GG@1 "G9 '6J %"@ K6% "G9 D%K6? S0A :*0 OPER AND :. 144 $.4 A." : " *GG@ A." $ *GG@1 14& COMMENTS 'nitia#i;e :* reg. to 144: 'nitia#i;e $ reg with no. of com(arisonsAn-1B 0ransfer first data to acc. 'ncrement :* reg. to (oint ne2t memory #ocation %om(are " & A 'f A is greater than " then go to #oo( 0ransfer data from " to A reg Decrement $ reg 'f $ is not ?ero go to #oo(1 Store the resu#t in a memory #ocation. Sto( the (rogram

*GG@

3&

6*B0. SMALLEST ELEMENT IN AN ARRAY


AIM1 0o find the sma##est e#ement in an array. ALGORITHM1 1. @#ace a## the e#ements of an array in the consecutive memory #ocations. 2. Detch the first e#ement from the memory #ocation and #oad it in the accumu#ator. 3. 'nitia#i;e a counter AregisterB with the tota# number of e#ements in an array. . Decrement the counter by 1. &. 'ncrement the memory (ointer to (oint to the ne2t e#ement. 6. %om(are the accumu#ator content with the memory content Ane2t e#ementB. ). 'f the accumu#ator content is sma##er. then move the memory content A#argest e#ementB to the accumu#ator. +#se continue. 8. Decrement the counter by 1. 3. -e(eat ste(s & to 8 unti# the counter reaches ;ero 14. Store the resu#t Aaccumu#ator contentB in the s(ecified memory #ocation. RESULT1 0hus the sma##est number in the given array is found out.

36

5LO6 CHART1 S0A-0 E:*F E 144:F

E$F 4 : EAF E:*F E:* E:*F 8 1

I+S

'S EAF M E:*FH

6G

EAF E:*F E$F E$F-1

'S E$F L 4H

6G I+S

E 14&F EAF S0G@

3)

PROGRAM1 ADDRE SS 441 442 443 44 44& 446 44) 44 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 OBSERVATION1 '6@=0 ADD-+SS DA0A 144 141 142 143 14 G=0@=0 ADD-+SS DA0A 14& OPCO DE LABEL MNEM ONICS *J' "9' *GG@1 "G9 '6J %"@ K% "G9 D%K6? S0A :*0 OPER AND :. 144 $.4 A." : " *GG@ A." $ *GG@1 14& COMMENTS 'nitia#i;e :* reg. to 144: 'nitia#i;e $ reg with no. of com(arisonsAn-1B 0ransfer first data to acc. 'ncrement :* reg. to (oint ne2t memory #ocation %om(are " & A 'f A is #esser than " then go to #oo( 0ransfer data from " to A reg Decrement $ reg 'f $ is not ?ero go to #oo(1 Store the resu#t in a memory #ocation. Sto( the (rogram

*GG@

38

8*A0.ASCENDING ORDER
AIM1 0o sort the given number in the ascending order using 848& micro(rocessor. ALGORITHM1 1. !et the numbers to be sorted from the memory #ocations. 2. %om(are the first two numbers and if the first number is #arger than second then ' interchange the number. 3. 'f the first number is sma##er. go to ste( . -e(eat ste(s 2 and 3 unti# the numbers are in re/uired order RESULT1 0hus the ascending order (rogram is e2ecuted and thus the numbers are arranged in ascending order.

33

5LO6CHART1

S0A-0 E$F 4 : E:*F E 144:F

E%F 4 : EAF E:*F E:* E:*F 8 1

I+S

'S EAF M E:*FH 6G EDF E:*F

E:*F EAF

E:*F E:*F - 1

E:*F EDF E:*F E:*F 8 1 E%F E%F 5 41 :

'S E%F L 4H

6G I+S

E$F E$F-1

'S E$F L 4H

6G I+S

S0G@

PROGRAM1 1

ADDR E SS 444 441 442 443 44 44& 446 44) 44 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 41& 416 41) 41 413 41A

OPCO DE

LABEL

MNEM ONICS "9'

OPER AND $.4 :. 144 %.4 A." : " *GG@1 D." ".A : ".D : % *GG@2 $ *GG@3

COMMENTS 'nitia#i;e $ reg with number of com(arisons An-1B 'nitia#i;e :* reg. to 144: 'nitia#i;e % reg with no. of com(arisonsAn-1B 0ransfer first data to acc. 'ncrement :* reg. to (oint ne2t memory #ocation %om(are " & A 'f A is #ess than " then go to #oo(1 0ransfer data from " to D reg 0ransfer data from acc to " Decrement :* (air 0ransfer data from D to " 'ncrement :* (air Decrement % reg 'f % is not ;ero go to #oo(2 Decrement $ reg 'f $ is not ?ero go to #oo(3 Sto( the (rogram

*GG@ 3

*J' "9'

*GG@2

"G9 '6J %"@ K% "G9 "G9 D%J "G9 '6J D%K6? D%K6? :*0

*GG@1

OBSERVATION1 '6@=0 "+"G-I *G%A0'G6 144 141 142 143 14 DA0A "+"G-I *G%A0'G6 144 141 142 143 14 G=0@=0 DA0A

8*B0. DESCENDING ORDER


AIM1 0o sort the given number in the descending order using 848& micro(rocessor. ALGORITHM1 1. !et the numbers to be sorted from the memory #ocations. 2. %om(are the first two numbers and if the first number is sma##er than second then ' interchange the number. 3. 'f the first number is #arger. go to ste( . -e(eat ste(s 2 and 3 unti# the numbers are in re/uired order RESULT1 0hus the descending order (rogram is e2ecuted and thus the numbers are arranged in descending order.

5LO6CHART1

S0A-0 E$F 4 : E:*F E 144:F

E%F 4 : EAF E:*F E:* E:*F 8 1

6G

'S EAF M E:*FH I+S EDF E:*F

E:*F EAF

E:*F E:*F - 1

E:*F EDF E:*F E:*F 8 1 E%F E%F 5 41 :

'S E%F L 4H

6G I+S

E$F E$F-1

'S E$F L 4H

6G I+S

S0G@

PROGRAM1 &

ADDRE SS 444 441 442 443 44 44& 446 44) 44 443 44A 44$ 44% 44D 44+ 44D 414 411 412 413 41 41& 416 41) 41 413 41A

OPCO DE

LABEL

MNEM ONICS "9' *J' "9'

OPER AND $.4 :. 144 %.4 A." : " *GG@1 D." ".A : ".D : % *GG@2 $ *GG@3

COMMENTS 'nitia#i;e $ reg with number of com(arisons An-1B 'nitia#i;e :* reg. to 144: 'nitia#i;e % reg with no. of com(arisonsAn-1B 0ransfer first data to acc. 'ncrement :* reg. to (oint ne2t memory #ocation %om(are " & A 'f A is greater than " then go to #oo(1 0ransfer data from " to D reg 0ransfer data from acc to " Decrement :* (air 0ransfer data from D to " 'ncrement :* (air Decrement % reg 'f % is not ;ero go to #oo(2 Decrement $ reg 'f $ is not ?ero go to #oo(3 Sto( the (rogram

*GG@ 3

*GG@2

"G9 '6J %"@ K6% "G9 "G9 D%J "G9 '6J D%K6? D%K6? :*0

*GG@1

OBSERVATION1 '6@=0 "+"G-I *G%A0'G6 144 141 142 143 14 AIM1 6 DA0A "+"G-I *G%A0'G6 144 141 142 143 14 G=0@=0 DA0A

(*A0 BCD ADDITION

0o add two 8 bit $%D numbers stored at consecutive memory #ocations. ALGORITHM1 1. 2. 3. . &. 'nitia#i;e memory (ointer to data #ocation. !et the first number from memory in accumu#ator. !et the second number and add it to the accumu#ator AdOust the accumu#ator va#ue to the (ro(er $%D va#ue using DAA instruction. Store the answer at another memory #ocation.

RESULT1 0hus the 8 bit $%D numbers stored at &44 & &41 are added and the resu#t stored at &42 & &43.

5LO6 CHART1
S0A-0

E%F

44:

E:*F

&44:

EAF

E"F

E:*FE:*F81

EAFEAF8E"F Decima# AdOust Accumu#ator 6G

I+S 's there a %arry H

E%FE%F81

E:*FE:*F81

E"F

EAF

E:*FE:*F81

E"F

E%F

S0G@

PROGRAM1 ADDRESS OPCODE LABEL 144 S0A-0 143 142 143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 111 OBSERVATION1 '6@=0 &44 &41 &42 &43 G=0@=0 *1 MNEMONICS OPERAND "9' %. 44 *J' "G9 '6J ADD DAA K6% *1 :. &44 A. " : " COMMENT %#ear % reg. 'nitia#i;e :* reg. to &44 0ransfer first data to accumu#ator 'ncrement :* reg. to (oint ne2t memory *ocation. Add first number to acc. %ontent. Decima# adOust accumu#ator Kum( to #ocation if resu#t does not yie#d carry. 'ncrement % reg. 'ncrement :* reg. to (oint ne2t memory *ocation. 0ransfer the resu#t from acc. to memory. 'ncrement :* reg. to (oint ne2t memory *ocation. "ove carry to memory Sto( the (rogram

'6'6J "G9 '6J "G9 :*0

% : ". A : ". %

(*B0. BCD SUBTRACTION

AIM1 0o Subtract two 8 bit $%D numbers stored at consecutive memory #ocations. ALGORITHM1 1. 2. 3. . &. *oad the minuend and subtrahend in two registers. 'nitia#i;e $orrow register to 4. 0a<e the 144,s com(#ement of the subtrahend. Add the resu#t with the minuend which yie#ds the resu#t. AdOust the accumu#ator va#ue to the (ro(er $%D va#ue using DAA instruction. 'f there is a carry ignore it. 6. 'f there is no carry. increment the carry register by 1 ). Store the content of the accumu#ator S0A-0 Aresu#tBand borrow register in the s(ecified memory #ocation
EDF 44: :* &44 " & &41 are subtracted and the resu#t stored at 0hus the 8 bit $%D numbers stored$ at &44 &42 & &43.

RESULT1

:* :*8 1 % " A 33 EAF EAF 5 E%F EAF EAF81 EAFEAF8E$F DAA

's there a %arry H

EDFEDF81

E:*FE:*F81

5LO6 CHART1
E &42F A E &43F D

&4
S0G@

I+S

6G

PROGRAM1

&1

ADDRESS OPCODE LABEL 144 S0A-0 141 142 143 14 14& 146 14) 148 143 14A 14$ 14% 14D 14+ 14D 114 111 112 113 11 11& 116 OBSERVATION1 '6@=0 &44 &41 *GG@

MNEMONICS OPERAND COMMENT "9' D. 44 %#ear D reg. *J' "G9 '6J "G9 "9' S=$ '6ADD DAA K% :. &44 $. " : %. " A. 33 % A $ *GG@ 'nitia#i;e :* reg. to &44 0ransfer first data to accumu#ator 'ncrement :* reg. to (oint ne2t mem. *ocation. "ove second no. to $ reg. "ove 33 to the Accumu#ator Subtract E%F from acc. %ontent. 'ncrement A register Add E$F with EAF AdOust Accumu#ator va#ue for Decima# digits Kum( on carry to #oo(

'6'6J "G9 '6J "G9 :*0

D : ".A : ". D

'ncrement D reg. 'ncrement :* register (air "ove the Acc.content to the memory #ocation 'ncrement :* reg. to (oint ne2t mem. *ocation. 0ransfer D register content to memory. Sto( the (rogram

G=0@=0 &42 &43

9*A0. 0o Dind the Sum of !iven Series of 6umber Cithout %arry

&2

A+m1 0o write an assemb#y #anguage (rogram to find the sum of series of data without carry. A44%r%!' Re:'+re21 "icro(rocessor 848& <it. (ower su((#y. M/em"/+- 1 J-A A *J' :. A441 "G9 %. " '6J : "G9 A. " D%- % '6J : ADD " D%- % K6? 8448 S0A %441 -S0 1

Re '$!1 0hus an assemb#y #anguage for sum of given numbers without carry is written and e2ecuted.

9*B0. 0o Dind the Sum of !iven Series of 6umber Cith %arry

&3

Date>

A+m1 0o write an assemb#y #anguage (rogram to find the sum of series of data with carry. A44%r%!' Re:'+re21 "icro(rocessor 848& <it. (ower su((#y. M/em"/+- 1 "9' %. 44 J-A A *J' :. A441 "G9 $. " '6J : "G9 A. " D%- $ '6J : ADD " K6% 8414 '6- % D%- $ K6? 844A S0A %441 "G9 A. % S0A %442 -S0 1

Re '$!1 0hus an assemb#y #anguage for sum of given numbers with carry is written and e2ecuted.

&

&&

&6

&)

&8

&3

CYCLE II
+2. 6o. 14. Date>

Study of "u#ti(#e2er '% ) 1&1

A+m1 0o study >1 mu#ti(#e2er o(eration using '% ) 1&1com(onents.

S!'2#1 MULTIPLE;ERS A mu#ti(#e2er (erforms the function of se#ecting the in(ut on any one of PnP in(ut #ines and feeding this in(ut to one out(ut #ine. "u#ti(#e2ers are used as one method of reducing the number of integrated circuit (ac<ages re/uired by a (articu#ar circuit design. 0his in turn reduces the cost of the system. Assume that we have four #ines. C0< C)< C2 %/2 C7. which are to be mu#ti(#e2ed on a sing#e #ine. Output (f). 0he four in(ut #ines are a#so <nown as the Data Inputs. Since there are four in(uts. we wi## need two additiona# in(uts to the mu#ti(#e2er. <nown as the Select Inputs. to se#ect which of the C in(uts is to a((ear at the out(ut. %a## these se#ect #ines A and B. 0he gate im(#ementation of a -#ine to 1-#ine mu#ti(#e2er is shown be#ow>

64

0he circuit symbo# for the above mu#ti(#e2er is>

Re '$!1 0hus the truth tab#e for mu#ti(#e2er '% ) 1&1 is studied

61

+2. 6o. 11. Date>

S!'2# "= Dem'$!+4$e>er IC 84)54

A+m1 0o study 1>8 Demu#ti(#e2er o(eration using '% ) 1& com(onents.

S!'2#1 DEMULTIPLE;ERS A Demu#ti(#e2er AD"=JB is a device which essentia##y (erforms the o((osite o(eration to the "=J. 0hat is. it functions as an e#ectronic switch A1data distributorB to route an incoming data signa# to one of severa# out(uts. Digure 2-1& shows the #ogic symbo# for the 1-#ine-to- -#ine Demu#ti(#e2er circuit and 0ab#e 2-1& #ist the associated 0ruth tab#e. 0he corres(onding #ogic circuit im(#ementation is then shown in Digure 2-16.

5+.'re 2-)5 L".+- #m&"$ ="r )-$+/e-!"-4-$+/e Dem'$!+4$e>er A22re D%!% S) D D D D 4 4 1 1 S0 4 1 4 1 Y0 D 4 4 4 Y) 4 D 4 4 Y2 4 4 D 4 Y7 4 4 4 D O'!4'!

62

T%&$e 2 -)5 Dem'$!+4$e>er 5'/-!+"/ T%&$e

5+.'re 2-)6 )-$+/e-!"-4-$+/e Dem'$!+4$e>er

Re '$!1 0hus the truth tab#e for Demu#ti(#e2er '% ) 1& is studied

63

+2. 6o. 13. Date> A+m1

S!'2# "= E/-"2er

0o study the encoder function using '% ) 1 ). S!'2#1 An e/-"2er is a device used to change a signa# Asuch as a bit streamB or data into a code. 0he code may serve any of a number of (ur(oses such as com(ressing information for transmission or storage. encry(ting or adding redundancies to the in(ut code. or trans#ating from one code to another. 0his is usua##y done by means of a (rogrammed a#gorithm. es(ecia##y if any (art is digita#. whi#e most ana#og encoding is done with ana#og circuitry. Sing#e bit to 2 +ncoder

A sing#e bit to 2 encoder ta<es in bits and out(uts 2 bits. 't is assumed that there are on#y ty(es of in(ut signa#s these are > 4441. 4414. 4144. 1444. I7 I2 I) I0 O) O0 4 4 4 1 4 4 4 1 4 4 4 1 4 4 1 1 4 4 4 1 4 1 4 1

to 2 encoder @riority encoder A (riority encoder (rioriti;es more significant bits in the data stream. and once it finds a high signa# wi## ignore a## other bits. An e2am(#e of a sing#e bit to 2 encoder is shown. I7 I2 I) I0 O) O0 4 4 4 d 4 4 4 1 d 4 4 1 d d 1 1 d d d 1 4 1 4 1

4 !" 2 4r+"r+!# e/-"2er +2. 6o. 1 . Date> A+m1 0o study the decoder function using '% ) 1 ). S!'2#1 DECODER A decoder is a device which does the reverse of an encoder. undoing the encoding so that the origina# information can be retrieved. 0he same method used to encode is usua##y Oust reversed in order to decode. 'n digita# e#ectronics this wou#d mean that a decoder is a mu#ti(#e-in(ut. mu#ti(#eout(ut #ogic circuit that converts coded in(uts into coded out(uts. where the in(ut and out(ut codes are different. e.g. n-to-2n. $%D decoders. +nab#e in(uts must be on for the decoder to function. otherwise its out(uts assume a sing#e Qdisab#edQ out(ut code word. Decoding is necessary in a((#ications such as data mu#ti(#e2ing. ) segment dis(#ay and memory address decoding. 0he sim(#est decoder circuit wou#d be an A6D gate because the out(ut of an A6D gate is Q:ighQ A1B on#y when a## its in(uts are Q:ighQ. +2am(#e> A 2-to- *ine Sing#e $it Decoder A s#ight#y more com(#e2 decoder wou#d be the n-to-2n ty(e binary decoders. 0hese ty(e of decoders are combinationa# circuits that convert binary information from PnP coded in(uts to a ma2imum of 2n uni/ue out(uts. Ce say a maximum of 2n out(uts because in case the PnP bit coded information has unused bit combinations. the decoder may have #ess than 2n out(uts. Ce can have 2-to- decoder. 3-to-8 decoder or -to-16 decoder. Ce can form a 3-to-8 decoder from two 2-to- decoders Awith enab#e signa#sB. A 2-to- #ine decoder1demu#ti(#e2er is shown be#ow. As a decoder. this circuit ta<es an n-bit binary number and (roduces an out(ut on one of 2n out(ut #ines. 't is therefore common#y defined by the number of addressing in(ut #ines and the number of data out(ut #ines. 0y(ica# decoder1demu#ti(#e2er '%s might contain two 2-to- #ine circuits. a 3-to-8 #ine circuit. or a -to-16 #ine circuit. 6&

S!'2# "= De-"2er

Gne e2ce(tion to the binary nature of this circuit is the -to-14 #ine decoder1demu#ti(#e2er. which is intended to convert a $%D A$inary %oded Decima#B in(ut to an out(ut in the 4-3 range.

'f you use this circuit as a demu#ti(#e2er. you may want to add data #atches at the out(uts to retain each signa# whi#e the others are being transmitted.

Re '$!1 0hus the +ncoder is studied using '% ) 1 )

66

CYCLE III A+m1

S!'2# MIL STD )557B 2%!% &'

0o study architecture. transfer modes and cou(#ing methods of "'* S0D 1&&3$ data bus.

6)

68

63

)4

)1

)2

)3

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