Report on

Pinned Photodiode

Submitted by

Md. Mahabub Hossain

Kyungpook National University Daegu, Korea

Date: December 3, 2013

Md. Mahabub Hossain,

Introduction: Nowadays, there is a trend towards a camera-on-a-chip, which consists of optical sensor elements and highly integrated signal-processing circuitry with low power consumption. CCDs, therefore, have to compete with a severe rival, the active-pixel sensor (APS), for many imaging applications. It has a performance competitive with CCDs with respect to output noise, dynamic range, and sensitivity but with vastly increased functionality due to its CMOS compatibility and with the potential for lower system cost as well as for a camera-on-a-chip[1,3]. The cost of CMOS image sensor pixel-based digital camera systems is being reduced through the use of smaller pixel sizes and larger fill-factors. However, CMOS pixel size reduction is only acceptable without sacrificing image quality. As CMOS pixel sizes continue to decrease, there is a reduction in image signal to noise as well as an increase in cross-talk between adjacent sensor pixels. The standard CMOS APS pixel today consists of a photodetector (a pinned photodiode), a floating diffusion, a transfer gate, reset gate, selection gate and source-follower readout transistorthe so-called 4T cell. The pinned photodiode was originally used in interline transfer CCDs due to its low dark current and good blue response, and when coupled with the transfer gate, allows complete charge transfer from the pinned photo diode to the floating diffusion eliminating lag[2]. Construction and operation: Pinned photodiodes actually had been introduced more than 20 years ago [4]. Figure: 1 Shows this type of photodiode. A shallow P+ layer is implemented at the silicon surface of the N-type layer of the original N-layer/P-substrate photodiode. This shallow P+ layer is connected to substrate (connection is not shown). Therefore, the electrostatic potential at the Si surface is pinned to the substrate potential and this fact gave the name pinned photodiode. In fact, it is a kind of double photodiode. The pinned photodiode has a much higher charge storage capacity than the N-layer/P-substrate photodiode. A factor of ten leads to a large dynamic range and avoids image lag. Due to the shallow P+/N junction, the blue response of the pinned photodiode is good.

Md. Mahabub Hossain,

Figure:1 Cross section of pinned photodiode [1] A schematic of the four-transistor (4T) APS is shown in the figure: 2. A cross-section of the active sensing region (the pinned photodiode p++ and the buried n-well) and the transfer gate are illustrated. The drain contact (SENSE) of the TX transistor can be electrically isolated, and is often termed the floating diffusion (FD). The APS can be reset by applying a pulse to RST, which will pull the FD to VDD, emptying the detector of charge and establishing an initial bias condition on that node. The FD is also connected to a common-drain amplifier, which is isolated from the column bus by the row select (RS) transistor.

Figure:2 A pinned-photodiode 4T APS. A cross-section of the pinned photodiode and transfer gate is shown connected to the floating diffusion (SENSE) [3].

Md. Mahabub Hossain,

In general terms, the pixel operates by collecting photo-generated charge. The photodetector is illuminated, and charge is collected in the n-well. At the end of the exposure, a pulse is applied to the transfer gate (TX), lowering the n-well barrier, and allowing the charge to move to the sense node. This charge is converted to a voltage on that node by the intrinsic capacitance of the amplifier gate and surrounding metal (V = Q/C). The voltage on the floating diffusion is read out to the column bus through the amplifier and RS gate[3]. Dark Current[3] Two key figures of merit factor into the dark current calculation. The APS is acts as a charge conversion device, representing the number of electrons generated as a voltage at the output of the amplifier. This ratio is termed the conversion gain and is commonly measured in [uV/e-]. The conversion gain can be expressed as a ratio of the electron charge to a capacitance CCG:

A second important performance metric is the dark count itself, which is the number of charges generated during an exposure period with no illumination. The dark count is often reported as the digital number (DN) which also includes the gain and non-linearity of the ADC. At the pixel level, the dark-current itself will indicate rate of charge generation, which can be translated into a count if the exposure time is known. The dark current is an important source of both fixed pattern and temporal noise in a CMOS image sensor (CIS) pixel. In the following example, a pinned-photodiode active pixel sensor (APS) is simulated to determine the dark current density. Sources of Dark current[3] The dark current will be measured when the APS is in its reset state with no applied illumination. Consequently, the charge accumulation well will be depleted, and the internal PN junctions will be reverse biased. Multiple physical processes contribute to the recombination and generation of electrical carriers (electrons and holes), including : 1. Trap-assisted (Shockley-Read-Hall) recombination 2. Auger recombination 3. Radiative (direct) recombination 4. Surface (trap-assisted) recombination
Md. Mahabub Hossain,

Of these mechanisms, the dominant mechanisms for charge recombination and generation in silicon are the trap-assisted processes (bulk and surface), which are illustrated in the figure:3.

Figure:3 Sources of dark current. The three dominant mechanisms that give rise to the dark current are illustrated: (a) surface generation from trap states at the Si-SiO2 interface, (b) trap-assisted thermal generation of charge in the space charge layer, and (c) the diffusion current due to thermal generation of charge in the bulk[3].

Application: A CMOS image sensor with a pinned-photodiode four-transistor active pixel design was described in [3,5]. The specialty of this work in 0.18m 1P3M CMOS was a buried-channel source follower (BSF) to reduce dark random noise by more than 50% and to increase the output swing by almost 100%. This pixel structure in addition minimizes the randomn telegraph signal (RTS) noise. Usually, the random noise level of the pinned-photodiode 4T APS is less than 5erms, of which the major contribution is 1/f and RTS noise produced by the in-pixel source

follower at its Si/SiO2 interface. Correlated double sampling (CDS) cannot fully eliminate these two noise sources [3]. Therefore, the basic idea in [3,5] is to avoid current flow along the Si/SiO2 interface by implementing a buried channel in the source follower. The BSF reduces the read noise of the APS pixels. In addition, the threshold voltage of the BSF is negative resulting in a significantly larger positive output swing of almost 2V. The voltage gain of the BSF was 0.92 instead of 0.83 for the surface-channel source follower. Figure: 4 depicts the pixel circuit,

Md. Mahabub Hossain,

Figure: 4 Active pixel with a buried-channel source follower (BSF) transistor associate with pinned photodiode [3, 5]. the cross section of the BSF and the readout timing. Different from the standard pinnedphotodiode 4T structure, the pixel contains the buried channel source follower (BFS). To cancel threshold mismatch and reset noise, a standard CDS operation is performed. A slight disadvantage of the BSF is its lower transconductance, which was only half that of the surfacechannel source follower (SSF), and the resulting longer settling time. A conversion gain of 73 Ve1 was achieved. The average noise of the SSF of 0.50mVrms was reduced to 0.25mVrms for the BSF. Pixel pitches of 6 m, 7.4 m, and 10 m were realized in a test chip [1, 5].

References: [1] Horst Zimmermann, Integrated Silicon Optoelectronics, 1st Edition: Springer Series in Photonics, Vol. 3, ISBN 3-540-66662-1. [2] http://en.wikipedia.org/wiki/Active_pixel_sensor [3]Wang, Xinyang, "Noise in Sub-Micron CMOS Image Sensors", Ph.D. Thesis,(2008), Delft University of Technology. [4]B.C. Burkey, W.C. Chang, J. Littlehale, T.H. Lee, T.J.T.J.P. Lavine, E.A. Trabka, in IEEE IEDM Technical Digest (1984), pp. 2831 [5]X. Wang, M.F. Snoeij, P.R. Rao, A. Mierop, A.J.P. Theuwissen, in Proceedings IEEE Int. Solid-State Circuits Conference (2008), pp. 6263, 595.
Md. Mahabub Hossain,