Professional Documents
Culture Documents
Today we’ll take a look at Intel’s 8086, which is one of the oldest and yet
most prevalent processor architectures around.
We’ll make many comparisons between the MIPS and 8086 architectures,
focusing on registers, instruction operands, memory and addressing
modes, branches, function calls and instruction formats.
This will be a good chance to review the MIPS architecture as well.
Several 16-bit registers are used for the segmented memory model.
CS SS DS ES FS GS
operation operands
add a, b, c
destination sources
This is interpreted as a = b + c.
— a and b must be registers.
— c may be a register or, in some cases, a constant.
operation operands
add a, b
destination source 2
and source 1
This is interpreted as a = a + b.
— a can be a register or a memory address.
— b can be a register, a memory reference, or a constant.
— But a and b cannot both be memory addresses.
There are also some one-address instructions, which leave the destination
and first source implicit.
Intel 8086 processors and PCs don’t have this alignment restriction, which
can create confusion when trying to port or debug programs.
4 bits
= 20-bit address
bne beq j jr
slt uses a temporary register to store a Boolean value that is then tested
by a bne/beq instruction.
Together, branches and jumps can implement conditional statements,
loops, and function returns.
Top Bottom