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Abstract—In this paper, a compact low-power (LP) low-voltage is mainly due to the square-root dependency of the differential
(LV) metal–oxide–semiconductor-only (MOS-only) variable gain pair transconductance on the bias current. For instance, in
amplifier (VGA) is introduced. This amplifier based on comple- order to achieve a 30-dB gain variation, the differential-
mentary MOS (CMOS) transistors operating in strong inversion
is composed of a pseudo-exponential current-to-voltage converter, pair bias current must be varied in the range of 1x–1000x.
analog multiplier, and output stage. The gain of the ampli- Some designs attempt to avoid large-bias current variation
fier is controlled exponentially by a novel wide-range pseudo- by using two or more differential pairs in cascade; resulting
exponential current-to-voltage converter implemented with two in smaller required gain variation range per stage. A more
back-to-back connected current mirrors exhibiting superb expo- serious drawback of the differential pair is its rather limited
nential characteristic. Also, a new LV/LP composite transistor is
introduced to increase the input dynamic range of the multiplier. input voltage range. Unfortunately, cascading differential pairs
The amplifier is fabricated using a 2-m MOSIS n-well process, has an adverse effect in that the subsequent differential pairs
and its simulation and measurement results are shown in detail. may have to experience increasing levels of signal amplitudes.
It can be shown that the maximum-input differential voltage
which can be applied to an nMOS or pMOS differential pair
I. INTRODUCTION
without severe distortion is limited to a few tenths of a volt
(1)
Therefore, low-power (LP) analog design raises its own chal-
lenges that should be met under the constraints of low-voltage
(LV) design. Furthermore, in the era of mixed-mode integrated where is the differential-pair bias current. Alternatively,
circuits, the design of analog circuits should be carried out and as we will see in this paper, an analog multiplier can
in the presence of noisy digital circuits with a technology be designed to circumvent the above problems and operate
optimized not for analog, but for digital circuits [1]–[3]. as a LV ( 3) VGA with a much larger input voltage range
This is one reason why analog integrated circuits with wide and a large gain control range achieved at significantly lower
dynamic range have gained so much attention in recent years, power consumption levels. In general, the output current of a
particularly for LV LP applications [4]–[6]. four-quadrant analog multiplier can be expressed as
In this paper, we introduce a compact LV and LP variable
gain amplifier (VGA) with wide dynamic range, which can (2)
be found in numerous applications in communication systems
where is a constant with units [A/V ]. If required, a resistor
and audio/video analog signal-processing circuits. The voltage
or a transresistor element can be used at the output to convert
gain or the transconductance of the VGA can be varied by a
the output current signal into a voltage signal.
control voltage or current. In most existing strong-inversion
A VGA with an exponential-gain control characteristic
metal–oxide–semiconductor (MOS) designs, a variable gain
is desired in applications where wide-gain control range is
is achieved by controlling the bias current of a differential
required; i.e., the gain should increase monotonically on a
pair. However, this approach is not well suited for applications
decibel scale with linear increments in gain control signal (i.e.,
where wide-gain variation is required at LV and LP levels. This
decibel linear). To fulfill this need, a new complementary-
Manuscript received June 17, 1997. This paper was supported by the Video MOS-only (CMOS-only) pseudo-exponential voltage genera-
Camera LSI Section, the Bipolar/CCD Division of Sony Corporation, Atsugi, tor is designed to map the input gain control signal (which
Japan, and by Micrys Inc., Columbus, OH. This paper was recommended by could be current or voltage) into a corresponding exponential
Associate Editor N. Nguyen.
A. Motamed was with the Analog VLSI Laboratory, Ohio State University, voltage. Section II describes such a voltage generator. Fig. 1
Columbus, OH 43210 USA. He is now with Exar Corporation, Fremont, CA shows how an analog multiplier can be used as a VGA.
94538 USA. The input signal is differentially applied to one pair of input
C. Hwang was with the Analog VLSI Laboratory, Ohio State University,
Columbus, OH 43210 USA. He is now with the Communication Systems terminals, labeled and , and the exponential voltage is
Research Department, Hitachi Central Research Laboratory, Tokyo 185, Japan. applied to the second pair of terminals, labeled and . The
M. Ismail is with the Analog VLSI Laboratory, Solid-State Microelectronics output current of the multiplier, which is proportional to the
Laboratory, Department of Electrical Engineering, Ohio State University,
Columbus, OH 43210 USA. product of the two input differential voltages, i.e.
Publisher Item Identifier S 1057-7130(98)05056-3. and , can subsequently be converted into a
1057–7130/98$10.00 1998 IEEE
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 801
(a)
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802 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 7, JULY 1998
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 803
(a) (b)
Fig. 4. Input voltage–current characteristic of the circuit shown in Fig. 2(a). (a) Simulation. (b) Measurement.
(a)
(b)
Fig. 6. The simulated output voltage Vds of the pseudo-exponential voltage generator. (a) Linear scale. (b) Logarithmic scale.
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804 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 7, JULY 1998
(a) (b)
(a)
(c)
Fig. 7. The modified low-VT square-law composite transistor. (a) Composite
square-law CMOS [12] transistor pair. (b) Design concept of the modified tran-
sistor. (c) Circuit implementation of the new low-VT square-law composite
transistor.
(b)
Fig. 8. Drain current of the LV composite transistor as a function of the
(15) gate–source voltage. (a) Simulation. (b) Measurement.
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 805
(22)
and
(23)
(24)
and
(25)
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806 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 7, JULY 1998
(a)
(b)
Fig. 10. CMOS implementation of the VGA, including the pseudo-exponential voltage generator and the multiplier built with four LV composite transistors.
(a) Circuit implementation. (b) Die photograph.
Fig. 15 shows a possible implementation of an output The device sizes used in the design of the VGA are given in
stage. Current mirror – generates the current Table I.
. The first gain stage includes the cascode Fig. 16 depicts the output voltage signal of the VGA at
stage – and the current source simulated using maximum gain (29 dB) in response to a 1-kHz signal with
a current mirror driven by a current source. The feedback a total harmonic distortion (THD) of 0.9%. The overall VGA
resistor sets the gain of this stage. The second-gain stage gain as a function of the control current is shown in Fig. 17(a),
includes transistors – and – . The common where the input is kept constant at 80 mV and control current
gate transistors and are used to improve the fre- is swept from 30 to 30 A. In order to investigate the
quency response and also extend the output voltage swing. The large-signal behavior, the gain of the VGA is simulated while
load resistor is required to set the gain of the second stage. keeping the output voltage swing at its maximum (2 V ) and
Ideal voltage sources and are used in the simulations. for different values of . This was achieved by changing the
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 807
(a)
Fig. 13. Region of operation of the VGA with exponential gain control.
(b)
Fig. 11. Region of operation of Fig. 11. (a) Three-dimensional view. (b)
Top view of (a) showing Vcm12 and Vcm34 for symmetric operation where
v12;max =v34;max . (a)
(b)
Fig. 14. The VGA transconductance as a function of control current. (a)
Fig. 12. DC transfer characteristics of the multiplier using the new LV Simulation (b) Measurement.
composite transistors.
large- and small-signal gains [see Fig. 17(a) and (b)] illustrates
input at each gain setting such that the output is constant at 2 the excellent linearity and minimal large-signal distortion of
V . The result is shown in Fig. 17(b). The similarity between the circuit.
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808 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 7, JULY 1998
TABLE I
DEVICE SIZES OF THE VGA
Fig. 16. The VGA output when an 80-mVPP sinusoidal signal at 1 kHz is
applied at the input and gain is set to 29 dB.
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 809
(a)
Fig. 19. The variation of the VGA output dc voltage when Vin = 0 and IC
0
is changed from 30 to 30 A.
(b)
Fig. 17. The VGA gain as a function of control current IC : (a) when the
input is kept constant at 80 mVPP and (b) when the output is kept constant
at 2 VPP . Fig. 20. Small-signal frequency response of the VGA for IC = 30, 0, and
0 30 A.
written as
(28)
(29)
(30)
Fig. 18. The THD of the VGA as a function of the gain control current at and the noise current is given by
1 kHz and Vout =
2 VPP .
(31)
where is the Boltzmann constant and is the absolute The term in the above equation represents the
temperature. The input thermal noise voltage can be simply noise contributed by the level shifter . Including the noise
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810 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 45, NO. 7, JULY 1998
TABLE II and
SIMULATED PARAMETERS OF THE VGA
(37)
(38)
and the small-signal output current is given by
(39)
Comparing (27) with (33) shows that the LV composite
transistor has higher noise current than a simple composite
transistor. This is the price paid for a larger input voltage
range achievable only by the LV composite transistor.
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on low-voltage and low-power analog and mixed-signal circuits and
systems,” IEEE Trans. Circuits Syst. I, vol. 42, Nov. 1995.
[7] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design. New
York: Saunders College, 1987.
[8] A. Motamed, C. Hwang, and M. Ismail, “CMOS exponential current-
to-voltage converter,” Electron. Lett., vol. 23, pp. 998–1000, June 1997.
[9] A. Motamed, “Low-voltage VLSI circuits and signal processing,” Ph.D.
Dissertation, Dept. Elect. Eng., Ohio State Univ., Columbus, 1996.
contribution of the p-type current mirror, the noise current [10] T. W. Pan and A. Abidi, “A 50-MHz variable gain amplifier for magnetic
data storage systems,” IEEE J. Solid-State Circuits, vol. 24, pp. 951–961,
assumes the form Aug. 1989.
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[12] E. Seevinck and R. F. Wassenaar, “A versatile CMOS linear
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[13] M. Ismail and T. Fiez, Analog VLSI Signal and Information Processing.
where is the transconductance of New York: McGraw-Hill, 1994.
[14] S. Sakurai and M. Ismail, “A high-frequency wide range CMOS analog
the p-type transistors of the current mirror. The level shifter multiplier,” Electron. Lett., vol. 28, pp. 2228–2229, Nov. 1992.
transconductance can be increased so that the term [15] H. Wallinga and K. Bult, “Design and analysis of CMOS analog signal
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[16] T. Shiimoto, Private communication, Aug. 1996.
[17] C. D. Motchenbacher and J. A. Connelly, Low Noise Electronic System
(33) Design. New York: Wiley, 1993.
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MOTAMED et al.: LV LP WIDE-RANGE CMOS VGA 811
Changku Hwang (SM’97) received the B.S. degree Mohammed Ismail (S’80–M’82–SM’84–F’97) re-
in electronics engineering from Hanyang University, ceived the B.S. and M.S. degrees in electronics and
Seoul, Korea, in 1985, and the M.S. and Ph.D. telecommunications engineering from Cairo Uni-
degrees in electrical engineering from Ohio State versity, Cairo, Egypt, in 1974 and 1978, and the
University, Columbus, in 1992 and 1996, respec- Ph.D. degree in electrical engineering from the
tively. University of Manitoba, Winnipeg, Man., Canada,
From 1985 to 1990, he was with the Semiconduc- in 1983.
tor Division, SamSung Electronics, Korea, where he He is currently a Professor in the Department
was a Process Development Engineer. From 1990 of Electrical Engineering, Ohio State University,
to 1995, he was a Research Assistant at Ohio State Columbus. He co-founded Micrys Inc. (formerly
University. From 1995 to 1997, he was a Senior ChipWorks, Inc.), Columbus, OH, a commercial
Manager in the VLSI Division, Micrys Inc., Columbus, OH (a commercial VLSI design company specializing in analog and mixed-signal ASIC’s. He has
VLSI design company), where he directed projects in LP CMOS mixed- previously held several positions in both industry and academia and has served
signal video interface circuits and data converters. From 1996 to 1997, he as a Corporate Consultant for nearly 20 companies in the U.S. and abroad.
was a Post-Doctoral Researcher with the Analog VLSI Laboratory, Solid- He held visiting appointments at the Norwegian Institute of Technology,
State Microelectronics Laboratory, Ohio State University, Columbus. He University of Oslo, University of Twente, Tokyo Institute of Technology, and
is currently a Visiting Senior Researcher in the Communication Systems Helsinki University of Technology. He has authored numerous publications
Research Department, Hitachi Central Research Laboratory, Tokyo, Japan. on VLSI circuit design and signal processing, and has been awarded several
His research areas include design of LV LP VLSI circuits and RF circuits patents in the area of analog VLSI. He has co-edited and co-authored several
for communications applications. He has published three book chapters, six books, including Analog VLSI Signal and Information Processing, (New York:
journal papers, and 20 conference papers. He holds one U.S. patent. McGraw-Hill, 1994). His current interests include LV LP VLSI circuits, RF
circuits for wireless communications, statistical computer-aided design, and
optimization for yield enhancement and VLSI information processing. He has
advised the work of 13 Ph.D. students, 17 visiting scholars, and 46 M.S.
students. He is the founder of the International Journal of Analog Integrated
Circuits and Signal Processing and serves as the Journal’s North American
Editor-In-Chief.
Dr. Ismail has been the recipient of several awards, including the IEEE
Outstanding Teacher Award (1984), the NSF Presidential Young Investigator
Award (1985), the OSU Lumley Research Award (1993 and 1997), the
SRC Inventor Recognition Awards (1992 and 1993), and a Fulbright/Nokia
Foundation Award (1995). He has served the IEEE in many editorial and
administrative capacities, including general chair of the 29th Midwest Sym-
posium on Circuits and Systems (CAS), chair of the CAS Analog Signal-
Processing Technical Committee, member of the CAS Society’s Board of
Governors, the CAS Society’s editor of the IEEE Circuits and Devices
Magazine and Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND
SYSTEMS, IEEE TRANSACTIONS ON NEURAL NETWORKS, and IEEE TRANSACTION
S ON VERY LARGE-SCALE INTEGRATION (VLSI) SYSTEMS. He is also a regular
columnist of the IEEE Circuits and Devices Magazine.
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