IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

8, AUGUST 2014

3951

A Nine-Level Grid-Connected Converter Topology

for Single-Phase Transformerless PV Systems
Giampaolo Buticchi, Member, IEEE, Davide Barater, Student Member, IEEE, Emilio Lorenzani, Member, IEEE,
Carlo Concari, Member, IEEE, and Giovanni Franceschini

AbstractThis paper presents a single-phase transformerless

grid-connected photovoltaic converter based on two cascaded full
bridges with different dc-link voltages. The converter can synthesize up to nine voltage levels with a single dc bus, since one
of the full bridges is supplied by a flying capacitor. The multilevel output reduces harmonic distortion and electromagnetic
interference. A suitable switching strategy is employed to regulate
the flying-capacitor voltage, improve the efficiency (most devices
switch at the grid frequency), and minimize the common-mode
leakage current with the help of a novel dedicated circuit (transient circuit). Simulations and experiments confirm the feasibility
and good performance of the proposed converter.
Index TermsLeakage current, multilevel systems, photovoltaic (PV) systems, pulsewidth modulation (PWM) inverters.

I. I NTRODUCTION

RID-CONNECTED photovoltaic (PV) converters represent the most widespread solution for residential renewable energy generation. While classical designs of PV converters
feature a grid frequency transformer, which is a typically heavy
and costly component, at the interface between the converter
and the electrical grid, researchers are now considering transformerless architectures in order to reduce costs and weight and
improve efficiency. Removing the grid frequency transformer
entails all the benefits above but worsens the output power quality, allowing the injection of dc current into the grid [1], [2] and
giving rise to the problem of ground leakage current [3], [4].
Although the active parts of PV modules might be electrically insulated from the ground-connected mounting frame, a
path for ac ground leakage currents generally exists due to a
parasitic capacitance between the modules and the frame and
to the connection between the neutral wire and the ground,
usually realized at the low-voltage/medium-voltage (LV/MV)
transformer [3]. In addition to deteriorating power quality, the
ground leakage current increases the generation of electromagnetic interference and can represent a safety hazard, so that

Manuscript received March 4, 2013; revised June 13, 2013 and August 1,
2013; accepted September 16, 2013. Date of publication October 21, 2013;
date of current version February 7, 2014.
G. Buticchi, D. Barater, C. Concari, and G. Franceschini are with the Department of Information Engineering, University of Parma, 43124 Parma, Italy
(e-mail: giampaolo.buticchi@unipr.it; davide.barater@nemo.unipr.it; carlo.
concari@unipr.it; giovanni.franceschini@unipr.it).
E. Lorenzani is with the Department of Science and Methods for Engineering, University of Modena and Reggio Emilia, Modena, Italy (e-mail: emilio.
lorenzani@unimore.it).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2013.2286562

international regulations pose strict limits to its magnitude. This

issue must be confronted in all transformerless PV converters,
regardless of architecture. In particular, in full-bridge-based
topologies, the ground leakage current is mainly due to highfrequency variations of the common-mode voltage at the output
of the power converter [4]. Several solutions can be found in
literature aiming at the reduction of the common-mode voltage
harmonic content [5][7]. Once the grid frequency transformer
is removed from a PV converter, the bulkiest wound and reactive components that remain are those that form the output
filter used to clean the output voltage and current from highfrequency switching components. Further reduction in cost
and weight and improvement in efficiency can be achieved
by reducing the filter size, and this is the goal of multilevel
converters.
Multilevel converters have been investigated for years [8],
but only recently have the results of such researches found their
way to commercial PV converters. Since they can synthesize
the output voltages using more levels, multilevel converters outperform conventional two- and three-level converters in terms
of harmonic distortion. Moreover, multilevel converters subdivide the input voltage among several power devices, allowing
for the use of more efficient devices. Multilevel converters were
initially employed in high-voltage industrial and powertrain
applications. They were first introduced in renewable energy
converters inside utility-scale plants, in which they are still
largely employed [9][13]. Recently, they have found their
way to residential-scale single-phase PV converters, where they
currently represent a hot research topic [14][29]. Single-phase
multilevel converters can be roughly divided into three categories based on design: neutral point clamped (NPC), cascaded
full bridge (CFB), and custom.
In NPC topologies, the electrical potential between the PV
cells and the ground is fixed by connecting the neutral wire of
the grid to a constant potential, resulting from a dc-link capacitive divider [15]. A huge advantage is that single-phase NPC
converters are virtually immune from ground leakage currents,
although the same is not true for three-phase NPC converters
[12], [30]. A recent paper has proposed an interesting NPC
design for exploiting next-generation devices such as super
junction or SiC MOSFETs [16]. The main drawback of NPC
designs, with respect to full bridge, is that they need twice the
dc-link voltage.
CFBs make for highly modular designs. Usually, each full
bridge inside a CFB converter needs an insulated power supply,
matching well with multistring PV fields [17]. In this case,
sequential permutation of the full bridges can be used to evenly

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share power among the parts and to mitigate the effects of

partial shading [17][20]. As an alternative, only one power
supply can be used if the output voltage is obtained through a
transformer [21], [31]. CFB converters have also been proposed
for stand-alone applications [17], [22]. CFBs give developers
many degrees of freedom for the control strategy. Together
with the aforementioned sequential permutation and with phase
shifting [19], artificial neural networks [23] and predictive control [24] have been proposed to minimize harmonic distortion
and achieve maximum power point tracking (MPPT). A CFB
made up of n full bridges (and at least 4n power switches)
can synthesize 2n + 1 voltage levels when the supply voltage
is the same for each full bridge. Custom architectures can
generally provide more output levels with a given number of
active devices, and custom converters generally need custom
pulsewidth modulation (PWM) and control schemes [25][27],
although unified control schemes for different types of multilevel converters have been proposed [28]. In addition to using
less switches, custom architectures can be devised so that some
of the switches commutate at the grid frequency, thus improving the efficiency [29]. Reduction in the switches-per-outputvoltage-level ratio can be achieved in CFB structures if different
supply voltages are chosen for each full bridge (asymmetrical
CFBs) [32], [33]. The topology proposed in this paper consists
of two asymmetrical CFBs, generating nine output voltage
levels. In the proposed converter, the dc voltage source supplies
one of the full bridges, whereas a flying capacitor supplies the
other one. By suitably controlling the ratio between the two
voltages, different sets of output levels can be obtained.
Moreover, the flying capacitor used as a secondary energy
source allows for limited voltage boosting, as it will result
clear in the following section. The number of output levels per
switch (eight switches, nine levels) is comparable to what can
be achieved using custom architectures. In fairness, it should
be noted that two additional very low power switches and a
line frequency switching device [transient circuit (TC)] were
included in the final topology in order to reduce the ground
leakage current. The custom converter proposed in [29] generates five levels with six switches but has no intrinsic boosting
capability. In [25], Rahim et al. used three dc-bus capacitors in
series together with two bidirectional switches (diode bridge +
unidirectional switch) and an H-bridge to generate seven output
levels; however, they give no explanations on how they keep
the capacitor voltages balanced. In [27], five switches, four
diodes, and two dc-bus capacitors in series are used to generate
five levels with boosting capability. Again, no mention is made
about how the capacitors are kept balanced.
In PV applications, the PV field dc voltage is constantly
changing due to variations of solar radiation and to the MPPT
algorithm, but the output voltage has to be controlled regardless
of the voltage ratio. This problem was studied in [34][36],
measuring the separate full-bridge voltages and computing online the duty cycles needed to balance the different voltages, and
analyzing also the power balance between the separate cells.
A similar approach is followed in this paper. Moreover, the
developed PWM strategy, in addition to controlling the flyingcapacitor voltage, with the help of the specific TC illustrated
in Section IV, minimizes the ground leakage current. Finally, it

Fig. 1.

CFB with a flying capacitor.

is important to put in evidence that the proposed converter can

work at any power factor as reported in Section III, while not
all the alternative proposals can continuously supply reactive
power [37], [38]
The proposed topology was presented by the authors in a
previous paper [39]. With respect to the previous work, this
paper was rewritten and presents a better organization and a
new set of simulation and experimental results with different
setups. This paper is organized as follows: Section II presents
the power converter topology and the PWM control strategy
chosen in order to maximize the performance with the use of
a low-cost digital signal processor (DSP). Section III describes
the regulation of the flying capacitor used to supply the second
full bridge of the CFB topology. Section IV describes the
principle of operation of the additional components able to
reduce the ground leakage current. Sections V and VI show
the simulation and experimental results, whereas Section VII
reports the concluding remarks.
II. N INE -L EVEL C ONVERTER AND
PWM C ONTROL S TRATEGY
The proposed converter is composed of two CFBs, one of
which is supplied by a flying capacitor (see Fig. 1). This
basic topology was already presented in [34]. In this paper, a
different PWM strategy was developed in order to allow gridconnected operation with no galvanic isolation (transformerless
solution) for this basic topology. Since the PWM strategy alone
is not sufficient to maintain a low ground leakage current, other
components were added as will be shown in Section IV. As it
will be described in the following, the proposed PWM strategy
stretches the efficiency by using, for the two legs where PWMfrequency switching does not occur, devices with extremely
low voltage drop, such as MOSFETs lacking a fast recovery
diode. In fact, the low commutation frequency of those two legs
allows, even in a reverse conduction state, the conduction in
the channel instead of the body diode (i.e., active rectification).
Insulated-gate bipolar transistors (IGBTs) with fast antiparallel
diodes are required in the legs where high-frequency hardswitching commutations occur. In grid-connected operation,
one full-bridge leg is directly connected to the grid neutral wire,
whereas the phase wire is connected to the converter through an
LC filter.

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TABLE I
D ESCRIPTION OF THE C ONVERTER O PERATING Z ONES

As it will be described and justified in the following section,

flying-capacitor voltage Vfc is kept lower, at steady state, than
dc-link voltage VDC . Accordingly, the full bridge supplied by
the dc link is called the high-voltage full bridge (HVFB),
whereas the one with the flying capacitor is the low-voltage
full-bridge (LVFB).
The CFB topology allows certain degrees of freedom in the
control, so that different PWM schemes can be considered;
however, the chosen solution needs to satisfy the following
requirements.
1) Most commutations must take place in the LVFB to limit
the switching losses.
2) The neutral-connected leg of the HVFB needs to switch
at grid frequency to reduce the ground leakage current.
3) The redundant states of the converter must be properly
used to control the flying-capacitor voltage.
4) The driving signals must be obtained from a single carrier
for a low-cost DSP to be used as a controller.
The switching pattern described in Table I was developed
starting from the above requirements. Requirement 2), in particular, is due to the aforementioned parasitic capacitive coupling
between the PV panels and their frames, usually connected
to the earth. Capacitive coupling renders the common-mode
current inversely proportional to the switching frequency of the
neutral-connected leg.
The converter can operate in different output voltage zones,
where the output voltage switches between two specific levels.
The operating zone boundaries vary according to the dc-link
and flying-capacitor voltages, and adjacent zones can overlap
(see Fig. 2).
In zones labeled A, the contribution of the flying-capacitor
voltage to the converter output voltage is positive, whereas
it is negative in B zones. Constructive cascading of the two
full bridges can, therefore, result in limited output voltage
boosting. Depending on the Vfc /VDC ratio, one of the (a) or
(b) situations in Fig. 2 can ensue; nevertheless, the operation
of the converter does not differ much in the two cases. If
two overlapping operating zones can supply the same output
voltage, the operating zone to be used is determined taking
into account the regulation of Vfc , as will be described in
Section III.
As mentioned in the introduction, the duty cycles are calculated on-line by a simple equation, similarly to the approach
presented in [34]. The switching pattern depends on the instan
and on
taneous fundamental component of output voltage Vout
the measured values of Vfc and VDC .

Fig. 2. Operating zones under different Vfc ranges. (a) Vfc < 0.5VDC .
(b) Vfc > 0.5VDC .

If Vfc = VDC /3, the converter can synthesize nine equally

spaced output voltage levels. Fig. 3 refers to this case and shows
the theoretical waveforms, where one leg of the HVFB operates
at grid frequency and one leg of the LVFB at five times the grid
frequency.
Moreover, apart from zone 2, no high-frequency commutations occur in the whole HVFB (see Fig. 2). Since the voltage
regulation of the flying capacitor takes place in zone 2, the
zone-2 behavior is more articulated and will be described in
detail in the following section.
III. F LYING -C APACITOR VOLTAGE R EGULATION
Since the main task facing a grid-connected PV converter is
the transfer of active power to the electrical grid, controlling the
voltage of the flying capacitor is critical.
Flying-capacitor voltage Vfc is regulated by suitably choosing the operating zone of the converter depending on the instantaneous output voltage request. Depending on the operating
zone of the converter (see Fig. 2), Vfc can be added to

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 8, AUGUST 2014

Fig. 4. Converter configurations for the regulation of the flying capacitor.

(a) Flying-capacitor charge. (b) Flying-capacitor discharge.

Fig. 3. Theoretical waveforms of the proposed converter. (a) PWM switching

patterns. (b) Output voltages.

(A zones) or subtracted from (B zones) the HVFB output voltage, charging or discharging the flying capacitor. In particular,
considering a positive value of the current injected into the grid,
the flying capacitor is discharged in A zones and charged in
B zones. Since a number of redundant switch configurations
can be used to synthesize the same output voltage waveform,
it is possible to control the voltage of the flying capacitor,
forcing the converter to operate more in A zones when the
flying-capacitor voltage is higher than a reference value or more
in B zones when it is lower than a reference value. Similar
considerations hold in case of a negative injected grid current.
In each case, some commutations between nonadjacent output
levels must inevitably occur (level skipping), with the drawback
of a certain increase in the output current ripple.
The voltage control of the flying capacitor (which determines
the zone-A or zone-B operation) is realized by a simple hysteresis control.

Fig. 4 illustrates the regulation of Vfc supposing a positive

grid current with Vout > 0 and Vfc < 0.5VDC . If Vfc is too low,
output level Vfc can be replaced by VDC Vfc , thus switching
between the 0 and VDC Vfc output levels [zone 2B, Fig. 4(a)].
Similarly, if Vfc is too high, VDC Vfc can be replaced with Vfc ,
causing the converter to switch between the Vfc and VDC output
levels [zone 2A, Fig. 4(b)]. In Fig. 4, the devices switching
at low frequency are short circuited when on and not shown
when off.
Similar Vfc regulation strategies can be likewise developed
for the case when Vfc > 0.5VDC .
If Vfc < 0.5VDC , in order to minimize the current ripple,

< VDC Vfc (zones 3

zone 2 is chosen only when Vfc < Vout
are otherwise chosen), limiting level skipping. Level skipping
always occurs if Vfc > 0.5VDC ; hence, any A or B zone can be
chosen according to the voltage regulation algorithm.
Since the dc-link voltage can go through sudden variations
due to the MPPT strategy, it is important that the converter is
able to work in any [VDC , Vfc ] condition. While the distortion
of the output voltage is minimized through the on-line dutycycle computation, it is important to assess the capability of
the converter to regulate the flying-capacitor voltage under
different operating conditions.
The ability to control the flying-capacitor voltage through
the proposed PWM strategy has been studied in simulation by
determining the average flying-capacitor current under a large
span of VDC and Vfc values. In the simulations,
grid voltage
vgrid is sinusoidal with an amplitude of 230 2 V; however,
the same results hold even for different voltages if the ratio
Vgrid /VDC remains constant.
The results in the case of unity power factor are summarized
in Fig. 5. The white area covers the range over which Vfc
is fully controllable, whereas it cannot be controlled in the
gray and black regions. In particular, in the black region, Vfc
cannot be decreased, whereas in the gray region, it cannot be
increased.

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Fig. 5.

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Flying-capacitor voltage regulation regions.

Therefore, the white region located between the gray and

black ones is a stable and safe operating area for the converter.
Even if Vfc was not actively controlled, it would be constrained
inside the white region, ensuring that the flying capacitor cannot
be over charged nor completely discharged.
The results are not affected by the amplitude of the grid
current. Nevertheless, the power factor affects the results: a
lower power factor determines widening of the controllable
area. When the converter supplies only reactive power, Vfc is
controllable in the entire [VDC , Vfc ] domain.
IV. A PPLICATION TO T RANSFORMERLESS
PV C ONVERTERS TC
A particular feature of the commutation pattern of Table I
is that T3 and T4 switch at grid frequency, commutating at
every zero crossing of vgrid . If the zero crossing with a negative
derivative is considered, T4 opens and T3 closes, changing the
neutral wire voltage (and thus the voltage across the parasitic
capacitance of the PV field) from zero to VDC . For this reason,
the commutation can cause a large surge of leakage current that
can decrease the power quality and damage the PV modules. A
proper TC was designed to decrease these surge currents.
Fig. 6(a) shows the proposed converter topology; it is constituted of the two-cell CFB described in Fig. 1 with the
addition of the TC components. In order to better understand
the behavior of the TC, the distributed parasitic capacitance of
the PV source was modeled with a simple equivalent parasitic
capacitance, i.e., Cp , connected between the negative pole of
the dc link and the ground.
The TC consists of two low-power MOSFETs M1 and M2,
bidirectional switch T9, and resistor RT . When the converter
enters operating zone 1, the HVFB output voltage must be
zero, obtained by switching T1 and T3 or T2 and T4 on.
Nevertheless, to operate the TC, when entering zone 1, T1, T2,
T3, and T4 are all kept off, while T9 is on. This keeps the
neutral potential floating, so that the voltage on the parasitic

Fig. 6. Ground leakage current limitation circuit topology and behavior.

(a) TC topology. (b) TC operation. (c) TC waveforms.

capacitor vground stays constant [see Fig. 6(b)]. At this point,

one of M1 and M2 is turned on (M1 if the slope of the zero
crossing is negative and M2 if positive). So doing, Cp is charged
through RT with a first-order transient [see Fig. 6(c)], limiting
the current surge.
Whereas the TC introduces additional components, they can
be selected with current ratings much lower than the devices of
the CFB. Moreover, the power loss due to the added resistor is
negligible. Estimating the energy lost charging and discharging
a capacitor Cp to VDC averaged over a line period T by Ptc =
2
/T , with Cp = 200 nF and VDC = 300 V, a dissipation
Cp VDC
of about 1 W is obtained. The operation of the TC is not affected
by the power factor because in grid-connected operation, the
output voltage is always very close to the grid voltage. The correct operation of the TC requires the grid voltage instantaneous
angle that can be obtained with a phase-locked loop (PLL) fed
by the grid voltage [40].

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Fig. 7. Simulation results with VDC = 300 V.

V. S IMULATION R ESULTS
The proposed converter and PWM were extensively simulated under MATLAB/Simulink, using the PLECS toolbox.
The simulations cover a large range of active and reactive
power injected into the grid, dc-link voltage, and equivalent PV
parasitic capacitance.
A dc-link voltage VDC = 300 V was used in the simulations,
unless otherwise specified. The grid was represented by a sinusoidal voltage source at 50 Hz of amplitude vgrid = 230 V. The
output filter was composed of a capacitor Cf = 1 F and an
inductor Lf = 1.5 mH. An additional inductor Lgrid = 40 H
represented the total distributed grid inductance. The PWM
frequency was fs = 20 kHz, and the flying capacitor had a
capacitance of Cfc = 500 F. The surge limiting resistance
RT was selected as 1.5 k. The current injected into the grid
was regulated through a proportional-integral regulator plus
feedforward at igrid = 8.5 A rms.
As stated above, the injection of both active and reactive
power was simulated; however, the switches being ideal and
the commutations instantaneous, performance did not depend
on the power factor. For this reason, only the unity power factor
simulation results are reported. In the simulations, the grid
voltage angle information is available; hence, a PLL was not
employed.
Fig. 7 shows the output voltage and current under different
conditions of the dc voltage ratio. As expected, the THD of the
grid current increases with the dc voltage ratio, being 2.7%, 3%,
and 3.3%, respectively, for Vfc /VDC = 0.33, Vfc /VDC = 0.5,
and Vfc /VDC = 0.66.
Fig. 8 shows the performance of the TC with a parasitic
capacitance of the PV field of Cp = 200 nF. The ground
leakage current results iground = 30 mA rms. Please note that

Fig. 8.

TC behavior with a 200 nF parasitic capacitor.

only a common-mode inductor of 1 mH was employed in this

setup. The ground leakage current could be further reduced by
a more accurate design of the common-mode filter.
In order to obtain further indications about the regulation of
the flying-capacitor voltage, Fig. 9 reports the result of a step
variation of Vfc from 150 to 190 V (inside the controllable
region in Fig. 5) occurring at time 0.1 s. As it can be seen,
the average value of Vfc rapidly (in about 25 ms) rises to the
reference value without any overshoot.
VI. E XPERIMENTAL R ESULTS
A prototype nine-level converter was designed and built in
order to test the performance of the proposed solution. The
prototype is based on the Texas Instruments TMS320F28335
microcontroller and features the two full bridges, the TC, the
sensors, and the output filter. Infineon IKW30N60H3 IGBTs

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3957

Fig. 12. Experimental results with unity power factor and Vfc = 0.33VDC .
Vout (300 V/div), igrid (10 A/div), and vgrid (200 V/div). Time base 5 ms/div.

Fig. 9. Vfc step variation response.

Fig. 13. Experimental results with unity power factor and Vfc = 0.5VDC .
Vout (300 V/div), igrid (10 A/div), and vgrid (200 V/div). Time base 5 ms/div.
Fig. 10. Block scheme of the delay-based PLL.

Fig. 11. Schematic of the test bed employed for the experiments.

and ST Microelectronics STW55NM60ND MOSFETs were

employed as active devices. The microcontroller implements
the PWM signal generation, the current controller, and the
proposed modulation. Synchronization with the grid is realized
with a transport delay-based PLL structure (see Fig. 10). The
schematic is the same as that of the dq PLL in a synchronous
reference frame, except that the quadrature input signal and
the cosine of the estimated angle are realized with a constant
delay equal to 1/4 of the nominal grid voltage period T . As
demonstrated in [41], this modification allows to obtain a zero
steady-state error for small-frequency variations of the input
signal with respect to the nominal grid voltage one.
Fig. 11 shows a schematic of the test bed. The converter
was powered by an Agilent Technologies dc power supply,
and its output was directly connected to the grid. In order to
simulate the parasitic capacitance of the PV field, a capacitor
was connected between the negative dc-link terminal and the
neutral wire. Although in actual PV fields the parasitic capaci-

Fig. 14. Experimental results with unity power factor and Vfc = 0.66VDC .
Vout (300 V/div), igrid (10 A/div), and vgrid (200 V/div). Time base 5 ms/div.

tance is distributed between both the positive and negative sides

of the dc link, for analysis purposes, it can be considered as
concentrated only on the negative side.
For consistency, the same circuit parameters were chosen
as in the simulations, and the output current and voltage are
reported for different dc voltage ratios. Figs. 1214 refer to Vfc /
VDC = 0.33, Vfc /VDC = 0.5, and Vfc /VDC = 0.66, respectively.
HV
,
For completeness, the output voltage of the HVFB, i.e., Vout
LV
and of the LVFB, i.e., Vout is presented in Fig. 15. It can be
noted that the high-frequency voltage switching of the HVFB
happens only in a limited time interval during a period of the
grid voltage.
The experimental results show a low-frequency crossover
distortion, absent in the simulations, that is more evident for
Vfc /VDC = 0.33. This behavior can be explained with the presence of dead times between the commutations of the devices.
As was shown in [32], extreme values of duty cycles lead to

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Fig. 15. Experimental results with unity power factor and Vfc = 0.5VDC .
HV (300 V/div), and V LV (200 V/div). Time base 5 ms/div.
Vout (300 V/div), Vout
out

Fig. 16. Experimental results with power factor 0.85 and Vfc = 0.5VDC .
Vout (300 V/div), igrid (10 A/div), and vgrid (200 V/div). Time base 5 ms/div.

higher current distortion. When the dc voltage ratio is low,

the duty cycle is forced to go all the way from 0% to 100%,
leading to higher THD. The best THD performance is obtained
at Vfc /VDC = 0.5.
The other component of the low-frequency distortion can
be explained with the current controller chosen. In fact, it
is clear from the experimental results that the grid voltage
presents a marked third-harmonic distortion, typical of LV
distribution grids. The finite rejection to disturbances of the
current controller is the cause of the low-frequency distortion
near the peaks of the grid voltage.
Reactive power operation is shown in Fig. 16 for Vfc /VDC =
0.5. With respect to the simulations, the THD deteriorates due
to the low-frequency distortion. As there is no difference in the
behavior with inductive and capacitive power factor, only the
measurement with capacitive power factor is shown.
The TC waveforms are shown in Fig. 17, with a Cp = 200 nF
capacitor accounting for the parasitic capacitance of the PV
field. The obtained rms current of about 30 mA is in line with
the simulations.
The dynamic behavior of the proposed solution was evaluated imposing step variations of the desired injected grid current
and of the floating-capacitor voltage. To be consistent with the
simulation results, the test was run in the same conditions as
in Fig. 9. Fig. 18 shows the dynamic system response in the
presence of a step variation of the injected grid current set point
from 1.2Arms to 7.4Arms . It is important to note that the current
step variation, which can happen over a grid voltage period due
to a change in solar radiation, is typically lower. The higher step
variation puts in evidence the effectiveness of the solution.

Fig. 17. TC behavior. vground (200 V/div) and iground (500 mA/div). Time
base 5 ms/div.

Fig. 18. Experimental results with step variation of the injected grid current
from 1.2Arms to 7.4Arms . igrid (10 A/div) and vgrid (100 V/div). Time base
50 ms/div.

Fig. 19. Experimental results with step variation of Vfc from 150 to 190 V.
igrid (20 A/div), vgrid (200 V/div), and Vfc (100 V/div). Time base 20 ms/div.

Fig. 19 shows the evolution of the flying-capacitor voltage

when a step variation of its desired value is performed. The
desired variation of Vfc is satisfied by the floating-capacitor
voltage regulation realized inside the PWM modulator, as
described in Section III. This experiment was carried out in
order to evaluate the dynamic behavior of the floating-capacitor
voltage regulation system. It can be seen that the desired Vfc
value (190 V) is reached after only one period of the grid
voltage. This result is in agreement with the simulations. A
similar dynamic behavior can be obtained in the case of step
variation of the input dc voltage VDC . The step variation of VDC
was not conducted because of test bed limitations. The ripple of
the flying-capacitor voltage in Fig. 19 is due to the small value
of capacitance chosen (Cfc = 500 F). Inverter manufacturers
usually choose higher values of electrolytic capacitance in order
to increase the capacitor lifetime. However, the performance of
the converter is good even with this small capacitor.

BUTICCHI et al.: GRID-CONNECTED CONVERTER TOPOLOGY FOR TRANSFORMERLESS PV SYSTEMS

TABLE II
E XPERIMENTAL M EASUREMENTS OF E FFICIENCY AND THD

Fig. 20. Spectrum of vout (20 dB/div) in the case of the proposed nine-level
converter. Frequency base 10 kHz/div.

The efficiency and THD measurements were performed

using an N4L PPA5530 power analyzer without taking into
account the power consumed by the control logic or the gate
driver circuits. The results are summarized in Table II. The measurements were performed without any form of compensation
for dead times or voltage drops on the power switches.
Finally, the output voltage spectrum of the proposed solution is shown in Fig. 20. This spectrum shows that the main
switching harmonics are located at multiples of the switching
frequency. A feature that can be seen from the FFT analysis
is that several spectral lines are located near the multiples of
the switching frequency, resulting in some degree of spreadspectrum output. This behavior is due to the switching pattern
variations deriving from the regulation of the flying capacitor.
VII. C ONCLUSION
This paper has proposed a novel nine-level grid-connected
transformerless PV converter based on a CFB topology with two
full bridges, one of which is supplied by a floating capacitor.
A suitable PWM strategy was developed in order to improve
efficiency (most power devices commutate at low frequency)
and, with the help of a specific TC, minimize the ground
leakage current.
The proposed PWM strategy can regulate the voltage across
the flying capacitor. Simulations were performed to assess the
ability to regulate the flying-capacitor voltage in a wide range
of operating conditions.
Extensive simulations and experiments confirm the results
of the theoretical analysis and show the good performance of
the converter as far as ground leakage current and harmonic
distortion are concerned. Despite the use of traditional power
devices for the laboratory prototype, the experimentally measured efficiency was fairly good.
The proposed converter can continuously operate at arbitrary
power factors, has limited boosting capability, and can produce
nine output voltage levels with 11 power switches, of which
three are low power switches for the TC and only four need to
be controlled by PWM.

3959

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Giampaolo Buticchi (S10M13) was born in

Parma, Italy, in 1985. He received the Masters degree in electronics engineering and the Ph.D. degree
in information technology from the University of
Parma, Parma, Italy, in 2009 and 2013, respectively.
He is currently a Postdoctoral Research Associate
with the University of Parma. His research area is
focused on power electronics for renewable energy
systems, static energy conversion, and motor drives.

Davide Barater (S11) was born in Pontremoli,

Italy, in 1983. He received the M.S. degree in electronics engineering from the University of Parma,
Parma, Italy, in 2009, where he is currently working
toward the Ph.D. degree in information technology.
His research area is focused on power electronics
and static energy conversion.

Emilio Lorenzani (S03M07) was born in Parma,

Italy, in 1976. He received the Masters degree in
electronics engineering and the Ph.D. degree in information technology from the University of Parma,
Parma, in 2002 and 2006, respectively.
Since 2011, he has been with the Department
of Science and Engineering Methods, University of
Modena and Reggio Emilia, Modena, Italy. He is
the author or coauthor of more than 50 technical
papers and holds four industrial patents. His research
activity is mainly focused on power electronics for
renewable energy resources, electric drives, and electric motor diagnostics.

Carlo Concari (S98M06) was born in San

Secondo Parmense, Italy, in 1976. He received the
M.S. degree in electronics engineering and the Ph.D.
degree in information technology from the University of Parma, Parma, Italy, in 2002 and 2006,
respectively.
Since 2006, he has been an Assistant Professor
with the Department of Information Engineering,
University of Parma. He is the author or coauthor of
more than 40 technical papers. His research activity
is mainly focused on power electronics, digital drive
control, static power converters, and electric machine diagnostics.

Giovanni Franceschini was born in Reggio Emilia,

Italy, in 1960. He received the Masters degree
in electronics engineering from the University of
Bologna, Bologna, Italy.
Since 1990, he has been with the Department
of Information Engineering, University of Parma,
Parma, Italy, where he was first an Assistant Professor and is currently a Full Professor of electric
machines and drives. His research interests include high-performance electric drives and diagnostic techniques for industrial electric systems.