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Parte 2
Corso di Architettura degli Elaboratori (laboratorio)
Overview
! Part 1 Gate Circuits and Boolean Equations
Binary Logic and Gates
Boolean Algebra
Standard Forms
Two-Level Optimization
Map Manipulation
Practical Optimization (Espresso)
Multi-Level Circuit Optimization
Chapter 2 - Part 2
Circuit Optimization
! Goal: To obtain the simplest
implementation for a given function
! Optimization is a more formal approach
to simplification that is performed using
a specific procedure or algorithm
! Optimization requires a cost criterion to
measure the simplicity of a circuit
! Distinct cost criteria we will use:
Literal cost (L)
Gate input cost (G)
Gate input cost with NOTs (GN)
Chapter 2 - Part 2
Literal Cost
! Literal a variable or it complement
! Literal cost the number of literal
appearances in a Boolean expression
corresponding to the logic circuit
diagram
! Examples:
F = BD + A B C + A C D
L=8
F = BD + A BC + A B D + AB C
L=?
F = (A + B)(A + D)(B + C + D)(B + C + D) L = ?
Which solution is best?
Chapter 2 - Part 2
! Example:
F = BD + A B C + AC D
G = 11, GN = 14
F = BD + A B C + A B D + AB C
G = , GN =
F = (A + B)(A + D)(B + C + D)( B + C + D) G = , GN =
Which solution is best?
Chapter 2 - Part 2
B
C
A
!
!
!
!
A
B
C
F = A B C + AB C
L = 6 G = 8 GN = 11
F = (A + C)( B + C)( A + B)
L = 6 G = 9 GN = 12
Chapter 2 - Part 2
of a Boolean function
Adjacent squares differ in the value of one variable
Alternative algebraic expressions for the same function
are derived by recognizing patterns of squares
Chapter 2 - Part 2
10
Chapter 2 - Part 2
11
Function Table
Input
Values
(x,y)
Function
Value
F(x,y)
00
01
10
11
a
b
c
d
K-Map
y=0
x=0 a
x=1 c
y=1
b
d
Chapter 2 - Part 2
12
x=1
F( x , y ) = x y + x y = x
Chapter 2 - Part 2
13
G = x+y y = 0 y = 1
x=0
x=1
G( x , y ) = (x y + x y )+ (xy + x y )= x + y
Duplicate x y
Chapter 2 - Part 2
14
yz=00
yz=01
yz=11
yz=10
x=0
m0
m1
m3
m2
x=1
m4
m5
m7
m6
xyz
xyz
xyz
x=1
xyz
xyz
yz=10
xyz
xyz
15
Adjacency
Chapter 2 - Part 2
16
x
x
yz
00 01 11 10
0 0
x 1
Chapter 2 - Part 2
17
Example Functions
! By convention, we represent the minterms of F by a "1"
in the map and leave the minterms of F blank
y
! Example:
F(x, y, z) = m(2,3,4,5)
x 41
! Example:
G(a, b, c) = m(3,4,6,7)
! Learn the locations of the 8
indices based on the variable x
order shown (x, most significant
and z, least significant) on the
map boundaries
0
4
1
7
1
2
6
z
Chapter 2 - Part 2
18
Combining Squares
! By combining squares, we reduce number of
literals in a product term, reducing the literal cost,
thereby reducing the other two cost criteria
On a 3-variable K-Map:
One square represents a minterm with three
variables
Two adjacent squares represent a product term with
two variables
Four adjacent terms represent a product term
with one variable
Eight adjacent terms is the function of all ones (no
variables) = 1.
Chapter 2 - Part 2
19
F = m(2,3,6,7)
1
7
1
1
6
1
z
! Applying the Minimization Theorem three
times:
F( x, y , z ) = x y z + x y z + x y z + x y z
= yz + y z
=y
Chapter 2 - Part 2
20
Three-Variable Maps
! Reduced literal product terms for SOP standard
forms correspond to rectangles on K-maps
containing cell counts that are powers of 2.
! Rectangles of 2 cells represent 2 adjacent
minterms; of 4 cells represent 4 minterms that
form a pairwise adjacent ring.
! Rectangles can contain non-adjacent cells as
illustrated by the pairwise adjacent ring
above.
Chapter 2 - Part 2
21
Three-Variable Maps
! Topological warps of 3-variable K-maps
that show all adjacencies:
! Venn Diagram
0
Cylinder
4 X
6 7 5
Y 3 1Z
2
Chapter 2 - Part 2
22
Three-Variable Maps
! Example Shapes of 2-cell Rectangles:
z
! Read off the product terms for the
rectangles shown
Chapter 2 - Part 2
23
Three-Variable Maps
! Example Shapes of 4-cell Rectangles:
z
! Read off the product terms for the
rectangles shown
Chapter 2 - Part 2
24
! Example:
xy
1 1 1
x
1 1
z
F(x, y, z) =
z+xy
Chapter 2 - Part 2
25
Chapter 2 - Part 2
26
Variable Order
W
12
13
15
14
11
10
Z
Chapter 2 - Part 2
27
corresponding to:
A single 1 = 4 variables, (i.e. Minterm)
Two 1s = 3 variables,
Four 1s = 2 variables
Eight 1s = 1 variable,
Sixteen 1s = zero variables (i.e.
Constant "1")
Chapter 2 - Part 2
28
Four-Variable Maps
! Example Shapes of Rectangles:
Y
12
13
15
14
11
10
Z
Chapter 2 - Part 2
29
Four-Variable Maps
Chapter 2 - Part 2
30
Four-Variable Maps
! Example Shapes of Rectangles:
Y
12
13
15
14
11
10
Z
Chapter 2 - Part 2
31
Chapter 2 - Part 2
32
Chapter 2 - Part 2
33
Systematic Simplification
!A Prime Implicant is a product term obtained by combining
the maximum possible number of adjacent squares in the map
into a rectangle with the number of squares a power of 2.
34
BD
1
BD
A
AB
D
AD
BD
1
B
BD
1
B
BC
35
Chapter 2 - Part 2
36
Another Example
! Find all prime implicants for:
G(A, B, C, D) = m(0,2,3,4,7,12,13,14,15)
Hint: There are seven prime implicants!
Chapter 2 - Part 2
37
X
W
W
Z
Z
Chapter 2 - Part 2
38
39
00 01 03 02
40
Chapter 2 - Part 2
41
Optimization Algorithm
! Find all prime implicants.
! Include all essential prime implicants in the
solution
! Select a minimum cost set of non-essential
prime implicants to cover all minterms not yet
covered:
Obtaining an optimum solution: See Reading
Supplement - More on Optimization
Obtaining a good simplified solution: Use the
Selection Rule
Chapter 2 - Part 2
42
Chapter 2 - Part 2
43
1
1
A
1
1
D
1
D
44
1
A
x
1
1
D
Essential
Selected
B
A
x
1
D
Minterms covered by essential prime implicants
Chapter 2 - Part 2
45
Practical Optimization
! Problem: Automated optimization
algorithms:
require minterms as starting point,
require determination of all prime
implicants, and/or
require a selection process with a potentially
very large number of candidate solutions to
be found.
46
Chapter 2 - Part 2
47
Chapter 2 - Part 2
48
Multiple-Level Optimization
! Multiple-level circuits - circuits that are
not two-level (with or without input and/
or output inverters)
! Multiple-level circuits can have reduced
gate input cost compared to two-level
(SOP and POS) circuits
! Multiple-level optimization is performed
by applying transformations to circuits
represented by equations while
evaluating cost
Chapter 2 - Part 2
50
Transformations
! Factoring - finding a factored form from
SOP or POS expression
Algebraic - No use of axioms specific to
Boolean algebra such as complements or
idempotence
Boolean - Uses axioms unique to Boolean
algebra
51
Transformations (continued)
! Substitution of G into F - expression
function F as a function of G and some or
all of its original variables
! Elimination - Inverse of substitution
! Extraction - decomposition applied to
multiple functions simultaneously
Chapter 2 - Part 2
52
Transformation Examples
! Algebraic Factoring
F = A C D + A B C + ABC + AC D
G = 16
Factoring:
F = A (C D + BC) + A (BC + C D ) G = 16
Factoring again:
F = A C ( B + D ) + AC (B + D )
G = 12
Factoring again:
F = (A C + AC) (B + D)
G = 10
Chapter 2 - Part 2
53
Transformation Examples
! Decomposition
The terms B + D and A C + AC can be defined
as new functions E and H respectively,
decomposing F:
F = E H, E = B + D , and H = A C + AC G = 10
! This series of transformations has reduced G from
16 to 10, a substantial savings. The resulting
circuit has three levels plus input inverters.
Chapter 2 - Part 2
54
Transformation Examples
! Substitution of E into F
Returning to F just before the final factoring step:
F = A C ( B + D ) + AC (B + D)
G = 12
Defining E = B + D, and substituting in F:
F = A C E + ACE
G = 10
This substitution has resulted in the same cost as the
decomposition
Chapter 2 - Part 2
55
Transformation Examples
! Elimination
Beginning with a new set of functions:
X=B+C
Y=A+B
Z = AX + C Y
G = 10
Eliminating X and Y from Z:
Z = A (B + C) + C (A + B)
G = 10
Flattening (Converting to SOP expression):
Z = A B + A C + AC + BC
G = 12
This has increased the cost, but has provided an new
SOP expression for two-level optimization.
Chapter 2 - Part 2
56
Transformation Examples
! Two-level Optimization
The result of 2-level optimization is:
Z=AB+ C
G=4
! This example illustrates that:
Optimization can begin with any set of equations,
not just with minterms or a truth table
Increasing gate input count G temporarily during a
series of transformations can result in a final
solution with a smaller G
Chapter 2 - Part 2
57
Transformation Examples
! Extraction
Beginning with two functions:
E = A B D + A BD
H = B C D + BCD
G = 16
Finding a common factor and defining it as a
function:
F = B D + BD
We perform extraction by expressing E and H as
the three functions:
F = B D + BD, E = A F, H = CF
G = 10
The reduced cost G results from the sharing of logic
between the two output functions
Chapter 2 - Part 2
58
59
Chapter 2 - Part 2
60
Chapter 2 - Part 2
61
! Gate classifications
Primitive gate - a gate that can be described using a
single primitive operation type (AND or OR) plus an
optional inversion(s).
Complex gate - a gate that requires more than one
primitive operation type for its description
62
Buffer
! A buffer is a gate with the function F = X:
X
63
NAND Gate
! The basic NAND gate has the following symbol,
illustrated for three inputs:
AND-Invert (NAND)
X
Y
Z
F( X , Y , Z ) = X Y Z
64
F( X , Y , Z ) = X + Y + Z
Chapter 2 - Part 3
65
Chapter 2 - Part 3
66
NOR Gate
! The basic NOR gate has the following symbol,
illustrated for three inputs:
OR-Invert (NOR)
X
Y
Z
F(X, Y, Z) = X +Y+ Z
67
68
Chapter 2 - Part 3
69
70
! Definitions
The XOR function is: X Y = X Y + X Y
The eXclusive NOR (XNOR) function, otherwise
known as equivalence is: X Y = X Y + X Y
71
XNOR
Y XY
0
0
1
1
0
1
0
1
0
0
1
1
0
1
1
0
Y (XY)
or X Y
0
1
1
0
0
0
1
1
72
XOR/XNOR (Continued)
! The XOR function can be extended to 3 or more variables.
For more than 2 variables, it is called an odd function or
modulo 2 sum (Mod 2 sum), not an XOR:
X0 = X
X 1 = X
XX =0
XX =1
XY = YX
( X Y) Z = X ( Y Z ) = X Y Z
Chapter 2 - Part 3
73
! XNOR symbol:
Chapter 2 - Part 3
74
XOR Implementations
! The simple SOP implementation uses the
following structure: X
X Y
X Y
Y
Chapter 2 - Part 3
75
Chapter 2 - Part 2
76
77
Chapter 2 - Part 3
78
Y
Z
Chapter 2 - Part 3
79
Add odd parity bit to generate code words with even parity
Add even parity bit to generate code words with odd parity
Use odd parity circuit to check code words with even parity
Use even parity circuit to check code words with odd parity
80
Hi-Impedance Outputs
! Logic gates introduced thus far
have 1 and 0 output values,
cannot have their outputs connected together, and
transmit signals on connections in only one direction.
! Three-state logic adds a third logic value, HiImpedance (Hi-Z), giving three states: 0, 1, and Hi-Z
on the outputs.
! The presence of a Hi-Z state makes a gate output as
described above behave quite differently:
1 and 0 become 1, 0, and Hi-Z
cannot becomes can, and
only one becomes two
Chapter 2 - Part 3
81
Chapter 2 - Part 3
82
Chapter 2 - Part 3
83
Resolution Table
B1
B0
OUT
Hi-Z
Hi-Z
Hi-Z
Hi-Z
84
IN0
EN1
IN1
OL
0
0
1
X
X
0
1
1
0
0
1
X
0
1
0
1
0
1
X
0
0
X
X
1
X
IN0
S
EN0
OL
IN1
EN1
85
Chapter 2 - Part 2
86
A - AND
O - OR
I - Inverter
Numbers of inputs on first-level gates or
directly to second-level gates
Chapter 2 - Part 3
87
Chapter 2 - Part 3
88
Chapter 2 - Part 2
89
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Chapter 2 - Part 2
90