Synopsys Tools: What they do

Synopsys Tools - Mike Henry

Astro
Integrated circuit floorplan/layout/P&R tool. Does place and route of
netlists and interfaces with other Synopsys tools for tasks such as LVS,
Sign-off, and DRC. Synopsys is replacing the Astro with IC Compiler so
there hasn't been an update in a while.
CosmosScope
Waveform viewer. Views waveforms generated from a number of
tools, including HSPICE, HSIM, and NanoSim
Synthesis Library
A package of tools for synthesizing HDL. Includes the following
tools:

Design Compiler: Synthesizes Verilog, can do some static

timing analysis. Most other tools in this sublist are run through either
the Design Compiler shell (dc_shell-t) or Physical Synthesis shell
(psyn_shell-t).

Design Vision: GUI version of Design Compiler (good for

beginniners). Includes interactive static timing analysis tool, as well as
schematic viewer

BSD Compiler: Boundary Scan synthesis (use from DC shell

or PSyn Shell ).

DFT Compiler: Inserts scan chains (use from DC shell or

PSyn Shell.

Library Compiler: Used for creating standard cell libraries for

use with Synopsys products

Power Compiler: Used for synthesizing circuits with multiple

supply voltage domains, and dynamic voltage scaling circuits

Formality
Verification tool
Hercules
Does two things: Design rule checking and Layout Vs. Schematic
checks
HSIMPlus
One of Synopsys' two fast SPICE programs.
HSPICE
Circuit simulation
IC Compiler
Very powerful integrated circuit layout tool that replaced Astro. Does
place and route of synthesized netlists and interfaces with other Synopsys
tools for tasks such as LVS, Sign-off, and DRC.
JupiterXT
Tool that does floorplanning and manages hierarchies of complex
circuits.
Milkyway Environment
Milkyway is a Synopsys library format that stores all of circuit files
from synthesis through place and route all the way to signoff. Most
Synopsys tools can read and write in the Milkyway format including Design
Compiler, IC Compiler, StarRCXT, Hercules, Jupiter, and PrimeTime.
NanoSim
Fast spice tool. This tool can do full circuit simulations of a postlayout design. Parasitic RC's can be extracted using Star-RCXT, and
annotated onto an extracted spice netlist generated by Hercules LVS,
which can then be simulated using NanoSim. The NanoSim documentation
has the tool flow and steps for doing this.

PrimeRail
Analyzes the power network of a circuit and determines if there is
any portions of the power network that may cause enough of an IR drop to
cause problems. Also does noise analysis of power networks. A lot of the
functionality is built into IC Compiler, but its still a useful tool on its own.
PrimeTime
Sign off tool. Can do static and dynamic power and timing analysis
of pre and post layout circuits. Parasitic RCs can be extracted using StarRCXT, then annotated into PrimeTime for post-layout static timing analysis.
Can also do cross-talk and signal integrity analysis. Very powerful tool and
is a must for signing off on a design.
Star-RCXT
Extracts parastic RC's from a post-layout circuit. These RC's can be
read in either by a fast SPICE tool such as NanoSim, or a static timing
analysis tool such as PrimeTime. Reads in either GDSII files or Milkyway
libraries.
TetraMax
Automatic test pattern generation.
VCS
Verilog and VHDL compiler. Use vcs program to compile verilog or
VHDL into executable files, use vlogan and vhdlan to run standalone
simulations, or use vcs -RPP to bring up a GUI that views VCS and signal
dump files.