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OSCILLATOR
BUFFER
UART INTERFACE
HART Communication
Networks Are Improved by
Small, Flexible, Low-Power
Modem ICs
CD
RXD
TXD
RTS
FSK DDS
ENGINE
DAC
HARTOUTPUT
ADCINPUT
DSP
ENGINE
ADC
VREF
BAND-PASS
FILTER AND
BIASING
HARTINPUT
AD5700-1
REF
I/O TO DEVICE
FIELD INSTRUMENTS
Transmit Path
INTELLIGENT
HART DEVICE
"0" = SPACE
2.2kHz
START
TXD
STOP
HART_OUT
www.analog.com/analogdialogue
Receive Path
Additional Blocks
3.3V
PRESSURE
SENSOR
SIMULATION
ADuCM360
+
ADC 0
IEXC
TEMPERATURE
SENSOR PT100
ADC 1
TEST
CONNECTOR
T1: CD
T2: RTS
T3: COM
T4: TEST
REGIN
VOLTAGE
REGULATOR
+
4mA TO 20mA LOOP
VLOOP
SPI
ADC
TEMPERATURE
SENSOR
+
DAC
WATCHDOG
TIMER
UART
AD5421
VDD
3.3V
MICROCONTROLLER
SRAM
FLASH
CLOCK
RESET
WATCHDOG
COM
50
CIN
LOOP()
3.3V
VDD
AD5700
HART MODEM
HART_OUT
REF
ADC_IN
C_HART
HART INPUT
FILTER
C_SLEW
DEMOAD5700D2Z
Figure 4. AD5421 loop DAC and AD5700 HART modem as a loop-powered data transmitter with HART communication.
Conclusion
Author