Ring Counter

Chapter 8
Sequential Circuits for

Registers and Counters
Lesson 4
RING AND JOHNSON

COUNTERS
Ch16L4- "Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Outline
Ring Counter
Johnson Counter
Odd Sequencer Switch tail
(Twisted Ring) Johnson counter
Even Sequencer Switch tail
Clock
input CLK
4-bit Ring Counter
QA
QB
D FF D
D FF D
PR
QC After tp QD
D FF D
D FF D
Q
PR
PR
Serial
in = 1
CLR
PR = 1
Each flip flop has output delay tp of and ring
output and input delays by tp of one D-FF
Ring Counter First Cycle after CLR

Inputs CLR = 1,
CLK
Outputs
Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)
2
0
1
0
0
3
1
0
0
0
Qn+1 means next state after nth clock input and
after a delay of tp at successive FFs. Delay = 4tp
at Qn+1(D) on each transition
Ring Counter Second Cycle

Inputs CLR = 1,
CLK
Outputs
2
0
1
0
0
3
1
0
0
0
State Diagram of Ring Counter

S0
0001
S0
0100
S0
0010
S0
0100
Ring Counting
When CLR = 0, all FFs are cleared (Q = 0)
except right most, which sets to 1.
When CLR = 1, ring counting starts. On
next clock edge, the QD = 1 left shifts to QC
and since QA = 0 and connects to serial
input at DD, QA = 0 and QC = 1. In next
transition, QB = 1 and QC = 0; and so 1
rotates in ring form..
Ring Counter Sequences

Ring counter has 4 sequences: 0001,
0010, 0100, 1000, 0000
Outline
Ring Counters
Johnson Counter
10
Clock
input CLK
QA
QB
D FF D
PR
4-bit Johnson Counter
D FF D
QC After tp QD
D FF D
D FF D
Q
PR
PR
Serial
in = 1
CLR
PR = 1
Each flip flop has output delay tp of and ring

output and input delays by tp of one D-FF
11
Output Sequences
QA
Y3
QB
Y2
QC
Y1
QD
Y0
OE
To CLR
To CLR
12
State Diagram of Johnson Counter

S0
0001
S7
0000
S1
S2
S3
0011
0111
1111
S6
S5
S4
1000
1100
1110
13
Johnson Counter First Cycle after

CLR
Inputs CLR = 1,
CLK
Outputs
3
1
1
1
1
14
Johnson Counter First Cycle

Inputs CLR = 1,
CLK
Outputs
7
0
0
0
0
after a delay of tp at successive FFs. Delay = 4
tp at Qn+1(D) on each transition
15
Johnson Counter
QA is given as input to rightmost place
instead of QD input in case of ring counter.
When CLR = 0, all Qs and Ds of FFs = 0
cleared except the DD input at right most FF
which sets to 1, as it connects QA.
When CLR = 1, Johnson counting starts. On
the clock edge, the QD = 1 left shifts to QC
and since QA = 1 and connects to serial
input at DD, QA = 1, QA = 1 and QC = 1.
16
Johnson Counter
In next cycle, QA = 0 so 0 rotates in
ring form in second half cycle
Johnson counter has 8 sequences:
0001, 0011, 0111, 1111, 1110, 1100,
1000, 0000
17
Outline
Ring Counters
Johnson Counter
18
4-bit Twisted Tail Odd Sequencer

Clock
Johnson Counter
input CLK
QA
QB
D FF D
D FF D
QC After tp QD
D FF D
D FF D
Q
PR
PR
PR
QB
Serial
in = 1
CLR
PR = 1
QA
19
Odd Sequencer Johnson Counter

Odd Sequencer Johnson counter has 7
sequences: 0001, 0011, 0111, 1111, 1110,
1100, 1000,
The 0000 sequence does not exist, as QA
and QB are given as input after AND
operation to rightmost place instead of QD
input in case of ring counter. Therefore, as
soon as sequence QAQBQCQD 1000
switches to 0000, the QA and QB become
1 and thus AND gives the input DD = 1. On
next clock, the sequence of output is 0001
in place of 0000.
20
State Diagram of (2n 1)

Sequencer (n =4) Johnson Counter
S0
0001
S1
S2
S3
0011
0111
1111
S6
S5
S4
1000
1100
1110
21
Johnson Counter Twisted Tail First

Cycle after CLR
Inputs CLR = 1,
CLK
Outputs
3
1
1
1
1
22

Cycle
Inputs CLR = 1,
CLK
Outputs
0 Repeat
0
0
0
1
23
Outline
Ring Counters
Johnson Counter
24
4-bit Twisted Tail Even Sequencer

Clock
Johnson Counter
input CLK
QA
QB
D FF D
D FF D
QC After tp
D FF D
Q
PR
PR
QB
QB
QA
QA
QD
D FF D
PR
Serial
in = 1
CLR
PR = 1
25
Even Sequencer Johnson Counter
Even Sequencer Johnson counter has

6 sequences: 0001, 0011, 0111, 1110,
1100, 1000,
The 1111 and 0000 sequence do not
exist, as QA and QB ,and QA and QB
are given as inputs after two AND
operations to rightmost place instead of
QD input in case of ring counter.
26
Even Sequencer Johnson Counter
Therefore, as soon as sequence

QAQBQCQD 1000 switches to 0000 or
0111 switches to 1100 the QA and
QB become 1 and thus AND gives
the input DD = 1. On next clock, the
sequence of output is 0001 in place of
0000. Similarly as soon as the QA and
QB become 1 other AND gives the
input DD = 0.
27
State Diagram of (2n 2)

Sequencer (n =4) Johnson Counter
S0
0001
S1
S2
0011
0111
S6
S5
S4
1000
1100
1110
28

Cycle after CLR
Inputs CLR = 1,
CLK
Outputs

29

Cycle
Inputs CLR = 1,
CLK
Outputs
0 Repeat 0
0
0
1
30
Summary
31
We learnt
Ring counter has n-sequences rotating when
n-bit shift register is used with last end Q
FF output connected to first end D input of
FF
Johnson counter has 2n-sequences rotating
when n-bit shift register is used with last
end QA at FF output connected to first end
D input of FF
32
We learnt
Johnson counter twisted has (2n1) sequences
rotating when n-bit shift register is used with last
two QA andQB ANDed and connected to
first end D input of FF
Johnson counter twisted has (2n2) sequences
rotating when n-bit shift register is used with last
two QA andQB ANDed and connected
through OR gate to first end D input of FF and
also last two QA and QB NANDed and
connected through OR gate to first end D input of
FF
33
End of Lesson 4
RING AND JOHNSON

COUNTERS
34
THANK YOU
35

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Chapter 8

Sequential Circuits for

RING AND JOHNSON

4-bit Ring Counter

Ring Counter First Cycle after CLR

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

Ring Counter Second Cycle

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

State Diagram of Ring Counter

Ring Counter Sequences

4-bit Johnson Counter

Each flip flop has output delay tp of and ring

State Diagram of Johnson Counter

Johnson Counter First Cycle after

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

Johnson Counter First Cycle

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

4-bit Twisted Tail Odd Sequencer

Odd Sequencer Johnson Counter

State Diagram of (2n 1)

Johnson Counter Twisted Tail First

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

Johnson Counter Twisted Tail First

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

4-bit Twisted Tail Even Sequencer

Even Sequencer Johnson Counter

Even Sequencer Johnson counter has

Even Sequencer Johnson Counter

Therefore, as soon as sequence

State Diagram of (2n 2)

Johnson Counter Twisted Tail First

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

Qn+1 means next state after nth clock input and

Johnson Counter Twisted Tail First

Sequence = Qn+1(A) Qn+1(B) Qn+1(C) Qn+1(D)

RING AND JOHNSON

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