EEEB273 Electronics Analysis & Design II

Learning Outcome

(10)

Simplified BJT
Op--Amp
Op
Circuit

Able to:
Analyze a simplified BJT Op-amp circuit.

Reference: Neamen, Chapter 11

10.1) Simplified BJT Op-Amp Circuit

Figure 11.49 depicts a simple bipolar op-amp.

Figure
11.49

10.2) DC Characteristics
Example 11.15
Analyze the dc characteristics of BJT op-amp circuit.
Neglect base currents. Assume VBE(on) = 0.7V for all
transistors except Q8 and Q9 in Widlar.
Reference current I1: I1 =

10 0.7 (10)
= 1mA
19.3

Bias current IQ (from Widlar):

I Q R2 = VT ln

I1
IQ

Simplified analysis and design

only resistive
loads are considered.
Diff-amp is biased with Widlar current source.
One-sided output of diff-amp is connected to
Darlington pair gain stage.
Bypass capacitor CE is included to increase smallsignal voltage gain.
Output stage is an emitter follower.
Generally, wanted the dc value of the output
voltage vO = 0 when input voltage = 0
insert dc
level shifting circuit between vO3 and vO.

10. 2) DC Characteristics (Cont)

DC voltage at collector Q2
VO2 = 10 - IC2 RC = 10 (0.2m)(20k)
VO2 = 6V = vcm(max)
Common-mode input range: -8.6V vcm 6V
vcm(min) = -10 + VBE8 + VBE1 (ignoring IQR2)
Values for IR4 and IR5:

IQ = 0.4 mA

Collector currents:
IC1 = IC2 = IQ / 2 = 0.2 mA

10.1) Simplified BJT Op-Amp Circuit (Cont)

I R4 =

VO 2 2VBE (on) 6 1.4

=
= 0.4mA
R4
11.5k

IR5

IR4 = 0.4 mA (neglecting base currents)

Lecturer: Dr Jamaludin Bin Omar

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EEEB273 Electronics Analysis & Design II

10. 2) DC Characteristics (Cont)

DC voltage at collectors of Q3 and Q4
VO3 = 10 IR5 R5 = 10 (0.4m)(5k)
VO3 = 8V is midway between 10V supply
voltage and 6V dc input voltage (VO2)
This allows
a maximum symmetrical swing for time-varying vO3
DC voltage level shifting by Q5 and R6:
IR6 = IQ = 0.4 mA, since R3 = R2
VB6 = VO3 VBE(on) IR6R6 = 80.7(0.4m)(16.5k)
VB6 = 0.7 V produces a zero dc output at vO
(emitter of Q6) for a zero diff-mode input voltage.
Current IR7:

I R7 =

vO ( 10) 10
=
= 2mA
R7
5k

10. 3) AC Characteristics (Cont)

One-sided diff-mode voltage gain of diff-amp:
Ad 1 =

Vo 2
g
= m (RC Ri 2 )
vd
2

r 4 = VT / I R 4 = (100)(0.026) / 0.4 m = 6.5k

r 3 2VT / I R 4 = (100) 2 (0.026) / 0.4m = 650k

Ri 2 = r 3 + (1 + )r 4 = 650k + (101)(6.5k ) = 1307k

g m = I Q /( 2VT ) = 0.4 m /( 2 0.026) = 7.70mA/V

Ad 1 = (7.70m/2)(20k || 1307k) = 75.8

Since load resistance Ri2 >> RC, there is no

significant loading effect of 2nd stage on diff-amp.

10. 3) AC Characteristics
Example 11.16
Determine small-signal diff-mode voltage gain, Ad
Use Fig 11.49. Transistor parameters: = 100, VA = .
Overall differential-mode gain:

Ad = Ad 1. A2 . A3 =

vo 2
v
v
. o3 . o
v1 v2 vo 2 vo3

Ad valid only if load resistance of following

stages are considered in the calculation:
Ri2: input resistance to Darlington pair.
Ri3: input resistance to output stage.

10. 3) AC Characteristics (Cont)

The voltage gain of the Darlington pair:
I
A2 = R 4 (R5 Ri 3 )
2VT
r 5 = VT / I R 6 = (100)( 0.026) / 0.4m = 6.5k
r 6 = VT / I R 7 = (100)( 0.026) / 2m = 1.3k
Ri 3 = r 5 + (1 + )[R6 + r 6 + (1 + )R7 ] = 52.8M
Since Ri3 >> R5, the output stage does not load
down the gain stage, and small-signal voltage gain
is approximately
I
0. 4 m
(5k ) = 38.5
A2 R 4 (R5 ) =
2VT
2(0.026)

10. 3) AC Characteristics (Cont)

The combination of Q5 and Q6 forms an emitter
follower, and the gain of the output stage is:

A3 = vo / vo3 1
The overall small-signal voltage gain is therefore:

Larger circuits

Ad = Ad 1. A2 . A3 = 75.8 38.5 1 = 2918

Lecturer: Dr Jamaludin Bin Omar

10-2

EEEB273 Electronics Analysis & Design II

10.1) Simplified BJT Op-Amp Circuit

Figure 11.49: A simple bipolar op-amp.

Lecturer: Dr Jamaludin Bin Omar

10-3