Digital Techniques: Understanding Electronic Instrument Systems and Numbering Systems

Digital Techniques
Elo Inst Systems

5.1.1 - HO - 1
Module 5
Preliminary
Notes
5.1
Digital Techniques
5.1
Electronic Instrument Systems
5.1.1
Electronic Flight Instrument Systems
Introduction
As far as the pure basic functions and the number of display units are concerned, an
electronic flight instrument system (EFIS) may be considered as being similar to
some type of flight director system. However, an EFIS is fully integrated with digital
computer--based navigation systems.
It utilizes colour--CRT types of ADI and HSI (Figure 1). Therefore it is far more
sophisticated than a flight director.
This is not only in terms of physical construction, but also in the extent to which it
presents attitude and navigational data to the flight crew of an aircraft.
System Units
As in the case of conventional flight director systems, a complete EFIS (Figure 2)
installation is made up of left (pilot) and right (co--pilot) systems.
Each system in turn is comprised of
V two display units
--
electronic attitude deviation indicator (EADI)
--
electronic horizontal situation indicator (EHSI)
V symbol generator (SG)

V control panel
V remote light sensor unit.
A third (centre) SG is also incorporated in the system so that its drive signals may be
switched to either the left or the right display unit (in the event of failure of the
corresponding SG).
The signal switching is accomplished within the left and right SGs by electro--mechanical relays powered from the aircrafts DC power supply.
Display of Air Data
Refer to Figure 3.
In a number of EFIS applications, the display of air data (like altitude, airspeed and
vertical speed) is still provided in the conventional manner, i.e. separate indicators
are mounted adjacent to the EFIS display units in the basic T arrangement.
With the continued development of display technology, however, CRTs with much
larger screen areas have been produced. As may be seen from the BOEING
747--400 flight deck layout in Figure 4, such displays make it unnecessary to provide
conventional primary air data instruments for each pilot.
E ITS International Training & Support GmbH. All rights reserved.
For training purposes only -- Rev. 01/09
Digital Techniques
Elo Inst Systems
5.1.1 - HO - 2
Module 5
Preliminary
Notes
5.1
FMSI
300
ALT
AP/L
YD
10
280
260
10
240
MACH. 723
DIST
20.0
LNR
10
GSP
258
F O
ML
S I
I N
FE 0688
CRS
020
Figure 1
Electronic Flight Instruments

(Example)
Digital flight data

acquisition unit
Left
light
data
VOR
Center
DME
ILS
RAD.ALT
Right
WXR
IRS
FCC
FMCS
Horizontal
situation
indicator
Ambient
sensor
Attitude
deviation
indicator

TMC
Right
VOR
Left & DME
WXR Center
right
IRS
FCC
FMCS
ILS
RAD.ALT
IRS
FMCS
FCC
Center
symbol
generator
Right
TMC
VOR
Center
DME
ILS
RAD.ALT
Left
WXR
IRS
FCC
FMCS
Right
symbol
generator
FMCS
IRS
FCC
TMC
Horizontal
situation
indicator
Attitude
deviation
indicator
Display unit
drive signals
Switched
drive signals
Data busses
Right
remote
light sensor
5.1
EFIS Installation and Signal Interfacing
FMCS
IRS
FCC
Left
symbol
generator
Brightness
control
Right
control panel
Module 5
Figure 2
Light
sensor
data
Left
remote
light sensor
Left
control panel
Preliminary
Notes
Digital Techniques
Elo Inst Systems
5.1.1 - HO - 3
FE 0689 C
Preliminary
Notes
Module 5
5.1
Digital Techniques
Elo Inst Systems
5.1.1 - HO - 4
Figure 3
Cockpit with EFIS and Conventional Indicators
FB 7006
Preliminary
Notes
Digital Techniques
Elo Inst Systems
5.1.1 - HO - 5
Module 5
5.1
Figure 4
Modern Flight Deck Layout (Example)
FE 0697 A
Preliminary
Notes
5.2
Numbering Systems
5.2.1
Number Systems
Module 5
5.2
Digital Techniques
Numbering Systems
5.2.1 - HO - 1
Mechanization and automation are increasingly used in production processes. Some

typical applications are
V monitoring the position of a machine tool or a missile by digital means
(locating function)
V packaging a certain number of items in a box (locating and counting function).
In many laboratory instruments such as
V frequency counters
V timers
V digital voltmeters
the basic function of counting is carried out.
Electronics, particularly with the advent of transistors and integrated circuits, has
revolutionized the techniques in all branches.
However, electronics in computer systems are only capable of distinguishing
between
V current on and
V current off.
On the other hand, counters must be able to count up to several millions. In order to
solve such tasks, different number systems instead of the decimal system have been
introduced in digital and computer techniques.
5.2.1.1
Decimal System
Since the dawn of civilization man has found it necessary to count, i.e. to have a
method of representing quantities or measures of manipulating them to perform
functions of
V addition
V subtraction
V multiplication
V division.
Not unreasonably, it was found out that fingers provided an excellent physical aid for
registering any counting exercise to be done in somebodys head. From this the
decimal system was developed.
Digital Techniques
Numbering Systems
5.2.1 - HO - 2
Module 5
Preliminary
Notes
5.2
The decimal system may be expressed fully in mathematical terms by considering

the number 147, for example. This is the conventional shorthand way of expressing a
decimal number. The longhand way of writing the same number is:
1 100 + 4 10 + 7 1
or 1 102 + 4 101 + 7 100.
The 10 is known as the base of the system and the indices indicate the power to
which the base is raised. The base and the particular index to which it is raised are
called the weight: that is, the least significant weight is 100 which is 1, the next is
101 and so on. The numbers by which each weight is multiplied are called digits. In
practice, only the digits of the system are written, the weights being implied.
Therefore the number 147 has the following meaning:
14 7
7 100
=7 1
4 101
= 4 10
40
1 102
= 1 100
100
147
or expressed otherwise:
147 = 1 102 + 4 101 + 7 100 = 14710
147 = 1 100 + 4 10 + 7 1 = 14710.
The result is always 147 to the base of 10.
The number to the base of 10 consists of maximal 10 different figures: 0, 1, 2, 3, 4, 5,
6, 7, 8, 9.
5.2.1.2
Other Number Systems

It is obvious that there are other number systems with different bases. Some
examples are:
2 82 + 2 81 + 6 80 =
2268
226 to the base of 8
1 53 + 0 52 + 4 51 + 2 50 =
10425
1042 to the base of 5
1 23 + 1 22 + 0 21 + 1 20 =
11012
1101 to the base of 2 .
Number systems comprise only the amount of figures which are equal to the base:
V base 5:
figures 0, 1, 2, 3, 4
V base 2:
figures 0, 1
V base 16:
figures 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.
Preliminary
Notes
Digital Techniques
Numbering Systems
5.2.1 - HO - 3
Module 5
5.2
The Binary Number System

As mentioned before, a computer system can only distinguish between
V current on and
V current off.
This is the same as high (H) and low (L) or 1 and 0. Therefore number systems
with the base of 2 are ideal for use in computer systems.
It is obvious from the example that the digits of the system using a base of 2 are
either 1 or 0, and this is true for any number expressed to the base of 2.
Figure 1 shows numbers expressed to the base of 2 together with their decimal
equivalent numbers.
Numbers expressed to the base of 2 are useful for electronic counting systems
because electronic circuits which can be set to one of two states are made very
simple, whereas circuits with more than two states, although possible, are much
more complex and less reliable.
The counting system using a base of two is called the binary system and each 1 or 0
is called a bit, which stands for binary digit. The number of bits in the binary form of
the decimal number 147 is eight and the highest decimal number which can be obtained
with eight bits is 255.
The binary code discussed so far is not the only code which is expressed in
two--state bits. All counting codes with two--state bits, however, fall into one of two
classes, weighted and unweighted. A weighted code is one in which a 1 bit is
allotted different values depending on its position in the number.
Example:
The code shown in Figure 2 is weighted; a 1 in the 20 position of the

column weight has the value 1, a 1 in the 21 position has the value 2, a 1 in
the 22 position has the value 4 and so on. The order of bits in unweighted codes
changes in such a way as to make this sort of weighting meaningless.
A system in which binary--type elements are connected together to count to the base of
10 is called a binary coded decimal (BCD) system. BCD is of major importance since
it provides the link between the counting system used by the machine and that used by
man.
The table shown in Figure 2 gives an overview of the different number systems. This
is a weighted code.
Examples:
V The binary number 1010 has a decimal value of

1 23 + 0 22 + 1 21 + 0 20 = 10
V The binary number 0011 has a decimal value of
0 23 + 0 22 + 1 21 + 1 20 = 3.
Digital Techniques
Numbering Systems
5.2.1 - HO - 4
Module 5
Preliminary
Notes
5.2
The Octal Number System

With three bits of a binary number a maximum of 8 decimal values can be represented.
A number system to the base of 8 is designated an octal system. The octal system
uses 8 numbers or figures, which are 0, 1, 2, 3, 4, 5, 6 and 7.
The octal number 3174 has the following meaning:
31748 = 3 83 + 1 82 + 7 81 + 4 80.
Each digit of the octal number can be represented by 3 bits of a binary number.
Example:
011
001
111
100
(octal)
(binary).
The Hexadecimal Number System

With four bits of a binary number a maximum of 16 decimal values can be represented.
A number system to the base of 16 is called a hexadecimal system.
As mentioned before, a hexadecimal system has 16 different numbers or figures.
There are only 10 numbers in the normal decimal system and therefore it has been
agreed that the letters A to F are used in hexadecimal systems.
Refer to Figure 3.
In computer technique it is common that a single character contains 8 bits which are
called one word. To represent one character, e.g. Z, 8 lines within a computer are
necessary to transmit this character, from the keyboard to the monitor for instance.
During transmission of the character the current at the 8 lines is on or off, e.g.:
line 1 -- no current
line 2 -- current
line 4 -- current
line 5 -- current
line 7 -- current
This bit combination represents the letter Z. In order to simplify this combination it is
divided into two 4--bit groups: 0101 and 1010. The hexadecimal number for 0101 is
5 and for 1010 is A, so the combination 0101 1010 can simply be expressed as
5A(H), whereby the letter H is the abbreviation of hexadecimal.
This method is an easy way to minimize a row of binary digits (bits) to a short row of
hexadecimal numbers, eg.:
Decimal:
100,000
Binary:
0001
1000
0110
1010
0000
Hexadecimal:
0.
5.2.1.3
Digital Techniques
Numbering Systems
5.2.1 - HO - 5
Module 5
Preliminary
Notes
5.2
Mathematical Conversion of Number Systems

This chapter deals with the conversion of numbers from one type of number system
into another.
Conversion of Decimal Numbers into Binary and Hexadecimal Numbers

Refer to Figure 2 again.
The task is to convert the decimal number 33410 into a binary number. For this
purpose the decimal number is divided by the base 2 as often as the solution is 0.
The solution of each division is an integer with a remainder in the range of 0 to 1.
The remainder of the first division is the lowest digit, called least significant bit
(LSB), of the solution of the conversion while the remainder of the last division is the
highest digit, called most significant bit (MSB):
334 : 2 = 167
remainder 0
167 : 2 =
83
remainder 1
83 : 2 =
41
remainder 1
41 : 2 =
20
remainder 1
20 : 2 =
10
remainder 0
10 : 2 =
remainder 0
5:2=
remainder 1
2:2=
remainder 0
1:2=
remainder 1
(LSB)
(MSB).
The solution is (1 0100 1110)2.

In the same way a decimal number can be converted into a hexadecimal number.
For this purpose the decimal number is divided by the base 16 as often as the
solution is 0. The solution of each division is an integer with a remainder in the range
of 0 to 15. The remainder is a decimal number and must be converted into a
hexadecimal expression as shown in Figure 2.
The remainder of the first division is the LSB of the solution of the conversion while
the remainder of the last division is the MSB:
334
16 =
20
remainder 14
20
16 =
remainder 4
1
16 =
remainder 1
(LSB)
(MSB).
The decimal remainder 14 equals the hexadecimal number E as shown in Figure 2,

therefore the solution is 14E16.
Conversion of Binary Numbers into Decimal Numbers
To convert an eight bit binary number into a decimal number for example 101010112
the position values of eight positions have to be determined, namely:
27 26 25 24 23 22 21 20
1 0 1 0 1 0 1 1
Preliminary
Notes
Digital Techniques
Numbering Systems
5.2.1 - HO - 6
Module 5
5.2
In every location where there is a 1 bit, the numbers should be added together.
1 S 27 + 0 S 26 + 1 S 25 + 0 S 24 + 1 S 23 + 0 S 22 + 1 S 21
+ 1 S 20 = 17110
The decimal equivalent of 101010112 is 17110.
Conversion of Hexadecimal Numbers into Decimal Numbers
To convert a five digit hexadecimal number into a decimal number for example
FB8A716 the position values of five positions have to be determined, namely:
164 163 162 161 160
F
B
8
A
7
According to Figure 2 the hexadecimal values should be multiplied with the corresponding position values and added together.
15 S 164 + 11 S 163 + 8 S 162 + 10 S 161 + 7 S 160
= 103031110
The decimal equivalent of FB8A716 is 103031110.
Conversion of Decimal Numbers into Octal Numbers
To convert a decimal number into an octal number for example 29810 proceed as
follows:
1. Start with the highest power of 8 (octal) that is smaller than the number.
2. Divide the decimal number by that power, keeping only the integer part of the result.
3. Keep the remainder after the division is done, for the next step.
4. Repeat steps 1. to 3. until all octal digit places are filled, and then put there whatever is left after the higher digits were done.
Decimal value before con298
sidering this digit place
298
42
Power of 8
83
82
81
80
Value of digit place
512
64

smaller than current decimal number?
No
Yes
No
--
298/64= 4.656
Division step
skip
4 will be used
for this digit
42/8= 5.25
5 will be used
for this digit
2/1= 2
Remainder after division
skip
42
--
Octal digits
The octal equivalent of 29810 is 4528.
Digital Techniques
Numbering Systems
5.2.1 - HO - 7
Module 5
Preliminary
Notes
5.2
Conversion of Octal Numbers into Decimal Numbers

To convert from an octal number to a decimal number for example 4528 conduct as
follows:
1. Take the value of each octal digit, convert it to decimal.
2. Multiply it by the power of 8 represented by the digits place in the number.
3. Then all the numbers should be added together.
Read the table from left to right, top to bottom; each digits value is multiplied by the
appropriate power of 8 and added together, yielding the result 29810.
Octal number
Decimal value of digit
Power of 8
82
81
80
64
Value for this number
64S4= 256
5S8= 40
2S1= 2
Running sum (from left to

right)
256
256+40= 296
296+2= 298
Conversion of Hexadecimal Numbers into Binary Numbers and Vice Versa

The task is to convert the hexadecimal number 3F416 into a binary number. The
conversion is made digit by digit.
As shown in Figure 2 the hexadecimal number
3 equals
0011
F equals
1111 and
4 equals
0100.
The complete binary conversion therefore is:

0011 1111 01002
or
11 1111 01002.
The task is to convert the binary number 0010 1011 11 002 into a hexadecimal number.
Because a hexadecimal digit can include 4 binary digits the binary number is divided
into blocks of 4 digits and converted block by block.
As shown in Figure 2 the binary digits
0010 equals 216
1011 equals B16
1100 equals C16.
The solution therefore is 2BC16.
Conversion of Binary Numbers into Octal Numbers
A binary number can be represented in octal form by grouping its bits into sets of
three bits. Each group of three binary numbers represents one octal number.
Preliminary
Notes
Digital Techniques
Numbering Systems
5.2.1 - HO - 8
Module 5
5.2
The base--8 numbers have the advantage of being far shorter than binary numbers,
and hence much easier to work with.
The reason the binary number is broken up into groups of three is because the
largest octal number that can be represented is 7 (the base 8 minus 1). It only takes
3 binary digits to represent the largest octal number 7.
1112 = 1 S 22 + 1 S 21 + 1 S 20 = (4 + 2 + 1) = 78
To convert a 8 bit binary number for example 010101002 the number have to be
broken into groups of three binary digits, starting with the rightmost bit, namely:
Group 1: 100
Group 2: 010
Group 3: 01 or 001
Note:
To add an extra 0 to the leftmost side will not change the value of
the number.
1. Each group of three digits has to be converted separately.
2. The binary position values have to be determined.
3. In every location where there is a 1 bit, the numbers should be added together.
Group 1: 1002 = 1 S 22 + 0 S 21 + 0 S 20 = (4 + 0 + 0) = 48
Group 2: 0102 = 0 S 22 + 1 S 21 + 0 S 20 = (0 + 2 + 0) = 28
Group 3: 0012 = 0 S 22 + 0 S 21 + 1 S 20 = (0 + 0 + 1) = 18
The octal equivalent of 010101002 is 4218.
Conversion of Octal Numbers into Binary Numbers

To convert from a binary number to an octal number for example 4528 the three digit
binary equivalent has to be listed for each octal figure.
48 = 1 S 22 + 0 S 21 + 0 S 20 = 1002
58 = 1 S 22 + 0 S 21 + 1 S 20 = 1012
28 = 0 S 22 + 1 S 21 + 0 S 20 = 0102
The binary equivalent of 4528 is 1001010102.
Figure 1
5.2
20 =
28 =
256
21 =
29 =
512
22 =
210 = 1,024
23 =
211 = 2,048
24 = 16
212 = 4,096
25 = 32
213 = 8,192
26 = 64
214 = 16,384
27 = 128
215 = 32,768
B 1342
Digital Techniques
Numbering Systems
5.2.1 - HO - 9
Module 5
Preliminary
Notes
Numbers to the Base of 2
5.2
Hexadecimal
Weights
23
or
8
22
or
4
21
or
2
20
or
1
10
11
12
13
14
15
B 1343
Decimal
Figure 2
Digital Techniques
Numbering Systems
5.2.1 - HO - 10
Module 5
Preliminary
Notes
Table of the BCD Conversion System
Digital Techniques
Numbering Systems
5.2.1 - HO - 11
Module 5
Preliminary
Notes
5.2
Monitor
Current:
0 = no current
1 = current
FA 1676 A
Line:
Key
Keyboard
Figure 3
Representation of the Letter Z
Preliminary
Notes
5.3
Data Conversion
5.3.1
D/A and A/D Converters
5.3.1.1
D/A Converters
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 1
Introduction
Analogue electronic systems operate on information using an electrical parameter,
such as voltage or current, that is proportionally related to the measured quantity.
Digital electronic systems operate on information using a numerically coded
representation of a measured quantity.
Special electronic circuits are employed to link analogue and digital electronic
circuits. These circuits are designated
V analogue--to--digital converter (A/D converter or ADC) circuits
V digital--to--analogue converter (D/A converter or DAC) circuits.
Comparison of Analogue and Digital Signal Processing
A transducer is a device that serves to translate one type of signal into another type
of signal.
In the field of electronics, a transducer is a device that converts electrical and non--electrical signals, as, for instance, a microphone. The majority of signals produced by
transducers are analogue in nature, that is, the voltage value of the input or output
signal is exactly proportional to the non--electrical signal that the transducer produces or
measures.
The nature of analogue signals (Figure 1, detail a)), such as sound, cannot be
changed, but the way in which the signals are processed can be changed.
In a digital signal processing system (detail b)) the processor block operates only on
binary coded numbers:
V ADCs translate analogue signals over a specified range into binary coded
numbers.
V DACs produce an analogue voltage or current output from a binary coded
number input.
Digital Coding of Analogue Signals
The analogue signal can be thought of as a continuous, smoothly varying value of
voltage or current that changes with respect to time. The analogue signal is
continuous in amplitude and time (Figure 2, detail a)).
In order to translate the analogue signal into a digital (numeric) one, the resolution on
the time and amplitude axes must be limited.
Module 5
Preliminary
Notes
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 2
The amplitude and time axes are subdivided into a number of equally spaced
intervals, and thereby, the resolution of measurement is limited to the width of one of
these intervals (detail b)).
Subdividing an axis in this manner quantizes the variable on that axis. Then only one
of a fixed number of values (detail c)) can be assumed by the variable.
Sampling and Quantization
Sampling refers to subdividing the time axis into a finite number of intervals.
The analogue signal can be thought of as being periodically sampled to obtain a new
signal value.
Figure 3, detail a) shows a sampling example of a sine wave. In detail b) a square
wave is illustrated.
Quantization means that the maximum output range of an analogue signal is divided
into a fixed number of small, equal intervals designated 1 LSB output level change,
i.e. an output level change by 1 LSB. Each interval is then associated with a fixed
binary number.
In order to quantize the time axis of measurement it is only necessary to generate
pulses periodically. Each pulse is a command to measure the amplitude and to store
the result.
The digital hardware required to produce the required pulse train is extremely simple,
amounting to only a multivibrator circuit and a counter to divide the oscillator
frequency to an appropriate value, namely the sampling rate.
Digital--to--Analogue Converter Circuits
The basic purpose of a digital--to--analogue converter (DAC) is to translate a binary
number into the corresponding analogue voltage value.
Review of OP Circuits
Operational amplifier (abbreviated OP) circuits are frequently applied to D/A
converter circuits. In D/A converters, the primary purpose of OPs is that of current
summation (adders). In this capacity, the OP is used with a resistive network to add
currents that each represent the weight of a binary digit.
The inverting amplifier is the basic OP circuit that is used for current summation as
shown in Figure 4, detail a).
An inverting amplifier provides a shift of 180 between input and output signal. In
other words, the polarity of the output signal is opposite to the polarity of the input
signal.
The voltage gain of the inverting amplifier is determined by the ratio of the resistors
R1 and R2 according to the following formula:
AU =
Note:
UO
= R1
UI
R2
The minus sign indicates that the input signal is inverted, that means, if the input
voltage UI is negative, the output will be positive or vice versa.
Digital Techniques
Data Conversion
5.3.1 - HO - 3
Module 5
Preliminary
Notes
5.3
If there is more than one input current as shown in detail b), the sum of the currents
flowing to the inverting terminal of an OP circuit used as adder circuit equals the
feedback current If = I5 according to Kirchhoffs law:
0
= I1 + I2 + I3 + I4 + I5
I5 = I1 + I2 + I3 + I4
UO
= U1 + U2 + U3 + U4
R1 R2 R3 R4
R5
/--I5
Un
Rn
/I n =
/ R5
U O = U 1 R5 + U 2 R5 + U 3 R5 + U 4 R5
R1
R2
R3
R4
The last equation shows that the output voltage is the weighted sum of the input
voltages.
The weighting factor is determined for each input by the ratio of the feedback resistor
R5 to the input resistor (R1, R2, R3 or R4) in that branch. Any number of inputs is
possible by simply connecting additional input resistors.
Simple DAC Circuits
The importance of the scaling adder circuit is realized when it is considered how binary
numbers are converted into decimal numbers.
A four--digit binary number can be translated into the equivalent decimal value 8:
1000 bin = 1 2 3 + 0 2 2 + 0 2 1 + 0 2 0 = 8
There is a similarity between this equation and the scaling adder function in the equation
mentioned before.
Refer to Figure 5.
When the resistor ratios of the 4 inputs are matched to the power of 2,
R5 = 8, R5 = 4, R5 = 2 and R5 = 1,
R4
R3
R2
R1
and the input voltages U1 to U2 are referred to UREF, the following formula is
achieved:
U REF 8 + U REF 4 + U REF 2 + U REF 1 = U O
When the switches in the 4--bit DAC shown in Figure 5 are set to correspond to the
digits of the binary number, a voltage UO is produced that is exactly proportional to
the binary input.
In order to make all output voltages positive, the reference voltage should have a
negative value.
Example:
The switches are set for binary 1000. The reference voltage equals --1 V to
provide a positive output voltage UO according to the last formula. The output
voltage produced will be
U o = ( 1 V) 8 + 0 V 4 + 0 V 2 + 0 V 1 = 8 V
U o = ( 1 V) 2 3 + 0 V 2 2 + 0 V 2 1 + 0 V 2 0 = 8 V
Preliminary
Notes
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 4
The term 0 V (= UREF) instead of --1 V (= UREF) is set, because these inputs are
switched to ground. The input at R1 is the least significant bit (LSB), and the
input at R4 is the most significant bit (MSB). The output voltage will be +8 V,
because of the 180 phase shift of the amplifier (--8 V is the value of --UO, UO =
+8 V).
In most DACs the switches are implemented with complementary metal oxide silicon
(CMOS) field effect transistors (FET), so that the circuit is fully electronic.
Such a simple DAC as described before can also be used as an amplifier with
digitally controlled gain. If the fixed reference voltage is replaced by a signal source,
then the output will be an amplified version of the source, whose gain is determined
by the switch setting.
The construction of a DAC as shown in Figure 5 is not complex, yet it has some
serious limitations. The most important factor to be considered is the exponential
series of the resistor values in the network. A resistance error of 10 % in the least
significant bit would cause a 10 % error in the basic increment of the analogue
output.
As an example a four--bit DAC with --1 V reference should be considered. The basic
increment of the analogue output is 1 V, and its range is from 0 to 15 V. A 10 %
tolerance in the LSB resistor means that the output error contributed by the LSB
branch would be about +0.1 V, which is 10 % of the basic 1 V interval.
An error of 10 % in the MSB resistor, however, would cause an error of about +0.8 V,
which is 80 % of one basic interval in the output. Consequently, the resistor values
must be extremely accurate to ensure linear operation of the DAC.
Another problem is the effect of a very wide range of input resistor values on the
operational amplifiers operation. The largest input resistor cannot be made so large
that it approaches the value of the input impedance of the OP (within a factor of ten).
If it does, earlier assumptions in the analysis about no current flowing into the -- input
of the OP are invalid. On the other hand, the smallest resistor cannot be made so small
that it approaches the value of the OP output impedance (again, within a factor of ten).
A typical OP with an input impedance of 5 M and an output impedance of 150
limits the input resistor range to between 500 k and 2 k, providing a conversion of
about eight bits.
R--2R Ladder Networks
In order to overcome the problems and limitations of exponential resistors in a DAC,
as described before, special circuits or networks must be used.
A special resistive network is the R--2R ladder network, as shown in Figure 6. The
circuit derives its name from the fact that only two different values of resistance are
used, one being twice the value of the other. The feedback resistor in the OP circuit is
selected to obtain the desired gain. Since only two resistor values are needed, it is
considerably easier to match their tolerances. When the resistors are integrated on a
single chip of silicon, their relative values will almost always be identical, even though
their absolute resistances may vary.
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 5
Module 5
5.3
Since the resistor ratios are the most important factors in the R--2R ladder, absolute
accuracy is not critically important. For this reason, if the resistors change in equal
proportion with temperature, no errors will be seen on the D/A output, since the ratios
remain identical.
The four--input ladder network is redrawn in Figure 7 to illustrate how a current
induced at one end of the network is successively divided by two in each stage. If a
current originates at an input closer to the end, it will have been divided less when it
reaches the end, and consequently will have more weight.
Using the idea of superposition, and assuming that the source voltage is identical for the
digits B3 to B0, it can be seen that the current flowing through the terminal branch of
the ladder network is the weighted sum of the binary input digits. An operational
amplifier is only added to amplify the current flow in the terminal branch to a useful level.
Because the resistance of the network as viewed from the OPs -- input is always the
same, regardless of how many stages are present in the ladder network, a value of R
can be selected so that the input and output impedances of the OP will never approach.
Thus, loading the OP will never be a problem.
Finally, the effect of transistor switches is perfectly balanced, since the resistance, that
each transistor faces, is identical no matter which branch it controls.
5.3.1.2
A/D Converters
Introduction
The basic idea of an analogue--to--digital converter (ADC) is to translate a value of
voltage or current into a corresponding binary number. The ADC can be designed in
many different ways.
Two basic methods are used for realizing A/D conversion:
V methods without feedback (open--loop methods)
V methods with feedback (closed--loop methods).
Amplitude Quantization
Refer to Figure 8.
Amplitude quantization means that the maximum input range of an analogue signal is
divided into a fixed number of small, equal intervals designated 1 LSB output level
change, i.e. an output level change by 1 LSB.
Each interval is associated with a fixed binary number. Prerequisite for an ADC to
perform such a function are two factors which must be specified:
V the maximum range of analogue input voltage
V the output resolution, determined by the number n of output bits.
The more binary digits (bits) of outputs are available, the better the resolution and the
more precisely can the analogue signal be encoded.
Preliminary
Notes
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 6
Resolution
Resolution is the smallest change in analogue input that can be distinguished by an
A/D converter.
The resolution of an ADC cannot be absolutely high: In most cases, a digital output
between 8 and 16 bits provides adequate resolution.
Open--Loop A/D Conversion Methods
The Flash Converter
A/D conversion by means of a flash converter is the simplest conversion method
possible as it uses the fastest and most expensive technique.
Refer to Figure 9.
The circuit is based on the differential comparator. Although the circuit looks like an OP
circuit, its output is either logic 0 or logic 1, depending on which of its inputs has the
higher voltage.
A small amount of hysteresis is built into the comparator to solve any problems that
might occur if both inputs were of equal voltage.
Refer to Figure 10.
The primary feature noted in the flash converter circuit is the resistive divider network.
At each node of the divider, a reference voltage is available. Since all resistors are of
equal value, the voltage levels available at the nodes are equally divided between the
reference voltage and ground.
The aim of the circuit is to compare the analogue input voltage with each of the node
voltages.
Refer to Figure 11.
The output of the circuit is illustrated for a typical input voltage. Pure combinational
logic follows to produce a binary encoded output.
For additional digits of precision in a flash converter, much more circuitry is needed.
In fact, the number of circuit components at least doubles with each added digit of
precision.
Thus, only when extremely high speed or high precision A/D conversion is needed a
flash converter should be used. Typical conversion time for such circuits is 100 ns or
less.
As described before, a flash converter needs one comparator for each value of the
converter, for example an 8--bit flash converter needs 28 (= 256) comparators.
The subranging flash converter and the piped flash converter are only two
examples of several possibilities to minimize the amount of comparators.
The Time--Window Converter
Refer to Figure 12.
A simple and inexpensive circuit with very wide range can easily be constructed
when high speed is not necessary. This circuit is called the time--window converter
and is based on the monostable multivibrator (one--shot).
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 7
Module 5
5.3
In this type of ADC, the analogue input signal controls the pulse width of a monostable multivibrator, whose output is used for gating the clock input of a counter.
The count value present in the counter at the end of the monostables pulse width is
proportional to the analogue input.
This approach is particularly useful when the analogue input is controlled by a
potentiometer; there is a direct control over the monostables pulse width by varying
the resistance (shaft angle) of the potentiometer. If the analogue input is electrical in
nature, the potentiometer can be replaced by a controlled--resistance device, such as
an FET transistor.
With a fairly high speed system clock frequency of 20 MHz, a 10--bit A/D converter
designed for using the time--window technique provides a sample period of about
55 ms (approximately 18 kHz), which is too slow for any analogue signals with
frequency components greater than 1.8 kHz. If speed is not important the time--window converter will be the most efficient design.
The Ramp Converter
Refer to Figure 13.
One useful approach to A/D conversion involves the comparison of the analogue
input with a constantly changing (sweeping) voltage. The reference voltage is
generated by the ramp generator and is fed as a ramp output voltage to the
comparator. When the ramp output voltage is zero the 8--bit natural binary counter
starts counting the system clock pulses. When the ramp output voltage value equals
the analogue input value the counter stops counting and thus the counted system
clock pulses are a measure of the analogue input.
The time--window converter and the ramp converter converts a voltage level into a
measure of time, which can be counted with a binary counter. However, the circuits
are subjected to error because of variations in the timing components with temperature, and due to aging.
Note:
The timing components referred to are the resistor and capacitor components.
Advanced techniques using the ramp approach utilizes two ramps:
V one to measure a fixed, accurate reference voltage
V one to measure the signal source.
For measuring the reference voltage and comparing it with the signal source,
the timing components of the ramp generator are calibrated against the accurate
voltage reference on every conversion.
Thus, variations in the timing components over time are compensated for.
This technique is known as dual--slope A/D conversion.
Closed--Loop A/D Conversion Methods

Closed--loop A/D methods can be distinguished from open--loop methods by the
presence of negative feedback. In closed--loop circuits, part of the output is fed back
to the input of the circuit and compared with the present input value. The result of this
comparison causes corrective action to be taken, so that the output value matches
the input value more closely.
Preliminary
Notes
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 8
This is the basic idea behind the OP circuits. If the input of a circuit is analogue and
its output is digital, then a prerequisite for the presence of feedback will be a
digital--to--analogue converter necessary to carry out the comparison between the
two analogue signals. Thus, in closed--loop A/D converter circuits, one of the
components must be a D/A converter.
The Successive Approximation Tracking A/D Converter
Refer to Figure 14.
The successive approximation tracking ADC is the simplest closed--loop ADC.
It comprises three basic components:
V a binary up/down counter circuit
V a DAC circuit
V a comparator circuit.
The D flip flop forms part of the counter circuit because it ensures that the up/down
signal does not change at the same time as the counters clock input.
The binary counter produces a digital output that is the primary output of the circuit
and which also drives a DAC. The analogue output of the DAC is compared with the
circuits analogue input:
V If the input is greater than the feedback signal, the counter will be forced to
count up.
V As soon as the feedback signal becomes greater than the input, the counter
reverses direction and counts down.
Refer to Figure 15.
As long as the analogue input changes slowly, the tracking ADC is of the correct
value within one LSB. When the analogue input changes rapidly, the tracking ADC
cannot keep up with the change, and an error occurs.
The tracking ADC has the advantage of being very simple in design and easy to
construct. Unfortunately the time needed for its stabilization at a new conversion value
is directly proportional to the rate at which the analogue signal changes:
V For slowly varying signals (small maximum slopes), there is no problem.
V For more typical signals that can change quickly at times, the tracking ADC is
inadequate.
To minimize errors, the comparator at the input is built as sample and hold circuit.
It holds the value of the input voltage constant until the tracking ADC has completed
the conversion of the respective value.
The Successive Approximation Register A/D Converter
Refer to Figure 16.
The successive approximation register converter is a compromise between the best and
the worse feature of the successive approximation tracking converter.
The successive approximation tracking converter can make only one incremental step
per clock pulse. The 8--bit tracking converter may need between 1 (minimum) and 255
(maximum) clock pulses in order to reach a new conversion value.
Preliminary
Notes
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 9
With this characteristic the conversion time is directly proportional to the rate of
change of the analogue input signal, and when any part of the analogue signal is
changing by more than one incremental step per clock pulse, a substantial error is
introduced.
For a successive n--bit approximation register A/D converter, exactly n + 1 clock
pulses are required for a full conversion cycle, no matter what the analogue input
may be. An 8--bit converter of this type, for example, does always require nine clock
pulses to obtain a valid digital output.
Just like the tracking ADC, the successive approximation register ADC uses an
integrated DAC as a feedback loop, whose analogue output is compared with the
input signal.
Refer to Figure 17.
The conversion cycle of a successive 8--bit approximation register device involves
the following sequence:
Bit 7 (MSB):
1. Set the MSB to 1 and all other bits to 0.
2. Compare the analogue input to the D/A output.
V When the analogue input is greater than the D/A feedback value, then
10000000 is less than the correct digital representation. Leave the MSB at 1
and go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then 10000000
is greater than the correct digital representation. Reset the MSB to 0 and go
on to the next lower significant bit.
Bit 6:
3. Set bit 6 to 1, leaving all other bits unchanged.
V When the analogue input is greater than the D/A feedback value, then
X10000000 is less than the correct digital representation. Leave bit 6 at 1 and
go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then X10000000
is greater than the correct digital representation. Reset bit 6 to 0 and go on to
the next lower significant bit.
Bit 5:
5. Set bit 5 to 1, leaving all other bits unchanged.
V When the analogue input is greater than the D/A feedback value,
then XX10000000 is less than the correct digital representation. Leave bit 5 at
1 and go on to the next lower significant bit.
V When the analogue input is less than the D/A feedback value, then XX10000000
is greater than the correct digital representation. Reset bit 5 to 0 and go on to the
next lower significant bit.
Preliminary
Notes
Module 5
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 10
Bit 4 to 0:
7. For bit 4 to bit 0 (LSB) the sequence is continued in the same manner as described for bit 7 to bit 5.
Figure 18 shows the graph of the conversion sequence as described before.
The conversion is completed after the ninth clock sequence. The output register is
loaded with the result and a new conversion period is initialized.
(Microphone)
Transducer
Electric
signal
Analogue signal
Digital--to-analogue
converter
Analogue-to--digital
converter
Electric
signal
Digital signal
Digital
signal
processor
Digital signal
(Loudspeaker)
Transducer
(Sound)
Non--electric
signal
5.3
Analogue and Digital Signal Processing System
Transducer
Transducer
Analogue signal
(Audio amplifier)
Analogue
signal
processor
Module 5
Figure 1
Output
Input
b) General digital signal processing system
(Sound)
Non--electric
signal
a) General analogue signal processing system
B 1348 A
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 11
Digital Techniques
Data Conversion
5.3.1 - HO - 12
Module 5
Preliminary
Notes
5.3
Amplitude
(mV)
a) Original analogue signal

11
10
9
8
7
6
5
4
3
2
1
0
10
30
50
70
90
110
130
150
170
190 Time (ms)
170
190 Time (ms)
11
10
9
8
7
6
5
4
3
2
1
0
10
30
50
70
90
110
130
150
A 1300 C
Amplitude
(mV)
b) Analogue signal quantized in time and amplitude
c) Sequence of numbers representing the original analogue signal

Time
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190
Quantized
amplitude
Figure 2
Quantization in Time and Amplitude
Module 5
Preliminary
Notes
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 13
a) Sine wave sampled eight times per cycle

Amplitude
b) Square wave sampled eight times per cycle

Amplitude
Original square wave

Square wave reproduced from the samples
A 1771 A
Figure 3
Sampling
Module 5
Preliminary
Notes
5.3
Digital Techniques
Data Conversion
5.3.1 - HO - 14
a) Inverting amplifier
IF
II
R1
R2
Ud
UI
UO
b) Scaling adder with 4 inputs

U1
U2
U3
U4
IR1
R1
IR2
R2
IR5
IR3
R3
R5
IR4
R4
Ud
B 1349 B
UO
Figure 4
Applications of Op Amp Circuits
Digital Techniques
Data Conversion
5.3.1 - HO - 15
Module 5
Preliminary
Notes
5.3
Switch settings:
Logic 1 is UP
Logic 0 is DOWN
R5
Reference
voltage
1
B0 (LSB)
R1
B1
R2
B2
R3
--
0
1
0
1
UO
0
1
--UREF
B3 (MSB)
R4
Switches are set

for 1000
R5 = 1
R1
Figure 5
R5 = 2
R2
R1 =
R2 =
R3 =
R4 =
R5 = 4
R3
R5
R5/2
R5/4
R5/8
A 1784 D
R5 = 8
R4
Principle of a Simple 4--Bit DAC
--UREF
B0
0
(LSB)
1
2R
0
0
U O = U REF
B2
2R
B3 (MSB)
2R
2R
+
--
UO
Rf
(B3 2 3 + B2 2 2 + B1 2 1 + B0 2 0)
48R
5.3
4--Bit R--2R Ladder Network DAC
B1
2R
Module 5
Figure 6
Switch settings: Logic 1 is LEFT

Logic 0 is RIGHT
2R
Rf
A 1783 D
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 16
2R
B0
LSB
B1
2R
10 mA
10 mA
B2
2R
5 mA
5 mA
(2)
R
2.5 mA
2R
2.5 mA
B3
MSB
(3)
--Terminal
OP
2R
5.3
Current Divided into two Equal Parts in Each Stage of

the Ladder Network
UREF
40 mA
2R
20 mA
(1)
Module 5
Figure 7
20 mA
(0)
A 1779 B
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 17
5.3
Analogue input
Digital Techniques
Data Conversion
5.3.1 - HO - 18
Module 5
Preliminary
Notes
Binary numbers
0
0
0
1
0
0
0
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
1
1
Q2 Q1 Q0
Digital output
Figure 8
Maximum input range
1 LSB
output
level
change
Quantization
FB 1347 B
Digital Techniques
Data Conversion
5.3.1 - HO - 19
Module 5
Preliminary
Notes
5.3
UA
A 1796 B
UB
Analogue ground
Voltage input
Logic output
UA > UB
Q = 1
UA < UB
Q = 0
UA = UB
Previous state *
* Hysteresis is present to resolve the condition where UA = UB
Figure 9
Comparator Circuit
Digital Techniques
Data Conversion
5.3.1 - HO - 20
Module 5
Preliminary
Notes
5.3
Reference voltage
UREF = 10 V
Overflow
Q8
10.0 V
Q7
8.75 V
Q6
7.50 V
Binary
coded
output
Q5
6.25 V
B2
Q4
8--line
5.00 V
to
B1
3--line
3.75 V
Q3
2.50 V
Q2
encoder
B0
Combinational
logic
Q1
1.25 V
Analogue
input
0.00 V
A 1795 A
Q0
Analogue ground
Figure 10 3--Bit Flash A/D Converter
0
0
0
0
0
2.50 V to 3.75 V
3.75 V to 5.00 V
5.00 V to 6.25 V
6.25 V to 7.50 V
7.50 V to 8.75 V
Q5
Q4
Q3
Comparator outputs
Q6
Q2
Q1
Q0
B1
B0
Encoder outputs
B2
Overflow
5.3
Q7
Module 5
Figure 11 Truth Table of a 3--Bit Flash ADC
1.25 V to 2.50 V
Greater than 10.0 V
0 V to 1.25 V
Less than 0 V
8.75 V to 10.0 V
Q8
Input Voltage
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 21
A 1906 B
System
clock
Trigger
Q
D
Pulse synchronizer
&
Count
clock
Parallel load
Q7
D7
Q7
Q3
Q2
Q4
D4
Q3
D3
Q2
D2
8--bit register
Q4
Q1
D1
Q1
8--bit natural binary counter
Q5
D5
Q5
Q0
D0
Q0
5.3
Clear
Q6
D6
Q6
Digital outputs
Module 5
Figure 12 Circuit Diagram of a Time--Window ADC
Analogue
input
(potentiometer)
Monostable
multivibrator
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 22
A 1793 B
Ramp
output
voltage
Clear pulse
Pulse
synchronizer
Q
&
Count
clock
pulses
Parallel load
Q3
Q2
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
8--bit natural binary counter
D0
D1
D2
Q0
D3
Q1
D4
8--bit register
Q4
D5
Q5
D6
Q6
D7
Q7
5.3
Figure 13 Circuit Diagram of a One--Slope ADC (The Ramp)
Comparator
Module 5
Ramp
generator
System
clock
pulses
Analogue
input
Digital outputs
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 23
A 1792 B
System
clock
UI
Analogue
input
8--bit
DAC
Digital
output
5.3
D0
D1
D2
D3
D4
D5
D6
D7
8--bit
natural binary
up/down counter
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
CLK
UP/DOWN
Module 5
Figure 14 8--Bit Tracking ADC
UA > UB = count up
UA < UB = count down
Analogue
DAC output
Analogue
feedback
UB
UA
Comparator
A 1790 B
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 24
5.3
Up/down input
to counter
(up = 1
down = 0)
Figure 15 Waveforms Associated with a Tracking ADC
Tracking error
Analogue signal
(red coulour)
with D/A output
superimposed
Digital Techniques
Data Conversion
5.3.1 - HO - 25
Module 5
FA 1789 B
Preliminary
Notes
System
clock
Clear
UI
Analogue
input
Analogue
DAC output
CO
8--bit
DAC
Digital
output
5.3
D0
D1
D2
D3
D4
D5
D6
D7
CLK
Successive
approximation
register
(SAR)
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
HIGH/LOW
Module 5
Figure 16 Successive 8--Bit Approximation Register ADC
Analogue
feedback
UB
UA
Comparator
A 1788 B
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 26
Digital Techniques
Data Conversion
5.3.1 - HO - 27
Module 5
Preliminary
Notes
5.3
Operating Table:
Correct digital representation
Successive approximation register

(SAR) output at different stages in
the conversion
Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
1
CO
1*
0
A 1786 A
* = initial output
The column CO indicates the comparator output
Figure 17 Successive Approximation Register

Conversion Sequence -- Operating
Table
32
64
96
128
160
192
224
256
Digital
output
9/0
(10110100)2 = (180)10
9/0
Load output
register
Module 5
5.3
Figure 18 Timing Diagram of a Conversion Sequence
One conversion cycle
Load output
register
Preliminary
Notes
Digital Techniques
Data Conversion
5.3.1 - HO - 28
FA 1787 C
Preliminary
Notes
Digital Techniques
Data Buses
5.4.1 - HO - 1
Module 5
5.4
Data Buses
5.4.1
Introduction to Data Buses
5.4
Refer to Figure 1.
In a modern aircraft, the cockpit crew is provided with many different information.
To handle this amount of data with a minimum of manpower and in time, it is
necessary to reduce the number of indicators in the cockpit, i.e. no longer using a
separate indicator for each system/sensor.
Refer to Figure 2.
This is achieved by displaying all data from the various systems on some few
multi--purpose indicators.
A system which handles the flow and display of data of many or all aircraft systems is
called an integrated digital avionic system.
The advantages of such a system are
V it provides a better overview over the actual condition of each connected system
V it reduces the flight crews workload
V less time (and money) is required for maintenance
V it saves electrical power consumption
V the weight is reduced (wiring, units).
Refer to Figure 3.
A digital avionic system replaces the former instrumentation by an electronic flight
instrument system (EFIS) and/or an engine indication and crew alerting system
(EICAS). This includes the change from old analogue equipment to modern systems,
because digital outputs are required.
Refer to Figure 4.
The new generation of aircraft avionics is highly integrated. It saves electrical power
and weight. It provides high accuracy and reliability. The level of integration varies
(whether only the main avionic systems are combined or all), depending on the type
of aircraft.
An essential function of an integrated digital avionic system is the exchange of
information between subsystems and/or between line replaceable units (LRU) within
a subsystem.
Note:
A line--replaceable unit (LRU) (also called black box) is a unit, which can be
replaced at flight--line level in a short time.
To incorporate a fully integrated digital avionic system and to ensure the required
information exchange, a digital data bus is required. This bus is used to provide a
two--way interface between various computers, sensors and indicators.
The interface between computers and/or external devices (e.g. transceivers,
receivers) is accomplished via the digital data bus. Data may travel oneway or in
two directions, depending on the system design.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.1 - HO - 2
Module 5
5.4
Refer to Figure 5.
Typically, the data bus is a serial bus on which the data are transmitted sequentially,
i.e. one word after the other. A serial bus is commonly used for long--distance data
transmissions (more than 50 m) as required in large aircraft.
The bus is made up of a twisted pair of wires which are shielded and jacketed.
The shielding is grounded at all terminal ends and breakouts to keep bit distortion at
a low level. Shield grounding and high voltage spike protection within the individual
data--receiving components ensure accurate transmissions.
Transmission of data within micro--computers, between micro--computers and
external devices as well as between other components can be accomplished with
8--, 16--, 32-- and 64--bit digital data words, depending on the system layout.
Some of these information are in the form of discrete data. Typically, these data are
formed by switching between +28 V DC and open (or between ground and open).
Discrete data are carried on a single wire.
This type of information is used for annunciators, warnings and wherever simple
condition information is sufficient. This is a small portion of the total information
interchange.
There are different data bus systems found and used in an integrated digital avionic
system. Each bus system has its own organization in terms of addressing, data,
wordsize, electrical characteristics and speed according to certain standards.
Some of these standards are:
V Aeronautical Radio Incorporation (ARINC) 429 Bus
V Commercial Standard Digital Bus (CSDB)
V RS 422
V RS 232
V MIL--STD--1553
V Avionic Standard Communication Bus (ASCB).
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.1 - HO - 3
Figure 1
Cockpit of Conventional Design
FB 7005
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.1 - HO - 4
Figure 2
Cockpit with EFIS
FB 7006
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.1 - HO - 5
Figure 3
Fully Integrated Cockpit Design
FB 2395 A
Figure 4
Conventional and Integrated Design
5.4
Consisting of (typically):
-- 4 to 8 main components
-- microprocessor technique
-- a special data bus
-- interfaces to EFIS, EICAS
Integrated design
Module 5
Consisting of (typically):
-- 20 to 30 main components
-- 6 or more relay boxes
-- a lot of wiring, mountings, connectors
-- individual indicators
Conventional design
Preliminary
Notes
Digital Techniques
Data Buses
5.4.1 - HO - 6
B 7007 A
Auto flight
guidance
system
Flight
management
system
VHF
navigation
system
Symbol
generator
Digital Bus System
Thrust
management
system
Digital bus system
EHSI
Digital data bus
Radio
altimeter
system
EADI
Module 5
5.4
Figure 5
AFDS mode control panel
Central
air data
computer
Inertial
reference
system
Preliminary
Notes
Digital Techniques
Data Buses
5.4.1 - HO - 7
B 6981
Preliminary
Notes
5.4.2
Bus Architecture
5.4.2.1
ARINC 429
Digital Techniques
Data Buses
5.4.2 - HO - 1
Module 5
5.4
Introduction
Refer to Figure 1.
Aeronautical Radio Incorporated (ARINC) is a corporation in which commercial
airlines are the main shareholders. Other shareholders include air transport
companies, aircraft manufacturers and aircraft equipment manufacturers.
Amongst their activities, ARINC sponsors the Airlines Electronic Engineering
Committee (AEEC) to formulate standards for electronic equipment and systems for
commercial airlines.
One of these standard is the ARINC 429 Mark 33 Digital Information Transfer
System (DITS). The first revision ARINC 429--1 was issued on 11th April, 1978.
The current specification is ARINC 429--10.
There are two main advantages in standardizing a digital information transfer system:
V Significant savings in size and weight of avionic units and the interconnecting
wiring between them
V Cost savings, since a unit can be used on different aircraft with little or no
modification.
The ARINC 429 bus system is made up of transmitters (source) and receivers (sink)
connected by shielded, twisted wire pairs.
Data is transmitted by a single transmitter to either a single receiver or a group of up
to 20 receivers connected in parallel.
Each ARINC 429 bus carries data in one direction only. Bi--directional transmission
between two line--replaceable units (LRUs) must be accomplished by using two sets
of transmitters, receivers and twisted--wire--pair buses.
Each LRU must have its own transmitter and its own receiver.
Word Structure According to ARINC 429
ARINC 429 transmissions consist of words made up of 32 bits. These words are
transmitted at 12.5 kHz (low speed) or 100 kHz (high speed). Bit 1 is always the first
bit transmitted, bit 32 is always the last.
Bits 1 to 8 are called the octal label, which identifies the type of information
contained within the word. For example, ground speed has an octal label of 312.
In most cases, bits 9 and 10 are the source/destination identifier (SDI), which
indicates the source LRU in a multi--box installation by system number (1 to 4).
Bits 9 and 10 may also be used as data bits in high-- resolution data words.
Bits 11 to 29 (or 28) compose the data field. Bit 11 is the least significant bit (LSB),
bit 29 (or 28) is the most significant bit (MSB). If the datafield consists of bits 11 to 29
the data are in binary--coded decimal (BCD) format. If the datafield consists of
bits 11 to 28 the data are in binary (BNR) format.
Bit 30 and 31 (or 29, 30 and 31) form the sign status matrix (SSM), which identifies
the sign and validity of the data. Bit 32 is used for parity.
Digital Techniques
Data Buses
5.4.2 - HO - 2
Module 5
Preliminary
Notes
5.4
Label Assignment According to ARINC 429

Refer to Figure 2.
In the octal label, bits 1 to 8 are used to represent numbers of 0 -- 377. The 8 bits are
divided into two groups of 3 bits and one group of 2 bits. Each group represents a
digit encoded in binary.
The octal label is transmitted with the most significant bit (MSB) (bit 1) of the most
significant digit first. This reversed label characteristic is a legacy from past systems
in which the octal coding of the label field was of no particular significance.
Example:
In the following table, line one shows the label 230 = true airspeed, line two
shows the label 312= ground speed.
Bit number
LSB
MSB
Octal value
(1
4)
(1
4)
(1
2)
Decoded
2
Decoded
0
0
3
0
0
1
2
0
1
3
Data Field
Units, ranges, resolution, refresh rate and number of significant bit for the information transferred are encoded in either binary--coded decimal (BCD) (Figure 3,
detail b)) or binary (BNR) (detail a)) (twos complement) fractional notation. Discrete
information is also sent via the ARINC 429 bus.
If the datafield contains bits in a binary (BNR) format, the most significant bit of the
data field represents one half of the maximum possible of the value transmitted.
Each successive (less significant) bit represents one half of the previous (more
significant) bit. Negative numbers are encoded as the twos complement of positive
values. The negative sign is reflected in the sign/status matrix.
If the datafield bits 11 to 29 contain bits in a binary--coded decimal (BCD) format,
the data is grouped into 4 bit digits, each denoting a decimal column.
The 19 data bits are broken up into four groups of 4 bits and one group of 3 bits.
Each group of 4 can represent a number from 0 to 9. The fifth group can represent a
number from 0 to 7.
In the data field, only those bits, which are required to transmit parameter range and
resolution, are used. The remaining bits are set to logic 0 and designated as pads (P)
(detail c)).
Angles 0 to 359.xxx are encoded as 0 to 179.xxx. The positive portion of the
semicircle represents 0 to 179.xxx. The negative portion includes 180 to 359.xxx.
An all zeros configuration represents 0 and 180 degrees.
An all ones configuration represents 179.xxx and 359.xxx. twos complement
notation is used for the negative half in combination with the sign bit.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 3
Data Types
Following data types are used in ARINC 429:
V BNR
binary data expressed in fractional twos

complement notation
V BCD
the numerical subset of ISO alphabet no. 5
V Discrete data, used in two ways

as part of a BNR or BCD
or, when using labels 270 to 276, the data
field bits 11 to 29 are used for discrete
data messages
V Maintenance data
can be made up of BNR, BCD and discrete data.
V AIM data (acknowledge, ISO alphabet no. 5 and maintenance data)

this type of data is used, when the data
package contains more than 21 bits of
information. The data package would be
divided into data words (i.e. initial word,
intermediate word and final word).
Sign/Status Matrix
Refer to Figure 4.
Figure 4 shows the sign status matrix for a binary (BNR) and binary-- coded decimal
(BCD) word format.
Parity Check
The parity check is one of the simplest of all error checking methods used in data
handling. There are two basic parity configurations: odd and even. ARINC 429
transmissions are always of odd parity.
Bit 32 is the parity bit. ARINC 429 receivers are programmed to always expect an
odd number of binary ones in each 32 bit word.
Bit 32 is set to logic 1(one) when there is an even number of binary ones in the word.
It is set to logic 0 (zero) when there is an odd number of binary ones in the word.
This creates a word which always contains an overall odd number of ones.
Transmission Waveform
ARINC 429 transmissions return to the zero voltage condition at the end of each bit
period. As shown in Figure 5, a high on line A and a low on line B represent a
binary one. A low on line A and a high on line B represents a binary zero.
When both lines A and B are at zero volt, there are no data transmitted.
ARINC 429 transmitters must provide a minimum dead time of 4 bits between
messages because the receivers synchronize to the transmitted data by recognizing
the 4--bit dead time as the synchronizing command.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 4
Electrical Parameters
Refer to Figure 6.
Tri--level bipolar modulation consists of Hi (binary one), Lo (binary zero) and Null
(no data). When the transmitter is open--circuit, the differential output signal voltages
across the specified output terminals (balanced to ground at the transmitter) are:
V Null
--0.5 V to +0.5 V
V Hi
+9.0 V to +11 V
V Lo
--9.0 V to --11 V.
The differential voltage presented at the receiver is dependent upon the line length
and the number of receivers connected to a transmitter. Noise and pulse distortion
will also affect these voltage levels. Therefore, receivers should be designed to
accept the following voltage ranges for the three states:
V Null
+2.5 V to --2.5 V
V Hi
+5.0 V to +13 V
V Lo
--5.0 V to --13 V.
Note:
Common receiver input mode voltages (line A to ground and line B to ground) are
not specified because of the difficulties of defining ground precisely.
The transmitter output impedance is 75 balanced to ground. The receiver input
impedance is typically 8,000 . No more than 20 receivers (400 minimum for
20 receiverloads) should be connected to one digital data bus.
Each receiver contains isolation provisions to ensure that the occurrence of any
reasonably probable failure does not cause loss of data to the others. Bus fault
tolerances for shorts and steady state voltages are designed into the transmitters
and receivers.
5.4.2.2
RS 422, RS 232
RS 422 and RS 232 are electrical specifications as defined by the Electronic
Industries Association (EIA) for a serial databus.
5.4.2.3
Commercial Standard Data Bus

The commercial standard data bus (CSDB) is an unidirectional bus like the ARINC
429, but with a different organization and different characteristics.
5.4.2.4
Note:
MIL--STD--1553
A glossary of the terms used in MIL--STD--1553 is provided at the end of this
Chapter.
History and Background

During the mid--1960s, there was a growing complexity in integrated avionic
systems. This additional complexity resulted in a growing number of discrete
interconnections between various components on an aircraft, providing both
additional size and weight.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 5
To deal with this increasing complexity, the Aerospace Branch of the Society of
Automotive Engineers (SAE) developed the first draft of a multiplexed data bus
standard in 1968.
The US Department of Defense adopted the draft as MIL--STD--1553, to be used and
applied by the military services and their contractors. The military standard established engineering and technical requirements for processes, procedures, practices
and methods. The standard was amended in 1978 to MIL--STD--1553B.
MIL--STD--1553B sets the guide--lines for time--division multiplexing. This is the
transmission of data between several avionic units over a single twisted shielded
pair cable.
Communications between different units can take place at different moments in time.
All communications between units share the same bus. The standard is now used on
new military airplane and helicopter systems, space systems and even land--based
vehicles.
There are two main advantages in standardizing a digital time--division multiplex data
bus:
V Significant savings in size and weight of avionic units and the interconnecting
wiring between them
V Cost savings, since a unit can be used on different aircraft with little or no
modification.
Structure
Refer to Figure 7.
MIL--STD--1553 defines three types of terminals:
V Bus controller (BC)
V Remote terminal (RT)
V Bus monitor (BM).
MIL--STD--1553 states that the bus controller transmits and receives data,
and coordinates the flow of information on the data bus. All information is communicated in command/response mode.
This mode ensures that the sole control of information transmission on the bus shall
reside with the bus controller, which shall initiate all transmissions.
The remote terminal gathers information, for example, from aircraft sensors.
It formats this data for transfer on the data bus. The remote terminal can also receive
information from the data bus and convert this data to a format suitable for use by the
aircraft.
The remote terminal may contain little or no intelligence, such as a simple interface
unit, or may be a full avionics computer. The standard allows for up to 32 remote
terminals to be connected to the data bus.
The bus monitor listens to the information flowing on the bus and records all or
selected pieces of data. The bus monitor may record data for later analysis, as in a
flight test program. It is strictly passive and is used only as a test device.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 6
Summary of the main aspects of MIL--STD--1553:

V Up to 32 remote terminals can be connected to the data bus
V Information must be transferred in a command/response mode
V No remote terminal shall speak unless addressed first by the bus controller
and specifically commanded to transmit.
Data to be Transferred
MIL--STD--1553 also defines the information that will flow on the data bus.
This information can be one of the following three words:
V Command word
V Status word
V Data word.
The command word is transmitted only by the bus controller. This word directs a
remote terminal to either transmit or receive information across the data bus.
The status word is transmitted only by a remote terminal. This word indicates the
general status of the remote terminal. It indicates whether any error conditions were
detected in the information received by the remote terminal, or other general RT
status conditions.
The data word is transmitted by the bus controller or a remote terminal. This word
contains the actual information that will be transferred from one avionic unit to
another, across the bus.
Bus Controller
The bus controller (BC) is an avionics computer that controls the flow of information
on the data bus. It transmits commands to remote terminals at predetermined times.
The command may be followed by data words, or it may request data from a remote
terminal (RT).
The BC must be able to respond to changes in the aircraft environment.
These changes may be the result of deliberate action of the pilot (such as changing
the aircraft mode from air--to--ground attack mode to air--to--air combat mode).
Changes in the aircraft may also be the result of some unexpected event (such as an
avionic unit failure or battle damage). Regardless of the cause, the BC must be able
to respond to the change.
In the case of some unplanned event, such as an RT failure, the BC has the
capability of detecting the occurrence of an error on the data bus. The BC will then
take action to recover from the error condition.
For a planned change, such as a mode change in the aircraft, a BC will typically
modify the flow of information on the bus in a predetermined way. The BC changes
the sequence and frequency of messages between RTs.
During error detection, the BC will typically retransmit a command to the suspected
RT. If multiple attempts of transmitting to a RT result in errors, the BC will try to
establish communications with the failing RT on the redundant (back--up) data bus.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 7
Remote Terminal
A remote terminal (RT) is an avionics unit designed to transfer data between an
aircraft subsystem and the MIL--STD--1553 data bus. It may be fitted within the
subsystem it is interfacing, or it may stand alone, external to the interfaced subsystem.
A MIL--STD--1553 remote terminal does more than simply reformat and transfer data
between the aircraft subsystem and the data bus. It receives and decodes commands from the bus controller (BC), following the prescribed protocol
of MIL--STD--1553.
An RT detects errors in transmissions from the BC and responds to these errors
according to the specification. The RT must be able to properly handle both protocol
and electrical errors.
A protocol error is an error where the incoming command word and data words are
electrically correct, but the message deviates from the protocol established by
MIL--STD--1553. For example, a protocol error occurs when commands are followed
by an incorrect number of data words.
An electrical error is where the command and/or data words received from the BC
contain some sort of waveform error, such as rise or fall time violations or excessive
ringing.
Bus Monitor
A bus monitor (BM) is a unit used for data bus testing. It can be attached to an
aircrafts data bus during flight--testing. In this manner, it is used to examine the flow
of information on the data bus in real time. The BM can also store all or selected
messages for later analysis.
As a laboratory bus tester, the BM examines all the traffic flowing on a
MIL--STD--1553 bus. It detects and records electrical and protocol errors.
The bus monitor can generally be used to display snap--shots of the bus traffic.
Data Bus
The fourth integral part of MIL--STD--1553 is the data bus. The technical definition of
a data bus is a twisted shielded pair transmission line made up of a main bus and a
number of attached stubs. In short, a data bus is a cable whose electrical characteristics are defined by MIL--STD--1553.
There are two different ways of connecting a terminal to the data bus:
V Directly coupled (Figure 8, detail a))
V Transformer coupled (detail b)).
These connections are referred to as stubs. There are two differences between
these types of coupling. Direct coupling can only be used with stubs less than one
foot (approximately 30 cm) long. With direct coupling, the transformer and isolation
resistors are internal.
Transformer coupling is used with stub lengths less than 20 feet
(approximately 6.1 m). A second transformer is added and the transformers and
isolation resistors are external to the remote terminal in their own box.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 8
Word Types
Refer to Figure 9.
As mentioned before, there are three distinct types of words defined
by MIL--STD--1553:
V Command words
V Status words
V Data words.
The bits are encoded in each of the words using Manchester II bi--phase encoding.
In a Manchester format, bit values of one are positive for a --bit period, followed by
a negative level for a --bit period. Zero values are the opposite, a negative level is
followed by a positive one.
The sync pattern is a unique invalid Manchester encoding that indicates the start of
each word.
A command sync is positive level for 1 --bit periods followed by a negative level for
1 --bit periods.
A data sync is reversed.
A status sync is identical to a command sync. Command and status words are
differentiated by both word content and temporal context, i.e., the occurrence of such
a sync in the timing of a message. Figure 9 shows the various Manchester II
encoded patterns. The MIL--STD--1553 bus is a differential bus. The waveforms
shown are for the positive leg of the bus. Of course, the negative leg is exactly the
opposite.
Each of the three word types has a unique format. All three have a common
structure. They contain a command sync or a data sync. The sync character is
always transmitted first, followed by 16 information bits. The parity bit is always
transmitted last.
This extra bit ensures that, if a hardware failure occurs and a bit is lost in transmission, its loss can be detected. All words transmitted on a MIL--STD--1553 bus
must have odd parity.
Command Words
Refer to Figure 10.
The command word consists of 16 bits divided into four distinct fields. The command
word always begins with a command sync character. A 5--bit remote terminal address
field always follows the sync character. The purpose of the address field is to identify
to which RT a command is being transmitted. Each RT in a system is assigned a
unique address.
The RT examines the address field of all incoming commands. If the address field
matches the address of the remote terminal, the RT will act on the remainder of the
command.
If the address field of the command does not match the address of the RT,
the command is ignored. The limitation of a maximum of 32 terminals on
a MIL--STD--1553 data bus results from this 5--bit address field. The RT address
range is 0 to 31.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 9
Module 5
5.4
MIL--STD--1553B extended the RT address protocol definition to include broadcast

messages, i. e., commands from the BC to all RTs simultaneously. RT address 31
was defined as the broadcast RT.
Individual RTs could enable or disable the processing of broadcast messages, but no
RT could respond as a singular RT to the broadcast address. This limits the number
of RTs in a MIL--STD--1553B bus system to 31, plus the broadcast address.
The next field is only one bit in length. The transmit/receive (T/R) bit indicates the
action required of the remote terminal. The point of view for this bit is from the RT,
that is, if the BC commands the RT to transmit data (data flow from RT to BC,
T/R bit is logic 1) or receive data (data flow from BC to RT, T/R bits is logic 0):
V Logic 1 = RT is to transmit data in response to the command
V Logic 0 = RT is to receive data along with the command.
The sub--address/mode field follows the T/R bit. A sub--address is a function or an
area within the RT to which the command is being directed. The sub--address directs
the RT to a specific grouping of data to be transmitted onto the bus, or it tells the RT
what to do with the data it is about to receive.
MIL--STD--1553A defined one special sub--address, sub--address 0, as the mode
code sub--address. MIL--STD--1553B extended this definition to also include
sub--address 31. All other values of this field indicate a remote terminal sub--address
to which the command is being directed.
MIL--STD--1553 defines a series of commands to aid in the management of the data
bus and the electrical control of the RTs as opposed to typical data transfer commands. These commands are called mode control commands, mode code commands or mode commands.
Some examples of mode commands are:
V Reset RT
V Initiate self--test
V Transmit last command.
Note:
Mode commands exchange usually one--data words and may contain even no
data words at all.
Almost every aircraft specification requires at least a basic subset of the mode
commands to be implemented.
The final field in a command is the word count/mode code field. This 5--bit field either
specifies the mode command or the number of words which are to be exchanged
with the BC.
When the previous field (the sub--address/mode field) is all zeros or all ones,
the word count/mode code field uniquely identifies which mode command is being
transmitted. In this way, up to 32 different mode commands can be specified.
When the command is not a mode code, the word count/mode code field identifies
the number of data words that are to be exchanged along with this command.
Refer to Figure 11.
The table in Figure 11 summarizes the mode commands defined by
MIL--STD--1553B.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 10
Module 5
5.4
Sample Commands
1. BC transmits
10110
Address field
10110
(RT with the address 22)
T/R bit
Sub--address/mode
00101
01001
(transmit)
00101
Word count/mode code
(sub--address 5)
01001 (9 words)
2. BC transmits
01010
Address field
01010
(RT with the address 10)
T/R bit
Sub--address/mode
Word count/mode code
00000
00011
(transmit)
00000
(mode command)
00011 (initiate
self--test).
Status Words
Refer to Figure 12.
The status words transfer status information from the RT to the BC. This information
describes the condition of the RT, whether the RT detected any errors in the
command or data words it just received, etc.
A status word is only transmitted by an RT in response to a command from the BC.
Like the command word, it always begins with a command sync and a remote
terminal address.
The purpose of transmitting the RT address in a status response is twofold:
V First, it allows the BC to verify that the status response is from the correct RT
and that the last command was not misinterpreted
V Secondly, it prevents any other RT from mistaking the status response as a
command, since the sync pattern for both is the same.
If an RT mistakenly decodes another RTs status response as a command, it will find
that the address does not match its own, and will ignore the command. Following the
address field, there are 11 bits, 8 of which are defined by MIL--STD--1553B.
The remaining 3 bits are undefined but reserved for future use.
The bit immediately following the remote terminal address field is the message error
bit. This bit, when set to logic 1, is used by the RT to indicate that something was
wrong with the command or data words it just received from the BC.
The message error bit is set when any of the following conditions occur:
V A data word received from the bus controller contains an error
V A gap is detected between data words
V A received command is not implemented by the RT
V The wrong number of data words is received by the RT.
If an error occurs in a message, the sending of the status word is suppressed.
The BC must use the transmit last status mode command to attempt to determine
the reason for no response.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 11
Module 5
5.4
The message error bit is set until it is transmitted in a status or until a new valid
command other than a transmit last status mode command is received by this RT.
The instrumentation bit follows the message error bit . It is an optional bit used to
differentiate between command and status words. This bit should always be zero.
The service request bit indicates that the RT requires service. Setting this bit can
direct the BC to undertake a predefined data transfer or mode command. This bit is
also optional. If it is not implemented, it must always be a logic 0.
The next 3 bits are reserved and must always be a logic 0.
The broadcast command received bit is used by a RT to indicate that it received a
valid broadcast command. When a broadcast command is received, the bit is set to
logic 1 and remains set until it is either transmitted or until a valid non--broadcast
command is received by this RT. If not implemented, it is set to logic 0.
The busy bit is an optional bit, which indicates that the RT is unable to move data to
or from the subsystem in response to a command. Once set, it remains a logic 1 as
long as the busy condition exists. If this bit is not used, it must be set to logic 0.
The subsystem flag bit is an optional bit used by an RT to alert the BC that a fault
exists in the subsystem and the data being transmitted may be invalid. A logic 1
indicates the presence of a fault condition and a logic 0 its absence. Once set, it will
remain active until the subsystem fault is resolved. If the subsystem flag bit is not
used, it must be set to logic 0.
The dynamic bus control acceptance bit is an optional bit. If not used, it should be set
to logic 0. When set to logic 1, it indicates to the BC that the RT has accepted the
dynamic bus control mode command and will immediately take over the task of bus
control as the back--up bus controller.
The bit is cleared upon transmission. If the RT rejects dynamic bus control, it sets
this bit to logic 0.
The terminal flag bit is also optional. Like the others, if not used, it must be set to
logic 0. When set to logic 1, the terminal flag bit indicates the existence of a fault in
the RT itself. It will remain set until the condition causing the fault is resolved.
Data Words
Refer to Figure 13.
Data words contain the actual information that is to be transferred between RTs and
the BC, or between RTs. They may be transmitted by either the BC or an RT. Data
words contain the most information, yet they are the least structured types of word in
MIL--STD--1553. A data word format is shown in Figure 13.
Data words
V begin with a data sync
V have 16 information bits
V end with a parity bit
V are transmitted with the most significant bit first.
No standard exists which describes the contents of a data word. The contents and
format of a data word vary from unit to unit and aircraft to aircraft.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 12
Module 5
5.4
Basic Bus Protocol

Refer to Figure 14.
Protocol means the relationship of how the three types of MIL--STD--1553 words are
used to transfer data between terminals. The MIL--STD--1553 protocol defines ten
different types of messages with the following requirements:
V All messages begin with a command from the BC
V There must be a minimum gap between messages
V If an RT is to respond to a command, that response must begin with a status
word
V There cannot be any gaps between data words.
There are two types of intervals (in ms) used in the bus protocol:
V RT response time
V Intermessage gap time.
The RT response time is the specific time window during which the remote terminal
must respond. It is required to be within the range of 4 ms to 12 ms.
The intermessage gap time is a minimum time period of 4 ms between messages.
Both times are measured between the zero crossing of the parity bit and the zero
crossing of the sync bit.
The RT will only respond with a status word if there are no errors in a message.
Transfers
BC--to--RT
Refer to Figure 15.
This is the simplest type of transfer. The BC sends data to an RT. The T/R bit in the
command is set to logic 0, indicating that the RT is to receive data. The receiving RT
validates the incoming command and data words. If the message meets all the
validity requirements outlined in MIL--STD--1553B, the RT responds with a status
word, acknowledging the reception of the command and data.
RT--to--BC
Refer to Figure 16.
The BC sends a command onto the data bus. In this command, the address field is
set to the address of the RT from which the BC requests data. The T/R bit is set to
logic 1 indicating that the RT is to transmit data. The word count field indicates the
number of data words that are to be transferred. After validating the command,
the RT responds with its status word and the appropriate number of data words.
RT--to--RT
Refer to Figure 17.
The BC directs this type of transfer. It transmits two back--to--back commands:
V The first for the RT which is to receive the data
V The second for the RT which is to transmit the data.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 13
In the first command (the receive command) the address field contains the address
of the receiving RT. The T/R bit is set to logic 0 indicating that the RT is to receive
data words. The word count field indicates the number of data words the RT should
expect to receive.
In the second command (the transmit command) the address field contains the
address of the RT which is to transmit the data words. The T/R bit is set to logic 1.
Finally, the word count field indicates the number of data words the RT should
transmit.
Note:
The address in the receive command must always be different from the address
in the transmit command.
In order to make an RT--to--RT transfer work, it is necessary that the word count
fields in both the transmit command and the receive command match.
Commands
Mode Commands without a Data Word
Refer to Figure 18.
The BC issues a command to an RT with the T/R bit set to logic 1 and the sub--address mode field equal to all zeros or all ones. The word count field now contains
the mode code for the command to be implemented.
Mode commands, that do not require data, will include reset and self--test commands. The remote terminal, after validating the command, responds with its status
word.
Mode Commands With a Data Word (Transmit)
Refer to Figure 19.
Certain types of mode commands require the RT to send back a single data word
along with the status response, for example, to report a built--in test (BIT) word,
or to transmit the last received command.
For this type of command, the T/R bit is set to logic 1, indicating that the RT is to
transmit data. The sub--address/mode field is set to all zeros or all ones, indicating
a mode command. The word count field identifies the particular command being
implemented.
After receiving and validating the command, the RT responds with its status word
and a single data word. The content of the word count field in a particular command
determines if a mode command has an associated data word.
Mode Commands With a Data Word (Receive)
Refer to Figure 20.
For this type of command, the T/R bit is set to logic 0, indicating that the RT is to
receive data. Examples of this type of command can be a selected transmitter
shut--down, where a data word might contain encoded information concerning which
transmitter.
After receiving and validating the command, the RT responds with its status word.
The content of the word count field in a particular command determines if a mode
command has an associated data word.
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 14
Module 5
5.4
Broadcast
Refer to Figure 21.
As part of MIL--STD--1553 B, the BC can disseminate information to all remote
terminals at the same time. The four types of broadcast command correspond with
some of the transfers and mode commands mentioned above:
V BC--to--RT transfer
V RT--to--RT transfer
V Mode command with data word (receive)
V Mode command without data word.
The BC always transmits broadcast commands to RT address 31 (11111).
The receiving RTs do not respond with status words to the broadcast commands.
When receiving a command with this address, all remote terminals with the broadcast option accept the command (and data, if any), as if the command had been
directed to them.
With the exception of the transmit command portion of the RT--to--RT transfer (where
one RT is selected to broadcast data to all other RTs) a broadcast command cannot
be a transmit command.
Multiple RTs responding to a transmit command by sending data onto a single bus
would provide corrupt data. Likewise, RTs cannot respond with a status due to this
bus collision problem.
Note:
For an RT--to--RT broadcast transfer, the receive command is the broadcast

command. The transmit command is sent to the RT which is to provide the
broadcast data. Likewise, the status respond is that of the transmitting RT.
The RT sets the broadcast command received bit in the RTs status word. The bus
controller determines whether a broadcast command was property received by
polling each remote terminal, requesting its status word through a transmit last
status mode code command, and checking if the broadcast command received bit
is set.
Message Validation
Message validation depends upon the RT to detect electrical and protocol errors in a
message and to validate the command and data words received from the BC.
There are two classes of words and messages containing errors:
V Invalid
V Illegal.
Invalid
An invalid word is a command or data word that contains any or all of the following
conditions:
V An improper sync character
V A bit with an invalid Manchester II code
V The wrong parity (16 bits plus parity).
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 15
An invalid message is a message that is defined by one or more of the following

conditions:
V An invalid word
V Discontinuous data:
A condition where a gap exists between any two data words, between the
command word and the data words, or between the transmit status and the
data words
V A word count error:
A condition where the RT did not receive the correct number of data words
based on the T/R bit, sub--address/mode field and word count/mode code
field.
Illegal
An illegal command is a command that a remote terminal was not designed to
accept. A command to an unimplemented sub--address/mode code results in an
illegal command as well.
If an RT detects a command word with a validity error (bad sync, Manchester error,
the wrong number of bits, etc.) it will ignore the whole message. In other words,
no error flags are set.
The RT disregards the entire message. It should not respond to a message
containing this class or error. Because the error was in the command word, there is
no assurance that the command was for this RT in the first place.
When an RT detects validity errors in the data portion of a message, it should set the
message error bit in the status word. The sending of the status word is still suppressed. The message error bit could be retrieved by the BC following a no--response timeout by using the transmit status word mode command.
The BC must validate status words and data words from an RT. If the BC detects
errors, it must also disregard the information received.
Electrical Characteristics
MIL--STD--1553 defines the waveform output of a terminal and the input with which a
terminal is required to work.
Note:
The full realm of MIL--STD--1553 electrical verification is beyond the scope of this
lecture.
Glossary of MIL--STD--1553 Terms

Broadcast command receive bit:: This bit is used by a remote terminal to indicate
that it has received a valid broadcast command.
Bus controller: A device that coordinates the flow of information on the data bus.
Bus monitor: A passive unit used for data bus testing. It listens to all information
flowing on the bus and records all or selected pieces of data.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 16
Busy bit:: This bit indicates that the remote terminal is unable to move data to or
from the subsystem in response to a command.
Command sync: A structure common to MIL--STD--1553 words. It consists of a
positive level for 1 bit periods followed by a negative level for 1 bit periods.
Data bus: A cable for transferring data and electrical signals between the central
processing unit, storage and all the input/output devices of a computer system.
Data sync: A structure common to MIL--STD--1553 words. It consists of a negative
level for 1 bit periods followed by a positive level for 1 bit periods.
Data word: A word transmitted by the bus controller or remote terminal(s). This word
contains information to be transferred from the bus controller to the remote terminals
and information to be transferred between remote terminal(s) and the bus controller,
or between two remote terminals.
Dynamic bus control acceptance bit:: An optional status word bit. If it is set to
logic 1, this bit indicates to the bus controller that the remote terminal has accepted
the dynamic bus control mode command. The remote terminal will immediately start
bus control as the back--up bus controller.
Electric error: An error where the command and/or data words received from the
bus controller contain some sort of waveform error.
Illegal command: A command, a remote terminal was not designed to accept.
Instrumentation bit:: An optional status word bit, always set to logic 0.
Intermessage gap: A gap of at least 4 ms that must always exist between messages.
Invalid command: A word which does not begin with a valid sync field, but with an
invalid Manchester II code or an even parity.
Message error bit:: A bit in the status word, used by the remote terminal to indicate
that something was wrong with the message it just received from the bus controller.
Mode control commands: (Mode code commands or mode commands): a series of
commands defined by MIL--STD--1553 to aid in the management of the data bus and
the electrical control of the RTs.
Odd parity: The sum of the preceding 16 bits plus the parity bit must be odd.
Parity bit:: An extra bit that is always odd, according to the logic of the system.
Polling: A communication control method whereby a computer asks many devices
whether they have information to send.
Protocol: The relationship of how the three types of MIL--STD--1553 words are used
to transfer data between terminals.
Protocol error: An error where the incoming command and data are electrically
correct but the message is illegal by the protocol established by MIL--STD--1553.
Remote terminal: An avionic unit designed to transfer data between an aircraft
subsystem and the MIL--STD--1553 data bus.
Remote terminal response time: The 4 ms to 12 ms during which a remote terminal
must respond.
Preliminary
Notes
Module 5
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 17
Service request bit:: A bit provided to indicate to the active bus controller that the
remote terminal is requesting service.
Standard interface: A unit developed for one aircraft, which can be used on another
aircraft with little or no modification.
Status word: A word transmitted only by a remote terminal to the bus controller.
This word gives information regarding the general status of the remote terminal itself.
The status word indicates whether any error conditions were detected in the
command or data words just received by the remote terminal.
Sub--address: A function or an area within the RT to which a command is being
directed.
Subsystem flag bit:: An optional status word bit used by a remote terminal to alert
the bus controller that a fault is in the subsystem. It also tells the BC that the data
being transmitted may be invalid.
Sync character: Part of the MIL--STD--1553 word structure. This command or data
character is always transmitted first.
Terminal flag bit: a bit which indicates the existence of a fault in the remote terminal.
Time--division multiplexing: The transmission of information between several
avionic units on an aircraft via a single cable, with communications between different
units taking place at different moments in time.
Transmit/receive (T/R) bit:: A bit which indicates if the RT is to transmit or to receive
data.
Word count/mode code field: A field in the command word that specifies either the
mode command or the number of words, which are to be exchanged with the bus
controller.
5.4.2.5
Avionics Standard Communications Bus

The HONEYWELL Avionics Standard Communications Bus (ASCB) is based on the
same principles like the MIL--STD--1553 bus. But it is more efficient in terms of
V speed of data transfer
V amount of data
V maximum possible number of RTs.
5.4
Tx
High--speed
bus
Rx
Tx
Tx
Rx
Tx
Digital Techniques
Data Buses
5.4.2 - HO - 18
Module 5
Preliminary
Notes
Low--speed bus
Rx
Rx
Rx
Low--speed bus
Rx
Rx
Rx
Shielding
Receiver
FB 6985 A
Transmitter
To receiver
Figure 1
Typical ARINC 429 Bus Construction
5.4
Guidelines for label assignments
Two
most
significant
digits
Least significant digit

0
BCD
BNR
BCD
Discrete
Main disc
BCD
Main Data
BCD
M data
BCD
BNR
Mix
Test
Discrete
Application dependent
Test
BNR
Maintenance Data
BNR
Ack
M ISO
ISO 5
EQ ID
FB 6986
00
01
02
03
04
05
06
07
10
11
12
13
14
15
16
17
20
21
22
23
24
25
26
27
30
31
32
33
34
35
36
37
Digital Techniques
Data Buses
5.4.2 - HO - 19
Module 5
Preliminary
Notes
Figure 2
Label Assignments
1 0
0 0
MSB
1 0
1 0 0 0
1 0
SSM
0 0
1 0 1
29 28 27
MSB
4 2 1
0 1 1 0
0 1 0 1
SSM
Pad
Discrete LSB
Label
MSB
0 0 0 1 1 0 1 0
LSB
8 7 6 5 4 3 2 1
SDI
10 9
Label
8 7 6 5 4 3 2 1
Label = True airspeed (230)

Data = 565 knots
P = pad
0 0
SDI
10 9
Examples of ARINC 429 Data Words
BCD data
Figure 3
MSB
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11
MSB
5.4
31 30
P P P P
Label
0 1 0 1 0 0 1 1
LSB
8 7 6 5 4 3 2 1
Label = Ground speed (312)

Data = 650 knots
P = pad
0 0
SDI
10 9
Module 5
32
P P P P
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11
Data field
LSB
8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
c) Generalized BCD data word with discrete data
31 30
32
LSB
1 0 0 0 0 P P P
Data field
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11
b) Example of a binary--coded decimal (BCD) data word
SSM
31 30 29
32
a) Example of a binary (BNR) data word
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 20
FB 6987
Digital Techniques
Data Buses
5.4.2 - HO - 21
Module 5
Preliminary
Notes
5.4
For BCD data

P SSM
Data field
SDI
Label/address
Bit No. 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0 0
AIM
Plus, north, east,

right, to, above
Intermediate word
Intermediate word
plus, north etc.
Initial word
Initial word
Final word
Final word
Control word
Intermediate word
minus, south, etc.
0 1 No computed data(NCD)
1 0
Functional test
1 1
File transfer
BCD numeric word
Minus, south, west,

left, from, below
For BNR data

Data field
P SSM
SDI
Label/address
Bit No. 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
LSB
Sign bit
0
Plus, north, east, right, to, above
Minus, south, west, left, from, below

Status matrix
0 0
0 1
No computed data
1 0
Functional test
Normal operation
1 1
Figure 4
B 6988
Priority
1
Failure warning
ARINC 429 Sign Status Matrix
Digital Techniques
Data Buses
5.4.2 - HO - 22
Module 5
Preliminary
Notes
5.4
1
0
ARINC 429 Transmission Waveform
1
0
0
1
1
0
0
1
4
2
Figure 5
---
+5 V
0V
--5 V
Line B
+5 V
Line A 0 V
--5 V
--
4--bit dead time
--
Bit number
29
Bit number
30
31
32
B 6989
--10 V
VAB
+10 V
A
B
G
Hi
Null
+0.5 V
--0.5 V
Figure 6
Hi
--2.5 V
+2.5 V
RCVR input states
Null
ARINC 429 Voltage Level
Lo
--9 V
--11 V
+5 V
+13 V
Lo
--13 V
--5 V
Sink Receiver (RCVR)

A
B
G
5.4
XMTR output states
+11 V
+9 V
Source Transmitter (XMTR)
Module 5
FB 6990
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 23
AC volts
Digital Techniques
Data Buses
5.4.2 - HO - 24
Module 5
5.4
Optional
redundant
cables
Bus Architecture (Example)
Subsystems
Bus
controller
Remote
terminal
Bus
monitor
Subsystem
with
embedded
remote
terminal
FB 6991 A
Figure 7
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 25
Module 5
Preliminary
Notes
5.4
a) Direct--coupled bus
Data bus
wire pair
Bus cable
shield
Stub of
specified length
Shield
R
Isolation
transformer
Transmitter/receiver
b) Transformer--coupled bus
Terminal
Data bus
wire pair
Bus cable
shield
R
R
Shield
Isolation resistors
Stub of
specified length
Transmitter/receiver
Terminal
Figure 8
B 6992 A
Isolation
transformer
Data Bus Coupling
Digital Techniques
Data Buses
5.4.2 - HO - 26
Module 5
Preliminary
Notes
5.4
Line A
Bit = 0
Bit = 1
Line A
Figure 9
Data sync
Bit time
Bit time
Command/ Status Sync
Bit time
Manchester Bit and Sync Encoding
Bit time
B 6993
Digital Techniques
Data Buses
5.4.2 - HO - 27
Module 5
Preliminary
Notes
P
Sub--address/mode
T/
R
Remote terminal
address
Command
Word
Bit times
Sync
Figure 10 MIL--STD--1553 Command Word
Data word count/

mode code
5
5
1
5
10
11
12
13
14
15
16
17
18
19
B 6994
20
5.4
T/R
Bit
Mode
Code
Digital Techniques
Data Buses
5.4.2 - HO - 28
Module 5
Preliminary
Notes
5.4
Function
Associated
Data Word
Broadcast
Command
Allowed
00000 Dynamic bus control
None
No
00001 Synchronize
None
Yes
00010 Transmit status
None
No
00011 Initiate self test
None
Yes
00100 Transmitter shutdown
None
Yes
00101 Override transmitter shutdown
None
Yes
00110 Inhibit terminal flag bit
None
Yes
00111 Override inhibit terminal flag bit
None
Yes
01000 Reset remote terminal
None
Yes
01001 (reserved)
None
No
None
No
to
1
01111 (reserved)
10000 Transmit vector word
Yes
No
10001 Synchronize
Yes
Yes
10010 Transmit last command
Yes
No
10011 Transmit built--in test word
Yes
No
10100 Selected transmitter shutdown
Yes
Yes
10101
Yes
Yes
Yes
Yes
Yes
Yes
Override selected transmitter shutdown
1 or 0 10110 (reserved)
1 or 0
11111 (reserved)
Figure 11 Mode Commands of MIL--STD--1553B
FB 3176
to
Word
Status
Bit times
Remote terminal
address
e
r
r
o
r
M
e
s
s
a
g
e
I
n
s
t
r
u
m
e
n
t
a
t
i
o
n
10
r
e
q
u
e
s
t
S
e
r
v
i
c
e
11
13
(reserved)
12
14
r
e
c
e
i
v
e
d
c
o
m
m
a
n
d
B
r
o
a
d
c
a
s
t
15
B
u
s
y
16
f
l
a
g
S
u
b
s
y
s
t
e
m
17
f
l
a
g
T
e
r
m
i
n
a
l
19
P
a
r
i
t
y
20
5.4
a
c
c
e
p
t
a
n
c
e
c
o
n
t
r
o
l
b
u
s
D
y
n
a
m
i
c
18
Module 5
Figure 12 MIL--STD--1553 Remote Terminal Status Word
Sync
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 29
B 6995
Digital Techniques
Data Buses
5.4.2 - HO - 30
Module 5
Preliminary
Notes
5.4
Figure 13 MIL--STD--1553 Data Word
Data
Data
Word
Bit times
Sync
10
11
16
12
13
14
15
16
17
18
19
20
B 6996
5.4
Command/status sync
--Volts
Parity
+Volts
19
Bit time
20
Bit time
B 6997
Figure 14 Intermessage Gap and Response Time
Digital Techniques
Data Buses
5.4.2 - HO - 31
Module 5
Preliminary
Notes
Module 5
Preliminary
Notes
Figure 15 BC--to--RT Transfer
#
Intermessage gap
LL
Response time
lll Continuous data
Receive
command
Data
word
Data
word
lll
Data
word
LL
Status
word
B 6998
Next
command
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 32
Module 5
Preliminary
Notes
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 33
Figure 16 RT--to--BC Transfer
#
Intermessage gap
LL
Response time
lll Continuous data
Transmit
command
LL
Status
word
Data
word
Data
word
lll
Data
word
Next
command
B 6999
Module 5
Preliminary
Notes
Figure 17 RT--to--RT Transfer
#
Intermessage gap
LL
Response time
lll Continuous data
Receive
Transmit
LL
command command
Status
word
Data
word
lll
Data
word
LL
Status
word
B 7000
Next
command
5.4
Digital Techniques
Data Buses
5.4.2 - HO - 34
5.4
Intermessage gap
Response time
#
LL
Mode
command
LL
Status
word
Next
command
B 7001
Digital Techniques
Data Buses
5.4.2 - HO - 35
Figure 18 Mode Command without Data Word
Module 5
Preliminary
Notes
5.4
Intermessage gap
Response time
Mode
command
LL
#
LL
Status
word
Data
word
Next
command
B 7002
Digital Techniques
Data Buses
5.4.2 - HO - 36
Figure 19 Transmit Mode Command with Data Word
Module 5
Preliminary
Notes
5.4
Intermessage gap
Response time
Mode
command
Data
word
#
LL
LL
Status
word
Next
command
B 7003
Digital Techniques
Data Buses
5.4.2 - HO - 37
Figure 20 Receive Mode Command with Data Word
Module 5
Preliminary
Notes
Transmit
command
Mode command
with data word
Next
command
#
Intermessage gap
LL
Response time
lll Continuous data
Data
word
lll
Data
word
Data
word
Next
command
Next
command
Module 5
5.4
Figure 21 Broadcast Message Transfer Formats
Data
word
lll
Status
word
Next
command
Receive
command
Mode command
without data word
#
Transmit Receive
LL
command command
Data
word
RT--to--RT(S)
transfer
Data
word
Transmit
command
BC--to--RT(S)
transfer
B 7004
Preliminary
Notes
Digital Techniques
Data Buses
5.4.2 - HO - 38
Preliminary
Notes
Module 5
5.5 (a)
5.5
Logic Circuits
5.5.1
Combinational Logic Circuits
5.5.1.1
Introduction
Digital Techniques
Logic Circuits
5.5.1 - HO - 1
Whenever a logic circuit is clearly defined by its truth table to give a fixed invariant
relationship between input and output, the circuit is referred to as a combinational
circuit. The combinational circuit contains no memory or feedback paths and always
operates in accordance with its truth table.
Whenever a logic circuit cannot be clearly defined by its truth table but instead
requires the entry of a binary variable for one or more of its output conditions,
the circuit is referred to as a sequential circuit.
The sequential circuit possesses a memory as the result of feedback paths, and may
operate differently for a given input condition depending on the prior input sequence
applied to the circuit. An example of the sequential circuit is a logic circuit composed
of flip flops (FF).
Note:
5.5.1.2
This Lesson does not include the description of sequential circuits.
Basic Logic Gates

Elementary logic functions can be demonstrated with simple switch circuits but are
primarily constructed with transistor electronic circuits. Symbols of logic gates show
a specific gate logic function but do not specify the exact circuitry. The conventions
relate to specific shapes that are to be associated with logic functions when drawing
logic circuit diagrams.
Various symbols are still in use to represent logic circuits. The most important symbolic
language, however, is the IEC (International Electrotechnical Commission) convention
which shows the relationship of each input of a digital logic circuit to each output
without showing the internal logic.
The three elementary logic gates are
V AND
V OR
V NOT.
Each gate has its own schematic symbol.
AND Gate
The most common AND symbols are shown in Figure 1. The inputs are labelled
alphabetically A, B, C ... and the output is labelled Q.
The IEC symbol (detail a)) is identified by the sign & which stands for the
AND function. The IEC symbol is commonly used, the other symbols (detail b)) may
be used in older publications or in American publications.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 2
Module 5
5.5 (a)
The simplest AND gate consists of

V two inputs, A and B
V one output, Q.
A and B are called binary logic variables because they have only one of two states at
any one time. The two logic states are 0 and 1.
Binary variables can be employed to represent the input conditions or the resultant
output decisions. The truth table (detail a)) is generalized and represents any AND
decision involving two input variables. The functional relationship between inputs
A and B and the output Q of an AND gate is defined as
Q = AB
where the symbol means AND rather than multiplication. The statement is read:
Q equals A and B.
The main feature of an AND gate is that the output logic state is
V 1 only when all of the inputs are at logic 1
V 0 when any one (or more) of the inputs is at logic 0.
OR Gate
The most common OR symbols are shown in Figure 2. The designations of the
input and the output are similar to those of the AND gate. The IEC symbol (detail a))
is identified by 1 which means greater than or equal to 1 and describes the
OR function. The simplest OR gate consists of
V one output, Q.
The truth table (detail a)) is generalized and stands for any OR decision involving two
input variables.
The main feature of the OR gate is that the output logic state is 1 whenever any of
its inputs is at logic 1.
The functional relationship between output Q and inputs A and B is defined as
Q=A+B
where the symbol + means OR rather than addition. The statement is read:
Q equals A or B.
A comparison of the truth tables for the AND gate and the OR gate shows that the
output of the AND gate is 1 for only one combination of inputs. The OR gate, on the
other hand, has a logic 1 output for three combinations of inputs. Other symbols
(detail b)) may be used in older publications or in American publications.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 3
Module 5
5.5 (a)
NOT Gate
The most common NOT symbols, also called INVERT symbols, are shown in Figure 3.
The IEC symbol (detail a)) is identified by 1 and the small circle at the output of this
symbol is used for denoting inversion of the input.
The NOT gate is a logic gate that has
V only one input
V one output.
The main feature of a NOT gate is that
V the output logic state is 1 when the input is at logic 0
V the output logic state is 0 when the input is at logic 1.
Thus the output of the NOT gate is always the inverse or the complement of its input.
The NOT gate is therefore often called an inverter. The functional relationship between
input A and output Q is defined as
Q=A
where the bar symbol ( ) means NOT. The statement Q = A is read:
Q equals not A.
The truth table (detail a)) summarizes the properties of the NOT gate. Since there is
only one variable input, there are only 21 = 2 possible truth values for A.
Hence the inverter truth table has only two rows. Other symbols (detail b)) may be used
in older publications or in American publications.
5.5.1.3
Combined Logic Gates

Besides the three elementary types of gate several combinations of logic functions
are so frequently used that special symbols have been adopted for them, such as
V NAND
V NOR
V EXOR.
NAND Gate
The most common NAND gate symbols are shown in Figure 4. The IEC symbol
(detail a)) is composed of the AND symbol, and the small circle at the output
indicates that the NAND gate is an inverted AND gate.
The NAND gate combines the function of the AND gate with the NOT gate function.
Placing an N in front of AND to produce NAND is a contraction of Not AND.
The minimum NAND gate has
V one output, Q.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 4
Module 5
5.5 (a)
The main feature of a NAND gate is that the output logic state is
V 1 when any or all inputs are at logic 0
V 0 only when all inputs are at logic 1.
This is just the inverse (complement) of the AND gate situation.
If each output of the NAND gate truth table (detail a)) were complemented (i.e.
change 1 to 0 and 0 to 1), an AND gate truth table would result. The functional
relationship between input A and B and output Q is defined as
Q = A B.
The statement is read:
Q equals not A and B.
Other symbols (detail b)) may be used in older publications or in American publications.
NOR Gate
The most common NOR gate symbols are shown in Figure 5. The IEC symbol
(detail a)) is composed of the OR symbol, and the small circle at the output indicates
that the NOR gate is an inverted OR gate.
The NOR gate combines the function of the OR gate with the NOT gate function.
Placing an N in front of OR to produce NOR is a contraction of Not OR. The minimum
NOR gate has
V one output, Q.
The main feature of the NOR gate is that the output logic state is
V 1 only when all inputs are 0
V 0 when any input is 1.
This is just the inverse of what happens with the OR gate. If each output in the NOR
gate truth table (detail a)) were complemented, the OR gate would result.
The functional relationship between output Q and inputs A and B is defined as
Q = A + B.
This statement is read:
Q equals not A or B.
Exclusive OR Gate
The most common EXOR gate symbols are shown in Figure 6. The IEC symbol
(detail a)) is identified by = 1 which stands for the EXOR function.
The exclusive OR (EXOR) gate is a logic gate with
V just two inputs, A and B
V one output, Q.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 5
Module 5
5.5 (a)
The main feature of an EXOR gate is that the output logic state is
V 1 only when one of the inputs is 1.
V 0 when both inputs are 0 or when both inputs are 1.
The truth table (detail a)) is identical to the ordinary OR gate, sometimes called the
inclusive OR gate, except for inputs A = B = 1.
The truth table also shows that the output of an EXOR gate is 1 only when an
odd number of inputs are 1. When an even number of inputs are 1 or 0 its
output is 0. Thus, an EXOR gate can be used as an odd--bit detector.
The symbol for the EXOR function is the OR symbol with a circle around it.
The functional relationship between inputs A and B and the output Q is defined as
Q=A + B
and is read:
Q equals A exclusive or B.
The exclusive OR can be represented by a connection of basic logic functions
(Figure 7, detail a)) but is not a basic logic function itself. The resulting logic function
can be found by considering each possible combination of input values, recording the
values of intermediate variables in a truth table and deducing the final output.
The truth table (detail b)) is composed of the
V input variables A and B
V the intermediate variables Q1 and Q2
V the final output variable Q.
The first three gates with the inputs A and B, and the output Q1 build up an OR gate
with two inverted inputs:
V Q2 is the output of the second OR gate with A and B as inputs
V Q1 and Q2 are led to an AND gate and build up the resulting output Q.
Universal NAND Gate
Refer to Figure 8.
The NAND gate can be used for creating any one of the three basic functions
V AND
V OR
V NOT.
This capability of the NAND gate makes it a so--called universal gate since
any conceivable logic function can be made from a suitable interconnection of
NAND gates.
Universal NOR Gate
Refer to Figure 9.
The NOR gate can also be used for creating any one of the three basic functions
V AND
V OR
V NOT.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 6
Module 5
5.5 (a)
This capability of the NOR gate also makes it a so--called universal gate since
any conceivable logic function can be made from a suitable interconnection of
NOR gates.
Gates with Multiple Inputs
With the exception of the NOT gate which has only one input, the exclusive gates
discussed so far have two inputs. But it is possible and sometimes desirable to have
gates with multiple inputs.
Refer to Figure 10.
A three--input AND, for instance, behaves in the same way as a two--input AND in
that an output of 1 is asserted only when all inputs are 1.
However, the third input variable doubles the number of possible input combinations
that must be accounted for in the truth table. Possible truth values of the output
depend on the number of input variables:
V 1 input variable
21 =
2 possible truth values for Q
V 2 input variables
V 3 input variables
22 =
23 =

V 4 input variables
24 =
V N input variables
2N
2N possible truth values for Q .
OR and AND Gates in Cascade

OR Gates
If two gates are connected (Figure 11, detail a)), it is important to know the logic
value of output Q for all combinations of inputs A, B, C in these circuits. The output of
OR gate 1 will be at logic 1 if either of the inputs A or B are at logic 1. The output of
gate 1 is connected as one of the inputs to OR gate 2 and thus the output of gate 2
will be at logic 1 whenever either A or B is at logic 1.
As a logic 1 at input C also causes the output of gate 2 to become logic 1, the logic
equation for output Q is given by:
Q=A+B+C
which is exactly the output of a three--input OR gate. Thus by connecting two OR gates
in cascade, a three--input OR gate is created.
Detail b) shows the truth table of the OR gates in cascade.
This process can be continued and the output of gate 2 is fed to the input of another
OR gate. The combination of three OR gates, for example, forms an OR gate with
four inputs (Figure 12, detail a)). Alternatively, the gates may rather differently be
connected together to obtain the same result. The logic equation for output Q is
given by:
Q = A + B + C + D.
Detail b) shows the truth table of the four--input OR gate.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 7
Module 5
5.5 (a)
AND Gates
The circuit in Figure 13 is similar to the circuit in Figure 11, except that AND gates
have been used this time. It can be stated that the output Q is given by:
Q = ABC
which is the logic equation for a three--input AND gate.
A three--input AND gate (detail a)) is formed by connecting two AND gates in
cascade. In the truth table (detail b)) it is evident that the output is only at logic 1
when all inputs A, B, C are at logic 1.
A four--input AND gate (Figure 14, detail a)) may be obtained by feeding the output Q
to a further AND gate. Alternatively the gates may be connected together rather
differently to obtain the same result. The logic equation for output Q is given by:
Q = A B C D.
Detail b) shows the truth table of the four--input AND gate.
5.5.1.4
Advanced Logic Gate Circuits

Generally, a combinational logic circuit is a memoryless network of logic elements for
which there are a finite number of inputs and outputs. Typically, logic circuits with two,
three or four inputs, and one output have been discussed. However, logic circuits with
more inputs and outputs are often encountered.
A large combinational network can be considered as being made up of a number of
smaller interconnected subnetworks. Thinking of a large network as the interaction
of many smaller networks often simplifies the understanding of the overall operation of
a logic circuit. In order to give an example of a more complex combinational network,
a decoder will be discussed in the following section.
Seven--Segment Decoder
Many modern digital devices produce numerical results as their output. Typically, the
numerical results appear on a visual display as decimal numbers. The actual digital
circuitry within one of these devices can produce output only in terms of 1s and 0s.
Refer to Figure 15.
It is possible to create the impression of a decimal digit by a particular combination of
vertical and horizontal bars.
Although the resulting image may not be as pleasing to the eye as a printed decimal
digit, it is suitable for an electronic construction in which each bar is independently
illuminated.
Thus, by turning on the proper combination of vertical and horizontal bars, the
image of a decimal digit will be seen.
Since each segment of the numerical display can be independently illuminated, the
problem of generating a decimal number has been changed to one of generating a
seven--digit binary number.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.1 - HO - 8
Module 5
5.5 (a)
The position of a digit in this binary number corresponds to the segments state of
illumination. Thus, if the segment letters are related to digit position as
(a, b, c, d, e, f, g)
(Q7, Q6, Q5, Q4, Q3, Q2, Q1),
then Figure 16 will indicate the appropriate seven--digit binary numbers. It is assumed
that 0 represents an off segment and 1 represents an on segment.
Although seven binary digits are required to represent decimal numbers in terms of
seven segments, fewer binary digits are needed to represent simply ten different
numerical symbols. In particular with four binary digits, 24 = 16 combinations of 1s
and 0s are possible and this is more than adequate to encode ten decimal digits.
A decision must be made by the designer of a numerical output digital device.
In most cases it happens to be simpler to process small binary numbers than large
ones. Consequently seven--segment decoders are often used when it becomes
necessary to produce a decimal digit output.
Figure 17 relates the standard four--digit code for decimal digits to the seven--digit
binary numbers required for a display device.
The encoding table shows that six of the sixteen binary input codes are unassigned.
In order to realize this translation from four digits to seven digits a multiple output
combinational logic circuit is needed as shown in Figure 18.
Digital Techniques
Logic Circuits
5.5.1 - HO - 9
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
&
B.
.
.
.
N
.
.
.
.
IEC standard
Q=AB
Truth table
b) Other symbols in use
A
..
.
N
German standard
Figure 1
..
.
American standard
A 1948 A
B
..
.
N
A
B
..
.
AND Gate Symbols and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 10
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
A
B.
.
.
.
N
.
.
.
.
IEC standard
Q=A+B
Truth table
..
.
A
B
..
.
N
German standard
Figure 2
..
.
American standard
A 1949 A
A
B
..
.
N
OR Gate Symbols and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 11
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
1
A
IEC standard
Q=A
Truth table
German standard
Figure 3
American standard
A 1950 A
NOT Gate Symbols and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 12
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
A
&
B
.
.
.
N
.
.
.
.
IEC standard
Q=AB
Truth table
..
.
A
B
..
.
N
German standard
Figure 4
..
.
American standard
A 1951 A
A
B
..
.
N
NAND Gate Symbols and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 13
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
A
B.
.
.
.
N
.
.
.
.
IEC standard
Q=A+B
Truth table
..
.
A
B
..
.
N
German standard
Figure 5
..
.
American standard
A 1952 A
A
B
..
.
N
NOR Gate Symbols and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 14
Module 5
Preliminary
Notes
5.5 (a)
a) IEC symbol
=1
Q
B
IEC standard
Q =A + B
Truth table
A
+
B
German standard
Figure 6
American standard
A 1953 A
Exclusive OR Gate Symbols and Truth

Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 15
Module 5
Preliminary
Notes
5.5 (a)
a) EXOR gate
1
Q1
1
&
1
Q2
Figure 7
Q1
Q2
A 1632 C
b) Truth table
Equivalent Circuit of an Exclusive OR

Gate and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 16
Module 5
Preliminary
Notes
5.5 (a)
&
&
&
&
&
&
A 1633 C
&
Figure 8
NAND as Universal Gate
Digital Techniques
Logic Circuits
5.5.1 - HO - 17
Module 5
Preliminary
Notes
5.5 (a)
&
A 1634 C
Figure 9
NOR as Universal Gate
A
B
C
A
B
C
A
B
C
5.5 (a)
&
&
Q1
Q2
Q3
Q4
A
0
0
0
0
1
1
1
B
0
0
1
1
0
0
1
C
0
1
0
1
0
1
0
Q1
0
0
0
0
0
0
0
A
0
0
0
0
1
1
1
B
0
0
1
1
0
0
1
C
0
1
0
1
0
1
0
Q2
1
1
1
1
1
1
1
A
0
0
0
0
1
1
1
B
0
0
1
1
0
0
1
C
0
1
0
1
0
1
0
Q3
0
1
1
1
1
1
1
A
0
0
0
0
1
1
1
B
0
0
1
1
0
0
1
C
0
1
0
1
0
1
0
Q4
1
0
0
0
0
0
0
AND
NAND
OR
NOR
A 1636 C
A
B
C
Digital Techniques
Logic Circuits
5.5.1 - HO - 18
Module 5
Preliminary
Notes
Figure 10 Logical Functions of Three--Input

Gates
Digital Techniques
Logic Circuits
5.5.1 - HO - 19
Module 5
Preliminary
Notes
5.5 (a)
a) Two connected OR gates

1
A
A 1639 C
b) Truth table representing a three--input OR gate
Q=A+B+C
Figure 11 OR Gates in Cascade and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 20
Module 5
Preliminary
Notes
5.5 (a)
a) Four connected OR gates

1
A
3
C
A
0
0
0
0
0
0
0
B
0
0
0
0
1
1
1
C
0
0
1
1
0
0
1
D
0
1
0
1
0
1
0
Q
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
1
1
1
A 1954 C
b) Truth table representing a four--input OR gate
Figure 12 Four--Input OR Gate and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 21
Module 5
Preliminary
Notes
5.5 (a)
a) Two connected AND gates

1
A
&
2
&
Q=ABC
A 1640 C
b) Truth table representing a three--input AND gate
Figure 13 AND Gates in Cascade and Truth Table
Digital Techniques
Logic Circuits
5.5.1 - HO - 22
Module 5
Preliminary
Notes
5.5 (a)
a) Four connected AND gates

1
A
&
2
&
3
C
&
A
0
0
0
0
0
0
0
B
0
0
0
0
1
1
1
C
0
0
1
1
0
0
1
D
0
1
0
1
0
1
0
Q
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
1
0
1
1
1
0
1
0
0
1
A 1957 B
b) Truth table representing a four--input AND gate
Figure 14 Four--Input AND Gate and Truth Table
5.5 (a)
Decimal digit
a
f
e
g
d
Digital Techniques
Logic Circuits
5.5.1 - HO - 23
Module 5
Preliminary
Notes
Appearance
Segments on
a,b,c,d,e,f
b,c
a,b,d,e,g
a,b,c,d,g
b,c,f,g
a,c,d,f,g
a,c,d,e,f,g
a,b,c
a,b,c,d,e,f,g
a,b,c,d,f,g
A 1955 C
Seven--segment display
Figure 15 Seven--Segment Display
Decimal
digit
Digital Techniques
Logic Circuits
5.5.1 - HO - 24
Module 5
5.5 (a)
Segments on
Seven--digit
binary number
a b c d e f --
1111110
-- b c -- -- -- --
0110000
a b -- d e -- g
1101101
a b c d -- -- g
1111001
-- b c -- -- f g
0110011
a -- c d -- f g
1011011
a -- c d e f g
1011111
a b c -- -- -- --
abcdefg
1110000
1111111
a b c d -- f g
1111011
A 1646 C
Preliminary
Notes
Figure 16 Seven--Digit Binary Numbers
Decimal
digit
Digital Techniques
Logic Circuits
5.5.1 - HO - 25
Module 5
Preliminary
Notes
5.5 (a)
Binary number
Seven--digit binary number

a
--
--
--
--
--
--
A 1956 D
Figure 17 Seven--Segment Decoder
Module 5
Preliminary
Notes
5.5 (a)
Digital Techniques
Logic Circuits
5.5.1 - HO - 26
&
&
1
&
&
1
&
&
&
1
&
1
B
C
D
&
1
A 1648 C
1
1
Figure 18 Design of a Seven--Segment Decoder
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.2 - HO - 1
Module 5
5.5 (a)
5.5.2
Logic Circuit Applications in Aircraft Systems
5.5.2.1
Introduction
Many aircraft companies design and manufacture aircraft systems, such as: flight
deck illuminated control panels, pillar lamps, lighting bridges, bezels and bearing
scales to suit each aircraft or equipment requirement.
Refer to Figure 1.
Control panels and keyboards include push button switching systems, logic circuitry
and displays, integrated within the panel body. The control panels are designed
specifically to comply with civil, military and marine environmental standards.
Aircraft flight deck and equipment lighting are converted to NVG compatibility in
compliance with specification MIL -- L -- 85762.
Some manufacturer utilize light source technology from filament lamps, LEDs and
electroluminescent lamps to comply with
MIL -- P -- 7788F and aircraft manufacturers own specifications.
Onboard passenger information systems, LED illuminated door and tail lights. cab
control panels, warning indicators complying with BRB/LUL RIA specifications.
Field Effect Transistor Digital Logic Gates used in Jet Engine

Complex electronics and sensors are increasingly being relied on to enhance the
capabilities and efficiency of modern jet aircraft.
Many of these electronics and sensors monitor and control vital engine components
and aerosurfaces that operate at high temperatures.
However, since todays silicon--based electronics technology cannot function at high
temperatures, these electronics must reside in environmentally controlled areas.
This necessitates either the use of long wire runs between sheltered electronics and
hot--area sensors and controls, or the fuel cooling of electronics and sensors located
in high--temperature areas.
Both of these low--temperature--electronics approaches suffer from serious drawbacks in terms of increased weight, decreased fuel efficiency, and reduction of
aircraft reliability.
A family of high--temperature electronics and sensors that could function in hot areas
would enable substantial aircraft performance gains. Especially since, in the future,
some turbine--engine electronics may need to function at temperatures as high as
600 C.
Refer to Figure 2.
600 C NAND gate, consisting of two SiC (silicon carbide) JFETs (junction field
effect transistor) and a resistor. Signal input and output pads are labelled, along with
the VDD and VSS bonding pads that supply power to the circuit.
Preliminary
Notes
Module 5
5.5 (a)
Digital Techniques
Logic Circuits
5.5.2 - HO - 2
The high temperature integrated electronics and sensors (HTIES) program at the
NASA Lewis Research Center is currently developing silicon carbide (SiC) for use in
harsh conditions where silicon, the semiconductor used in nearly all of todays
electronics, cannot function.
Refer to Figure 3.
The HTIES team recently fabricated and demonstrated the first semiconductor digital
logic gates ever to function at 600 C. The photomicrograph shows a NAND (not A
and not B) logic gate, consisting of two junction field effect transistors (JFETs) and a
resistor fabricated in epitaxially grown SiC.
Figure 3 shows operational waveforms of the SiC NAND gate collected on a probing
station when the sample was heated to a glowing, red--hot 600 C.
The input voltage waveforms are shown across the top, and the logic gate waveform
output voltage is shown on the bottom. On all the waveforms, a binary logic zero is
represented by a voltage of 0.25 V or less, whereas a voltage of 0.85 V or higher
corresponds to a binary logic one.
Whenever one of the inputs is a logic zero (0.25 V), the output of the logic gate is
greater than 0.9 V (a logic one); only when two logic ones are input does the logic
gate output drop to 0.2 V (a logic zero), consistent with the NAND binary logic
function.
In addition to the NAND gates, NOT (not A) and NOR (not A or not B) gates on the
same SiC wafer demonstrated successful 600 C operation.
Demonstration of simple logic functions at 600 C represents a measurable step
forward. Nevertheless, many further advancements are necessary before SiC
electronics will be ready for reliable long--term operation at extreme temperatures.
These necessary advancements include increased circuit complexity, demonstration
of long--term operation, and development of high--temperature electronics packaging
and connectors.
Logic Circuits and Aircraft Safety
To ensure aircraft safety, the EASA is proactively addressing the increasing
complexity of aircraft software and digital hardware.
Civil aircraft are becoming more and more dependent on digital avionics and flight
control systems. This is due to new aircraft and avionics designs that incorporate
digital computers in systems that are flight critical.
If a flight critical system should fail, it may result in the loss of the aircraft. For this
reason, the EASA is very concerned about the safety of aircraft using this technology.
The software and digital systems safety (SDSS) program addresses this issue by
conducting research on constantly emerging complex software and advanced digital
hardware technology.
The data and results of the research are used to write policy and guidance for
certification of new aircraft and systems using this technology.
Preliminary
Notes
Digital Techniques
Logic Circuits
5.5.2 - HO - 3
Module 5
5.5 (a)
Currently, much of this advanced technology is not directly addressed in EASA

regulations. The desired outcome is increased aircraft safety. The SDSS program is
conducting research in the following areas.
V Complex Electronic Hardware
V Commercial--Off--The--Shelf (COTS) Software
Complex Electronic Hardware
The SDSS program is currently addressing the safety and certification issues
concerning highly complex avionics hardware that is being proposed for use in future
aircraft and avionics systems designs.
The project objective is to conduct a case study using the DO--254 standard
developed by RTCA Special Committee.
This standard provides guidance for design assurance and verification of complex
electronic hardware such as:
V application specific integrated circuits (ASICs)
V erasable programmable logic devices (EPLDs)
V field programmable gate arrays (FPGAs), etc.
These devices have millions of gates and are very difficult to fully test. To ensure
aircraft safety, the EASA is proactively addressing the increasing complexity of
aircraft software and digital hardware.
Commercial--Off--The--Shelf (COTS) Software
The EASA is conducting a study to develop guidelines, verification methods, and
assessment and acceptance criteria for COTS software and hardware.
There is substantial concern in the aerospace industry for investigating whether
methods are available or could be found for determining the safety of COTS software
and hardware for use in airborne systems.
COTS software and hardware offer significant cost savings for aircraft manufacturers.
There is the potential for increased aircraft safety if lower cost systems could be
shown to be safe and serve as a replacement for older, less capable systems.
Module 5
5.5 (a)
Digital Techniques
Logic Circuits
5.5.2 - HO - 4
C 0074
Preliminary
Notes
Figure 1
Control Panels with Logic Circuitry
Module 5
5.5 (a)
Digital Techniques
Logic Circuits
5.5.2 - HO - 5
C 0075
Preliminary
Notes
Figure 2
600 C NAND Gate used in Jet Engine
Input A, V
Input B, V
Digital Techniques
Logic Circuits
5.5.2 - HO - 6
Module 5
Preliminary
Notes
5.5 (a)
1.0
0.5
0.0
1.0
0.5
0.0
1.0
0.5
0.0
--2
10
C 0076
Output AB, V
1.5
Time, ms
Figure 3
Operational Waveforms of a 600 C

NAND Gate
Module 5
Preliminary
Notes
5.6. (a)
5.6
Basic Computer Structure
5.6.1
Arrangement of Computers
Digital Techniques
5.6.1 - HO - 1
A computer is a functional programmable unit that consists of one or more

associated processing units and peripheral equipment.
It is controlled by internally stored programs and can perform
V substantial computation, including numerous arithmetic operations or
V logic operations without human intervention.
A computer consists of many components which are designated hardware.
The hardware forms the physical base of a computer system and enables the
operation of the software.
Software is a group of computer programs, procedures, rules and possibly associated
documentation and data pertaining to the operation of a computer system.
A program is a plan or a routine for solving a problem on a computer and it consists of
a sequence of coded instructions suitable for data processing by the computer.
It interprets the information put in using an input unit and passes it on to the computer
for further execution of a task.
Processing may include the use of
V an assembler
V an interpreter or
V a compiler
to prepare the program for execution as well as to execute it. Different types of
programs for solving different types of problems are used.
Two major types of software are
V operating systems and
V user programs.
5.6.1.1
General Arrangement of a Computer System

Refer to Figure 1.
A computer generally consists of
V input and output units (peripheral equipment)
V central unit, containing
--
memory
--
control unit
--
arithmetic unit.
The input and output units provide communication between the user and the
computer. Major input units are keyboard and mouse. Main output devices are
display, printer and plotter.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 2
The control unit and the arithmetic unit are often combined to form the central
processing unit (CPU). CPU and memory are often combined to form the central unit
or system unit. The CPU includes the electronic circuits controlling the interpretation
of instructions and their execution.
The control unit includes that part of the CPU which governs the operation of
instructions in proper sequence, the interpretation of each instruction and the supply
of the proper data to the arithmetic unit and other units in accordance with this
interpretation.
The arithmetic unit contains the electronic circuits that perform arithmetic and logic
operations.
The memory forms that unit of the computer in which data can be written (stored) and
from which the stored data can be selected for reading.
The memory can be divided into internal and external memory:
V The internal memory includes random--access--memory (RAM) units and
read--only--memory (ROM) units; it can functionally be subdivided into program memory and data memory.
V The external memory includes devices which use magnetic media, such as
diskettes (floppy discs), fixed discs and magnetic tapes.
Information and instructions suitable for communication, interpretation and processing by the computer are represented in a digital form. Within the computer equipment, such data can be external or resident.
The smallest unit of digital data is the binary digit (bit), which is the unit of information,
that is represented by either 0 or 1. A group of 8 adjacent binary digits operated as a
unit of information is known as a byte.
5.6.1.2
System Unit
Refer to Figure 2.
The system unit contains the basic units of a computer system such as the CPU,
internal memory, several controllers and I/O ports. All these units are interconnected
for data transfer via a system of signal lines by designated buses.
The system unit uses three different types of buses, namely:
V Control bus
(in the example --
6 bits)
V Data bus
(in the example --
8 bits)
V Address bus
(in the example --
16 bits) .
The control bus is a unidirectional bus, which transfers control data from the CPU to
the associated units in order to control and supervise the actions of the other units.
The address bus is also a unidirectional bus in the CPU. It determines from/to which
location internal and external data are to be transferred.
The data bus is a bidirectional bus. The task of the data bus is to transfer data from
one internal or external unit to the other.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 3
The number of lines in a bus depends on the type of CPU and the address capability,
e.g.
V an 8--bit CPU needs 8 data lines
V a 16--bit CPU needs 16 data lines.
An address bus of 16 lines is capable of addressing a space of 2 16 bytes which
equals 64 kbytes.
Central Processing Unit (CPU)

The central processing unit (CPU) is the heart of the computer. The CPU is connected to external units via the control bus, data bus and address bus. The buffers of
the address bus and the data bus connect the internal buses of the CPU to the
external buses.
Refer to Figure 3.
The CPU comprises in general:
V Arithmetic--logic unit (ALU)
V Interrupt control
V I/O control
V Instruction decoder
V Clock and sequence control
V Registers.
Arithmetic--Logic Unit (ALU)

Refer to Figure 4.
The arithmetic--logic unit (ALU) is capable of performing arithmetic and logical
operations. Within an 8--bit CPU the ALU is capable of processing 8 bits at a time.
The ALU includes two data inputs:
V A--operand
V B--operand.
The A--operand is connected via a data bus to the accumulator and the B--operand is
connected to the data bus of the CPU. In this way the
V A--operand is identical with the content of the accumulator.
Its variable has to be transferred to the accumulator.
V B--operand can directly be loaded with the content of any register, memory or
a constant selected program via software instructions.
The two operands are combined via a combiner logic. This combiner logic is
controlled via the function select logic. The function select logic is controlled by the
program via the control bus.
Digital Techniques
5.6.1 - HO - 4
Module 5
Preliminary
Notes
5.6. (a)
The result of the operation, either logical or arithmetic, is fed to the accumulator and
the flag register. The flags depending on the result of the operation are always set,
while the accumulator stores the result. The content of the accumulator changes with
V arithmetic operations like ADD and SUBTRACT
V logical operations, like AND and OR
V shift instructions.
The content of the accumulator, however, does not change with compare instructions. Compare instructions only affect the flags of the flag register.
Arithmetic Operations
The ALU can perform the four basic arithmetic calculations:
V addition
V subtraction
V multiplication
V division.
An electronic arithmetic--logic unit is only able to perform the addition. Therefore the
other three calculations must be derived and converted into additions.
Logical Operations
The ALU is able to perform
V logical operations (AND/OR/EXOR)
V compare operations.
Such operations make it possible to combine or compare the magnitude of the two
data x and y what is required for decisions as
V selecting program branches
V using program jumps, so--called jumps on conditions.
Such comparing operations are for example:
x=y
(x equals y)
xy
(x greater than or equal to y)
x<y
(x less than y).
This capability of comparing data and the resulting program control are a characteristic of the flexibility of microprocessor systems. More or less complex electronic
switching circuits are necessary for the ALU to execute the mentioned operations.
Interrupt Control
Input devices, such as keyboard and mouse, collect data from outside the computer.
These devices need the microprocessor to process the data they have collected;
they need microprocessor service.
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 5
Module 5
5.6. (a)
Input devices need a means to interrupt what the microprocessor is currently doing.
Therefore they are connected to the microprocessors interrupt lines.
When an input device wants to interrupt the microprocessor, it sets one of the
interrupt lines to high voltage. This is called interrupt request. When an interrupt
occurs, the microprocessor
V completes the execution of the current machine language instruction
V pushes the program counter to the stack
V saves the contents of the registers on the stack
V writes a new address into the program counter.
The new address is called interrupt vector. An interrupt vector is a fixed address that
depends on the interrupt line which is set. The microprocessor expects a subroutine
starting at this address. This subroutine is expected to instruct the microprocessor to
process the data the input device has collected. Such a subroutine is called interrupt
service subroutine.
At the end of an interrupt service subroutine a return instruction is executed.
Once the microprocessor has finished running the interrupt it continues the former
running program from the point where it was interrupted.
The interrupt control controls the interrupt management of the CPU. When an
interrupt occurs the running program is interrupted and the line INTA is set to 0 as
interrupt request.
INTR, RST 5.5 to 7.5 and TRAP are interrupt inputs with different priority. The input
with the lowest priority is INTR, the highest TRAP.
I/O Control
The CPU whose block diagram is shown in Figure 3 is provided with a serial input/output (I/O) control device. SID is the serial input data line, while SOD represents the
serial output data line. Both are connected to the data bus of the central system unit.
Instruction Decoder
When an instruction word is read into the instruction register via the internal data bus,
the instruction decoder recognizes whether the instruction is a single byte or a
multibyte instruction. In case of multibyte instructions the subsequent bytes are stored
in the intermediate registers W and Z. The instruction decoder acts upon the clock and
sequence control, making it pass on the logical follow--up pulses to the respective units
as necessary for a proper operation cycle.
Clock and Sequence Control
The clock and sequence control sets the respective control line according to the
instructions given by the instruction control. It is connected to
V the control bus of the central unit/system unit (e.g. RD, WR, IO/M lines) and
V the internal control bus of the CPU.
The internal control bus of the CPU controls the actions of the registers, the bus
drivers, the ALU and the instruction decoder.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 6
Registers
A register is a storage location inside the processor. Registers in the control unit, for
example, are used to keep track of the overall status of the program that is running.
They store information, such as
V the current instruction (instruction register)
V the location of the next instruction to be executed (program counter)
V the operands of the instruction.
Other registers may be used for
V arithmetic and logical operations
V storage of the results of these operations.
An important factor that affects the speed and performance of a processor is the size
and number of registers. Technically, the term word size (or word length) describes
the size of an operand register, but is also used for describing the size of the buses to
and from the processor.
Currently, word sizes in computers range from 8 to 64 bits. If the operand registers of a
processor are 32 bits wide, the processor is said to be a 32--bit processor.
Special--Purpose Registers
Special--purpose registers are
V accumulator (acc or A)
V flag register (F)
V intermediate registers W and Z
V stack pointer (SP)
V program counter (PC)
V increment/decrement address register.
The accumulator (accu or A) is especially used for arithmetic and logical operations.
The results of these operations are always stored in the accumulator except for
compare results which are stored in the flag register. By the use of register pairs the
accu A is commonly combined with the flag register F to the register pair AF.
Input and output instructions can only be executed with the accumulator. Additional
direct addressing is only possible with the accumulator either as source or destination.
The flag register F stores the results of arithmetic or logical operations and contains
flags, like parity flag, zero flag, carry flag and sign flag.
The intermediate registers W and Z are used for the storage of operands. When an
instruction containing one or two operands occurs these operands are stored in the
registers W and Z.
The stack pointer SP contains the two bytes of the address of the stack. The stack
is used as intermediate storage of registers and addresses in the case of interrupts
or subroutines.
The program counter PC contains the address of the next instruction to be
executed by the CPU.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 7
The increment/decrement address register is used for driving the address buffers
connected to the address bus of the central unit/system unit. It receives the address
data from the data bus and is controlled by the clock and sequence control. Address
increment and decrement can be done directly within this 16--bit register.
General--Purpose Registers
The general--purpose registers (operand registers) are available for arithmetic and
logical operations. The registers are connected to the ALU via the data bus.
Operations and data transfer between two registers, and register and accumulator
are very fast. For 16--bit operations two registers of 8 bits can be combined to a
register pair which can handle the 16 bits.
Example:
The 8085 microprocessor contains 8--bit general--purpose registers designated

B, C, D, E, H and L. The 16--bit register pairs combined from them are BC, DE
and HL.
The registers are selected via the register select circuit under the control of the clock
and sequence control unit.
Memory Devices
The CPU does not work without a program which is a sequence of instructions.
Therefore a medium for storing the program must be available. This medium is the
memory.
Integrated in the system unit are two different types of internal memories, RAM and
ROM, and the controller for an external memory -- e.g. the disc controller.
RAM, the short form of random access memory, and ROM, short form of read only
memory, belong to a special category of memory, named semiconductor memory.
The other category is the external memory. This category generally includes
magnetic storage devices and will be described later.
Random Access Memory
The advantage of a random access memory (RAM) is that the contents of each
storage cell can be read or over--written.
Programs from external devices can be loaded into the RAM and then executed by
the CPU. The disadvantage of a RAM is that the stored data of the RAM are lost
when the power is switched off.
RAMs are subdivided into
V static RAMs
V dynamic RAMs.
The static RAM contains bi--stable multivibrators (flip flops) as storage devices while
the dynamic RAM contains small capacitors storing the information in the form of
electric charge.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 8
Within the dynamic RAM (DRAM) the information will have to be refreshed from time
to time because the micro--capacitors lose the charge even when the power supply is
switched on. Refreshing is done by a special refresh--circuit integrated in the
computer system.
Read Only Memory (ROM) Devices
Another form of memory is the fixed memory where the computer can only read the
memory, but is not able to change it. The following memories belong to this type of
memory:
V ROM
V PROM
V EPROM
V EEPROM.
ROM is the abbreviation of read only memory. This fixed storage unit can be
programmed only once, e.g. in the factory. ROMs are used for storage of system
software, interpreter software and/or encoder software.
A PROM, short form of programmable read only memory, is similar to the ROM.
The program is not loaded by the producer of the PROM but by the user by means of
a special programming unit. The PROM is programmable only once at a time. When
the PROM has been programmed the data cannot be changed. The data are fixed.
EPROM is the short form of erasable programmable read only memory. This memory
component is programmable like a PROM. However, the contents of an EPROM is
erasable by UV light.
Therefore EPROMs have a glass window on top of the package by which the UV
light can erase the data. Once programmed, this window must be covered with a
piece of adhesive paper. For the erasing procedure in a special unit the paper should
be removed.
An EEPROM, short for electrical erasable programmable read only memory, is similar to
an EPROM. The contents of the EEPROM, however, is not erased by UV light but with a
relatively high electrical voltage.
RAM and ROM are often integrated on the same printed circuit board as the CPU,
and sometimes also integrated in the CPU itself. Another advantage of RAM and
ROM is that the data can be read/written from/to every memory cell in parallel.
The address of the memory cell is selected by the address on the address bus.
Then the data is read/written in parallel (8 to 32 bits at a time) from/to the memory cell.
In this way access time is very short, in the range of 7 ns to 350 ns depending on the
chip technology.
Interfaces
Refer to Figure 5.
An interface is the connection between two units, circuits, program modules
(software interface), computers or external units. Via the interface, data and control
information can be transferred.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 9
The number of interfaces and the method of interfacing depend on the application
and the size of a computer system. A small computer might only require two to four
interfaces, while larger systems require more than a hundred interfaces.
There are various methods by which peripheral equipment may be connected via
interface units to the computer. Interfaces are subdivided into two categories, namely
V parallel interfaces
V serial interfaces.
Parallel Interfaces
Parallel interfaces enable parallel data transfer for sending and receiving data.
Parallel means that all bits forming a data word are sent or received at the same
time.
For data transfer the interface uses as many parallel lines as bits are contained in a
data word (Figure 5, detail a)). Additional acknowledge (Ackn) lines, busy, ground
(GND), system clock (Clock) and auxiliary (Aux) lines are integrated in the interface.
A general--purpose parallel interface I/O data port commonly comprises 4, 8 or
16 data lines. Typical parallel interfaces are the IEC bus and the CENTRONICS
interface.
The IEC bus is a standard interface employing eight data lines:
V five control lines and
V three acknowledge lines.
The IEEE488 is the American standard corresponding to the European IEC bus.
The CENTRONICS interface is a standard interface developed by the printer
manufacturer CENTRONICS. As the IEC bus, the CENTRONICS interface uses
acknowledge signals for data transfer.
Serial Interfaces
A serial interface, as shown in detail b), transfers the bits of a data word bit after
bit by employing only one data line for transmitting data (TxD) and receiving data
(RxD). The TxD line of system 1 is connected to the RxD line of system 2 and
vice versa.
The serial interface is used for long--distance data transfer. Serial interfaces are
subdivided into
V synchronous interfaces
V asynchronous interfaces.
Within the asynchronous serial interface on serial transmissions the bits of a data word
are transmitted one after the other on a single wire. The bits are not sent at a defined
speed in a special time period, but with start and stop bits. Therefore this interface is
called asynchronous. This kind of interface allows to connect two devices using
different clock rates.
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 10
Module 5
5.6. (a)
Contrary to the asynchronous interface, the synchronous interface needs no start

and stop bits because the time interval of transmission is defined, the peripheral
must be in exact bit--synchronism with the computer. In order to provide exact
bit--synchronism the clock of either the peripheral or the computer is used for
bit--synchronism.
The two standards, RS232C/V.24, relate to the connection of the data terminal
equipment, such as peripheral devices, or of a computer to a data communication
equipment, e.g. a modem (modem is the short form of modulator/demodulator).
RS232C is the designation of a serial interface according to the American EIA
standard. The data transfer is asynchronous with
V one start bit and
V two stop bits.
The V.24 interface is the European version of the RS232C interface.
5.6.1.3
Peripheral Components of a Computer System

As explained before a computer system consists of
V input/output units (I/O units)
V central processing unit (CPU)
V internal memory units
V external memory units.
The central processing unit and the internal memory unit form the system unit. I/O
units and external memory units are referred to as peripheral components of the
computer system. Interface and controller circuits that are assigned to the system unit
provide interconnection between system unit and peripheral devices. Peripheral
devices, such as diskette and fixed disc drive, can be installed in the same housing
as the system unit. The standard input and output devices, such as keyboard and
display, are mostly stand--alone units connected by cables to the system unit.
I/O Devices
Keyboard and display (monitor) are the standard I/O devices through which the user
communicates with the operating system, utility and application software and the
hardware itself. The mouse is another typical input unit, whereas printer and plotter
are typical output devices.
Keyboard
Refer to Figure 6.
The keyboard is the major device through which the user communicates with the
computer system.
Pressing a key on the keyboard generates an n--bit code that represents the character
associated with the key. For ASCII representation the code includes 7 bits.
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 11
Module 5
5.6. (a)
Figure 6 shows the layout of a typical alphanumerical keyboard. The numerical and
alphabetical symbols are arranged in the same position as on the appropriate
typewriter. On the right side of the keyboard a field with additional numerical keys is
located.
Additionally, the keyboard contains
V function keys and
V control keys.
The function keys can have different functions defined by a software program
designated keyboard driver.
Example:
The function key F9 may have the function delete current line.
The control keys are operated by simultaneously pressing a special key (e.g. CTRL)
and one or more other key(s) of the keyboard and thus generating control sequences.
Example:
The combination of the keys CTRL and C interrupts a running program when
the MS--DOS operating system has been employed.
Mouse
By means of the mouse device, shown in Figure 7, detail a), a pointer presented on
the display can be shifted across the screen. The pointer is located on
V symbols
V windows
V menu windows
and with a click on the push--button the appropriate object is selected. The selection
is shown on the display and can initiate
V a program
V a procedure or
V an instruction.
The mouse includes a roller ball which acts on two axes:
V one for the x--direction
V one for the y--direction (detail b)).
On each axis a slotted disc is connected. LEDs emit light beams which are sent
through the slots to photo resistors located on the other side of the slotted disc.
When forced by the movement of the mouse the disc is rotating, the light beam is
interrupted until the next slot has appeared. The photo resistors detect the
interruptions and convert them into data for the computer. The computer calculates a
new pointer (cursor) position within the defined range of the display according to the
mouse movement.
Displays
The most important output device of a computer is the display. The display shows the
user the information immediately after it has been received from the computer or
entered via the keyboard.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 12
Display is the designation for any form of optical monitor. The most common display
types are
V TV--type monitor
V flat--panel displays (e.g. LCD).
TV--Type Monitor
Refer to Figure 8.
Most personal computer (PC) systems and workstations employ a TV--type monitor.
This type of monitor is able to display alphanumerical characters as well as graphical
pictures.
For interface purposes the system unit of a computer includes a graphic board which
meets the standard of the connected monitor.
Monitors are available as
V monochrome monitors
V colour monitors.
Both types employ cathode ray tubes (CRT) like a TV. The display picture is
generated by an electron beam which moves from the top left side to the bottom right
side within the display. While the beam is moving across the display it is switched on
and off according to the data supplied by the computer.
In this way single picture points are generated which are designated pixel. Pixel is
the short form of picture elements.
In order to generate characters, the electron beam starts at the left top corner of the
display and moves to the right top corner. When the beam has arrived at the right
side of the display it jumps back to the left side, again writing a new line one pixel
lower.
When the beam arrives at the right bottom corner a picture has been finished and the
beam will be reset to the left top corner in order to write the next picture. One picture
may be written in less than 20 milliseconds which equals more than 50 pictures per
second.
The human eye is not able to follow the quick movement of the beam and therefore
the picture seems to be fixed.
Each pixel displayed on the monitor equals one bit stored in the video buffer which is
part of the graphic board of the computer. The most common graphic boards use
more than 1 bit to define each pixel. When the bit equals 0, a white pixel is written
(beam on), and when the bit equals 1, a black pixel is written (beam off).
When using monochrome displays, more than one bit must be employed to control
the intensity of the beam and thus to realize different grey steps to be displayed.
When using colour displays, more than one bit is used for defining the colours.
The colour display employs three basic colours:
V red (R)
V green (G)
V blue (B).
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 13
By mixing these three colours for one pixel, each colour can be generated.
Video cards employing 8 bits per pixel can differ between 28 colours which equals
256 different colours. A video card employing 16 bit per pixel can display 216 colours
which equals 65,536 different colours.
Flat--Panel Displays
The most common type of flat--panel display is the liquid crystal display (LCD) -a liquid--filled surface that, when electrically charged, creates images using ambient
light.
Because LCDs have very low power consumption in comparison with CRT displays,
they are the most cost--effective displays for portable battery--powered computers.
Printers
The data, programs or results of the operated programs must be printed out to make
them permanently visible (outputs on monitors are only temporary).
Printers are connected to the system unit of the computer via
V controllers (hardware interface) and
V drivers (software interface).
Figure 9 gives an overview about different types of printer. The main distinction is
made between
V impact and
V non--impact printers.
Impact printers get their name from the method of creating characters on paper.
Like a typewriter, a striking mechanism transfers a whole or partial character by
striking a ribbon (the impact) that transfers the image onto the paper. Non--impact
printers, however, use nozzles, heat, electricity, magnetism or optical methods to
transfer an image on the paper instead of using an impact mechanism.
Impact printers are
V teletypewriter
V matrix printer
V daisywheel printer.
Non--impact printers are
V ink--jet printer
V bubble--jet printer
V thermoprinter
V electrosensitive printer
V laser printer.
Teletypewriter
Teletypewriter or TTYs provide both input and output for a computer system. There
must be circuits between the keyboard and the computer I/O that convert the data
instructions into codes compatible with the computer circuits.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 14
The teletypewriter prints one character at a time similar to an electronic typewriter.

The types are placed on a square block rather than on individual hammers.
The type moves from left to right, positioning the proper character to its print position.
A hammer strikes the character from behind and presses it with an inked ribbon on
the paper. The inked ribbon imprints the character on the paper. The typical
teletypewriter speed is about eight lines per minute or seven characters per second.
Matrix Printer
The matrix printer consists of pins in the print head placed in a matrix. The characters are formed when the appropriate pins strike through a carbon band against
the paper. The pins are selected by pulses from a decoder.
The matrix of the print head may have different forms, for instance a 5 x 7 matrix or a
12 x 1 matrix. With the 5 x 7 matrix a complete character can be printed with one
stroke while a 12 x 1 matrix needs five to six strokes in series to form a character.
Some matrix printers are capable of printing about 180 to 200 lines per minute or
300 characters per second.
Daisywheel Printer
A daisywheel printer contains a wheel, shown in Figure 10, detail b), with letters and
characters arranged on pins around the centre.
The daisywheel is turned to the correct position in order to print the proper character.
Once the wheel is in position, the hammer hits the pin of the wheel from behind
(detail a)). The pin touches the paper through the carbon band and prints the
character. Daisywheel printers are capable of printing 10 to 35 characters per
second.
Ink--Jet Printer
Ink--jet printers form characters or graphics with a print head containing tiny nozzles
or jets that spray drops of ink onto the paper. The effect is similar to dot--matrix
printing.
An ink--jet printer is capable of printing colour images. By using a separate nozzle
and ink cartridge for each of the subtractive primary colours (magenta, cyan = dark
blue, and yellow) plus a fourth one for black many different hues can be printed.
The advantage of an ink--jet printer is that it is nearly noiseless and highly reliable.
Bubble--Jet Printer
A variation of the ink--jet printer is called bubble--jet printer. With bubble--jet
technology, the printing element is a computer chip with miniature openings, each
with its own heating elements.
By heating the ink and forcing it through the opening, a small bubble is created.
The bubble makes a more precise mark on the paper with less scattering of ink
droplets than a conventional ink--jet printer. The result is a sharper picture.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 15
Thermoprinter and Electrosensitive Printer

These printers are also similar to the matrix printer, but the pins burn spots onto the
paper by means of heat or electricity. These techniques are not in general use
because special heat--sensitive paper is required and no copies can be made.
Laser Printer
The latest development in printer techniques is the laser printer. A laser beam is
modulated by the electrical signals of a character generator. The beams form
characters of high accuracy and speed on a light--sensitive roll.
Black toner is applied to the light--sensitive roll and sticks to the places where the
characters shall occur. Then a piece of paper is pressed around the roll and the toner
now is transferred from the roll to the paper, thus producing the characters on the
paper.
The print speed varies between
V five pages per minute as regards low--speed laser printers and
V approximately 20 pages per minute as regards high--speed laser printers.
Also colour laser printers are available.
Plotter
The graphical representation is a means of communication much more adapted to
human senses than the representation by numbers.
An increasing effort is therefore undertaken to make computer--delivered numerical
results visible as curves, graphs or pictures by means of adequate output units.
Plotters belong to this category. They work on the base of moving coordinates.
There are two types of plotters:
V flat--base plotters, as shown in Figure 11, detail a)
V drum plotters, as shown in detail b).
With the first group of plotters the paper on which the curve shall be plotted is fixed
on a desk. The ordinate bar, driven by a spindle, moves in the direction of the x--axis.
The bar is equipped with a carriage to which the drawing pen is attached and which
executes the y--movements.
With the second group the x--movements are achieved by the rotating cylinder, and
the y--movements by moving the drawing pen in vertical direction.
Paper, metal foil or glass plates can be used for drawing the curves, depending on
the necessities and the type of equipment. The pen may be an ink pen or an
engraving tool. Line thickness and colour are selectable.
External Memory Devices
In order to expand the available memory space external memory devices are used
for computer systems. External memory devices commonly employ the electromagnetic principle of storing data. In contrast to RAM and ROM devices the data are
stored in a serial form.
Digital Techniques
5.6.1 - HO - 16
Module 5
Preliminary
Notes
5.6. (a)
The advantages of this principle are:

V Data are not lost when the power has been switched off.
V Available memory space is very large (in the range of some 10 Mbytes to
several Gbytes).
The disadvantage of this principle is that the access time is relatively long (fast
devices -- approximately 12 milliseconds) compared with the access time of RAM and
ROM (fast RAM devices -- approximately 60 nanoseconds).
External memory devices are:
V diskette (floppy disc) drives
V fixed disc (Winchester disc) drives
V magnetic tape (streamer) drives
V CD ROM drives
V DVD ROM drives
V memory cards.
Floppy Disc
Refer to Figure 12.
The floppy disc device consists of a floppy disc drive and the memory medium,
the diskette.
The floppy disc device is the most commonly used magnetic memory device for
microprocessor--based systems. The floppy disc is often referred to as a diskette; it is
a removable magnetic memory medium which is permanently contained in a paper or
plastic envelope to protect the disc against touching, dust or dirt.
The floppy drive is a low--cost peripheral memory that performs the electromechanical read/write functions necessary to record and recover data on a diskette.
Figure 13 shows a typical floppy disc. The diskettes are available in different sizes,
the most popular sizes are 5 1/4--inches (Figure 13, detail a)) and 3 1/2--inches
(detail b)). Detail c) shows a 5 1/4--inch disc drive.
Today more and more the 3 1/2--inch floppy disc format is used within new computer
systems. Therefore some computers are fitted with two floppy drives, one employing
the 5 1/4--inch format, the other the 3 1/2--inch format.
In the 3 1/2--inch version, the only opening, protected by a sliding metal panel, is
used for the read/write head of the floppy disc drive with which data are stored on the
disc or read from the disc. An opening for the drive motor is provided to let the
magnetic disc rotate at a continuous speed. A write protection notch prevents
undesired writing on the disc.
Depending on the memory capacity of the disc the diskettes are coded with two
letters:
V SD
single density:
low capacity
V DD
double density:
medium capacity
V HD
high density:
high capacity.
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 17
Module 5
5.6. (a)
Fixed (Winchester) Disc

Refer to Figure 14.
Fixed disc drives are similar to floppy disc drives. The arrangement of data on both
discs is the same. Fixed discs can be stacked to increase the memory capacity.
With this arrangement the read/write heads can access each point of the fixed disc
independent of the number of discs.
The advantages of a fixed disc system are:
V Rotation speed of the disc is much higher.
V Positioning of the read/write head is much more exactly.
V Read/write speed is much higher.
V Data transfer rate between fixed disc and computer is much higher.
Due to these advantages the memory capacity of a fixed disc is much higher than the
memory capacity of a floppy disc. It varies between some Mbytes and several
Gbytes.
The disadvantages of such a system are:
V The system must be kept free from dust.
V It is much more difficult to change a fixed disc.
Magnetic Tape Recorder (Streamer)
Magnetic tape recorders (streamers) are often used with microcomputers as an external
memory device, mainly for back--up applications. Back--up is a procedure to copy data
from a fixed disc onto a tape to prevent the loss of data in the case of failure of the disc.
The tape recorders used for computers are similar to common music cassette recorders.
CD ROM
Read--only optical discs, called CD ROMs (compact disc read-only memories) have a
function similar to ROM. Once written (burned) the information stored on the CD
ROM cannot be changed.
Note:
Blank CDs which can be written once, are called CD R (compact disc recordable).
In contrast to the above principle the CD RW (compact disc rewritable) can be
erased more than 1000 times. Therefore it can be used as temporary data storage,
because the stored data can be updated.
The technology of the CD ROM is the same as used with the audio compact disc
(CD). The technology is of digital form and based on a 4.72--inches (12--cm) optical
disc that stores up to 800 MB (90 minutes) on a single side.
The CD ROM can store audio, video and computer data as well, and a mixture of
these data. When compression techniques are used, the data contents of the
CD ROM extends beyond simple line drawings and includes pictures, animation and
real--time video. E.g. with the use of media compression techniques a video of
60 minutes with a resolution of 480 x 640 dots can be stored on a 650 MB disc.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 18
The hardware necessary to burn a CD ROM is called a CD writer. CD writers operate

at different speeds, e.g. a 8/4/32--writer is able to burn a CD eight times faster,
rewrite a CD RW four times faster and can read a CD ROM 32 times faster than at
normal speed.
DVD ROM
The DVD (digital video disc or digital versatile disc) essentially is a bigger, faster CD
that can hold video as well as audio and computer data.
The DVD has the capability to store near--studio--quality video and better--than--CD-audio quality. DVDs are available as DVD ROM, DVD R and DVD RW. The storage
capability ranges from 4.7 GB (single--side storage, one layer) up to 17 GB (dual-side storage, two layers).
Memory Card
An alternative to rotating discs is the credit--card--sized memory card, also called
PC card. The cards are based on a chip technology called flash EEPROM (electrically erasable programmable read--only memory). This type of chip is very useful in
applications that need a rewriteable medium that does not require power to store the
data.
Like floppy discs, memory cards can store data and programs, are erasable and can
be exchanged among computers that have memory card slots. Memory cards have a
storage capacity of 20 to 60 MB.
Memory card technology is still at the beginning, but it is expected to replace discs in
portable computers in future. Most hand--held and notebook PCs, for example,
contain a memory card slot. The advantages include faster access, smaller size and
less power consumption due to the lack of any moving parts. The major
disadvantage is the current high cost of the cards relative to discs.
5.6.1.4
Air Data Computer
Introduction
Pitot and static pressure systems are specifically designed to measure these
pressures in terms of airspeed, altitude and rate of altitude change. There are many
systems whose operation depends on this type of input.
The utilization of such systems (in terms of weight, size etc.) in an aircraft depends
on its size, weight and operational category.
In order to minimize the problems arising from the employment of various different
indicators and other systems including the necessary piping and wiring, the
pressures are transmitted to a centralized air data computer (ADC) unit.
This unit converts the data into electrical signals and transmits these via cables or
data busses to the dependent indicators and systems.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 19
Another advantage of an ADC (when looking at the processing of pressures only) is

that circuits may be integrated with their principal data modules in such a way that
corrections for pressure error (PE), barometric pressure changes and compressibility
effects can be automatically applied.
In addition, provision can also be made for the calculation of true airspeed by using
static air temperature data inputs. Following information are typically provided by air
data systems:
V Barometric altitude (ALT)
V Static air temperature (SAT)
V Total air temperature (TAT)
V Indicated airspeed (IAS)
V True airspeed (TAS)
V Mach indication.
Barometric Altitude Data
Refer to Figure 15.
Barometric altitude information is important to the pilot for a number of reasons.
The pilot must be sure that he is flying high enough to keep clear of the highest
terrain or obstacle along his intended route.
To reduce the possibility of a midair collision, the pilot must be sure that he is flying at
the correct cruising altitude. Sometimes he may want to fly at a specific altitude to
take advantage of prevailing winds.
Determination of altitude from pressure measurements is based upon a standard
atmosphere in which pressure, density and temperature are known functions of
altitude. The altitude resulting from this computation is called pressure altitude.
It represents the altitude above sea level. All aircraft barometric altimeters are
calibrated to this standard.
The standard atmosphere approximates the average year--long conditions existing at
a latitude of 40 North. This equals a sea level pressure of 1,013.25 hPa
(29.92 inch Hg) at a temperature of 15 C.
Due to the variation in atmospheric pressure from that of the standard atmosphere,
most barometric altimeters have a zero setting from 952 hPa (28.10 in Hg) to
1,050 hPa (31.00 in Hg). At times, when atmospheric conditions are near standard,
the altitude indicated by the altimeter can be fairly accurate.
All other altitudes will be in error. Flight regulations require pilots flying below
18,000 feet to maintain a flight--level referenced barometric setting to the current
reported altimeter setting of a station within 100 nm of the aircraft.
At altitudes above 18,000 feet, the primary purpose of calibrated altitude information
is to ensure air traffic separation between aircraft. For this purpose, atmospheric
variations are not important, because each altimeter in the area will read the same if
it is set to the standard atmosphere. To ensure this separation, a universally
accepted standard altimeter of 1013.25 hpa (29.92 in Hg) is used above 18,000 feet.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 20
Temperature
The outside air temperature (OAT) affects aircraft performance in several ways.
During take--off, it affects the amount of thrust available from the engines and the lift
due to air density. At cruise level, it affects the fuel consumption. So, the OAT is
required to compute the true airspeed (TAS).
In poor weather conditions, the static air temperature (SAT) indicates the chance for
icing to occur, while the total air temperature (TAT) indicates the likelihood that icing
is occurring and the need to de--ice or to change the flight level.
The measurement of temperature by a moving aircraft is usually accomplished by
means of a platinum wire probe or a thermometer projected into the airstream.
When the temperature changes the platinum element changes its electrical resistance. This change in resistance is converted into an electrical signal that is
proportional to the total air temperature.
Airspeed Data
The two main applications of airspeed data on modern jet aircraft are
V to define performance and structural limitations (e.g. limiting speed for flap or
gear operation)
V to assist navigation (e.g. an airspeed input to a long--range navigation system
is necessary to compute the ground speed).
Static Source Error and Correction
Static pressure is the absolute pressure of an undisturbed air mass. During flight, the
airflow passing the static port is different to the pressure in the static system with
undisturbed air.
At low speeds, this effect can be ignored. But at high speeds it is significant and has
to be corrected. In general terms, a pressure error (PE) is caused by anything which
causes a variation in the airflow as it passes the static port. Examples are:
V Airflow around the curved fuselage
V Extended landing gear/flaps
V Changes of the angle of attack (AOA)
V Aircraft yawing motion.
These effects are either long or short term or both. The long term effects will cause
altimeter and airspeed errors in levelled flight, while the short term effects can cause
undue activity or even reversed operation of the vertical speed indicator.
The term static source error correction (SSEC) refers to a correction which is long
term, measurable and repeatable.
The correction is a function of the Mach number and is usually a compromise to
cover all altitudes and flight situations. According to official regulations, SSEC
accuracy shall reach 30 feet.
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 21
Analogue ADC
Refer to Figure 16.
Each module of an analogue ADC constitutes what is termed a servo mechanism.
It is comprised of certain mechanical elements and synchros which perform the
various functions.
The output signals from each module are transmitted to the relevant indicators which
are of the servo--operated type. Interfacing is done by transducers.
Failure Warning
Each module of the ADC incorporates a warning logic circuit network which activates
a warning flag in the associated indicators in the event of loss of the respective data
signals. Annunciator lights corresponding to each module are provided at the end
panel of the computer. They are also illuminated in the event of failures. Once a
warning circuit has been triggered it remains latched.
Indicators
The indicators that are used in conjunction with an analogue ADC also contain servo
mechanisms. When connected to the computer they each form a complete servo
loop with the respective modules of the computer. These indicators may, in some
applications, be of the combined pneumatic and servo type or they may be entirely
servo--operated.
Digital ADC
Refer to Figure 17.
A digital ADC processes the same basic parameters as an analogue one. The major
difference is that all the signals corresponding to the variables measured are
converted and transmitted in digital form.
The Pitot and static pressure sensors are of the piezoelectric crystal type.
Their frequency--modulated signals are supplied to the altitude, computed airspeed
and Mach calculation circuit modules via a frequency--to--digital converter.
The analogue inputs from the synchros of the angle of attack (AOA) sensors and the
altimeter barometric pressure setting controls are converted by means of synchro-to--digital converters.
Outputs from all modules of the computer are supplied to a transmitter connected to
data buses from which all interfacing systems requiring air data are then supplied.
The purpose of the discrete coder module is to monitor signals relating to the status
and integrity of particular circuits, e.g. the heater circuits of air temperature probes,
Pitot probes and AOA sensors, and to initiate appropriate warnings.
In order for the computer automatically to take into account the pressure error of the
air data system of a particular type of aircraft (and also its stall characteristics),
the ADC is matched with the relevant data by programming the appropriate modules
accordingly.
The indicators associated with a digital ADC are of the pure servo--operated type.
Module 5
Preliminary
Notes
5.6. (a)
Digital Techniques
5.6.1 - HO - 22
Arithmetic unit
Memory
Input
units
Output
units
Programs
Data
Central unit
Figure 1
A 1283 A
Control unit
General Arrangement of a Computer

System
Other
devices
Memory
System
clock
RAM
Figure 2
Accumulator
ALU
Central Unit/System Unit
8 bits
Buffer
R/W
Monitor
control
circuits
Disc
controller
Keyboard
control
Other
devices
5.6. (a)
8 bits 8 bits
Buffer
System
reset
I/O buffer
and control
Module 5
Registers
CPU
Control bus
6 bits
Data bus
8 bits
Address bus
16 bits
ROM
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 23
FA 1802 C
Power
supply
RST 5.5
RST 6.5
Decimal
adjust
(ALU)
Arithmetic
logical unit
Flag register
Control
internal control bus
X1
X2
+5 V
Clock
0V
Clk out
Acc. interme-diate register
INTA
Short time
register
Ready
Accumulator
Status
Figure 3
RD
SID
SOD
DMA
Reset
Clock and
sequence
control
Instruction
decoder
Instruction
register
Serial I/O
control
Reset in
S1
Intermediate
register
Z
(16)
A15 -- A8
Address bus
Address bus
driver
internal control bus
N 6174 C
AD7 -- AD0
Address/data bus
Data/address
bus driver
Incr/Decr address register

(16)
Program counter (PC) (16)
Stack pointer (SP)
H -- Register(8) L -- Register (8)
D --Register (8) E -- Register(8)
B -- Register (8) C -- Register(8)
Intermediate
register
W
Multiplexer
8--bit internal data bus
Block Diagram of a CPU
IO/M
RST 7.5
WR
TRAP
ALE
Register select
Interrupt control
S0
HLDA
5.6. (a)
HOLD
Module 5
Reset out
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 24
INTR
Function
select logic
Arithmetic--Logic Unit (ALU)
Flags
Internal
data bus
Data bus
5.6. (a)
Accumulator
Result
Combiner
logic
ALU
A--operand
Intermediate
register
Module 5
Figure 4
Control bus
Internal
control bus
Internal
data bus
B--operand
8--bit input
from data bus
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 25
A 6991 B
Module 5
Preliminary
Notes
5.6. (a)
Digital Techniques
5.6.1 - HO - 26
a) Parallel interface
D0
D1
D2
D3
D4
D5
D6
D7
Ackn
Busy
Clock
Aux
GND
System 1
D0
D1
D2
D3
D4
D5
D6
D7
Ackn
Busy
Clock
Aux
GND
System 2
b) Serial interface
System 1
Figure 5
TxD
RxD
SD
GND
Clock
A 6992 B
TxD
RxD
SD
GND
Clock
System 2
Interfaces
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 27
FA 8349 E
Preliminary
Notes
Figure 6
Example of a Computer Keyboard
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 28
FA 8333 E
Preliminary
Notes
Figure 7
Example of a Mouse Device
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 29
FA 8350 B
Preliminary
Notes
Figure 8
Example of a Computer Display
Module 5
Preliminary
Notes
5.6. (a)
Digital Techniques
5.6.1 - HO - 30
Printer types
Impact
Non--impact
-- Teletypewriter
-- Ink--jet printer
-- Matrix printer
-- Bubble--jet printer
-- Typewheel printer
-- Thermo printer
-- Laser printer
Figure 9
A 1817 B
-- Electrosensitive
printer
Types of Printers
Preliminary
Notes
a) Type bar
Module 5
5.6. (a)
Paper feeding
roller
Digital Techniques
5.6.1 - HO - 31
Hammer
Inked
ribbon
Paper
Actuating
lever
Print
drum
Trigger
magnet
A 1818 B
b) Type wheel
Figure 10 Daisywheel Printer Principle
Digital Techniques
5.6.1 - HO - 32
Module 5
Preliminary
Notes
5.6. (a)
a) Flat--base plotter
1
5
2
y
b) Drum plotter
1 = Desk
2 = Ordinate--controlled bar
3 = Carriage
4 = Pen
5 = Drawing paper
6 = Drum
A 1820 B
Figure 11 Principles of Plotters
Preliminary
Notes
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 33
Floppy disc drive
A 1805 B
Diskette
(floppy disc)
Figure 12 Floppy Disc Device
Module 5
Preliminary
Notes
5.6. (a)
Digital Techniques
5.6.1 - HO - 34
a) 5 1/4 -- inch sheath

Write
protection
notch
Read/write
opening
b) 3 1/4 -- inch sheath

Sliding metal panel
A 1975 B
c) 5 1/4 -- inch disc drive
Read/write
head
Figure 13 Floppy Disc
Module 5
5.6. (a)
Digital Techniques
5.6.1 - HO - 35
FA 1800 D
Preliminary
Notes
Figure 14 Hard Disc Drive
Module 5
Preliminary
Notes
5.6. (a)
Air
temperature
probe
Digital Techniques
5.6.1 - HO - 36
B 7011
Angle--of-attack vane
Static ports
Pitot probe
Static probe
(both sides)
Figure 15 Air Data System Input Probes Location

Gust response
Electronic engine control
Cabin pressurisation
Electronic units of flight
control systems, e.g. flaps
slats, stabiliser trim, yaw
damper
Systems using air data inputs
5.6. (a)
Flight director
Automatic flight control
Inertial navigation
Altitude reporting
Ground proximity warning
Flight management
Flight recorder
Stall warning
Module 5
Figure 16 Analogue Air Data Computer (Block Diagram)
SPEED
VERTICAL
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 37
E 0698 C
Power
supply
module
To all
modules
TAT
computation
Corrected
AOA
SAT
computation
SSEC
TAS
computation
Mach
calculation
Computed
airspeed
calculation
Altitude
calculation
Co--pilot
air data instruments
Pilot
VMO
calculation
Altitude
rate
calculation
TAT
SAT
TAS
AOA
Mach
CAS
VMO
ALT.
V/S
ARINC 429
transmitter
Air data instruments
EEC
EFIS
EICAS
FMC
FCC
GPWS
IRU
Data buses
Electronic engine control

Electronic flight instrument system
Engine indicating and control system
Flight management computer
Flight contol computer
Ground proximity warning system
Inertial reference unit
EFIS
Flight recorder
GPWS
EICAS
FMC
Cabin pressure controller
Yaw damper
Transponder
IRU
EEC
IRU
TMC
FCC
Stall warning
Stab. trim
Yaw damper
Altitude alert
Figure 17 Digital Air Data Computer (Block Diagram)
Coder
Synchro
to digital
converter
Type
Baro.
corrected
altitude
5.6. (a)
Discretes
Probe
inputs
115 V AC
Angle of
attack sensor
input
Temperature
compensation
Aircraft
digital
converter
Pressure
sensor
PI
Type
Calibration
AND
Frequency
TO
Aircraft
Frequency
modulated
Synchro
to digital
converter
PS
Altimeter
B.P. settings
Module 5
E 0699 B
Preliminary
Notes
Digital Techniques
5.6.1 - HO - 38
Preliminary
Notes
Digital Techniques
Fibre Optics
5.10.1 - HO - 1
Module 5
5.10
Fibre Optics
5.10.1
Optic Data Transmission
5.10.1.1
Introduction
5.10
The latest type of communication link uses a cable made of thin glass fibres that
serve as a conduit for light over long distances with little losses. In this system with a
fibre--optical link, the full cable--channel bandwidth can be used for amplitude
modulation of the light source.
The choice between optical fibre and electrical (or copper) transmission for a
particular system is based on a number of trade--offs. Optical fibre is generally
chosen for systems with higher bandwidths, spanning longer distances, than
electrical cabling can provide. The main benefits of fibre are its exceptionally low
loss, allowing long distances between amplifiers or repeaters; and its inherently high
data--carrying capacity, such that thousands of electrical links would be required to
replace a single high bandwidth fibre. One further benefit of fibre is that even when
run alongside each other for long distances, fibre cables experience effectively no
crosstalk, in contrast to some types of electrical transmission lines.
In short distance and relatively low bandwidth applications, electrical transmission is
often preferred because of its advantages over glass fibre applications:
V lower material cost, when cabling is not required
V lower cost of transmitters and receivers
V ease of splicing
V capability to carry electrical power as well as signals.
Because of these benefits of electrical transmission, optical communication is not
common in short box--to--box, backplane, or chip--to--chip applications; however,
optical systems on those scales have been demonstrated in the laboratory.
In certain situations fibre may be used even for short distance or low bandwidth
applications, due to other important features:
V Immunity to electromagnetic interference, including nuclear electromagnetic
pulses (although fibre can be damaged by alpha and beta radiation)
V High electrical resistance, making it safe to use near high--voltage equipment
or between areas with different earth potentials
V Low weight, important in aircraft
V No sparks, important in flammable or explosive gas environments
V Not electromagnetically radiating, and difficult to tap without disrupting the
signal, important in high--security environments.
Refer to Figure 1.
For transmission, a modulated light beam is the source that introduces light into the
glass fibre cable. At the receiving end, a photoelectric detector converts the variation in
light amplitude back to electric signals. The light serves as a super carrier wave for the
entire cable passband.
Module 5
Preliminary
Notes
5.10
Digital Techniques
Fibre Optics
5.10.1 - HO - 2
Refraction and Internal Reflection of Light

The reason for the low attenuation is the internal reflection of light inside the fibre
cable. Thus, no light can escape, and the losses are extremely small.
To analyse this effect, the basic laws of refraction of light are illustrated in Figure 2,
detail a), and internal reflection is shown in detail b).
Light rays are going from air into a slab of glass. The velocity of light is reduced
because glass is a denser medium.
In detail a), light rays enter at an angle from the normal (perpendicular) line. This
direction is perpendicular to the interface where the light enters or leaves the glass.
Going into a denser medium, the light rays do not continue their original angular
direction. Instead, they are bent to an angle closer to the normal line because of the
reduced velocity of the rays.
As each wavefront of light reaches the air--glass interface, the effect is like a squad of
people side by side marching in a line. The first one to hit the interface begins going
slower, but the last continues at the original speed up to the interface. As a result, the
line of the wavefront turns to its right, and the light beam bends towards the normal
line.
At the bottom of the glass slab, the light leaves the glass and is bent away from the
normal line. This direction is opposite to the bending of the incident light. The reason
is that the light enters a less dense medium that allows it to travel with higher
velocity.
The bending of the light is called refraction. How much the light bends when it meets
a different medium is determined by the index of refraction, whose symbol is . Its
value is:
=
speed of light in vacuum

speed of light in medium
Typical values of are:

V 1 for air or vacuum
V 1.8 for glass
V 2.4 for diamond
V 1.3 for water.
Now it is considered that a light source is actually inserted in the slab of glass as
shown in Figure 2, detail b). The light radiates in all directions.
The light ray marked A approaches the interface at a right angle. Such rays along
the normal line are not refracted.
Ray B is refracted, but still leaves the glass. It should be noted that refraction bends
the light away from the normal line.
For ray C, however, the refraction is just enough to make the light follow along the
glass surface.
At the angle of ray D and smaller angles of rays, the light is reflected internally.
None of these rays can leave the glass.
The angle at which the internal reflection begins is called the critical internal angle.
Preliminary
Notes
Module 5
5.10
Digital Techniques
Fibre Optics
5.10.1 - HO - 3
For fibre--optical cables the corresponding action is shown in Figure 3. Light entering
the conduit at angles less than twice the critical angle will be reflected internally. Then
the light is propagated along the cable in zigzag directions, bouncing off the walls, but
without leaving the glass.
This angle that allows complete internal reflection is called acceptance angle. All
incident light with a smaller angle, or along the central axis, is transmitted in the
optical cable.
Modal Dispersion
Light entering the optical cable or travelling along the central axis takes the shortest
route. At other angles within the acceptance angle, the light must travel a longer path
because of the internal reflections. The time difference between the direct path and
the reflection paths is called the modal dispersion. This factor limits the bandwidth of
the cable.
To minimize the modal dispersion, the practical optical cable is made of a bundle of
fine fibres of small diameter. In addition, the fibre is encased in a cladding material
that has a high index of refraction in order to increase internal reflections. In effect, all
the fibres are in parallel to provide a cable with very low losses.
Optical Transmitter
Often the light source is a special light--emitting diode (LED), operating in the
infra--red (IR) part of the light spectrum, where the wavelength is greater than that for
visible light.
In construction, the LED is at the bottom of a conical pit and feeds light into the cable.
The LED current and its light output can be modulated over the full passband of all
the cable channels.
Actually, the LED is the limiting factor. The bandwidth of the cable itself is far greater
than the bandwidth of the LED modulation circuits.
Another method of transmitting the optical signal uses an injection laser diode as the
light source. This system can accept modulating frequencies well into the UHF band.
Cable Connectors
One of the problems in fibre optics is the splicing, or joining, of cables. Care must be
taken to make precise optical alignments at the connection, or excessive light loss will
result.
However, special connectors are available to join the cables and keep light losses
within tolerable limits.
Digital Techniques
Fibre Optics
5.10.1 - HO - 4
Module 5
5.10
FB 6796
Preliminary
Notes
Source
Photoelectric
detector
Figure 1
Principle of an Optical Cable
Digital Techniques
Fibre Optics
5.10.1 - HO - 5
Module 5
Preliminary
Notes
5.10
a) Refraction of light rays

Normal or
perpendicular line
Incident
light
Wavefront
Air
Glass
Normal
b) Refraction and internal reflections

Ray A
Ray B
No
refraction
Refraction
Total internal
Ray C reflections
Ray D
Figure 2
B 6797
Light
source
Refraction of Light and Internal

Reflection
Digital Techniques
Fibre Optics
5.10.1 - HO - 6
Module 5
Preliminary
Notes
5.10
Glass fibre
Cable
FB 6798
Acceptance
angle
Cladding with different

coefficient of refraction
Figure 3
Fibre--Optical Cable
Preliminary
Notes
Digital Techniques
Fibre Optics
5.10.2 - HO - 1
Module 5
5.10
5.10.2
Transmission Technologies
5.10.2.1
Basic Elements of a Fibre--Optic System

Refer to Figure 1.
The main task of an optical--fibre transmission system is to convert an electrical
signal into an infrared light signal, to launch or transmit this light signal onto an
optical fibre and then to capture the signal on the other end and re--convert it into an
electrical signal.
The basic elements of an optical--fibre communication system (Figure 1) on the
transmission side are:
V driver
V light source
V source--to--fibre connection
V digital encoder (only for digital signal transmission).
On the reception side the basic elements are:
V fibre--to--detector connector
V light detector
V amplifier
V digital decoder (only for digital signal transmission).
The transmitter and the receiver are linked by an optical fibre cable.
When the link becomes too long the fibre will attenuate the light waves travelling
down so that the light waves cannot be distinguished from noise. Even with the
highest--intensity light sources and the lowest--loss fibres, the light waves finally
become weak and dim from absorption and scattering. For this reason sometimes it
becomes necessary to regenerate the light signal. The device used for regeneration
of the light signal is called repeater.
The main task of a transmitter is to modulate the light wave (carrier) by a modulating
signal, i.e. the information to be transferred. The light wave can be modulated by
V analogue signals
V digital signals.
5.10.2.2
Fibre--Optic Link
The components needed between transmitters and receivers in a fibre--optic link are
fibre cables, connectors and splices, power splitters and directional couplers.
Fibre--Optic Cables
A fibre--optic cable consists of one or more optical fibres formed into a cable for
protection. This is necessary, because the cable may be buried directly in the ground,
pulled through underground ducts, hung on telephone poles or dropped to the bottom
of a lake or ocean.
Preliminary
Notes
Module 5
5.10
Digital Techniques
Fibre Optics
5.10.2 - HO - 2
It must be protected against any mechanical stress and for all kinds of stress caused
by the environment, such as temperature changes from very cold to very hot.
A number of different designs and configurations have been developed to meet all
requirements for protection. These designs differ in materials and arrangements, but
practically all of them include coatings to protect the individual fibres, strength--bearing materials, filler or buffer materials, and an external protective jacket.
Refer to Figure 2.
Figure 2 shows a cabling package used by WESTERN ELECTRIC. The package
consists of 12 ribbons of 12 closely--packed coated fibres. These 144 fibres are then
wrapped in paper, covered by a polyethylene jacket and a Kevlar--type braid that is
surrounded by steel wires embedded in a plastic protective sheath.
Connectors
Connectors are used whenever two fibres, or a fibre and an electro--optical source or
detector, are to be joined and disconnected repeatedly. This is generally the case at
fibre terminal equipment, optical patch panels or fibre couplers within a LAN.
Connectors are present at the transmitter and receiver interface as a minimum.
If jumpers and an optical patch panel are used to connect the optical cable and the
equipment, then the number of connectors on each end can double.
It should be considered that each connector in a fibre--optic system causes an optical
power loss. For this reason the proper choice of connectors can be significant for the
performance of the system.
Refer to Figure 3.
For coupling LEDs, lasers and detectors with spherical and hemispherical lenses are
used to direct the light rays to minimise the power losses. However, this technique is
not used for coupling fibres to fibres.
For direct coupling of fibres the most commonly used fibre--connection technique is
to put the two fibre ends together with a minimum gap and maximum alignment,
while still allowing for remating when required.
Commonly used connectors are shown in Figure 3. Detail a) shows a ferrule-mounted light source or detector connector. Detail b) shows a fibre--to--fibre
connector in which the slightly deformable ferrule slips very snugly into the receiving
bushing.
Couplers
In optical systems that have been discussed so far, only two terminals are used, a
transmitting terminal and a receiving terminal connected by a fibre--optic cable.
However, it is also possible to attach more than one set of terminals to a single fibre
rather than running a separate fibre or cable for each transmit/receive pair. For this
purpose, various types of couplers are used.
The most common application of this technology is within LANs, whereby a common
fibre carries the multiplexed signals from multiple terminals placed at various
locations within the LAN.
Preliminary
Notes
Module 5
5.10
Digital Techniques
Fibre Optics
5.10.2 - HO - 3
Access to the LAN is gained through the optical couplers that distribute parts of the
signal power on the LAN fibre to each receiver and couple power from each terminal
transmitter onto the fibre.
Couplers affect the performance of a fibre--optic system by splitting and distributing
power. The amount of power arriving at any receiver is affected by the amount of
total power that each coupler in line has distributed to the path of the receiver.
Refer to Figure 4.
There are various types of couplers, such as tree and brunch couplers, star couplers,
directional couplers and wavelength--dependent couplers. Each of these types has
its own characteristics. As an example, Figure 4 shows the application of a star
coupler.
The star coupler is a multiport coupler that permits power from one of n transmit
ports (TXA, TXB, TXC....TXn) to be split equally to each of n receive ports (RX1,
RX2, RX3....RXn) (detail a)).
Detail b) shows the LAN application of the star coupler, which is one of the most
common applications of this coupler type.
Input
Light
detector
Repeater
Amplifier
Optical fibre cable
Light
source
Digital
decoder
Output
Source--to-fibre
connection
Output
5.10
Basic Elements of a Fibre--Optic System
Driver
Module 5
Figure 1
Fibre--to
detector
connection
Digital
encoder
Input
Preliminary
Notes
Digital Techniques
Fibre Optics
5.10.2 - HO - 4
E 5254
Module 5
Preliminary
Notes
5.10
Digital Techniques
Fibre Optics
5.10.2 - HO - 5
WESTERN ELECTRIC Fibre Cable

Figure 2
144 fibres
Connector
Stranded core
Paper
Polyethylene jacket
Kevlar braid
Strength
members
Sheath
E 5265
Digital Techniques
Fibre Optics
5.10.2 - HO - 6
Module 5
Preliminary
Notes
5.10
a) Ferrule--mounted light source or detector
Photodiode leads
Ferrule
E 5266
b) Fibre--to--fibre connector
Figure 3
Fibre--Optic Connectors
Digital Techniques
Fibre Optics
5.10.2 - HO - 7
Module 5
Preliminary
Notes
5.10
a) Star coupler principle

TXA
RX1
Star coupler
TXB
RX2
TXn
RXn
b) LAN application of star coupler

Terminal 1
RX
TX
Star coupler
RX
TX
E 5267
Terminal n
TX
RX
Figure 4
Star Coupler Applications
Preliminary
Notes
5.10.3
Digital Techniques
Fibre Optics
5.10.3 - HO - 1
Module 5
5.10
Application of Fibre--Optic Links

Nowadays, fibre--optic systems are applied in almost all branches of electronics.
Thereby the traditional distinction according to the transmission product (i.e. voice,
video and data) has become less important and less useful. Today, product and
technology can be more appropriately differentiated by the scale and architecture of
the transmission system. The terms
V wide--area networks (WAN)
V metropolitan--area networks (MAN)
V local--area networks (LAN)
classify much better the technological differences of the transmission products.
5.10.3.1
Fibre Optic Data Bus used in Local--Area Network

A local--area network is a multi--terminal multiple access data system. It operates
within a somewhat closed (or private) area, within a limited distance and at a fixed
transmission data rate.
Generally, a LAN is a private computer (PC) workstation-- and server--based data
transmission network which operates within the office environment between hosts
and workstation or between PCs.
Historically, the LAN connected a single department in an office, a single floor or a
single building.
In LANs the transmission medium and the bandwidth are shared among the stations
of the net. This is achieved by a mechanism called multiple access. The multiple
access mechanisms are of physical and logical nature.
The optical couplers, for example, represent a physical multiple access device, and
multiple access signal protocols represent the logical rules for sequencing the data
exchange between stations.
There are two multiple access protocol methods most often used with LANs:
V carrier sense multiple access/collision detection (CSMA/CD)
V fibre--optic distributed data interface (FDDI).
With CSMA/CD (more commonly known as Ethernet), each station listens for anyone
elses transmission before it attempts to transmit on the LAN and will wait with its
transmission until it is clear to do so.
If two stations would transmit at the same time, then a collision would occur.
(Figure 1, detail a)). The result is a distorted (collision) signal that is sensed by all
stations. All stations will then stop transmission for slightly different time periods and
then try again.
The FDDI protocol is a so--called timed--token protocol (better known as token ring).
With a timed token protocol (detail b)), each station is sequentially given the
opportunity to transmit by being offered a group of data bits known as token.
The token gives the station the right to transmit on the LAN. Therefore, it is passed
around the network from station to station. If a station receiving the token has nothing
to transmit, then it will regenerate the token and send it to the next station.
Preliminary
Notes
Digital Techniques
Fibre Optics
5.10.3 - HO - 2
Module 5
5.10
If a station has transmitted a message, it will regenerate the token and send it to the
next station once it sees its own signal coming back around.
The role of optical fibres in a LAN environment is to replace the more conventional
media of coax and twisted--pair cables in order to reduce electromagnetic interferences and to increase data rate and distance coverage.
Most LAN standards have concentrated on coax and twisted--pair cables for
transmission rates below 16 Mb/s. With the development and application of
fibre--optic cables the possibility was given for high--speed LANs running at 10 Mb/s,
16 Mb/s, 100 Mb/s or even above.
5.10.3.2
Application of Fibre Optics in Aircraft Systems
Ice--Detection for Rotor Blades of Helicopters

Ice formation on the wings of aircraft and helicopters blades, can cause disruption of
the airflow leading to a loss of lift and subsequently wing stall. In fixed wing aircraft it
is important to know where the ice is forming as the handling of the aircraft differs
between main or tail wing stall.
The situation is much more critical for helicopters where ice accretion on the main or
tail rotor blade will lead to an increase in drag, and engine power. If unchecked it will
lead rapidly to non--recoverable situation. The existing ice--detection systems use
ambient temperature and humidity from central sensors to determine icing condition,
which initiate the de--icing cycle.
Icing is recognised as one of the major safety issues and it is generally been
accepted that new regulations will enforce all aircraft to have some form of ice
warning system, possibly on all flying surfaces.
The fibre optic ice--detection system is capable of transmitting the information from
the rotating frame of the rotor--blade to a stationary frame of the control unit.
Development
The research on fibre--optics techniques in aircraft engineering is still under progress.
Due to its major advantages it will gain more importance in all avionic systems. For
example, among projects flown on the plane are experiments to evaluate fiber optics
for flight--critical control systems, advanced air data acquisition systems, and
electrically--powered flight control actuators which do not require connection to the
aircraft central hydraulic system. The new technologies could lead to lighter and
more efficient aircraft designs with higher performance and greater safety.
Digital Techniques
Fibre Optics
5.10.3 - HO - 3
Module 5
Preliminary
Notes
5.10
a) CSMA/CD protocol
Simultaneous transmission at t1
Terminal
1
Terminal
2
t1
Terminal
3
t1
Collision at t2
b) Token--ring protocol
t4: T1 senses its own
transmitted data
and sends the
token to T2
Terminal
n
t1: T1 receives
token
Terminal
3
t3: T3 accepts message

and passes on the
total data stream
t2: T1 transmits message

intended for T3
Terminal
2
Figure 1
E 5269
Terminal
1
Examples of Multiple--Access
Protocols
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 1
Module 5
5.11
5.11
Electronic Display
5.11.1
Principles of Electronic Instruments and Displays
5.11.1.1
Electronic Displays Methods

Refer to Figure 1.
There are three main methods by which data may be displayed in electronic form:
V light--emitting diode (LED)
V liquid crystal display (LCD)
V cathode ray tube (CRT).
Electronic, or to be more precise, opto--electronic displays in avionic systems fall into
two broad categories:
V those in which a single register of numeric values is required
V those requiring several lines of alphanumeric information or instructions,
and/or display of situations in pictorial form.
The operation mode of displays may be either active or passive:
V active:
a display using the effect of producing light when the display elements are
electrically activated
V passive:
a display which either transmits light from an auxiliary light source after
modulation by the display device, or which produces a pattern viewed by
reflected ambient light.
Light--Emitting Diodes
For status indicators, pilot lamps and multisegment digital displays, the light--emitting
diodes (LED) are by far the most common device. These solid--state light sources
provide good visibility and require very low current and voltage levels for light
generation. One of the LEDs main advantages is its ability to be driven directly by
low--voltage and low--curent signals.
The discrete LED comes in many forms and four main visible colors (red, orange,
yellow and green). Infrared LEDs are also available for use as invisible light sources.
To understand the characteristics of the LED it is necessary to look at the physics
behind it.
Refer to Figure 2.
In most light sources, photons are generated by electrons falling to a lower energy
state. lt was discovered that certain semiconductor materials generate light when the
electrons fall from the conduction to the valence energy bands at a diode junction.
The physical properties of the semiconductor material determine how large an
energy drop exists between bands, so establishing the colour of the LED.
LEDs drop their energy at certain levels. Light--emitting diodes, generate light in very
narrow colour ranges and can in fact generate coherent (essentially monochromatic)
laser light.
Preliminary
Notes
Module 5
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 2
Materials that generate photons in the infrared and a portion of the visible light region
have been found. Gallium--arsenide phosphide is a good red emitter. Gallium--arsenide phosphite on gallium phosphide is a good yellow emitter. Gallium phosphide is a
fairly good green emitter. There are no blue or violet emitters commonly available
because semiconductor materials that exhibit an energy transition in the blue range
are rare.
The speed of response of the LEDs is 90 nanoseconds (ns) for the red and yellow
LEDs and 200 ns for the green LED. Because LEDs are semiconductor devices and
do not rely on thermal effects to generate light, they can be switched on and off very
quickly. This characteristic makes LEDs ideal for light modulation and communication
uses. Some LEDs are capable of being switched on and off at frequencies in the
range of hundreds of megaHertz (1 to 5 ns range).
Refer to Figure 3.
Interfacing an LED to a digital system is simple. A gate capable of providing the LED
with its required voltage and current levels can be used. Because an LED is a diode,
it will always drop its forward voltage across the diode junction, and it draws as much
current as is supplied to it. A current--limiting resistor is then required to put a ceiling
on this value.
lf not enough current is available to drive an LED in a given practice, a high--power
driver can be used. lf the drive current is marginal and less light is acceptable, good
results can be obtained by simply lowering the drive current.
LED Arrays
Arrays of LEDs can be used to represent alphanumeric characters. There are many
pre--assembled LED arrays available, ranging from the simple 7--segment types
found in calculators and digital clocks to 4 by 7 (and higher) dot matrix units.
In theory, interfacing LED arrays is no different from interfacing many single LEDs.
Individual segments can be driven with one gate. Special decoder--driver circuits are
designed to get a binary--coded decimal code and to drive appropriate array
segments to show the input code on the array.
Refer to Figure 4.
In a typical 7--segment display format it is usual to use one LED per segment and to
mount it within a reflective cavity with a plastic overlay and a diffuser plate.
The segments are formed as a sealed integrated circuit pack. Their connecting pins
are soldered to a printed circuit board. Depending on the use and the number of
digits containing the appropriate quantitative display, independent digit packs may be
used, or combined in a multiple--digit display unit.
LEDs can also be used in a dot--matrix configuration. An example of such a use is
the type of engine speed indicator shown in Figure 4, detail b). Each dot making up
the decimal numbers is an individual LED. They are arranged in a 9 by 5 matrix.
The counter is of unique design in that its signal drive circuit causes an apparent
rolling of the digits. This simulates the action of a mechanical drum--type counter as it
responds to changes in engine speed.
Preliminary
Notes
Module 5
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 3
Liquid Crystal Displays

LED and gas--discharge displays fall into the active device category: they emit light
as a function of the electrical energy applied to them. The liquid crystal display (LCD)
is a passive device because it simply controls light reflection and transmission as a
function of supplied voltage. The LCD acts as a light shutter.
Liquid crystal displays are commonly used in digital watches and many types of
pocket calculator. They are also used in data displays for aircraft systems, e.g. for
the display of selected radio frequencies.
There are two characteristics which make LCDs particularly desirable in certain
areas:
V LCDs draw very little power (in the region of a millionths of a watt) because
controlling light with a shutter takes much less power than creating light.
Unlike with an LED, high--level ambient light can not override the LCD.
V Because the LCD is a shutter, the more light is thrown on it the more it will
reflect.
The passive nature of the LCD creates its disadvantages as well as its advantages.
Because the LCD does not emit any light, it can not be seen in the dark as an LED
can. Solutions to this problem are:
V the use of built--in lights in the front or in the back of the LCD for in--the--dark
uses
V use of special fluoresence--activated LCDs (FLADs), which use as much
ambient light as possible and direct it toward the digits (FLADs still require
some light).
Liquid crystal displays are easy to interface to almost any logic family. Because they
draw current in the micro--ampere range at potentials of only a few volts, even CMOS
circuits can successfully drive them directly. The only precaution in using LCDs is to
use only the recommended drive voltages for the LCD. Too much drive voltage can
seriously damage the liquid crystal dyes used in the LCD panel.
The basic structure of an LCD is shown in Figure 5. lt consists of two glass plates
which are coated on their inner surfaces with a thin transparent conductor material,
such as indium oxide. The material on the front plate is etched into the standard
display format of seven segments, each of which form an electrode. A mirror image
of the digits with its associated electrical contact is also etched into the oxide layer of
the back glass plate. But this is not segmented since it constitutes a common return
for all segments.
The space between the plates is filled with a liquid--crystal compound (esters and
biphenyls are typical) which has a thread--like molecular structure. The molecules are
oriented with their long axes in parallel. The complete assembly is hermetically
sealed with a special thermoplastic material to stop contamination of the liquid--crystal compound by water vapour and oxygen.
LCD Operation
When a low--voltage, low--current signal is applied to the segments from the
decoder/drive circuits, the molecular order of the liquid--crystal compound is
disturbed. This changes its optical appearance from transparent to reflective.
Preliminary
Notes
Module 5
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 4
The magnitude of the optical change is basically a measure of the light reflected from
(or transmitted through) the segment area to the light reflected from the background
area. An LCD does not emit light, but merely acts on light passing through it.
Energizing of the segments is done by the application at the same time of a
symmetrical out--of--phase signal to the front and back electrodes of a segment,
which as a reult produces a net voltage difference.
When two in--phase signals are applied to the display segments, the net voltage is
zero and the display segments freely relax to the de--energized state.
For a transmissive read--out, a back--light source is provided. The light is directed by
a light--control film similar in its action to a venetian blind. In the area defined by the
energized segment, the light is then scattered up toward the observer to produce a
light digit or character on a dark background.
For a reflective read--out, the light--control film is replaced by a mirror. It depends on
forward light scattering and also produces a light digit on a dark background, but the
light source used is extensively ambient.
Matrix--Type LCD
The method of directly addressing each segment (as in dedicated displays) becomes
impossible when a large quantity of information needs to be displayed, since it
requires a separate drive circuit and wire contact for each image element (plus one
for the counterelectrode).
A matrix system is used instead. In such a matrix, each image element (or: pixel) is
defined by the intersection of two arrays of parallel electrodes disposed orthogonal to
each other. This makes it possible to address M by N pixels with only M + N
electrodes.
The reason behind matrix--addressing is obvious: the display is a lot simpler by the
reduced number of electrical connections to the drive circuits. However, in this case,
the pixels are no longer individually accessible. The display has therefore to be
addressed sequentially, usually line--by--line.
Unlike a dedicated display (where each point is statically controlled) each point in a
matrix display is excited by a signal voltage during a fraction of time
(T/N with: N = number of rows in the display; T = data refresh period) as well as by
stray voltages during the remaining time, due to the excitation of other points in the
same column.
As the number of display rows increases, the time T/N diminishes while the stray
voltages gain in relative importance. This leads to a degradation in the panels
electro--optical performance (contrast, viewing angle) called cross talk effect.
This problem can be overcome by introducing a switching element in series with
each liquid crystal cell to isolate it from stray voltages.
Displays using this new system are known as active--matrix liquid crystal displays.
Preliminary
Notes
Module 5
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 5
Active--Matrix LCD Operation

The operating principle of an active--matrix liquid crystal display is shown in Figure 6.
Here, the voltage fed to each element or pixel is controlled by a transistor. Therefore
the liquid crystal receives the correct voltage during the addressing time T/N and is
isolated from stray voltages during the rest of the time. This explains why active--matrix displays give the same contrast as permanently--excited dedicated displays.
Figure 7 shows a cross--section of an active--matrix liquid crystal display. In this
case, rows and columns of the matrix are disposed on the same substrate.
The upper substrate bears the counter--electrode.
Active--matrix displays are addressed by applying on the column a video voltage VO
related to the signal to be displayed and, on the appropriate row, a voltage VG that
turns on the transistor.
The video voltage is then applied to the pixel. The transistor is then turned off while
the other rows of the display are successively addressed. A grey--scale effect
(display of intermediate tones) can be achieved by modulating the amplitude of the
video voltage VO between 0 and its maximum value.
Because the pixel does not remain charged indefinitely (due to leakage currents in
both the transistor and the liquid crystal itself) the display needs to be refreshed
periodically. Moreover, to avoid flicker effects, the refresh frequency should be at
least 50 Hz.
In practice, the frame period used is less than or equal to 20 ms. The columns are
addressed alternately by positive and negative video voltages to cancel out
eletrolysing effects on the liquid crystal cell.
The counter--electrode voltage VCE changes for each successive frame. All the other
voltages are referenced to this change. The video is inverted at each frame.
This causes a change of the voltage at the pixel from VO to VCE and vice versa
during each frame.
Cathode Ray Tubes
Refer to Figure 8.
A cathode ray tube (CRT) is an evacuated glass tube that produces images by
focussing an electron beam on phosphors, which coat the screen area.
The brightness of the display is determined by the current in the beam. The beam is
directed by either electrostatic or magnetic deflection circuits built around the neck of
the CRT.
A display is created by systematically sweeping the beam across the entire surface
of the screen while varying the intensity. A pattern is traced on the screen showing
graphically the changes of the electrical input. The cathode ray tube is mainly an
indicating device.
The CRT has many uses, e.g. displaying current and voltage waveforms in the
oscilloscope, as the display of a radar set or for presenting a television picture. In the
latter case, the brightness of the spot is changed as well as its position on the
screen.
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 6
Module 5
5.11
Essential Elements of the CRT

The important elements of a CRT may be listed as follows:
V an electron gun which fires the electrons at a fluorescent screen
V a means of focussing the electrons so that they arrive at the screen at a
single point; electrostatic or magnetic focussing may be used
V a means of deflecting the electron beam; electrostatic or magnetic deflection
may be used
V a screen which becomes luminescent under the impact of the electron beam.
The Electron Gun
Refer to Figure 9.
When a cathode is heated, it emits electrons. In the CRT (as in a valve) the source of
electrons is a cathode. But in the case of the CRT this cathode is specially designed
so that it emits electrons in one direction and from one end only.
The first step in the formation of an electron beam is the production of a stream of
electrons which all travel into the same direction. This is done by using suitable
voltages to a specially--shaped control grid and anode, which are placed on the same
axis as the cathode.
The anode is merely a metal disc with a hole in its centre. The control grid (which
surrounds the cathode) is a metal cylinder with a hole cut in the centre of its
end--plate. The holes in the anode and grid are aligned with the cathode to form an
obstruction--free path along which the stream of electrons can pass.
When a positive voltage is applied to the anode, the electrons emitted by the cathode
will be accelerated towards it. lf, at the same time, a negative voltage is applied to the
grid, the moving electrons will be concentrated into a beam along the axis of the
three electrodes. Most of the electrons will pass through the hole in the centre of the
anode.
The density of the electron--beam, i.e. the number of electrons which pass through
the anode and strike the fluorescent screen, can be altered by varying the negative
voltage applied to the grid. As the brilliance of the spot formed on the screen
depends partly on the number of electrons which strike it, the negative voltage
applied to the grid is an obvious choice for use as a brilliance control.
Focussing
The beam of electrons produced by this system of electrodes begins to spread out as
it leaves the hole in the centre of the accelerating anode. A diverging beam like this
would produce a comparatively large illuminated area when it struck the screen of
the CRT, whereas what is needed is a small spot.
The electrons must then be focussed so as to form a converging beam which will
eventually become so narrow as to finish up as a mere point on the screen.
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 7
Module 5
5.11
Cathode ray tubes are of either of two main focussing types:

V electrostatic tubes, in which focussing and deflection are due to the action of
electric fields
V magnetic tubes, in which focussing and deflection are carried out by the
action of magnetic fields.
Both these types are in common use. However, tubes are not rigidly classified in this
way since there are changes for different purposes. Like TV screens, displays being
used in aircraft are based on magnetic deflection.
Magnetic focussing relies on the fact that, when an electron enters a magnetic field,
its direction of movement is changed. The amount of this change of direction
depends on the strength of the field.
In this method of focussing, a current is passed through a coil placed round the neck
of the tube. The shape and strength of the resulting magnetic field will depend on
three factors:
V the size of the coil
V the exact location of the coil along the CRT
V the amount of current flowing through the coil.
Electro--Magnetic Deflection
Refer to Figure 10.
The electro--magnetic method of deflection uses on the same principle as the
electro--magnetic method of focussing. Electrons are deflected when they come
under the influence of a magnetic field.
A set of deflection coils is placed around the outside of the neck of the CRT in such a
way, that the axis of their magnetic fields is at right angles to the path of the electron
beam. The amount of current passing through these deflecting coils determines the
strength of the magnetic field produced.
The vertical deflecting coils are wound in such a way that their fields reinforce one
another in producing an even magnetic field. The horizontal deflecting coils are
wound similarly. The result is to produce an even deflection sensitivity over the
entire screen.
The Screen
Refer to Figure 11.
The only point not yet explained is the coating round the inside of the tube just in
front of the screen. This coating is formed by painting a solution of graphite on the
inside of the tube and allowing it to dry.
A voltage is applied to the coating similar to that applied to the second anode, which
gives the electrons a return path to earth close to the screen and stops them from
building up into a space charge near the screen (which would tend to defocus the
beam). The coating also effectively screens the beam from external electrostatic
fields.
Module 5
Preliminary
Notes
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 8
In some CRTs, the graphite coating is applied in a thin ring close to the tube face. lf a
much higher voltage is applied to this coating than is applied to the second anode,
the electrons will be accelerated after they have passed the deflecting plates.
Because they are travelling faster, they will possess more energy, so increasing the
brightness of the spot.
This use of the graphite coating as a final anode is known as post--deflection
acceleration (PDA). PDA is used in tubes in which changes in the shapes of the
waveform occur very quickly (in the region of micro--seconds).
An effect similar to PDA can be done by increasing the voltage on the second anode.
But this would mean that the electrons would pass the deflecting plates much faster,
and so would be deflected to a lesser extent. Deflection sensitivity would then be
reduced.
Looking from the front of the tube, the rear of the phosphorus is coated with
aluminium. This coating serves two functions: it increases the contrast of the picture
because no light can penetrate to the rear of the tube and brighten the background.
Because of the beam electrons colliding with remaining air molecules, ions are
produced which are not deflected (because of their higher mass) and would cause
the phosphorus at the centre of the screen to be quickly destroyed. To stop this the
ions remain on the aluminium coating.
The inner and outer of the cone is coated with a conductive layer. The outer coat is
connected to ground. The inner is connected via a steel wire. This wire passes
through the glass and is connected to the anode and hence the anode voltage.
Both conducting layers and the glass between them function as a condenser which
can supply voltage long after the equipment is switched off.
Colour Picture Tubes
All colours are a product of the primary colours, red, green and blue. The illumination
layer of the screen consists of three different phosphors, applied to the inside of the
picture screen (either in the form of points or lines). When these phosphors are hit by
electrons, they illuminate in a particular primary colour.
The composition of compound colours are:
V red
green
yellow
V red
blue
purple (magenta)
V green +
blue
cyan
V blue
green
red =
white.
An aluminium layer with a thickness of few mm is located behind the phosphorus.

A mask having the same form and curvature as the illumination layer is mounted
approx. 15 mm from the screen. A special type of mask, the TRINITRON mask,
consists of harp--like tensioned wires which are mounted vertically.
The frame is made of a steel plate and fastened with special bimetal springs (inside
the glass tube). The frame is under mechanical tension causing the wires to remain
taut (tight).
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 9
Module 5
5.11
Refer to Figure 12.

The three electron guns produce three separate electron beams. There are
three separate optics with a common focus. The beam intensity is controlled as in a
black--and--white tube. The focus voltage, however, differs greatly (the colour tube
has a much greater voltage). After focussing, the three electron beams move almost
parallel through the deflection field.
They are deflected together in the X or Y direction. The three beams converge at the
mask and cross. For every three colour strips (blue, green and red) there exists one
wire. This wire allows only the electrons of that gun to pass the phosphorus of which
is to be effected.
Colour picture tubes are sensitive to the influence of exterior magnetic fields. As the
beams are magnetically controlled, exterior fields lead to colour impurities.
Principles of Picture Transmission
An electron beam starts in the left--hand corner and moves horizontally across the
screen. This action is called a horizontal scan. The beam is then blanked (or turned
OFF) to avoid interference with the display on the screen, and turned to the left side
to start another scan. The time for this horizontal retrace is much shorter than the
scan time.
During the horizontal scans, the beam slowly moves down the screen until it reaches
the bottom. At this point, the beam has made many horizontal scans and one vertical
scan. The beam is then blanked and rapidly returned to the top to start another
vertical scan.
A further method is used to present a flicker--free picture, the interlaced scanning
technique.
Refer to Figure 13.
Commonly, two types of raster scanning are used in CRTs:
V interlaced
V non--interlaced.
In the interlaced method all odd--number lines are transmitted first (starting with line
1). Then the even--number lines are transmitted (starting with line 2). This works well
in TV applications where colours and shadings change gradually. Two scans are
made down the screen for one single picture (or: frame). Both scans overlap (or
interlace) into a single frame.
In European TV systems, there are 262.5 horizontal lines per scan and a total of
525 lines per frame. The scan rate is 50 Hz and the frame rate is 25 Hz. The frame
frequency was derived in the initial stages of television from the mains frequency
(50 Hz) giving 50 half frames per second.
In the display of characters however, non--interlaced scanning is more commonly
used. In non--interlaced scanning the beam starts on the same scan line each time
so that the frame rate is 50 Hz (in European systems).
Preliminary
Notes
Module 5
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 10
Higher density displays are needed for some of the more advanced terminals. Future
developments will surely use the interlaced method. To get more characters on the
screen, some data CRTs use a higher sweep frequency.
The horizontal oscillator frequency can range from 15,720 Hz (which gives 262 scan
lines per scan) to 50,000 Hz (which gives 833 scan lines).
Refer to Figure 14.
To generate a legible display, the horizontal and vertical oscillators must be kept in
step with each other and with the displayed information. This is done by generating a
horizontal sync and a vertical sync signal. Each of these causes its oscillator to be
reset and starts the beam over again at precisely the correct time.
As the beam scans off the edge of the screen, it must be blanked until it reaches the
position where data is to be displayed. The beam must also be blanked during
retrace both in the horizontal and vertical directions. The signal that controls the
electron beam is called blanking or display enable.
Character Generation
Refer to Figure 15.
The most common method of generating characters is to create a matrix of dots, x
dots (or columns) wide, and y dots (or rows) high. Each character is created by
selectively filling in dots.
As x and y get larger, a more detailed character can be created. Two common dot
matrices are 5 by 7 and 7 by 9. Characters require some space between them, so
they are placed in a character block that is larger than the character.
Refer to Figure 16.
As the electron gun of the CRT scans one line across the screen, it displays the first
row of dots for each character on that character line. On the next scan, the second
row of dots and spaces for each character are displayed. Then this sequence is
repeated for every character line on the screen.
Digital Techniques
Electronic Display
5.11.1 - HO - 11
Module 5
Preliminary
Notes
5.11
a) Seven segments
F
A
G
C
D No.of segments 6 2 5
b) 13 and 16 segments
c) 4--by--7 matrix
E 0671 B
7 rows
4 columns
Figure 1
Electronic Alphanumeric Displays
Digital Techniques
Electronic Display
5.11.1 - HO - 12
Module 5
Preliminary
Notes
5.11
Protective cover/
diffuser lens
Crystal chip
+
Connections
Reflective cavities
LED
Diffuser plate
Effective
segment
height
E 0672 A
Plastic overlay
Circuit board
Figure 2
Plastic overlay
Light--Emitting Diode
Digital Techniques
Electronic Display
5.11.1 - HO - 13
Module 5
Preliminary
Notes
5.11
+5 V
Figure 3
3.0
2.5
2.0
1.5
1.0
0.5
E 0673 A
Relative luminous intensity
TTL gate
10 20 30 40 50
Forward current -- mA
LED Driving Circuit
Digital Techniques
Electronic Display
5.11.1 - HO - 14
Module 5
Preliminary
Notes
5.11
a) LED array and array drives
These pins are common to

all anodes in each row
These pins are common to

all cathodes in each column
Pin 3
dp
Individual LED
b) Engine speed indicator with a dot matrix LED
40 60
20 N2 80
Figure 4
100
FE 0674 A
%RPM
Display of Data by LEDs
Digital Techniques
Electronic Display
5.11.1 - HO - 15
Module 5
Preliminary
Notes
5.11
7--segment electrode
Front plate
Liquid crystal
layer
(typical spacing
= 10 microns)
Back plate
Segment contacts
Common return
contact
FE 0675 A
Mirror image
(not segmented)
Figure 5
Basic Structure of an LCD
Digital Techniques
Electronic Display
5.11.1 - HO - 16
Module 5
Preliminary
Notes
5.11
VO
Column
(source)
TFT
(thin--film transistor)
VG
Row (gate)
Liquid crystal
VCE
E 0676 A
Counter--electrode
Figure 6
Operating Principle of an
Active--Matrix LCD
Digital Techniques
Electronic Display
5.11.1 - HO - 17
Module 5
Preliminary
Notes
5.11
Upper glass plate
Counter--electrode
Row electrode
Lower glass plate

Column
electrode
Pixel electrode
E 0677 A
TFT
Figure 7
Cross--section of an Active--Matrix LCD
Digital Techniques
Electronic Display
5.11.1 - HO - 18
Module 5
Preliminary
Notes
5.11
Glass envelope
Permanent magnets
(beam focussing)
Grid
Screen
Heater
Anode
Electron
beam
Deflecting
coils
E 0678 A
Cathode
Graphite coating
(collects secondary electrons
to prevent screen from becoming
negatively charged)
Figure 8
Cathode Ray Tube
Digital Techniques
Electronic Display
5.11.1 - HO - 19
Module 5
Preliminary
Notes
5.11
Hollow cylinder
(grid)
Divergent
beam of
electrons
Metal disc
(acceleration anode)
E 0679
Cathode
Figure 9
Electron Gun
Horizontal
deflection
Electron beam
E 0680 B
Cathode
Grid
Vertical
deflection
Phosphor--coated
screen
5.11
Figure 10 Electromagnetic Deflection
Digital Techniques
Electronic Display
5.11.1 - HO - 20
Module 5
Preliminary
Notes
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 21
Module 5
5.11
Electron guns
Three electron beams
Shadow mask
Glass faceplate
FB 4616 C
Mask aperture
Phosphor line screen
Figure 11 Tricolour In--Line Picture Tube
Digital Techniques
Electronic Display
5.11.1 - HO - 22
Module 5
Preliminary
Notes
5.11
FB 3156
R G B
Shadow mask
Coating
Figure 12 Colour Picture Generation
Preliminary
Notes
Digital Techniques
Electronic Display
5.11.1 - HO - 23
Module 5
5.11
a) Non--interlaced
b) Interlaced
Line 1
FE 0682 A
Line 2
Figure 13 Interlaced and Non--Interlaced Raster

Scanning
Module 5
Preliminary
Notes
5.11
Digital Techniques
Electronic Display
5.11.1 - HO - 24
Blanking
H -- sync
A
Line
Display period
Horizontal
retrace
period
V -- sync
Blanking
E 0683
Vertical retrace period
Figure 14 Controlled CRT Display
Digital Techniques
Electronic Display
5.11.1 - HO - 25
Module 5
Preliminary
Notes
5.11
Row select truth table

RS2
RS1
RS0
Output
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
R0
R1
R2
R3
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
R4
R5
R6
R7
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
R8
R9
R10
R11
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
R12
R13
R14
R15
Row
no.
D6
D0
R15
R14
R13
R12
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
E 0684
RS3
D6
D0
Figure 15 A 7 by 9 Dot Matrix in a 9 by 16

Character Block
Module 5
5.11
1
2
3
4
5
6
7
8
9
Digital Techniques
Electronic Display
5.11.1 - HO - 26
E 0685
Scan lines
Preliminary
Notes
Figure 16 Dot Matrix Scanning (5 by 7 Characters)
Preliminary
Notes
Module 5
5.12
5.12
Electrostatic--Sensitive Devices
5.12.1
Handling Precautions
5.12.1.1
Electrostatic Charges
Digital Techniques
5.12.1 - HO - 1
A typical working environment for electronic component handling showing potential

electrostatic discharge (ESD) hazards, is documented in Figure 1.
Electrostatic charges can be stored in many things; e.g.
V man--made fibre clothing
V plastic storage bins
V sheet of paper stored in plastic envelopes
V paper from electrostatic copying machines
V people.
The charges are caused by friction between two surfaces, at least one of which is
non--conductive. The magnitude and polarity of the charges depend on the
V different affinities for electrons of the two materials rubbing together
V friction force
V humidity of surrounding air.
Electrostatic discharge (ESD) is the transfer of an electrostatic charge between
bodies at different potentials and occurs with direct contact or when induced by an
electrostatic field.
Mostly all pins of semiconductor devices are protected against electrostatic discharge.
5.12.1.2
Workstation for Electrostatic--Sensitive Devices

Figure 2 shows a working area suitable for safely handling electrostatic--sensitive
devices. It has a workbench, the surface of which is conductive and anti--static.
The floor should also be covered with anti--static material.
The following ESD precautions should be observed when handling semiconductors:
V Persons at a workbench should be earthed via a wrist strap and a resistor.
V All mains--powered equipment should be connected to the mains via an
earth--leakage switch.
V Equipment cases should be grounded.
V Relative humidity should be maintained between 40 and 50 %.
V An ionizer should be used to neutralize objects with immobile static charges
in case other solutions fail.
V Keep static materials, such as plastic envelopes and plastic trays etc., away
from the workbench. If there are any such static materials on the workbench,
remove them before handling the semiconductor devices.
Preliminary
Notes
5.12.1.3
Module 5
5.12
Digital Techniques
5.12.1 - HO - 2
Receipt and Storage of Components

Electrostatic--sensitive devices are packed for despatch in anti--static/conductive
containers, usually boxes, tubes or blister tape. Warning labels on both primary and
secondary packing show that the contents are sensitive to electrostatic discharge.
Such devices should be kept in their original packing whilst in storage. If a bulk
container is partially unpacked, the unpacking should be done at a protected
workstation. Any components that are stored temporarily should be packed in
conductive or anti--static packing or carriers.
5.12.1.4
PCB Assembly
Electrostatic--sensitive devices must be removed from their protective packing with
grounded component--pincers or short--circuit clips. Short--circuit clips must remain in
place during mounting, soldering and cleansing/drying process. Dont remove more
components from the storage packing than are needed at any one time.
Production/assembly documents should state that the product contains electrostatic-sensitive devices and that special precautions need to be taken. During PCB
assembly, ensure that the electrostatic--sensitive devices are the last of the components to be mounted and that this is done at a protected workstation
All tools used during PCB assembly, including soldering tools and solder baths, must
be grounded. All hand--tools should be of conductive or anti--static material and,
where possible, should not be insulated.
5.12.1.5
Testing PCBs
Completed PCBs must be tested at a protected workstation. Place the soldered side
of the PCB on conductive or anti--static foam and remove the short--circuit clips.
Remove the PCB from the foam, holding the board only at the edges. Make sure the
PCB doesnt touch the conductive surface of the workbench.
After testing, replace the PCB on the conductive foam to await packing.
Assembled circuit boards containing electrostatic--sensitive devices should always be
handled in the same way as unmounted components. They should also carry
warning labels and be packed in conductive or anti--static packing.
Potential ESD Hazards
Nylon overall
Plastic table top
Plastic storage bins
Figure 1
Plastic envelopes
Plastic trays
Air blowing over table top
B 8008
5.12
Nylon carpet or plastic flooring
Digital Techniques
5.12.1 - HO - 3
Module 5
Preliminary
Notes
Supply
earth
Distribution
supply box
Figure 2
ESD--Protected Workstation
Ground Conductive floor mat
1 M9
Strap (resistance between

0.9 M9 and 5.0 M9
Conductive stool
Conductive boots or
heel grounding protectors
5.12
1 M9
Conductive
bench top
1 M9
Cotton overall
Electrostatic
voltage sensor
Module 5
Common reference point
Safety
isolation
transformer
Conductive
compartment trays
B 8009
Preliminary
Notes
Digital Techniques
5.12.1 - HO - 4
Preliminary
Notes
Digital Techniques
Software Management
5.13.1 - HO - 1
Module 5
5.13
5.13
Software Management Control
5.13.1
Introduction to Software Management Control
General Information
Refer to Figure 1.
A digital line replaceable unit (LRU) is a black box of electronics, for a complex
engineered system like an aircraft, ship or other vehicle.
Every digital LRU (line replaceable unit) consists of:
V Hardware
-- that comprises all of the physical parts, as distinguished from the data it
contains or operates on.
V Software
-- that provides instructions for the hardware to accomplish tasks.
Hardware
LRUs speed up repair, because they can be replaced quickly, restoring the big
system to service. They also reduce the cost of systems, and increase the quality,
by spreading development costs of the type of unit over different models of vehicles.
LRUs are designed to specifications. The specification defines the inputs and
outputs. It also defines the tools to replace the unit (usually nothing more than a
screwdriver), and the bulk and weight (they always need to be carried by one man,
and fit through a door, if possible).
There are also requirements for flammability, unwanted radio emissions, resistance
to damage from fungus, static electricity, heat, pressure, humidity, condensation
drips, vibration, radiation and other environmental measurements.
Many LRUs for commercial aircraft are designed according to ARINC specifications.
ARINC (Aeronautical Radio Incorporated) is a company owned by a number of
airlines, that sells specifications and sets standards. LRUs are also defined by
aviation manufacturers, or various military organizations.
Software
Software is essentially a computer program encoded in such a fashion that the
program (the instruction set) contents can be changed with minimal effort.
Software can have various functions such as controlling hardware, performing
computations, communication with other software, human interaction, etc; all of
which are prescribed in the program.
Digital Hardware Components
Digital components are electric circuits based on a number of discrete voltage levels.
In most cases there are two voltage levels: one near to zero volt and one at a higher
level depending on the supply voltage in use. These two levels are often represented
as L and H.
Module 5
Preliminary
Notes
5.13
Digital Techniques
Software Management
5.13.1 - HO - 2
Development examples of digital components are:

V CPU (central processing unit)
--
A CPU refers to part of a computer that interprets and executes instructions and data contained in software. The more generic term processor is
sometimes used to refer to a CPU as well.
V Memory address register

--
A memory address register is the register of a computers control unit that

contains the address of a register to fetch or store from or to the computer storage.
The memory address register is half of a minimal interface between a
microprogram and computer storage. The other half is a memory data
register.
V RAM (random access memory)

--
A RAM is a type of computer storage (in practice only computer chips)

whose contents can be accessed in any (i.e., random) order.
RAM is typically used for primary storage (main memory) in computers to
hold actively used and actively changing information, although some
devices use certain types of RAM to provide long--term secondary
storage.
V ROM (read only memory)

--
A ROM is used as a storage medium in computers. Because it cannot

(easily) be written to, its main uses lie in the distribution of firmware (software that is very closely related to hardware, and not likely to need frequent upgrading).
V UV EPROM
--
The original erasable non--volatile memories were EPROMs; these could

be readily identified by the distinctive quartz window in the centre of the
chip package.
These operated by trapping an electrical charge on the gate of a
field--effect transistor in order to change a 1 to a 0 in memory.
To remove the charge, one would place the chip under an intense
short--wavelength fluorescent ultraviolet lamp for 20--30 min, returning the
entire chip to its original blank (all ones) state.
V EEPROM (electrically erasable programmable read only memory)

--
An EEPROM is a non--volatile storage chip used in computers and other

devices. Unlike EPROMs, EEPROMs can be programmed and erased
electrically.
V EPROM
--
An EPROM, or erasable programmable read only memory, is a type of

computer memory chip that retains its data when its power supply is
switched off. In other words, it is non--volatile. A programmed EPROM
retains its data for about ten to twenty years and can be read an unlimited
number of times.
Module 5
Preliminary
Notes
5.13
Digital Techniques
Software Management
5.13.1 - HO - 3
V Decoder
--
A decoder is a device which does the reverse of an encoder, undoing the

encoding so that the original information can be retrieved. The same
method used to encode is usually just reversed in order to decode.
In digital electronics this would mean that a decoder is a multiple--input,
multiple--output logic circuit that converts coded inputs into coded
outputs, where the input and output codes are different (BCD decoder).
Program Interchange
Program interchange can be performed by:
V Portable data loader (PDL)
V Airborne data loader (ADL)
V Control display unit (CDU)
V Onboard Replace Modules (OBRM).
Portable Data Loader
Refer to Figure 2.
A portable data loader has direct access to the LRU via a test socket. Digital data
interchange is usually performed by means of a floppy disc.
A modern PDL (Figure 2) is capable of performing LRU data loading with or without
the use of floppy discs. The PDL includes an internal mass storage device that can
host the loadable software for an airlines entire fleet.
Airborne Data Loader
Refer to Figure 3.
An airborne data loader is mounted in the aircraft. It is used to upload and download
software and data from/to on--board computers. A typical ADL can load navigation
databases and operational flight programs as well as perform multi--volume data
recording and blank disk formatting.
Control Display Unit
Refer to Figure 4.
Program interchange is performed under the use of the menu programming on the
control display unit. After the password is entered the changes can be carried out by
the keyboard.
Onboard Replace Modules
Onboard replaceable modules, that contain the software to be interchanged, are
located on the front panel of the LRU. They are replaceable by maintenance
personnel.
Module 5
5.13
Digital Techniques
Software Management
5.13.1 - HO - 4
C 0090
Preliminary
Notes
Figure 1
Installation of a LRU (Example)
Module 5
5.13
Digital Techniques
Software Management
5.13.1 - HO - 5
C 0091
Preliminary
Notes
Figure 2
Portable Data Loader (Example)
Module 5
5.13
Digital Techniques
Software Management
5.13.1 - HO - 6
C 0092
Preliminary
Notes
Figure 3
Airborne Data Loader (Example)
Module 5
5.13
Digital Techniques
Software Management
5.13.1 - HO - 7
C 0093
Preliminary
Notes
Figure 4
Control Display Unit (Example)
Preliminary
Notes
Digital Techniques
Software Management
5.13.2 - HO - 1
Module 5
5.13
5.13.2
Software Definition, Handling and Modification
5.13.2.1
Software Definition
Onboard Loadable Software Categories

Many newer aircraft feature loadable systems whose functionality may be changed
or updated using onboard loadable software. Modifying system functionality with new
software instead of with modified or new hardware can help operators reduce the
total number of hardware line LRU in inventory, increase hardware commonality,
and reduce airplane modification time.
Loadable software falls into several categories according to function:
V Operational program software (OPS)
V Operational program configuration (OPC)
V Database
V Airline modify--able information (AMI).
Operational Program Software (OPS)
The operating system of an LRU, the OPS acts on data contained in the operation
program configuration (OPC) files to define the function of the LRU. The OPS is
typically the largest, most complex software associated with an LRU, both in the
amount of information it contains and the time required to load the software.
Obtaining certification for new versions of an OPS requires commensurate time and
effort.
Operational Program Configuration (OPC)
This software is a specialized database that determines the LRU configuration and
function by enabling or disabling optional features contained in the OPS. Configuration information is also supplied to many LRUs through hard--wired discretes
(program pins).
The large number of possible combinations of software and program--pin configurations complicates configuration management. Though an OPC will probably never
completely replace program pins, as much configuration information as possible is
placed in the OPC.
The OPC is small compared to the OPS and typically requires less than one minute
to load.
Database
A database is a collection of data arranged for easy access and retrieval by the
operating system of an LRU. Some of the databases used by software loadable
LRUs are:
V Flight management computer (FMC) navigation database (NDB)
V FMC model/engine database
V FMC performance defaults database
V FMC quick reference handbook takes--speeds database
Preliminary
Notes
Digital Techniques
Software Management
5.13.2 - HO - 2
Module 5
5.13
V Airborne communications addressing and reporting system database

V Common display system display--unit database
V Digital flight data acquisition unit (DFDAU) mandatory database
V DFDAU ARINC 429 broadcast database.
The NDB, which is quite familiar to operators, is a database of navigation and route
information used by the FMC to carry out navigation tasks. NDB software is typically
revised every 28 days and becomes available approximately one week before it
becomes effective. Unlike other loadable software, the NDB is date controlled as
opposed to part number controlled.
Airline Modify--Able Information (AMI)
AMI is another small data file that supplies information to the OPS of some LRUs.
The operator generates the AMI data file to specify preferences for functions such as
cabin management data recording, report generation and formatting, and services
provided to the various passenger seating zones
AMI data files are used by some LRUs to provide information used by the OPS.
On some airplanes, for example, when data needs to be recorded or formatted,
reports generated, or seating zone services specified, the appropriate OPS refers to
the AMI data file for the necessary information to accomplish the task.
An AMI data file is typically data rather than programs or executable code. However,
AMI data files for some systems include logic units, which are high--level program
code.
To what extent AMI data files can be modified is controlled by the certified OPS of the
LRU, which prevents operator modifications from affecting safety, regardless of
whether the modifications are correct. It is only on this basis that such modification is
permitted without certification authority review.
Software Level Definition
The RTCA document
V Guidelines for Development of Aviation Software
has become a de facto standard and is the accepted means of certifying all new
aviation software. The document is primarily concerned with development processes.
As a result, certification to this document requires delivery of multiple supporting
documents and records.
The quantity of items needed for certification, and the amount of information that they
must contain, is determined by the level of certification being sought.
The targeted certification level is either A, B, C, D or E. Correspondingly, these levels
describe the consequences of a potential failure of the software:
V Catastrophic
V Hazardous--severe
V Major
V Minor
V No effect.
Preliminary
Notes
Module 5
5.13
Digital Techniques
Software Management
5.13.2 - HO - 3
The certification process is most demanding at higher levels. A product certified to

level A would have the largest potential market, but it would require thorough,
labor--intensive preparation of most of the items on the support list.
Conversely, a product certifying to level E would require fewer support items and be
less taxing on company resources. Unfortunately, the product would have a smaller
range of applicability than if certified at a higher level.
5.13.2.2
Software Handling and Modification
Introduction
Onboard loadable software allows operators to change the configuration of loadable
systems without physically modifying or replacing hardware components. Benefits
include the ability to meet new requirements, incorporate design improvements, and
correct errors.
In addition, software often can be loaded just in the time required to turn an airplane
around for the next flight. A main advantage of changing system functionality without
changing hardware is the reduced number of LRU spares in stock.
It is cost effective to preload the LRUs for some systems before installation on the
aircraft. The total time required to configure a complete system can be significant.
For example, loading aircrafts integrated display units (IDU) requires 15 minutes
each, for a total of 90 minutes, if each IDU is loaded successfully on the first attempt.
Many systems comprise hardware and software components. A loadable system is
different because it consists of loadable software parts and loadable (hardware)
LRUs that are independently configured at the aircraft level.
Software can be transferred into a software--loadable LRU using various equipment
as already mentioned. A few systems can be onboard--loaded by inserting the
medium into the LRU itself. The appropriate equipment used to load an LRU
depends on the system.
For all loadable systems, the software parts installed as part of the system are
identified electronically; a placard is not required on an LRU to identify what software
parts are loaded in that LRU.
Spare copies of the loadable software parts are supplied on digital storage media
(typically 3.5--in disks) when an airplane is delivered. These media parts are located
in a binder stored on board the aircraft. In modern aircraft, the maintenance access
terminal (MAT) includes a mass storage device as standard equipment.
This mass storage device also stores spare copies of the loadable software parts for
systems that can be loaded from the MAT.
To operate and maintain an aircraft that contains software loadable systems,
operators first must implement several procedures to accomplish the following:
V Procure loadable software parts and loadable LRUs.
V Manage software libraries.
V Preload loadable software parts into loadable LRUs off the aircraft.
V Verify conformity of loadable software part configurations to aircraft certification documentation.
Preliminary
Notes
Module 5
5.13
Digital Techniques
Software Management
5.13.2 - HO - 4
Loadable Software Parts and LRUs

A loadable software part is identified by a unique part number, distinct from the part
number of the hardware component (the LRU) or components in which the software
is loaded. Hardware part numbers listed in the illustrated parts catalogue (IPC) refer
to the physical component only, with no software loaded.
To order a loadable LRU with the software preloaded, the operator must order both
the software and hardware part numbers and stipulate that the software is to be
loaded into the LRU.
The part number of a software program or file is distinct both from the part number
for the media set and the part number for the hardware LRU.
The media set part number may represent one media part or a set of two or more
media parts. The media parts are labelled to indicate how many parts are in the set,
and to identify the designation of each member in a set (for example, 1 of 2, 2 of 2).
The standard media parts are 3.5--in disks, but software for some systems is
supplied on other media, such as on CD--ROM. As a result of operator requests,
beginning in 1999 loadable software will be listed in the IPC according to the
loadable software part number and will be called out in the chapter corresponding to
each loadable system.
The disk part number associated with a loadable software part number will be
referenced in the nomenclature field of each software part number.
Loadable software will be shown in the IPC according to the loadable software part
number, because this is the part number that the mechanic must verify is installed in
an LRU. However, operators must order loadable software parts by specifying the
disk set part number.
Management of Software Libraries
It is recommended that operators establish and maintain a software control library (or
libraries) for storing back--up copies of loadable software, associated documentation,
and any media binders that are not kept on an airplane.
Using a software control library can help operators ensure the availability and
integrity of loadable software parts to support their airplanes. Operators must obtain
necessary permission from the supplier before duplicating software, storage media,
or documentation.
Each aircraft is provided with media parts which are packaged in a binder or set of
binders. The standard media type is a 3.5--in disk, but the generic term is media set.
Each media set has its own part number, which is different from the software part
number or part numbers of its components.
In addition to the media sets delivered with the airplane, a supplier for a loadable
system will provide up to ten additional media sets (per part number) upon operator
request.
The binder containing the loadable software is considered part of the certified
configuration of the airplane and so is intended to be stored on the aircraft.
The binders, binder pages, and media sets have unique part numbers and can be
ordered using the same process as for any other spare.
Preliminary
Notes
Module 5
5.13
Digital Techniques
Software Management
5.13.2 - HO - 5
Preloading Loadable Software Parts

Whenever a loadable LRU is replaced, the loadable software configuration certified
for the airplane on which it is installed must be loaded into the replacement LRU.
The operator may request that the supplier load specific software parts when an LRU
is ordered or repaired.
To save time, the appropriate software can also be loaded in the operators maintenance shop using shop--loading equipment. If an LRU is loaded with software in the
operators maintenance shop and returned to stores, it may be desirable to document
the software configuration with a tie--on tag to assist with inventory control.
However, the tie--on tag must be removed after the LRU is installed, and the software
configuration must be electronically verified as specified in the aircraft maintenance
manual removal and installation procedure for each software--loadable LRU.
Conformity of Loadable Software
The operator must implement procedures to control updates and modifications to
loadable systems that occur after the airplane is delivered. The part numbers of the
software loaded into a loadable system are part of the type certificate of the airplane.
The operator must ensure that the configuration control documentation for each
airplane reflects the current configuration of loadable software parts, and that the
loadable software parts are certified for the airplane on which they are installed.
Loadable software requires the same configuration control as airplane hardware
components. The software part numbers that are part of the delivered configuration
of an airplane are documented in the engineering drawings provided with the
airplane at delivery.
In addition, a report listing the software part numbers delivered with a particular
airplane is provided as an attachment to the airplane readiness log.
However, this report, as well as the IPC, will not reflect any rapid revisions (RR)
incorporated on a particular airplane that affected loadable software parts. The
operator should review all RRs incorporated on a particular airplane for an accurate
understanding of the certified configuration.
The software loaded on a loadable LRU is reported electronically, so a marking on
the LRU is not necessary. To verify that the appropriate software parts are installed,
it must be possible to confirm that the appropriate software is loaded while the
component is installed in the airplane. Relying on placards or other markings to
determine the part number of the software loaded in a component is not recommended.
To confirm that the proper part number is loaded in a component, the operator should
verify component status electronically by reading the part number from a front panel
display, MAT, control display unit, or other device designed for that purpose.
The operators configuration control processes should ensure that the configuration
of software part numbers installed on each airplane is documented.
This documentation should be updated when service bulletins or other changes are
incorporated and should be available when needed. Personnel should be trained and
aware of the airlines configuration control processes and the importance of
maintaining the certified configuration of loadable software parts.
Preliminary
Notes
Module 5
5.14
5.14
Electromagnetic Environment
5.14.1
EMC -- Electromagnetic Compatibility
Digital Techniques
E/M Environment
5.14.1 - HO - 1
Nature of Electromagnetic Compatibility

Electromagnetic compatibility (EMC) means that a device is compatible with
(i.e., no interference is caused by) its electromagnetic (EM) environment and it does
not emit levels of EM energy that cause electromagnetic interference (EMI) in other
devices in the vicinity.
A medical devices can be vulnerable to EMI if the levels of EM energy in its
environment exceed the EM immunity (resistance) to which the device was designed
and tested. The different forms of EM energy that can cause EMI are conducted,
radiated, and electrostatic discharge (ESD).
EMC is the branch of electrical sciences which studies the unintentional generation,
propagation and reception of electromagnetic energy with reference to the unwanted
effects that such an energy may induce.
In particular, the aim of EMC is the correct operation, in the same environment,
of different equipments which involve electromagnetic phenomena in their operation.
As most workers in the field understand, electromagnetic compatibility describes a
state when the electromagnetic environments produced by natural phenomena and
other electrical and electronic devices do not cause interference in electronic
equipment and systems.
Of course to reach this state, it is necessary to reduce the emissions from sources
that are controllable, to increase the immunity of equipment that may be affected,
or to do both.
It is important to understand that EMC as defined does not absolutely prevent
interference from occurring. Rather, it is recognized that emissions from various
sources are variable (e.g. lightning impulses on power lines vary with the level of
lightning current and its distance from a home or office).
In addition, the immunity of a particular piece of equipment can vary (e.g. induced
voltages on a circuit board are strong functions of the angle of incidence and
polarization of the incident EM field).
This variability results in a situation where a balance is found between immunity and
emissions for a particular type of disturbance to prevent problems in a large
percentage (but not all) of the cases of interest.
To try to eliminate all problems (by decreasing emissions and increasing immunity
further) could create a high cost to industry and could prevent new technologies from
emerging.
For example a restriction to lower the transmitting power of cell phones so that
consumers could lay their cell phones on top of any piece of electronic equipment
could compromise the performance and economic viability of cell phone systems.
Digital Techniques
E/M Environment
5.14.1 - HO - 2
Module 5
Preliminary
Notes
5.14
On the other hand, a requirement that all commercial electronic equipment perform
without malfunction at levels of 50 V/m, would place a financial burden on a large
range of equipment.
A good compromise is to warn consumers of reasonable restrictions, although
special actions may be necessary when malfunctions could cause a threat to human
safety.
The frequency range of interest in EMC studies is usually from 100 -- 1011 Hz and the
time scales of interest from 100 -- 10 --12 s. Depending on the sources and the
systems being affected the currents of interest have a range 10 --9 -- 106 A and
electric fields have a range 10 --7 -- 107 V/m.
Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI)
Refer to Figure 1.
Electromagnetic interference (EMI) and radio frequency interference (RFI) are
usually caused by the rapid switching action of semiconductors, relays, etc. resulting
in undesirable currents and voltages. These affect the reception of broadcasts and
can lead to the malfunctioning of other sensitive electrical and electronic equipment.
Electromagnetic interference refers to noise spread over the whole electromagnetic
spectrum. Radio frequency interference refers to noise over the part of the spectrum
used specifically for broadcasting.
Inverters etc. cause very severe interference over a wide frequency range, due to the
very fast switching of components.
Refer to Figure 2.
Electromagnetic interference can be propagated in two ways:
V Conducted interference along input and output cables
V Radiated through direct transmission, capacitive and inductive coupling etc.
A device is considered to comply with EMC when:
V Both conducted and radiated interference levels are below specified limits.
V Its immunity or susceptibility to conducted and radiated interference are
above specified limits.
EMC generic standards are divided into
V Emission standards with
--
EN 50081--1 residential and light industry
--
EN 50081--2 heavy industry
V Immunity standards with

--
EN 50082--1 residential and light industry
--
EN 50082--2 heavy industry.
Digital Techniques
E/M Environment
5.14.1 - HO - 3
Module 5
Preliminary
Notes
5.14
EMI and RFI Noise Spread
10 M
1M
150 k
10 k
Figure 1
100 M
TV
Radio
SW
LW
MW
RFI
EMI
VHF
UHF
1G
C 0077
Digital Techniques
E/M Environment
5.14.1 - HO - 4
Module 5
Preliminary
Notes
5.14
EMI Propagation
Figure 2
Conducted
susceptibility
Conducted
emission
Power cable
Source
equipment
Radiated
emission
Radiated
susceptibility
Victim
equipment
C 0078
Preliminary
Notes
Module 5
5.14
5.14.2
EMI -- Electromagnetic Interference
5.14.2.1
Nature of Electromagnetic Interference
Digital Techniques
E/M Environment
5.14.2 - HO - 1
Refer to Figure 1.
Electromagnetic interference (EMI) is caused by undesirable radiated electromagnetic fields or conducted voltages and currents. The interference is produced by a
source emitter and is detected by a susceptible victim via a coupling path.
The coupling path may involve one or more of the following coupling mechanisms:
V Conduction -- electric current
V Radiation -- electromagnetic field
V Capacitive coupling -- electric field
V Inductive coupling -- magnetic field.
Conducted noise is coupled between components through interconnecting wires
such as through power supply and ground wires. Common impedance coupling is
caused when currents from two or more circuits flow through the same impedance
such as in power supply and ground wires.
Radiated electromagnetic field coupling may be treated as two cases. In the near
field, E and H field coupling are treated separately. In the far field, coupling is treated
as a plane wave coupling.
Electric field coupling is caused by a voltage difference between conductors.
The coupling mechanism may be modelled by a capacitor.
Magnetic field coupling is caused by current flow in conductors. The coupling
mechanism may be modeled by a transformer.
Some typical external noise sources into a radio receiver include radiated electric
field coupling from: high--voltage power lines, broadcast antennas, communications
transmitters, vehicle ignition systems and electric machinery. Most conducted
coupling from external sources occurs through the AC power lines.
Typical radio interference to other equipment includes radiated electric field coupling
to: TV sets, broadcast receivers, telephone lines, appliances, and communications
receivers. Most conducted coupling to other equipment occurs through the AC power
lines.
The most common methods of noise reduction include proper equipment circuit
design, shielding, grounding, filtering, isolation, separation and orientation, circuit
impedance level control, cable design, and noise cancellation techniques.
Electromagnetic radiation involves electric (E) and magnetic (H) fields. Any change in
the flux density of a magnetic field will produce an electric field change in time and
space (Faradays Law). This change in an electric field causes another change in the
magnetic field due to the displacement current (Maxwell).
A time--varying magnetic field produces an electric field and a time--varying electric
field results in a magnetic field. This forms the basis of electromagnetic waves and
time--varying electromagnetisms (Maxwells Equations).
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.2 - HO - 2
Wave propagation occurs when there are two forms of energy and the presence of a
change in one leads to a change in the other. Energy interchanges between electric
and magnetic fields as the wave progresses.
Electromagnetic waves exist in nature as a result of the radiation from atoms or
molecules when they change from one energy state to another and by natural
fluctuations such as lightning. The technology of generating and processing
electromagnetic waves forms the basis of telecommunications.
5.14.2.2
Electromagnetic Effects
Electromagnetic effects (EME) includes many electromagnetic environmental
disciplines such as:
V Electromagnetic interference (EMI)
V Electromagnetic compatibility (EMC)
V Electromagnetic pulse (EMP).
Electromagnetic Interference
Electromagnetic interference (EMI) is electromagnetic energy that adversely affects
the performance of electrical/electronic equipment by creating undesirable responses
or complete operational failure. The interference sources may be external or internal
to the electrical or electronic equipment and they may propagate by radiation or
conduction.
This discipline includes radio frequency interference (RFI), the term which was
originally used to describe most electrical interference.
EMI is usually divided into two general categories to help in analyzing conducted and
radiated interference effects:
V Narrowband emission
V Broadband emission.
Narrowband Emission
A narrowband signal occupies a very small portion of the radio spectrum.
The magnitude of narrowband radiated emissions is usually expressed in terms of
volts per meter (V/m). Such signals are usually continuous sine waves (CW) and may
be continuous or intermittent in occurrence.
Communication transmitters such as single--channel AM, FM and SSB fall into this
category. Spurious emissions, such as harmonic outputs of narrowband communication transmitters, power--line hum, local oscillators, signal generators, test equipment,
and many other man made sources are narrowband emissions.
Broadband Emission
A broadband signal may spread its energy across hundreds of megahertz or more.
The magnitude of broadband radiated emissions is usually expressed in terms of
volts per meter per MHz (V/m/MHz).
This type of signal is composed of narrow pulses having relatively short rise and fall
times. Broadband signals are further divided into random and impulse sources.
These may be transient, continuous or intermittent in occurrence.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.2 - HO - 3
Examples include unintentional emissions from communication and radar transmitters, electric switch contacts, computers, thermostats, motor speed controls,
thyratron circuits, ignition systems, voltage regulators, pulse generators, arc/vapour
lamps, and intermittent ground connections.
They may also result from galactic and solar noise, lightning electromagnetic pulses,
and by radio frequency pulses associated with electrostatic discharges.
Electromagnetic Compatibility
Electromagnetic compatibility (EMC) is the ability of electrical or electronic equipment/systems to function in the intended operating environment without causing or
experiencing performance degradation due to unintentional EMI.
It is recommended that the performance be tested or qualified to insure operation
within a defined margin of safety for the required design levels of performance.
The EMI source minus the coupling mechanism path losses should result in an
emission level that is less than the victims susceptibility threshold minus a predetermined safety margin. The goal of EMC is to minimize the influence of electrical noise.
Electronic equipment can malfunction or become totally inoperable if not designed to
properly minimize the effects of interference from the internal and external electromagnetic environments.
Proper equipment and system designs are also necessary for minimizing potential
electromagnetic emissions into the operating environment.
It is important that electronic equipment designs ensure proper performance in the
expected electromagnetic environment, thus maintaining an acceptable degree of
EMC.
Electromagnetic Pulse
The electromagnetic pulse (EMP) or nuclear electromagnetic (NEMP) effect was first
observed during the early testing of high altitude airburst nuclear weapons.
The phenomena has been known since the late 1950s. The characteristics of the
electromagnetic radiation resulting from the nuclear explosion depend on the altitude
at which the explosion occurs.
The three EMP categories are
V high altitude burst
V air burst
V surface burst.
Compton Process
Refer to Figure 2.
The source of electromagnetic radiation is basically the same in all cases. The high
energy Gamma radiation from the nuclear explosion collides with the air molecules
in the earths atmosphere and dislodges electrons from these molecules which then
become free to move rapidly away from their parent molecule.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.2 - HO - 4
These free electrons are known as Compton Electrons and the movement of the
charge is known as Compton Current. The difference between the three categories
of EMP is the way in which the Compton Electrons and the resulting Compton
Current produce the electromagnetic field (Compton process).
In an inhomogeneous medium (such as the surface burst case) the recombination
rate of mobile active particles is asymmetrical. This produces a net flow of current
rather like a dipole. In the case of high altitude EMP the electrons released in the
upper atmosphere by the incident Gamma rays encounter the earths magnetic field.
This causes them to spiral round the field, thus producing a huge line of current
loops. This is the dominant source of electromagnetic radiation in the high altitude
EMP. The field produced is of high magnitude (over 50 kV/m) and has a very fast rise
time (ns).
Because of the high altitude the area of coverage is enormous. It is worth noting that
EMP is the only significant effect of an exo--atmospheric nuclear explosion. Therefore
it can be of extreme strategic importance. For this reason electrical and electronic
systems which are required to continue to function throughout a serious conflict must
be unaffected by EMP.
The frequency spectrum for a nuclear electromagnetic pulse contains frequency
components from 1 kHz right up to approximately 10 GHz. The protection of
electronic equipment from such a large and varied field presents special problems.
EMP Shielding
Figure 3 shows a general layout of EMP shielding for a host building.
Digital Techniques
E/M Environment
5.14.2 - HO - 5
Module 5
Preliminary
Notes
5.14
Electromagnetic Interference
Figure 1
Source emitter
Conducted emissions
(transients, ripple)
Radiated emissions
(E and H fields)
Victim
C 0064
Module 5
Preliminary
Notes
5.14
Digital Techniques
E/M Environment
5.14.2 - HO - 6
Figure 2
Compton Process
Scattered Gamma rays
NEMP burst
Gamma rays
Air molecule
Positive
Carge separation
Negative
Compton electrons
C 0065
Digital Techniques
E/M Environment
5.14.2 - HO - 7
Module 5
Preliminary
Notes
5.14
Figure 3
Global EMP shield
Host building
Critical
equipment
Doors and hatches
Internal cables
EMP Shielding
Critical
equipment
Incoming cables
C 0066
Preliminary
Notes
5.14.3
Module 5
5.14
Digital Techniques
E/M Environment
5.14.3 - HO - 1
HIRF -- High Intensity Radiated Field
Nature of High Intensity Radiated Field

In modern aircraft, flight controls that once were operated manually via cables and
hydraulics are increasingly being replaced by digital electronics. Because of weight
and maintenance advantages over conventional hydraulic controls, future commercial aircraft are envisioned as all--electronic.
Some aircraft are designed near the edge of aerodynamic stability and even depend
on computer--assisted controls to stay in the air. In this world of digital fly by wire
(or light) avionics, computerized controls, smart actuators, and other black boxes,
the potential susceptibility of flight--critical systems to external radio frequency
interference is a real concern.
It would be expensive, dangerous, and nearly impossible to test all of the flight
control systems on all classes of aircraft under all likely electromagnetic environments. Instead, computational and experimental methods are being developed to
assess the effects of electromagnetic interference on aircraft electronics.
If the electromagnetic environment local (inside the aircraft) to a flight--critical
component can be calculated numerically given the frequency, intensity, and
incidence angle of an illumination, then that component can be tested for upsets
under the same stress in the laboratory.
Field probes located inside the aircraft measure various field intensities. (Figure 1,
detail a)). Then the interactions of the HIRF fields with the aircraft can be visualized
as colour--coded contours, as shown in Figure1, detail b). The warmer colours
indicate higher field intensities, while cooler colours represent lower field intensities.
HIRF and RF Signals
Introduction
Aircraft transmit and receive RF signals in the atmosphere external to the aircraft.
In addition, RF signals are conducted and radiated within the aircraft, through
electrical cabling, to control and communicate with various electronic systems.
High intensity radiated fields produced by powerful radar transmitters or lightning,
will partially penetrate a commercial aircraft through apertures in the aircrafts hull.
HIRF may couple onto cabling within the aircraft structure and distort or corrupt the
signals carried on these cables, thereby disrupting the normal functions of the
associated aircraft systems.
In addition, if the HIRF gradient within the pressurized area of the aircraft exceeds
23 kV/cm, an electrical discharge may be induced between narrowly separated
conductors. In this latter case, physical damage to electrical components may occur
and flammable materials in the surrounding area may ignite.
The HIRF environment in the vicinity of the occurrence aircraft was studied to
determine whether the ambient field strength was sufficient to produce such an
effect.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.3 - HO - 2
Airport Environment
An assessment of the HIRF environment at an airport was derived from a study of
the peak and average field intensities to which aircraft operating in civil airspace
could be exposed. During normal approach and departure operations in the airspace
on and around airports, a peak field strength of 3 kV/m can occur in the 2 to 6 GHz
frequency band.
Theoretical Worst--Case HIRF Environment
An estimate of the most severe HIRF environment, during any phase of flight,
was developed for airspace where fixed--wing commercial operations are permitted.
Field strengths were calculated for surface emitters and airborne intercept radars,
operating at the minimum separation distances permitted under instrument flight
rules.
Mobile and experimental transmitters, and transmitters located inside restricted,
prohibited, and danger areas, were not considered. This methodology produced a
worst--case peak field strength of 7.2 kV/m, which is assessed to occur in the
4 to 6 GHz frequency band.
Effect of HIRF on VHF Communications
Aircraft antennas are designed to receive RF signal energy in specific frequency
ranges and to conduct this RF energy to the radio or radar receivers in the aircraft.
Aircraft radios are designed for operation at frequencies assigned in accordance with
national and international RF spectrum allocations. These RF spectrum allocations
are developed to ensure that authorized high power RF sources will not interfere with
aircraft radios and radars.
If a HIRF source were to operate within the assigned frequency range for an aircraft
radio, the HIRF energy within the frequency range to which the radio receiver was
tuned would be demodulated and amplified, adversely affecting VHF communications.
However, modern radio receivers are designed to prevent radio signals from being
amplified to unsafe power levels. In general, there is no relationship between the
degradation or disruption of VHF communications owing to EMI, and the presence of
field strengths sufficient to induce an electrical discharge between proximate
conductors.
Effect of Resonance on HIRF Energy
When a travelling wave is reflected back upon itself, the incident and reflected wave
energy may combine to form a spatially stationary, reinforced wave. For an electromagnetic waveform, such as HIRFs, reinforced wave phenomena or resonance can
occur in closed cavities, along a length of wire or around the perimeter of an
aperture.
When resonant conditions exist, the energy density of the reinforced wave may be up
to 25 times greater than the energy density of the incident wave. In practice,
resonant gain factors rarely exceed a single order of magnitude.
Digital Techniques
E/M Environment
5.14.3 - HO - 3
Module 5
Preliminary
Notes
5.14
a) Arrangement of field probes

Cockpit field probe
First class cabin field probe
Electronic bay field probe
C 0073
b) Colour--coded contours
Figure 1
HIRF Fields inside an Aircraft
Preliminary
Notes
Module 5
5.14
5.14.4
Lightning/Lightning Protection
5.14.4.1
Introduction
Digital Techniques
E/M Environment
5.14.4 - HO - 1
Nature of Lightning
Refer to Figure 1.
Lightning is the transient passage of electrical current between a cloud and either the
surface of the earth, another cloud, or an object in or near a cloud (e.g., an aircraft or
rocket). A lightning flash can contain about one billion volts of electricity. Thats
enough energy to light a 100 W bulb for three months.
Lightning is most commonly associated with thunderstorms, but can also occur in
snow storms and from the ash cloud of volcanic eruptions.
Thunderstorms can be an isolated cloud, or part of a line of thunderclouds associated with a front on a map of surface air pressure. Lightning is most common in the
spring and summer months, but can occur at any time.
Damage caused by Lightning
Refer to Figure 2.
Lightning causes damage to buildings and electronic equipment in three different
ways:
1. There can be damage as a result of a direct lightning strike. Such damage
includes damage to roofing materials, structures such as chimneys, heating
or air conditioning units located on the roof or exterior of a building, or fires
caused by lightning igniting combustible material, such as wood--frame buildings or flammable liquids or vapours.
2. Part of the lightning current can be carried inside a building by electric power,
telephone, analog or digital data lines (e.g., closed circuit television cameras,
sensors in an industrial plant, etc.). This direct injection of lightning current
inside a building can cause immense damage to electrical -- and especially
electronic -- circuits and equipment.
3. The electromagnetic fields from the current in a lightning stroke can induce
currents and voltage in wire and cables inside a building. Such surge currents
are typically less intense than direct injection of current, but can easily vaporize integrated circuits in computers, modems, electronic control circuits, etc.
Electronic equipment is typically designed to operate in a well--controlled electrical
environment. It is the responsibility of the user to install lightning protection, electrical
surge--protective devices, and power conditioning equipment to mitigate the effects of
disturbances in the electrical voltage waveform.
It is well recognized that the trend toward integrated circuits with more transistors per
unit area, and faster switching speeds, makes these circuits more vulnerable to both
upset and damage.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 2
Upset is a temporary malfunction without any physical change in the devices or

equipment. For example, one might recover from upset by rebooting a computer;
the only loss would be data that was not written to disk before the upset occurred,
and consequential damages from the interruption of continuous operations.
The consequential damages can be large, for example, in medical equipment used in
life--support applications.
Damage is a permanent alteration in the physical properties of one or more
components, that requires repair or replacement before the equipment can resume
normal operation.
Examples of lightning damage to electrical equipment include flashover of insulation
inside motors or transformers, so that the equipment is no longer functional.
Examples of lightning damage to electronic equipment includes vaporized traces on
printed circuit boards, vaporized transistors and integrated circuits, blown fuses, etc.
Recovery from damage usually takes much longer than recovery from upset. Prompt
recovery from damage requires advance planning, including local stock of spare
parts or redundant systems.
Aside from stocking parts, one must also plan to have an adequate number of
technicians who can diagnose and repair equipment. The lack of trained repair
personnel is generally a bigger bottle--neck than the lack of replacement parts.
A company also incurs expenses for consequential damages such as overtime pay to
do the backlog of work while the damaged equipment was awaiting repair or
replacement.
Aside from surge currents that are conducted on wires or cables, there can also be
damage from magnetic fields associated with lightning currents. For example,
lightning current that travels to earth along reinforcing steel inside a concrete wall or
column can produce a rapidly changing magnetic field that can erase floppy disks or
computer tapes inside a storage cabinet.
Further, this rapidly changing magnetic field can induce a surge current in loops of
wire or cable that are common in computer systems, and such surge currents can
cause damage or upset in the same way as direct injection of lightning current into
wires and cables.
It is well known even to laymen that lightning tends to strike elevated objects, such as
tall trees, tall buildings, water towers, transmitting antennae for radio or television
stations, overhead power lines, etc. As a result of this knowledge, many people have
the misconception that burying a cable somehow protects it from lightning.
The truth is that when lightning current reaches the surface of the earth, the current
does not magically disappear, but prefers to travel through highly conducting metal
pipes (e.g., buried gas and water pipes, etc.) and buried cables (e.g., electric power,
telephone lines, cable television, etc.) instead of dry soil or dry rock.
In this way, buried pipes and cables can act like an attractor for lightning current,
in the same way as a tall tower or building.
Lightning current can travel for long distances on overhead power lines, or in
underground pipes and cables, so that a user who experiences upset or damage
may not recognize that it coincided with a lightning strike some distance from the
user.
Module 5
Preliminary
Notes
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 3
Warning of Lightning
There are many ways that a user can be warned of thunderstorms.
Local weather forecasts, listening for thunder from a line of approaching storms,
looking at the locations of cloud--to--ground lightning on a map provided by national
authorities, or using a local electronic instrument to detect intense atmospheric
electric fields that signal the development of a thunderstorm overhead.
While such warnings may be useful to mobilize repair personnel, or to shut down
nonessential equipment, it is not economically feasible to disconnect every electrical
or electronic appliance during every local thunderstorm.
Therefore, most business must install lightning protection and surge--protective
devices, in addition to power conditioning equipment.
Lightning Protection
Lightning protection and surge--protective devices can be divided into three general
classes.
Refer to Figure 3.
1. There are air terminals (commonly called lightning rods) on the roof, which
are connected to earth through down conductors.
--
Traditionally, a chimney sweep, roofer, or lightning--protection company

installs air terminals.
Refer to Figure 4.
2. There are high--energy surge--protective devices, called arresters, installed
on every electrical and electronic conductor that enters the building, so that
surge currents are diverted to earth.
--
Traditionally, a licensed electrician installs a surge arrester at the main

circuit breaker panel.
Refer to Figure 5.
3. There are low--energy surge--protective devices, called suppressors, installed
at each piece of equipment that is either vulnerable to damage or susceptible
to upset.
--
Traditionally, the user installs surge suppressors at every piece of electronic equipment inside a building.
This kind of patchwork installation often provides incomplete protection, as there are
interactions between these three classes of protective devices.
For example, in some installations the surge suppressor has a lower voltage
protection level than the surge arrester, thereby drawing surge currents inside a
building and creating new problems.
Drawing surge currents inside buildings can create transient magnetic fields inside
the building that can induce surge currents in other loops of wire or cable, and the
surge suppressor may explode when it absorbs a high--energy surge.
Digital Techniques
E/M Environment
5.14.4 - HO - 4
Module 5
Preliminary
Notes
5.14
As another example, lightning current can travel from a down conductor, punch
through a wall, and enter the electrical power wiring inside a building. Also, some
installers of air terminals, down conductors, and ground rods do an ineffective job,
which results in a waste of money for such protection.
Standard methods for determining lightning protection begin with an estimate of the
number of lightning strikes per square kilometre per year at the users site.
While this frequency data can be useful in evaluating the economics of lightning
protection, the user must remember that lightning can, and does, cause immense
damage even in regions where lightning is not common.
Therefore, generally the probability of a lightning strike to the users building can be
ignored, since it is foreseeable that lightning will strike near the building sometime in
the next few years. Instead, it should be focused on the loss that will be caused by
lightning:
V Consequential damages
--
loss of business income while equipment is inoperative
--
cost of restoring data from back--ups and paper records
--
injuries caused by upset or damage to electronic equipment, e.g., failure

of monitoring equipment in hospital intensive--care ward
V Cost of replacing or repairing damaged equipment

V cost of replacing damaged power and data cables
V cost of replacing damaged structure -- particularly significant if:
--
structure contains flammable or explosive materials, so lightning could

cause catastrophic loss
--
building has a wood--frame and is located far from the nearest fire brigade (e.g., a farm house)
--
building has historic value and can not be replaced.
Protection against lightning can be much less expensive than repair or replacement
of damaged equipment, as well as consequential damages from loss of use of
damaged equipment.
However, merely connecting some surge suppressors inside the building may result
in an improved ability to withstand mild surges, but is generally inadequate protection
and can create significant new problems.
5.14.4.2
Applied Surge Protection for Access Control Systems

Refer to Figure 6.
Access control equipment is susceptible to damage from lightning, especially when
installed outdoors. Voltage spikes which travel through buried data cables, telephone
lines or AC power lines can damage access control equipment indoors, as well.
While nothing can protect equipment from a direct lightning hit, surge protectors can
help to minimize the damage caused by nearby lightning strikes. Surge protectors
operate by connecting varistors from data lines to ground.
Surge protectors have no effect on normal circuit voltages, but can act quickly to
divert large voltage spikes to ground and away from sensitive components.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 5
Access control units should be equipped with surge protection on all inputs and
outputs. Smart switches, PCs, printers, and modems are designed for an indoor,
office environment and do not have surge protection.
However, by properly installing aftermarket surge protection devices on all inputs and
outputs, these devices can also be protected from lightning damage.
Surge Protection Installation
Surge protection have to be installed:
V On the AC line voltage input to the PC
V On the AC line voltage input to any transformer or DC power supply connected to a reader unit, smart switch or modem
V On RS--232 data lines connecting a smart switch to reader units, to another
smart switch, or to a PC, printer or modem
V On RS--232 data lines from reader units (RU) to PCs, printers or modems
V On telephone lines connected to modems.
Surge Protection Rules
Surge protectors should be installed at both ends of RS--232 data lines. If this is not
possible, one protector should be installed near the smart switch, modem, printer or
PC.
The protector must be located at least three wire feet away from the device being
protected. The additional wire resistance will dissipate the energy from leading edge
of the spike. The wire can be coiled; a three--foot physical distance is not required.
Surge protectors must be connected to a verified good, nearby earth ground.
This can be AC power ground, a 10 copper ground stake, or building ground.
Run 16 AWG or heavier wire as short a distance as possible, and avoid any bends in
the wire.
Self grounding surge protectors (without a ground wire or ground screw) will not work
for this application. RS--232 surge protectors should not be used unless they are
equipped with a separate ground wire or ground screw.
Self--grounding surge protectors use the connector shell or pin 1 as a ground path.
The shell and pin 1 are not grounded on smart switches and modems.
AC power surge protectors must be plugged into a properly grounded three--wire
socket.
Cable shields on RS--232 data cables should be connected at one end only.
The cable shield may be terminated to the same ground as the surge protector.
The cable shield should be unconnected at the opposite end.
At the access control unit, the ground screw on the mounting plate should be
connected to a good earth ground, to allow the built--in surge protection to work
properly.
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 6
Figure 1
Airfield Lightning
C 0067
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 7
Figure 2
Barn Fire from Lightning Strike
C 0068
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 8
Figure 3
Lightning Rod
C 0069
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 9
Figure 4
Surge Arrester
C 0070
Preliminary
Notes
Module 5
5.14
Digital Techniques
E/M Environment
5.14.4 - HO - 10
Figure 5
Surge Suppressors
C 0071
AC
mains
Power
supply
Reader unit
mounting bracket
Reader unit
mounting bracket
Connection to earth ground
Shielded data cable
AC
mains
Telephone network
5.14
Surge Protection for an Access Control System
Smart switch
Module 5
Figure 6
Telephone line surge suppressor
RS--232 data surge suppressor
PC
AC power surge suppressor
AC
mains
Modem
AC
mains
C 0072
Preliminary
Notes
Digital Techniques
E/M Environment
5.14.4 - HO - 11
Digital Techniques
Elo/Digital AC Systems
5.15.1 - HO - 1
Module 5
Preliminary
Notes
5.15
5.15
Typical Electronic/Digital Aircraft Systems
5.15.1
ACARS--ARINC Communications and Addressing and Reporting

System
Introduction
ACARS stands for the aircraft communications addressing and reporting system.
ACARS is a digital data link system transmitted via VHF radio which allows airline
flight operations departments to communicate with the various aircraft in their fleet.
This VHF digital transmission system, used by many civilian aircraft and business
jets, can be likened to e--mail for airplanes, as the registration of each aircraft is
its unique address in the system developed by aeronautical radio giant ARINC
(Aeronautical Radio, Inc.).
Traffic is routed via ARINC computers to the proper company, relieving some of the
necessity for routine voice communication with the company. With ACARS, such
routine items as departure reports, arrival reports, passenger loads, fuel data, engine
performance data, and much more,can be requested by the company and retrieved
from the aircraft at automatic intervals.
Before the advent of ACARS, flight crews had to use VHF to relay this data to their
operations on the ground.
ACARS uses the AM mode because the same airborne VHF radio is often also used
for voice communications. Burst transmissions are used with a limit of 220 characters
per message. Transmissions often last less than one second.
ACARS System
The ACARS system is comprised of the following elements:
V The airborne subsystem, onboard the aircraft, which consists of the
--
management unit, which receives ground--to--air messages via the

VHF radio transceiver, and also controls the replies
--
control unit, which is the air crew interface with the ACARS system,
consisting of a display screen and printer.
V The ARINC ground system, which consists of all the ARINC ACARS remote
transmitting/receiving stations, and the ARINC computer and switching systems.
V The air carrier C2 (command and control) and management subsystem,
which performs basically all the ground based airline operations such as
operations control, maintenance, crew scheduling and the like, linked up with
the ACARS system.
Messages can be categorized in two ways:
V Downlinks -- which are those ACARS transmissions which originate in the
aircraft.
V Uplinks -- are those messages sent from the ground station to the aircraft.
Digital Techniques
5.15.1 - HO - 2
Module 5
Preliminary
Notes
5.15
ACARS Transmission
As already mentioned ACARS is an air/ground network which enables aircraft to
function as mobile computer terminals, with links to control stations. Although most
airliners use this system, only parts of the transmission protocol are standardized or
publicly accessible.
This implementation of an ACARS decoder allows decoding of common types of
messages, while leaving unrecognized parts in plain text form (as received). A typical
series of ACARS transmissions will look something like this example of a Delta
Airlines ACARS message.
Original Message
Refer to Figure 1.
ACARS mode: 2 Aircraft reg: N186DN
Message label: 80 Block id: 0 Message no: M03A
Flight id: DL0107
Message content:-3C03 0107/24 EDDF/KJFK
/POS OTR/OVR 1015/NXT MASIT/ETA 1118
/ENS N56000W020000/ALT 310/FOB 0961/SAT 52
/WND 275057/MCH 81/TRB LT CHOP/SKY UNDERCAST/ICE NONE
Encoded Message
Flight from FRANKFURT, GERMANY To JFK, NEW YORK
Weather over OTR at 1015 GMT Next position MASIT at 1118 GMT then N56 W20
Altitude 31000 Feet Temperature --52 Fuel 0961 Speed Mach 0.81
Sky UNDERCAST Turbulence LT CHOP Ice NONE Wind from 275 degrees at
057 Knots
ACARS VHF Frequencies
The following frequencies (selected examples) are used to transmit VHF ACARS
data to and from the aircraft:
131.550 MHz
Primary channel world--wide
130.425 MHz
Additional channel for USA
131.725 MHz
Primary channel in Europe
131.525 MHz
Secondary channel Europe
136.750 MHz
New European frequency
131.850 MHz
New European frequency
129.125 MHz
Additional channel for USA and Canada.
Digital Techniques
5.15.1 - HO - 3
Module 5
Preliminary
Notes
5.15
ACARS HF Frequencies
The following frequencies (selected examples) are used to transmit
(upper side--band) HF ACARS data to and from the aircraft:
Auckland
5.583 MHz, 10.084 MHz, 13.352 MHz
New York
5.523 MHz, 8.912 MHz, 11.315 MHz,

13.275 MHz, 17.919 MHz, 21.934 MHz
Johannesburg
4.681 MHz, 8.834 MHz, 21.949 MHz.
ACARS Ground Station

ACARS ground station (selected examples) are:
V Berlin (131.725 MHz, 131.525 MHz, 136.900 MHz)
V Frankfurt (131.725 MHz, 131.525 MHz, 136.900 MHz)
V Hamburg (131.725 MHz, 131.525 MHz, 136.900 MHz)
V Munich (131.725 MHz, 131.525 MHz, 136.900 MHz)
V Abu Dhabi (131.725 MHz)
V Dubai (131.725 MHz)
V Gaborone (131.725 MHz)
V Windhoek (131.725 MHz)
V Accra (131.725 MHz)
V Johannesburg (131.725 MHz)
V Kuala Lumpur -- Sepang (131.550 MHz).
ACARS Ground Station
The ACARS ground station is the heart of an air--to--ground data communications
system. It is much more than a data radio because it manages the interface between
the air--ground data links and the ground based applications. ACARS systems carry
air operational control (AOC) messages between airline host computers and
commercial aircraft.
Future systems will support a wider variety of communications including GPS and
radar target position reports, air traffic control (ATC) messages, and differential GPS
corrections.
Refer to Figure 2.
In this Figure a few VHF data communications sites are strategically placed in a
country to provide the coverage and redundancy desired.
Refer to Figure 3.
Each data communications site has one or more data link transceivers providing the
physical and channel access protocol layers and the ground station computers
provide the link and networking protocols. These sites are linked to a central hub
which provides system services and links to the end users.
Preliminary
Notes
Digital Techniques
5.15.1 - HO - 4
Module 5
5.15
This system could easily support any of the data link technologies individually or
simultaneously. This provides a transition capability for ACARS aircraft.
An uninterruptable power supply with back--up generator capable of powering the
site as required to meet site availability goals will also be required.
Technical Data
The following technical data given for an ACARS ground station are to bee seen as
examples.
Transmitter
Power supply
24 VDC, 10 A; 230 VAC 2.1 A
Frequency
118 MHz to 136.975 MHz
RF power output
20 W --80 W (configurable)
Interface
via RS--232
VHF Receiver
Power supply
24 VDC, 10 A; 230 VAC 2.1 A
Frequency
118 MHz to 136.975 MHz
Input range
--107 dBm to +7 dBm
Interface
via RS--232
About
ACARS Message (Example)
5.15
Figure 1
Module 5
Stand by
/WND 275057/MCH 81/TRB LT CHOP/SKY UNDERCAST/ICE NONE
/ENS N56000W020000/ALT 310/FOB 0961/SAT 52
3C03 0107/24 EDDF/KJFK/POS OTR/OVR 1015/NXT MASIT/ETA 1118
Message content:--
Flight id: DL0107
Message label: 80 Block id: 0 Message no: M03A
ACARS mode: 2 Aircraft reg: N186DN
Options
Aircraft Communications Addressing and Reporting System (ACARS)
File Edit
Preliminary
Notes
Digital Techniques
5.15.1 - HO - 5
C 0059
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.1 - HO - 6
Figure 2
ACARS Ground Stations (Examples)
C 0060
Figure 3
Dual port
Computer
Ethernet link
Computer
Serial link
Serial link
Satellite
data link
Module 5
5.15
Block Diagram of an ACARS Ground Station (Example)
VHF transmitter
VHF receiver
Control signals
VHF transmitter
VHF receiver
Dual redundant
computer system
Preliminary
Notes
Digital Techniques
5.15.1 - HO - 7
C 0061
Preliminary
Notes
5.15.2
Module 5
5.15
Digital Techniques
5.15.2 - HO - 1
Electronic Centralised Aircraft Monitoring

Refer to Figure 1.
The electronic centralised aircraft monitoring (ECAM) system was developed for the
AIRBUS A310 as an answer to BOEINGs EICAS. As far as the processing and
display of information are concerned, the ECAM differs significantly from the EICAS,
because the data relate essentially to the primary systems of the aircraft only.
Furthermore, the data are displayed in check--list and pictorial or synoptic format.
Engine operating data are displayed by simulating conventional types of instruments.
Other differences relate to display locations and to the selection of system operating
modes.
5.15.2.1
Description of the ECAM
Display Units
The ECAM display units are mounted side--by--side. The left unit displays information
on the status of systems, warnings and corrective actions in a sequenced check--list
format. The right unit displays associated information in pictorial or synoptic format.
Display Modes
There are four display modes. The following three are automatically selected:
V Flight phase--related mode
V Advisory (mode and status) mode
V Failure--related mode.
The fourth mode is manual. This mode permits the selection of diagrams related to
any one of 12 of the aircrafts systems for routine checking. Furthermore, it allows for
selection of status messages, provided no warnings have been triggered for display.
The selections are made by means of illuminated push--button switches at the
system control panel.
In normal operation the automatic flight phase--related mode is used. In this case
the displays are chosen according to the current phase of aircraft operation, i.e.
pre--flight, take--off, climb, cruise, descent, approach and after landing.
An example of a pre--flight phase is shown in Figure 2; the left display unit displays
an advisory memo mode. The right unit displays a diagram of the aircrafts fuselage,
doors and arming of the escape slides deployment system.
The failure--related mode takes precedence over the other two automatic modes
and the manual mode. The example in Figure 3 shows that (while taxiing for
take--off) the temperature of the brake unit at the rear right wheel of the left main
landing gear has become excessive.
A diagram of the wheel brake system is immediately displayed on the right display
unit. At the same time, the left unit displays the corrective actions to be taken by the
flight crew. Additionally, an aural warning is sounded and a light
(labelled L/G WHEEL) at a central warning light display panel is illuminated.
After the corrective action has been carried out, the instructions on the left display
are replaced by a message in white confirming the result of the action. The diagram
on the right display unit is redrawn accordingly.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.2 - HO - 2
In the example described above, the warning relates to a single system.

By convention, such warnings are indicated by underlining the displayed system title.
In cases where a failure can affect other sub--systems, the title of the sub--system is
shown boxed, as in the display shown in Figure 4, detail a).
Warnings and the associated lights are cleared by means of CLEAR push--button
switches on either the ECAM control panel or a central warning light display panel.
Status messages, which are also displayed on the left display unit, provide the flight
crew with an operational summary of the aircrafts condition, possible downgrading of
autoland capability and (as far as possible) indications of the aircraft status following
all failures except those that do not affect the flight (detail b)).
Control Panel
The layout of the ECAM control panel is shown in Figure 5. All switches (with the
exception of those for display control) are of the push--button, illuminated caption
type. Their functions are:
V SGU selector switches:
The SGU selector switches control the respective symbol generator units
(SGU). The lights are off in normal operation of the system. The FAULT
caption is illuminated amber if a failure is detected by an SGUs internal
self--test circuit. When a switch is released the corresponding SGU is
isolated. This causes the FAULT caption to extinguish and the OFF
caption to illuminate white.
V Synoptic display switches:
The synoptic display switches permit individual selection of synoptic
diagrams corresponding to each of 12 systems. They illuminate white when
pressed. A display is automatically cancelled whenever a warning or advisory
occurs.
V CLR switch:
The CLR (clear) switch is illuminated white whenever a warning or status
message is displayed on the left display unit. It is pressed to clear messages.
V STS switch:
The STS (status) switch permits manual selection of an aircraft status
message if no warning is displayed. It is illuminated white. Pressing the
switch also causes the CLR switch to illuminate. A status message is
suppressed if a warning occurs or if the CLR switch is pressed.
V RCL switch:
The RCL (recall) switch enables previously cleared warning messages to be
recalled, provided that the failure conditions which initiated them still exist.
Pressing the switch also causes the CLR switch light to illuminate. lf a failure
does no longer exist, the message NO WARNING PRESENT is displayed
on the left display unit.
System Testing
Each flight warning computer (FWC) of the system is equipped with a monitoring
module which automatically checks data acquisition and processing modules,
memories and the internal power supplies as soon as the aircrafts main power
supply is applied to the system.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.2 - HO - 3
A power--on test routine is also carried out for correct operation of the symbol
generator units. During this test the display units remain blank. In the event of failure
of the data acquisition and processing modules (or of the warning light display panel)
a FAILURE WARNING SYSTEM light at the panel is illuminated.
Failure of a computer causes a corresponding annunciator light at the maintenance
panel (labelled FWC FAULT) to illuminate. A symbol generator unit failure causes a
FAULT caption on the appropriate push--button switch at the system control panel to
illuminate.
Manual self--test checks for inputs and displays are carried out from a maintenance
panel. When the INPUTS switch is pressed, a TEST caption is illuminated white,
and most of the inputs to each computer are checked for continuity. Any incorrect
inputs appear in coded form on the left display unit.
The right display unit presents a list of defective parameters at the systems data
analogue converter. The diagrams of systems appear on the right display unit with
the caption TEST beside the system title, as each corresponding push--button
switch is pressed. Calibrated outputs from the data analogue converter are also
displayed. Any defective parameters are identified by a flag display.
A DISPLAYS push--button switch is provided at the maintenance panel. When
pressed it initiates a check for correct operation of the symbol generator units and
the optical qualities of the display units by means of a test pattern display.
The LOAD caption is illuminated each time a failure is memorized in the relevant
test circuits of the SGUs.
The annunciator lights at the maintenance panel illuminate white simultaneously with
a failure warning system light at the central warning light display panel when a
corresponding computer fails. The INHIB OVRD switch enables inhibited warnings
to be displayed.
AIDS
Flight warning
computer
Symbol
generator
Figure 1
Display driving
Data bus
Aircraft systems
data inputs
Flight warning
computer
Fuel
quantity
input
AIDS
Aural
warnings
Symbol
generator
ECAM (Functional Diagram)
Legend;
Discrete analogue inputs
System data
analogue converter
ECAM
control panel
Warning light display unit
Right
display unit
5.15
Aircraft systems
data inputs
Aural
warnings
Fuel
quantity
input
Left
display unit
Module 5
FB 4498 C
Preliminary
Notes
Digital Techniques
5.15.2 - HO - 4

ARM
ARM
CARGO
BULK
CARGO
AVIONIC
door symbol(s) green and name of door(s) white

door symbol(s) and name of door(s) amber
Right display unit
ARM
ARM
ARM
ARM
5.15
ECAM Displays During Pre--Flight Phase
Doors locked:
doors unlocked:
CABIN
EMER
EXIT
CABIN
FWD COMPT
DOOR
Module 5
Figure 2
Examples:
Left display unit
APU RUNNING
NO SMOKING ON
SEAT BELTS ON
PARKING BRAKE ON
MEMO
Preliminary
Notes
Digital Techniques
5.15.2 - HO - 5
FE 0708 B
SPLR
SPD BRK
93
213
111
102
ROLL
99
90
5.15
Failure--Related Mode Display
Right display unit
ROLL
108
105
Module 5
Figure 3
Left display unit
BRAKES
TEMP HOT
--FANS.........................................ON
--DELAY T.O. FOR COOL
TEMP: c BRAKE
Preliminary
Notes
Digital Techniques
5.15.2 - HO - 6
FE 0709
Preliminary
Notes
Digital Techniques
5.15.2 - HO - 7
Module 5
5.15
a) Display of failure
HYD
YELLOW PUMP LO PRESS . . . OFF
YELLOW SYS LOPR
b) Example of status display
STATUS
LAND 3 INOP
Autoland
capability
PROC: SINGLE ENG OPER

Limitations
Systems/
functions
lost
FE 0710
Information
PROC FOR APPR: HYD SYS LO PR

PROC FOR APPR: INCR LDG DIST
HYD BLUE SYS INOP
GEN 1 INOP
SPLR PARTIYLLY INOP
SLATS SLOW
Figure 4
Display of Failure Affecting a

Subsystem
Recall
switch
Status
message
switch
Message
clearance
switch
RCL
STS
CLR
BRT
F/CTL
APU
DOOR
BRT
5.15
ECAM Control Panel
WHEEL
FUEL
DC
OFF
RIGHT DISPLAY
PRESS
AC
System synoptic
display switches
COND
BLEED
HYD
OFF
OFF
ENG
FAULT
FAULT
1 ECAM SGU 2
Module 5
Figure 5
OFF
LEFT DISPLAY
SGU selector switches
Display ON and brightness control
Preliminary
Notes
Digital Techniques
5.15.2 - HO - 8
E 0711 A
Preliminary
Notes
5.15.3
Digital Techniques
5.15.3 - HO - 1
Module 5
5.15
Electronic Flight Instrument Systems

Refer to Figure 1.
As far as the pure basic functions and the number of display units are concerned,
an electronic flight instrument system (EFIS) may be considered as being similar to
some type of flight director system.
However, an EFIS is fully integrated with digital computer--based navigation systems.
It utilizes colour--CRT types of ADI and HSI. Therefore it is far more sophisticated
than a flight director.
This is not only in terms of physical construction, but also in the extent to which it
presents attitude and navigational data to the flight crew of an aircraft.
5.15.3.1
System Units
Refer to Figure 2.
As in the case of conventional flight director systems, a complete EFIS installation is
made up of left (pilot) and right (co--pilot) systems.
Each system in turn is comprised of
V two display units
-- electronic attitude deviation indicator (EADI)
-- electronic horizontal situation indicator (EHSI)
V symbol generator (SG)
V control panel
V remote light sensor unit.
A third (centre) SG is also incorporated in the system so that its drive signals may be
switched to either the left or the right display unit (in the event of failure of the
corresponding SG).
The signal switching is accomplished within the left and right SGs by electro--mechanical relays powered from the aircrafts DC power supply.
Display Unit
Each display unit consists of the sub--units as shown in Figure 3. The power supply
units provide the required levels of AC and DC power necessary for overall operation. The supplies are automatically regulated and monitored for undervoltage and
overvoltage conditions.
The video/monitor card contains a video control microprocessor, video amplifiers and
monitoring logic for the display unit.
The main tasks of the processor and the associated ROM (read only memory) and
RAM (random access memory) are to calculate gain factors for the three video
amplifiers (red, blue, green) and to perform input, sensor and display unit monitor
functions.
The input/output interface functions for the processor are provided by analog
multiplexers, an A/D converter and a D/A converter.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.3 - HO - 2
The function of the convergence card is to take X-- and Y--deflection signals.
Furthermore, the card develops drive signals for the three radial convergence coils
(red, blue and green) and the one lateral convergence coil (blue) of the CRT.
There are voltage compensators monitoring the deflection signals in order to
establish on which part of the CRT screen the beams are located (right or left for the
X--comparator, top or bottom for the Y--comparator).
Signals for the X-- and Y--beam deflections (for stroke and raster scanning) are
provided by the deflection amplifier card. The amplifiers for both beams each consist
of a two--stage pre--amplifier and a power amplifier.
Both amplifiers use two supply inputs:
V 15 V DC
V 28 V DC.
15 V DC is used for effecting most of the stroke scan writing. 28 V DC is used for
re--positioning and raster scanning.
The interconnect card serves as the interface between the connector of a display unit
and the various cards.
Digital line receivers for the signals supplied by the SGs are also located on this card.
In a typical system, six colours are assigned for the display of the many symbols,
failure annunciators, messages and all other information:
V White:
display of present situation information
V Green:
display of present situation information
where contrast with white symbols is
required, or for data having lower priority
than white symbols
V Magenta:
all fly to information (such as flight director
commands, deviation pointers, active flight
path lines)
V Cyan:
sky shading on an EADI and for low--priority
information (such as non--active flight plan,
map data etc.)
V Yellow:
ground shading on an EADI, caution
information display (such as failure warning
flags, limit and alert annunciators) and fault
messages
V Red:
for display of heaviest precipitation levels
as detected by the weather radar (WXR).
Symbol Generators
Refer to Figure 4.
The symbol generators provide the analogue, discrete and digital signal interfaces
between an aircrafts system, the display units and the control panel.
They perform symbol generation, system monitoring, power control and the main
control functions of the EFIS overall.
The interfacing between the card modules of an SG is shown in Figure 4.
Digital Techniques
5.15.3 - HO - 3
Module 5
Preliminary
Notes
5.15
Symbol Generator Card Functions

Card
Function
I/01 and 2
supply of input data for use by the main processor
Main processor
main data--processing and control for the system
Main RAM
address decoding, read/write memory and

I/O functions for the system
Main PROM
read only memory for the system
Display controller
master transfer bus interface
WXR input
time scheduling and interleaving for raster, refresh,

input and standby functions of WXR input data
WXR memory
RAM selection for single--input data, row

and column shift, rotate/translate algorithm
and shift registers for video output
Display sequencer
loads data into registers on stroke and

raster generator cards
Stroke generator
generates all single characters, special

symbols, straight and curved lines and arcs
on display units
Raster generator
generates master timing signals for raster,

stroke, EADI and EHSI functions
Display driver
converts and multiplexes X-- and Y-- digital

stroke and raster inputs into analogue for
driver operation; also monitors deflection
outputs for proper operation.
Control Panel
Refer to Figure 5.
A control panel is provided for each system. The switches are grouped for the
purpose of controlling the displays of their respective EADI and EHSI units as listed
below.
Control Panel Switch Functions
V EADI section:
--
BRT:
controls levels of display brightness
--
DH SET:
setting of decision height
--
RST:
manually resets decision height circuits after

aircraft has passed through decision height
Module 5
Preliminary
Notes
5.15
V EHSI section:
-- RANGE:
Digital Techniques
5.15.3 - HO - 4
selects range for displayed WXR and

navigation data
selects display appropriate to required mode
--
MODE SELECT:
--
BRT:
outer knob controls main display brightness;

inner knob controls WXR display
--
WXR:
when pushed in, WXR data are displayed

during all modes except PLAN
--
MAP switches:
used in MAP mode; when pushed in, the

switches cause their data to be displayed;
illuminates white.
Remote Light Sensor

This is a photodiode device which responds to ambient light conditions in the cockpit.
It automatically adjusts the brightness of the CRT displays to a compatible level.
5.15.3.2
Display Presentations
Refer to Figure 6.
The EADI displays pitch and roll attitude indications against a raster--scanned
background. The upper half is in cyan and the lower half in yellow. Attitude data is
provided by an inertial reference system (IRS).
Also displayed are flight director commands, localizer and glide slope deviation,
selected airspeed, ground speed, AFCS and autothrottle system modes, radio
altitude and decision height.
Figure 6 illustrates a situation during an automatically controlled approach to a
landing together with the colours of the symbols and alphanumeric data produced via
the EFIS control panel and SGs.
Refer to Figure 7.
The EHSI presents a selectable, dynamic colour display of flight progress and plan
view orientation. Four principal display modes may be selected on the control panel:
V MAP
V PLAN
V ILS
V VOR.
Figure 7 illustrates the normally--used MAP mode display. In conjunction with the
flight plan data programmed into a flight management computer, this mode displays
information against a moving--map background with all elements positioned to a
common scale.
Refer to Figure 8.
In the PLAN mode, a static map background with active route data is displayed.
The display is oriented to true North. Additionally, track and heading information are
shown.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.3 - HO - 5
Failure Annunciation
Failure of data signals from such systems as the ILS and the radio altimeter are
displayed on each EADI and EHSI in the form of yellow flags painted at specific
matrix locations on their CRT screens.
In addition, fault messages may also be displayed.
Example:
If the associated flight management computer and the weather radar range
disagree with the control panel range data, the discrepancy message WXR/MAP
RANGE DISAGREE appears on the EHSI.
Source Selector Switch Panel

Refer to Figure 9.
In the type of system described, means are provided by which the pilots can
(independently of each other) connect their respective display units to alternate
sources of input data, e.g. left or right air data computers, flight management
computers, flight control computers and standby inertial reference system.
Each pilot has a panel of selector switches. The upper rotary type of switch connects
either the left, centre or right flight control computer to the EADI as the source of
attitude data. The other switches are of the illuminated push type and are guarded to
prevent accidental switching. In the normal operating configuration of systems they
remain blank. When activated they are illuminated white.
Display of Air Data
Refer to Figure 3.
In a number of EFIS applications, the display of air data (like altitude, airspeed and
vertical speed) is still provided in the conventional manner, i.e. separate indicators
are mounted adjacent to the EFIS display units in the basic T arrangement.
With the continued development of display technology, however, CRTs with much
larger screen areas have been produced.
As may be seen from the BOEING 747--400 flight deck layout in Figure 4,
such displays make it unnecessary to provide conventional primary air data
instruments for each pilot.
Digital Techniques
5.15.3 - HO - 6
Module 5
Preliminary
Notes
5.15
FMSI
300
ALT
AP/L
YD
10
280
260
10
240
MACH. 723
DIST
20.0
LNR
10
GSP
258
F O
ML
S I
I N
FE 0688
CRS
020
Figure 1
Electronic Flight Instruments

(Example)
Digital flight data

acquisition unit
Left
light
data
VOR
Center
DME
ILS
RAD.ALT
Right
WXR
IRS
FCC
FMCS
Horizontal
situation
indicator
Ambient
sensor
Attitude
deviation
indicator

Right
VOR
Left & DME
WXR Center
right
IRS
FCC
FMCS
ILS
RAD.ALT
IRS
FMCS
FCC
Right
TMC
VOR
Center
DME
ILS
RAD.ALT
Left
WXR
IRS
FCC
FMCS
Right
symbol
generator
FMCS
IRS
FCC
TMC
Right
remote
light sensor
Display unit
drive signals
Switched
drive signals
Data busses
EFIS Installation and Signal Interfacing
TMC
Center
symbol
generator
Horizontal
situation
indicator
Attitude
deviation
indicator
5.15
FMCS
IRS
FCC
Left
symbol
generator
Brightness
control
Right
control panel
Module 5
Figure 2
Light
sensor
data
Left
remote
light sensor
Left
control panel
Preliminary
Notes
Digital Techniques
5.15.3 - HO - 7
FE 0689 C
Y--deflection
X--deflection
Red
Green
Blue
Beam test
Synchronising
Intensity
Raster/stroke
Day/night
Light sensor from

other display unit
Remote light sensor
DU brightness
Raster brightness
115 V/400 Hz
Convergence
card
Deflection
amplifier card
Video
monitor card
CRT
5.15
Display Unit, Block Diagram
HV power
supply
Module 5
Figure 3
Analogue line
receivers
Digital line
receivers
LV power
supply
E 0690 c
Preliminary
Notes
Digital Techniques
5.15.3 - HO - 8
Display
sequencer
Character data
Display sequencer
data bus
WXR memory
2 16 k RAM
Stroke
generator
Display
driver
Raster
generator
WXR raster data
Stroke
position
data
Symbol Generator and Signal Interfacing
Display
controller
Transfer bus
WXR input
Display unit
raster/stroke
Display unit
deflection signals
MUX control
Raster
control
Display unit
video
5.15
Figure 4
I/O
processor 2
I/O
processor 1
Main
processor
Main RAM
Main PROM
Stroke/video & priority data
Display controller I/O bus
Module 5
IRS
L,C&R FCCs
ILS
DME
SG wrap
around
FMC
TMC
RAD ALT
VOR
EFIS control
panel
WXR data
FE 0691 A
Preliminary
Notes
Digital Techniques
5.15.3 - HO - 9
Digital Techniques
5.15.3 - HO - 10
Module 5
Preliminary
Notes
5.15
ADI
DH SET
BRT
RST
80
RANGE
160 320
HSI
BRT
40
VOR
20
ILS
10
WXR
MAP
PLAN
ON
MAP
NAV
AID
ON
ON
WPT
ON
E 0692 B
ON
ARPT RTE DATA
Figure 5
Display Control Panel (Example)
Roll armed mode
Pitch armed mode
Autothrottle mode
Horizon line
Speed error scale
Speed error
indicator
Ground speed
Altitude alert
Localiser
deviation
pointer
Roll scale
Ground shading
Sky shading
Roll engaged mode
Pitch engaged mode
Autoland status
Glide slope deviation scale
Glide slope deviation pointer
Aircraft symbol
Flight director command bars
Radio altitude
Selected decision height
5.15
EADI Display (Example)
Slip
indicator
(ball in tube)
Roll pointer
Module 5
Figure 6
Localiser
deviation
scale
Pitch scales
FE 0693 B
Preliminary
Notes
Digital Techniques
5.15.3 - HO - 11
Way point
6.0/190
MAY
LAF
NEF
TO MANZY
ETA 1736
DIS 100
FMS 2
ETA
TO way point
Airport
annunciator
Selected
NAV source
Distance to
TO way point
Tuned
VOR/DME
5.15
EHSI Display in MAP Mode (Example)
RNG
100
TRU
Aircraft
symbol
Module 5
Figure 7
WX
range
Designator
Displacement
line
NORTH--UP
identifier
MAG/TRU
annunciator
Distance and course

to designator
E 0694 C
Preliminary
Notes
Digital Techniques
5.15.3 - HO - 12
Digital Techniques
5.15.3 - HO - 13
Module 5
Preliminary
Notes
5.15
Distance
Heading orientation
ETA
TRK
200 NM
252
24
0835.4Z
27
Active route
WPT 10
AGY
SBY
WPT 11
North pointer
WPT 08
FLY P1
FE 0695 A
HAR
Figure 8
EHSI Display in Plan Mode (Example)
Digital Techniques
5.15.3 - HO - 14
Module 5
Preliminary
Notes
5.15
INSTR SOURCE SEL

FLT DIR
R
C
L
FMC
EFI
IRS
ALTN
ALTN
ALTN
E 0696 A
AIR
DATA
ALTN
Figure 9
Source Selector Switch Panel

(Example)
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.3 - HO - 15
Figure 10 Cockpit with EFIS and Conventional Indicators
FB 7006
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.3 - HO - 16
Figure 11 Modern Flight Deck Layout (Example)
FE 0697 A
Preliminary
Notes
5.15.4
Module 5
5.15
Digital Techniques
5.15.4 - HO - 1
Engine Indicating and Crew Alerting System

An engine indicating and crew alerting system (EICAS) is a system, which was first
introduced in the BOEING 757 and 767 aircraft.
At the time of their introduction, there were differing opinions on how to approach
such operating factors like flight deck layouts and crews controlling functions, like the
extent to which normal, alerting and warning information should be displayed, and in
particular, whether engine operating data should be displayed for the whole flight or
only during certain phases.
In respect of EICAS, engine operating data are displayed on the CRT units, thereby
eliminating the need for traditional instruments. These data (as well as those relevant
to other systems) are not necessarily always on display. But in the event of malfunctions at any time, the flight crews attention is drawn to them by an automatic display
of messages in the appropriate colours.
Layout of the EICAS

Refer to Figure 1.
The basic system is comprised of
V two display units
V a display select panel
V two computers supplied with analogue and digital signals from engine and
system sensors.
The computers are designated left (L) and right (R). Only one is in control at a time;
the other is in standby. In the event of a failure the standby computer may be
switched to active either manually or automatically.
Other components of the system are
V discrete caution and warning lights
V standby engine indicators
V a remotely--located panel for selecting maintenance data displays.
The system provides the flight crew with information on primary engine parameters
(full time), with secondary engine parameters and advisory/caution/warning and alert
messages displayed as required.
Display Units
Refer to Figure 2.
The display units provide a wide variety of information relevant to engine operation
and operation of other automated systems. They utilize colour shadow mask CRTs
and associated card modules.
The units are mounted one above the other. The upper unit displays the primary
engine parameters N1 speed (a certain turbine speed), exhaust gas temperature
(EGT) and warning and caution messages. In some cases, this unit can also display
engine pressure ratio (EPR) depending on the type of engine(s) installed and on the
methods of processing data by the thrust management control system.
Digital Techniques
5.15.4 - HO - 2
Module 5
Preliminary
Notes
5.15
The lower unit displays secondary engine parameters, i.e. N2 speed, fuel flow,
oil quantity, oil pressure, oil temperature and engine vibration. In addition, the status
of non--engine systems, e.g. flight control surface positions, hydraulic system,
auxiliary power unit (APU), etc., can also be displayed together with the aircrafts
configuration and maintenance data.
The row of Vs shown on the upper display unit only appears when secondary
information is being displayed on the lower unit.
There are seven colours being produced by the CRTs. They are used as follows:
V White:
----
all scales
normal operating range of pointers
digital readouts
V Red:
-- warning messages
---
maximum operating limit marks on scales

digital readouts
V Green:
-- thrust mode readout
-- selected EPR/N1 speed marks or target cursors
V Blue:
--
testing of system only
V Yellow:
-- caution and advisory messages
-- caution limit marks on scales
-- digital readouts
V Magenta:
-- during in--flight engine starting
-- for cross--bleed messages
V Cyan:
-- names of all parameters being measured (e.g. N1/N2, oil pressure, TAT,
etc.)
-- status marks or cues.
The displays are selected according to the appropriate display selection mode.
Display Modes
EICAS is designed to categorize the displays and alerts according to their function
and usage. For this purpose there are three modes of displaying information:
V Operational mode
V Status mode
V Maintenance mode.
The operational and the status mode are both selected by the flight crew at the
display select panel, while the maintenance mode is selected at the maintenance
panel by the maintenance personnel only.
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.4 - HO - 3
Operational Mode
This mode displays the engine operating information and any alerts which require
action by the crew in flight. Normally, only the upper display unit presents information.
The lower one remains blank and can be selected to display secondary information
as and when required.
Status Mode
When selected, this mode displays data to determine the dispatch readiness of an
aircraft. The display shows the positions of the flight control surfaces in the form of
pointers referenced against vertical scales, selected sub--system parameters and
equipment status messages on the lower display unit.
Selection is normally done on the ground either as part of the pre--flight checks,
or prior to shut--down of electrical power to aid the flight crew in making entries in the
aircrafts technical log.
Maintenance Mode
This mode provides maintenance engineers with information in five different display
formats to aid them in trouble--shooting and verification testing of the major sub--systems. The displays, which are presented on the lower display unit, are not available
in flight.
Display Select Panel
The display select panel (Figure 3, detail a)) permits control of EICAS functions and
displays. It can be used both in flight and on the ground. It is normally located at the
centre pedestal of an aircrafts flight deck. Its controls are as follows:
V Engine display switch:
This switch is of the momentary--push type for presenting (or removing) the
display of secondary information on the lower display unit.
V Status display switch:
Also of the momentary--push type; this switch is used to display the status
mode information on the lower display unit (detail b)). The display is known
as the status page.
V Event record switch:
This switch is of the momentary--push type as well. It is used in the air or on
the ground to activate the recording of fault data relevant to the environmental control system, electrical power, hydraulic system, performance and
APU.
Normally, if any malfunction occurs in a system, it is recorded automatically
(called an auto event) and stored in a non--volatile memory of the EICAS
computer. The push switch enables the flight crew to record a suspected
malfunction for storage. This is called a manual event.
The relevant data can only be retrieved from the memory and displayed by
operating switches on the maintenance control panel when the aircraft is on
the ground.
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.4 - HO - 4
V Computer select switch:

In the AUTO position, it selects the left (or primary) computer and automatically switches to the other computer in the event of a failure. The other
positions are for the manual selection of the left or the right computer.
V Display brightness control:
The inner knob controls the intensity of the displays. The outer knob controls
the brightness balance between the displays.
V Thrust reference set switch:
Pulling and rotating the inner knob positions the reference cursor on the
thrust indicator display (either EPR or N1) for the engine(s) selected by the
outer knob.
V Maximum indicator reset switch:
If any one of the measured parameters, e.g. oil pressure or EGT,
should exceed normal operating limits, then automatically an alert will appear
on the display units. The purpose of the reset switch is to remove the alerts
from the display when the excess limits do no longer exist.
Alert Messages
The EICAS continuously monitors a large number of inputs (typically more than 400)
from engine and airframe systems sensors and will detect any malfunctioning of
these systems.
Refer to Figure 4.
lf a fault should occur, then appropriate messages are generated and displayed on
the upper display unit in a sequence corresponding to the level of urgency of the
action to be taken. Up to 11 messages can be displayed at the following levels:
V Level A warning:
Warnings require immediate corrective action. They are displayed in red.
Master warning lights are also illuminated, and aural warnings (e.g. fire bell)
are given from a central warning system.
V Level B caution:
Cautions require immediate crew awareness and possible action. They are
displayed in amber and also indicated by message caution lights. An aural
tone is repeated twice.
V Level C advisory:
Advisories require the crews awareness. They are also displayed in amber.
No caution lights or aural tones are associated with this level.
The messages appear on the top line at the left of the display screen. In order to
differentiate between a caution and an advisory message, the latter is always
indented one space to the right.
The master warning and caution lights are located adjacent to the display units
together with a cancel switch and a recall switch. Pushing the cancel switch
removes only the caution and advisory messages from the display. The warning
messages can not be cancelled.
The recall switch is used to bring back the caution and advisory messages into the
display. At the same time, the word RECALL appears at the bottom of the display.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.4 - HO - 5
A message is automatically removed from the display when the associated condition
does no longer exist. In this case, messages which appear below the deleted one
move up one line. When a new fault occurs, its associated message is inserted on
the appropriate line of the display. This may cause older messages to move down
one line.
Example:
A new caution message will cause all existing caution and advisory messages to
move down one line.
lf there are more messages than can be displayed at the same time, the whole list
forms a so--called page. The lowest message is removed and a page number
appears in white on the lower right side of the list. lf there is an additional page of
messages it can be displayed by pushing the cancel switch. Warning messages are
carried over from the previous page.
Display Unit Failure

Refer to Figure 5.
lf the lower display unit should fail when secondary information is being displayed on
it, an amber alert message appears at the top left of the upper display unit, and the
information is transferred to it.
The format of this display is referred to as compact. It may be removed by pressing
the ENGINE switch at the display select panel. Failure of a display unit causes the
function of the panel status switch to be inhibited so that the status page format can
not be displayed.
Display Select Panel Failure
lf this panel fails, the advisory message EICAS CONTROL PANEL appears at the
top left of the upper display unit together with the primary information. The secondary
information automatically appears on the lower display unit. The cancel/recall
switches do not operate under this failure condition.
Standby Engine Indicator
The standby engine indicator provides primary engine information in the event of a
total loss of the EICAS displays. The displayed information relate to N1 and N
speeds and EGT. The displays of the standby engine indicators are of the LCD type.
Operating limit values are also displayed.
The display control switch has two positions: ON and AUTO. In the ON position,
the displays are permanently on. In the AUTO position the internal circuits are
functional, but the displays will only be presented when the EICAS displays are lost
due to failures of both display units or both computers.
Maintenance Control Panel
This panel is used by the maintenance personnel for displaying maintenance data
which had been stored in the systems computer memory during flight or ground
operations. The layout of the panel and the principal functions of each of the controls
are shown in Figure 6.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.4 - HO - 6
The five display select switches are of the momentary--push type. When one of them
is activated, the corresponding maintenance display page appears on the lower
display unit screen.
System failures which have occurred in flight and have been automatically recorded
(auto event) in the computer memory (as well as data entered as manual event)
can be retrieved for display by means of the event record switch at the panel.
A self--test of the whole system (which can only be activated when an aircraft is on
the ground and its parking brake is set) can be performed by means of the TEST
switch at the maintenance control panel. When the switch is momentarily pressed,
a complete test routine of the system is automatically performed.
This test run includes
V all signal--processing circuits
V all signal processing circuits
V the power supplies.
An initial test pattern is displayed on both display units with a message in white to
indicate that the system is being tested, i.e. L (or R) EICAS depending on the setting
of the selector switch at the display select panel.
During the test, the master caution and warning lights and the aural devices are
activated, and the standby engine indicator is turned on if its display control switch is
at AUTO.
The message TEST IN PROGRESS appears at the top left of the display unit
screens and remains in view while testing is in progress. On satisfactory completion
of the test, the message TEST OK will appear.
lf a computer or display unit failure has occurred, the message TEST FAIL will
appear followed by messages indicating which of the units has failed.
A test may be terminated by pressing the TEST switch a second time or (if it is safe
to do so) by releasing the aircrafts parking brake. The display units revert to their
normal primary and secondary information displays.
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.4 - HO - 7
Upper display unit

Discrete
caution &
warning
lights
Aural
warnings
Warnings &
cautions
Primary
engine
displays
Stand--by
engine
indicators
Display
switching
Secondary engine
or
status display
or
maintenance display
Maintenance
control panel
Lower display unit
Data bus
Figure 1
Engine sensor:
N1
N2
N3
EPR
EGT
FF
Right computer
Display select panel
Oil press.
Oil qty.
Oil temp.
Vibration
System sensor:
Hydr. quantity & pressure
ADC hyd. syst. temp.
Control surface positions
Elect. syst: volts. amps. freq.
Gen. drive temp.
ECS temps.
APU EGT RPM
Brake temp.
Other system discretes:

FCC MCDP
TMC interface
EEC interface
FNC interface
RAD alt interface
ADC interface
FE 0703 B
Left computer
EICAS (Functional Diagram)
Digital Techniques
5.15.4 - HO - 8
Module 5
5.15
Alert message field
L HYD SYS PRESS

L YAW DAMPER
RUDDER RATIO
PARKING BRAKE
TAT+15
1.83
2.0
1.83
1.64
2.0
1.0
1.0
1.5
1.5
EPR
90.3
90.3
N1
690
50
88
88
PRESS
N2
120
120
OIL
TEMP
20
86
20
OIL
QTY
3.1
86
N3
4.4
4.4
1.9
VIB
FF
FB 4542
Engine
vibration
EGT
50
OIL
690
Secondary engine parameters
Engine oil parameters
VVVV
Figure 2
1.64
Primary engine parameters
Preliminary
Notes
EICAS Display: Engine Parameters

(Example)
Digital Techniques
5.15.4 - HO - 9
Module 5
Preliminary
Notes
5.15
a) EICAS display select panal

DISPLAY
EVENT
RECORD
COMPUTER
BRT
BRT
AUTO
BAL
THRUST REF SET

L
BOTH
MAX IND
RESET
ENGINE STATUS
b) Status mode display
L
HYD QTY 0.99
C
1.00
R
0.98
APU EGT 440 RPM 103
CABIN ALT AUTO 1

ELEV FEEL
OXY PRESS 1750
AIL ELEV AIL
Figure 3
FE 0704 B
RUD
Display Select Panel and Status Page

(Example)
Preliminary
Notes
Warnings
Cautions
5.15
Digital Techniques
5.15.4 - HO - 10
L ENGINE FIRE
CABIN ALTITUDE
L ENG OVHT
AUTOPILOT
R YAW DAMPER
L UTIL BUS OFF
FE 0705 A
Advisories
Module 5
Figure 4
Display of Alerting Messages
Digital Techniques
5.15.4 - HO - 11
Module 5
Preliminary
Notes
5.15
EICAS DISPLAY
TAT -- 15
96.1
TO
96.1
85.0
85.0
10
10
6
N1
450
50
OIL TEMP 100
OIL QTY
20
N
VIB 1.9
EGT
OIL PRESS
450
97.0
8.4
N
2
FF
97.0
8.4
FAN
FE 0706 A
50
100
20
1.9
Figure 5
Failure of Lower Display Unit
Digital Techniques
5.15.4 - HO - 12
Module 5
Preliminary
Notes
5.15
a) Maintenance control panel

Environmental control
systems and maintenance
message formats
Electrical and hydraulic

systems format
DISPLAY SELECT
EICAS MAINT
ECS
ELEC
PERF
MSG
HYD
APU
Selects data from

auto or manual event
in memory
Performance and
auxiliary power unit
formats
EVENT
AUTO READ
REC
CONF
ENG
MCDP
EXCD
MAN
ERASE
TEST
Configuration
and maintenance
control/display
panel
Engine exeedances
BITE test switch

for self--test
routine
Records real--time
data currently
displayed (in
manual event)
Erases stored data

currently displayed
b) Examples of maintenance mode displays
STBY
VBAT
LOAD
AC--V
FREQ
DC--A
DC--V
IDG OUT
IDG RISE
HYD QTY
HYD PRESSS
HYD TEMP
AFT CABIN TEMP
AUTO EVENT
L GEN DRIVE
Auto event
message
Figure 6
0
0
10
28
ELEC/HYD
L
0.78
120
402
140
28
145
35
0.85
125
398
150
27
150
47
APU
/BAT
GND
PWR
0.00
0
0
0
28
0.00
0
0
0.82
3230
50
O/FULL
3210
47
0.72 RF
2140
115
AUTO EVENT
R HYD QTY
Auto event
message
FE 0707 B
ECS/MSG
FLT DK FWD AFT FWD EQUIP FAN 1
DUCT TEMP
30
28
17 ZONE TEMP BITE
TRIM VALVE
0.75 0.80 0.00 NOSE A/G DISAGREE
LDG GEAR MONITOR
L
R PRIM ANTI--SKID
2
3 BRAKE COOLING
PACK OUT
196 EICAS DISAGREE
PRECOOL OUT 193
40
42 WARN ELEC
DUCT PRESS
62
64 FLT REC OFF
PACK FLOW
0.75
0.80 CAPT PITOT HEAT
TEMP VALVE
0.62
0.71
RAM IN DOOR
PAGE 1
0.72
RAM OUT DOOR 0.73
System Maintenance
Preliminary
Notes
5.15.5
Digital Techniques
5.15.5 - HO - 1
Module 5
5.15
FBW -- Fly by Wire
Introduction
A flight control system consists of the flight control surfaces, the respective cockpit
controls, connecting linkage, and necessary operating mechanisms to control aircraft
in flight.
The fundamentals of aircraft controls have been explained in aeronautics. Discussion
here centres on the underlying mechanisms of the flight controls.
Generally the cockpit controls are arranged like this:
V Control yoke for roll which moves the ailerons
V Control column for pitch which moves the elevators
V Rudder pedals for yaw which moves the rudder.
Some light aircraft use a control stick for both roll and pitch; the rudder pedals for
yaw.
Flight control systems are:
V Mechanical flight control system
V Hydromechanical flight control system
V Fly by wire (FBW) flight control system.
Fly by Wire Principle
Fly by wire (FBW) is the generally accepted term for flight control systems in which a
computer processes the pilots control movements and sends electric signals to the
flight control surface actuators without any mechanical linkage.
While enhancing aircraft performance and flying qualities, todays fly by wire systems
present their own unique hazards and risks. Aviation safety officers and accident
investigators need to become fly by wire literate to be effective today.
As aircraft design progressed to high--speed, swept--wing jets, capable of flying over
a broad flight envelope, flight control designers faced new problems. Airplane
handling qualities varied tremendously with speed, fuel burn, or external stores
configuration.
Improved stability and handling precision were needed, and fly by wire technology
provided the solution. To understand how this technology makes modern airplanes
fly, first at the concept of electronic feedback control is introduced.
Feedback Control System
Refer to Figure 1.
Feedback compensation is essentially error control. It regulates a system by
comparing output signals to input signals. Any error between the two becomes a
command to the flight control surface until output equals input.
A computer measures an aircrafts motion parameter, conditions the signal, amplifies
it, and sums it up with an input command, forming a closed loop.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.5 - HO - 2
In a FBW schematic block diagram of this process, the upper line is called the
forward path while the lower loop is called the feedback loop or path. Gain is the
amplification (or attenuation) that is applied to the signal to adjust the aircraft
response as desired.
A filter may be used to block feedback of signals or motion of an undesired frequency. The diagrams circle, or summer, indicates algebraic summation according to
the arrows and signs.
An advantage of a feedback system is that the flight control system (FCS) can be
used to reduce sensitivity to changes in basic aircraft stability characteristics or
external disturbances. Autopilots, stability augmentation systems (SASs), and control
augmentation systems (CASs) are feedback control systems.
In an SAS, the damper function is formed in the feedback loop and usually has low
gain, or authority, over a control surface. CAS, implemented in the forward path,
is high--authority power steering, providing consistent response over widely varying
flight conditions.
CAS and SAS were used extensively before fly by wire, as in the A--7 and the F--15,
but fly by wire provides more precision and much greater flexibility. Uniform aircraft
response is achieved over a broad flight envelope through CAS gains that are
programmed as functions of airspeed, Mach, centre--of--gravity position, and
configuration.
Control Laws
Modern flight control computers are programmed with control laws that govern the
feedback control system. Control laws are commonly named after the primary
feedback parameter as ___feedback or ___command.
For the pitch channel, common feedbacks are
V vertical load factor (Nz or g)
V pitch rate (q)
V pitch angle (q or attitude)
V angle of attack (a or alpha).
Common lateral feedbacks are
V bank angle (f)
V roll rate (p).
Typical directional feedbacks are
V yaw rate (r)
V side--slip angle (b or beta feedback)
V rate of change of side--slip angle (b with a dot over it, or beta dot feedback).
Refer to Figure 2.
G command, desirable at high speeds, means for a particular amount of stick force,
the same g regardless of airspeed (energy permitting) is got. In a pitch--rate
command system, the same amount of pitch rate for a given stick force regardless of
speed is got.
Pitch--rate feedback and its effects are presented in detail in Figure 2; -- the concepts
apply to any feedback control law.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.5 - HO - 3
The pilot applies a certain control force, demanding pitch rate, and that becomes the
flight control computers command for a particular pitch rate. Because the pilots
control input demands a certain manoeuvre parameter, such an arrangement is
often termed a manoeuvre demand system. The computer, not the pilot, then moves
the control surfaces as required to meet the pilots demand.
To provide immediate response to pilot input, the computer provides a direct path to
the elevator via the proportional line (called the feed forward gain in the B--777).
For precision over time, an integrator produces a control surface command until the
feedback signal is equal to the pilots command signal.
Pure integral control, or too much integrator gain (K), causes excessive lag in the
aircraft response, hence the use of the proportional circuit. This arrangement, called
proportional plus integral control, is found in most fly by wire designs, including the
B--777 and the A320.
In a block diagram, 1/s or K/s denotes an integrator, the K indicating some gain
value. FBW engineers must tune the integrator gain to prevent excessive lag.
Lag causes delay in changing directions----for example, nose--up to nose--down,
which is a classic cause of pilot--involved oscillation (PIO). Engineers can mathematically analyze control laws for such instabilities. Thorough flight testing is still
required, however, to validate an FBW system.
So how does an airplane with a pitch--rate command or g command fly? Essentially,
it gives attitude hold with controls free, similar to an autopilots control wheel steering
feature.
If pitch attitude is changed and control pressure at the desired attitude is released,
the system holds that new attitude because the FCS reacts to bring pitch rate to
zero. The airplane should fly nicely with pleasant control forces and precise attitude
control.
A side benefit of either pitch--rate or g feedback is autotrim in that speed can
changed without needing to retrim for level flight. And no retrim for thrust or
configuration changes either has to be done. Autotrim gives apparent neutral--speed
stability.
Even though positive speed stability was a generally accepted design requirement
for more classical airplanes, the lack of it doesnt seem to bother Airbus pilots.
However, Boeing opted to retain conventional trim feel in its B--777 design.
Digital Techniques
5.15.5 - HO - 4
Module 5
Preliminary
Notes
5.15
Feedback System in a FCS

Figure 1
Gain/filter
Feedback
--
Pilot command
Error
Airplane
Motion
C 0062
Digital Techniques
5.15.5 - HO - 5
Module 5
Preliminary
Notes
5.15
Figure 2
Pitch--Rate Feedback
q
Gain/filter
Feedback
K/S
Integrator
Proportional
---
Pitch--rate command
Error
Airplane
Rate gyro
Motion
C 0063
Preliminary
Notes
Digital Techniques
5.15.6 - HO - 1
Module 5
5.15.6
Flight Management System
5.15.6.1
Introduction
5.15
Refer to Figure 1.
The flight management system (FMS) provides many functions such as
V remote radio tuning
V establishing a flight plan and flight plan storage
V waypoint selection and storage
V information on navigation aids and earth reference points, such as airports,
intersections, runways and routes.
However, the primary function of the FMS is to provide high accuracy short and long
range, lateral and vertical navigation. To accomplish this function, the FMS computer
must calculate and maintain an accurate position. The FMS is capable of connecting
to a variety of sensors in order to calculate an accurate position.
These sensors include:
V VOR
V DME
V AHRS
V IRS
V VLF/Omega
V GPS.
Each sensor has individual characteristics which allow them to complement each
other. For example, the IRS has very good short--term accuracy in terms of velocity,
but has a long--term drift. This characteristic is complemented by the DME inputs
which are not subject to any drift error.
Refer to Figure 2.
The FMS knows the characteristics of each sensor and organizes the use of these
sensors in order to determine the aircrafts current position. This function is named
blanking.
The lateral navigation function of the FMS may be considered as an area navigation
(RNAV) system. Its fundamental purpose is to provide navigation information relative
to selected geographic points. Navigation management allows the pilot to define a
route from the present aircraft position to any point in the world.
The FMS provides advisory information and steering commands to allow the pilot
(or the autopilot) to guide the aircraft along the desired route. Routes are defined
from the aircrafts present position to a destination waypoint via a great circle route
(or a series of great circle legs defined by intermediate waypoints).
In its memory the FMS has two data bases:
V A navigation database that contains data on navigation aids, airports and airways; this database is updated every 28 days via the dataloader
V A custom database used by the pilot to create and store flight plans and waypoints; the custom database is not updated on any regular basis.
Digital Techniques
5.15.6 - HO - 2
Module 5
Preliminary
Notes
5.15

The FMS is comprised of three basic components:
V Control display unit (CDU)
V Flight management system computer (FMC)
V FMS data loader.
5.15.6.2

Refer to Figure 3.
The CDU provides the primary means for the pilot to make inputs into the system.
It also provides output display for the flight management computer.
The CDU utilizes a full alphanumeric keyboard, including decimals, dash and slash.
Line selection keys are provided on each side of the CRT. Function keys are
provided to allow direct access to specific display pages. Annunciators are located at
the top of the unit to advise the pilot of the system status.
To communicate with the flight management and performance computers, the control
display unit (CDU) consists of
V a keyboard
V a CRT display
V the electronics required to drive the CRT display
V a microprocessor
V power supplies
V programmable read only memories (PROM)
V random access memory (RAM)
V input /output buses.
Colour Assignments
The use of colours on the display pages is designed to highlight important information. Colour assignments are coordinated as much as possible with the electronic
flight instrument system (EFIS) multifunction display (MFD).
The colour assignment is as follow:
V Vertical/atmospheric data
cyan
V Lateral data
green
V FROM waypoints
yellow
V TO waypoints
magenta
V Prompts and titles
white
V Flight plan names
orange
V Index and solutions
green.
Preliminary
Notes
5.15.6.3
Module 5
5.15
Digital Techniques
5.15.6 - HO - 3
FMS Computer
Refer to Figure 4.
The flight management system computer (FMC) performs seven main functions:
V The input/output function:
Receives and transmits digital data to and from the various systems on board the
aircraft and checks that all received data are valid.
V The CDU function:
Sends formats, updates and data to the CDU for display and provides alerting
and advisory messages to the CDU for display on the scratch--pad.
V The bite and monitoring function:
Performs a self--test of the FMC during power up and upon request and
continuously monitors the FMS during normal operation. Failures are recorded on
non--volatile memory for retrieval at a later date.
V The navigation function:
Houses the navigation data base and is responsible for computing the aircrafts
current position, velocity and altitude. It also selects and automatically tunes the
VOR receivers and DME interrogators.
The navigation function computes the aircrafts present position by determining
the distance to two auto--tuned DME stations. The intersection of the two
DME radius represents the aircrafts present position.
Positional information from the long range sensors used to solve any ambiguity
that may occur or when the aircraft is on the ground. Velocity and altitude are
computed by using long range sensor inputs and the ADC.
V The performance function:
Computes performance parameters (limits) and predictions for the vertical flight
path of the flight profile, utilizing the performance data base and the CDU input
data.
V The guidance function:
Stores the active vertical and lateral flight plan input from the CDU. Using the
present aircraft velocity and position information calculated by the navigation
function, the guidance function compares actual and desired position and
generates steering commands which are input to the appropriate flight control
computer.
Using the current computed vertical profile data from the performance function,
the guidance function compares actual and desired altitude and altitude rate and
generates pitch and thrust commands which are input to the appropriate flight
control computer (FCC) and the thrust management computer (TMC).
V The EFIS function:
Provides dynamic and background data to the EFIS symbol generator and
provides the navigation function with a list of the closest navigation aid array for
auto tuning.
Preliminary
Notes
5.15.6.4
Module 5
5.15
Digital Techniques
5.15.6 - HO - 4
FMS Data Loader

The FMS data loader is used to transfer navigation--related data to the FMC.
A typical data loader uses 3.5--inch diskettes and is interfaced with the flight
management computer.
The data loader provides the following functions:
V Navigation database loading:
The data loader provides transfer of data derived from the Jeppesen database.
This data includes navigational aids, waypoints, airports, runways, procedures
and jet routes. The data base is updated every 28 days.
V Flight plan loading:
The data loader has also the capability of interfacing with a Lockheed Jet Plan
computer (or equivalent). This gives the pilot the option of loading a flight plan
from a diskette.
V Download fault monitor:
It is used to download the fault history from the non--volatile RAM in the system.
This information are analyzed and used for troubleshooting.
Digital Techniques
5.15.6 - HO - 5
Module 5
Preliminary
Notes
5.15
Flight Management System Components

Figure 1
GPS antenna
(if GPS is implemented)
FMS data loader
Control display unit
FMS computer
FE 2565 A
GPWS
TMC
Figure 2
FMS Data Flow and Interfacing
Fuel quantity &

fuel flow data
IRS
EFIS
symbol
generators
HSI
Control
surface
servos
AFCS
FE 2566 A
Antennas
Radio nav.
VOR ADF
DME ILS
RAD ALT
ATC
transponder
WXR
Maintenance
control &
display
5.15
Data-Sensing Autothrottle base

probes servos
loading
ADC
FMC
Nav. Option.
data-- prog.
base
Data loader
Data buses
CDU
ADI
EFIS
Module 5
Discrete inputs
from aircraft systems
Engine control
& monitoring
(indicating &
alerting)
AFCS MODE
IRS MODE
ILS
EFIS
ATC
VOR/DME RDM I
ADF
WXR
Control panels
Controls &
indicators
Flight crew
Preliminary
Notes
Digital Techniques
5.15.6 - HO - 6
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.6 - HO - 7
CRT
display
Line
select
keys
Scratch-pad
FE 2567 A
Alpha-numeric
keys
Mode
Keys
Figure 3
Function
keys

Load FLT plan
Sensor, control
IRS init
LEG data
Current/predict
data
Nav
database
Select/tune
navaids
Compute A/C
ALT
Compute A/C
velocity
Compute A/C
position
Navigation
function
Guidance
buffer storage
Compute LAT/
vert/thrust
steering
CMDS
Control LNAV,
VNAV modes
Compute
position/
velocity errors
Guidance
function
Inflight monitor
Bite checks
FLT dat
current/
predict
FLT plan
Bite history
Inflight monitor
Self--test
PWR up bite
Bite and
monitor
Compute/
format
data
Select
navaid
array
Edit
backgnd
EFIS
function
FMS Computer, Block Diagram
Operation
program
Central processor
Sensors, communications, comparison checks
Current flight, wind, navaid data

Navaid array
Aircraft
POS/VEL
ACT LEG/
procedures
Altitude velocity winds
Performance
database
Self--test and status
Initialise
POS, VEL,
wind
CRS, TRK,
LEG sequence
Figure 4
Sensors
Navaid tune
Mode
select
Page
control
Data
display
format
update
CDU
function
Initialise
Current/
predict data
Predict
Flight data
Flight management computer
Test status
Bite monitor
mode control
Roll CMD
pitch CMD
thr CMD
Mode, range
Backgnd/
dynamic data
p
r
o
c
e
s
s
i
n
g
d
a
t
a
I
n
p
u
t
/
o
u
t
p
u
t
RMIs
ADI
Maintenance control
and display panel
Thrust
management
computer
Flight control
computer
EICAS
EICAS
computer display
unit
HSI
EFIS symbol
generator
EFIS control
panel
5.15
Thrust
management
computer
p
r
o
c
e
s
s
i
n
g
d
a
t
a
I
n
p
u
t
/
o
u
t
p
u
t
Fuel quantity, fuel weight
Aircraft profile/
flight data
Perf. data
computation
Performance
function
Module 5
Thrust
mode
select
panel
Database loader
Discretes in
Aircraft ident
engine ident
auto tune
air/GND SW
bleed air--EEC
master/slave
FMC
CDU
AFCS mode
control panel
Sensor & contr. panels

ADC, IRS, DME
VOR, ILS, fuel,
clock EICAS,
F, F.Q. proc.
Sensors, control
FE 2569 A
Preliminary
Notes
Digital Techniques
5.15.6 - HO - 8
Preliminary
Notes
Module 5
5.15.7
Global Positioning System
5.15.7.1
Introduction
5.15
Digital Techniques
5.15.7 - HO - 1
The global positioning system (GPS) is a very modern long--range navigation system.
Its great advantage is that it is very accurate. At the moment, it is the most accurate
long--range navigation system available.
Refer to Figure 1.
The GPS receiver picks up radio signals which are continuously transmitted
from satellites. These satellites orbit the earth at an altitude of 20,000 km.
Refer to Figure 2.
Each satellite orbits the earth once every 12 hours. From any position on the earth,
a GPS receiver can pick up a signal from five different satellites. Even in bad
weather, accurate navigation is available because only three satellite signals are
required for navigation (four satellites for high accuracy).
The GPS works in a way similar to that of DME. The receiver measures the time a
signal takes to travel from the satellite to the receiver. The satellite tells the receiver
its position. The computer inside the GPS receiver calculates the time it took the
signal to get from the satellite to the receiver.
5.15.7.2
Principles of GPS Operation

Refer to Figure 3.
The basic principles behind GPS are quite simple, even though the system itself uses
some of the most high--tech equipment ever developed.
The ideas behind the GPS are:
V Triangulation from satellites is the basis of the system.
V To triangulate, GPS measures distance by using the travelling time of a
radio signal.
V To measure the time of travel, GPS needs very accurate clocks.
V Once the distance to a satellite is known, it is necessary to know where the
satellite is in space.
Satellite Ranging
GPS is based on satellite ranging. This means that the position on the earth is found
by measuring the distance from a group of satellites in space. The satellites act as
precise reference points.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.7 - HO - 2
Refer to Figure 4.
It is assumed that ones own position is lost. Now the aim is to locate this position.
The distance to satellite A is known, e.g. 11,000 km. This means this particular
position must be somewhere on an imaginary sphere that is centered on the satellite
and that has a radius of 11,000 km.
Refer to Figure 5.
It is also known that the distance from this specific position to another satellite (B) is
12,000 km. So, this position is 11,000 km away from satellite A and, at the same
time, 12,000 km away from satellite B. That means, this position is on the circle
where the spheres of the two satellites overlap.
If now a measurement is made from a third satellite, the position in question can be
located accurately. It is on the overlap between satellites A and B, and at the same
time 13,000 km away from satellite C. There are only two points in space where this
can be true. Those two points are where the 13,000--km sphere cuts the overlap of
A and B.
Refer to Figure 6.
By ranging from three satellites it is possible to accurately locate two positions in
space, where the position under consideration can be.
How is it possible to find out which one of those two positions is the true location?
Either a fourth measurement has to be made from another satellite or otherwise an
assumption can be made.
One of the two points is unlikely to be true. The incorrect point may not be close to
the earth but far away in space. The computers in GPS receivers have various
techniques for distinguishing the correct point from the incorrect one.
If the altitude of the position in question is known, one of the satellite measurements
can be eliminated easily. One of the satellites spheres is replaced by a sphere which
is centered in the earths center and which has a radius equal to the earths radius
plus the actual altitude of the particular position. The correct position must be
somewhere on this earth--centered sphere.
If it is necessary to be absolutely accurate, trigonometry says that actually four
satellite ranges are needed to correctly locate the desired position. But in practice,
it is possible to find the correct position with just three ranges, if the unlikely solution
is rejected.
Therefore, the basic principle behind GPS is using satellites as reference points for
triangulating the required position somewhere on the earth.
Everything else about the system is of a technical nature. These details are designed
to make this ranging process easier and more accurate.
Measuring the Distance from a Satellite
Since GPS is based on knowing the distances to the satellites in space, a method
for calculating these distances is needed.
The basic idea behind measuring the distance to a satellite is a standard equation
velocity multiplied by travel time.
Example:
If a car travels at a speed of 60 km per hour (km/h) for 2 hours, how far has it
gone? The result is velocity (60 km/h) multiplied by travel time (2 h) gives the
distance (120 km).
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.7 - HO - 3
The GPS system works by timing how long it takes a radio signal from the satellite
to reach the receiver. Then, the distance is derived from that time.
Radio waves travel at the speed of light: approx. 162,000 nm/s (approx. 300,000 km/s;
exactly 299,792.458 km/s)). So, if it is possible to find out when the GPS satellite started
sending its signal and when it was received, it is known how long it took the signal to
cover the distance. When that time in seconds is multiplied by 300,000 km/s the range
to the satellite is got in km.
The clocks used for timing need to be good, because light moves very fast and the
travel times are very short. If a satellite were right overhead it would only take
approx. six hundredths of a second for the signal to reach the receiver.
This timing accuracy is only possible by very precise electronic clocks. In fact,
most receivers can measure time with nanosecond accuracy, i.e. with an accuracy
of 0.000,000,001 second.
Pseudo--Random Codes
Refer to Figure 7.
The problem of timing is to find the exact time when the signal has left the satellite.
To overcome this problem, the satellites and the receivers are synchronised. This
means, that they generate the same code at exactly the same time. The codes received
from a satellite are compared to the receiver--generated code. The time of reception is
subtracted from the time when the receiver generated this code. The difference is the
travel time of the signal.
Refer to Figure 8.
Both the satellites and the receivers generate a set of digital codes. The codes are
identical to each other so that they can be compared easily. They almost look like a
string of random pulses.
The codes are not really random codes. They form pseudo--random sequences
that are actually repeated every millisecond, so they are called the pseudo--random
code.
Timing
As mentioned earlier, light travels at a speed of 162,000 nm/s or approx. 300,000 km/s.
If the satellite and the receiver were out of synchronisation by even 1/100th of a second,
the distance measurement could be off by 1,620 nm (approx. 3,000 km). Therefore,
both the receiver and the satellite have to generate their codes at exactly the same time.
For this reason, the satellites have atomic clocks on board which are very precise.
Note:
Atomic clocks obtained their name from the use of the oscillations of a particular
atom as their time reference. It is the most stable and most accurate time
reference which has ever been developed.
Timing Errors
Note:
Normally, when measuring the distance in km or nm to a satellite, this is called

the range to the satellite. But since the range is calculated from time, it can be
expressed in terms of time as well.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.7 - HO - 4
A receivers clock does not contain an atomic clock but a quartz clock. This clock is not
perfectly synchronised with the universal time (Greenwich mean time (GMT)). It may be
slower or faster, and when the time is actually 12:00:00 GMT, a quartz clock may still
show 11:59:59 or even 12:00:01. This may affect the calculation of positions as follows.
Refer to Figure 9.
It is assumed that the actual position is 4 s away from satellite A (4 300,000 km =
1,200,000 km) and 6 s away from satellite B. If this specific position were at sea level
(i.e. when operating in two dimensions) those two ranges would be enough to locate
the position. This position can be called X.
So X is the accurate position when all the clocks are working perfectly.
Refer to Figure 10.
But a receiver, which is 1 s slow, will show the distance to satellite A as being 5 s and
the distance to satellite B as being 7 s. This will cause the two circles to cross at a
different point XX.
This means, that XX is the position a faulty receiver may show. The result will seem
to be perfectly correct, since it is not known that the receiver is slow. But this result
will be far away from the real position.
To make sure that there is no timing fault, another measurement must be added to
the calculation. This means, that in the two--dimensional example a third satellite is
being ranged.
The offset of 1 s must be added to this measurement as well. The broken lines in
Figure 11 show the pseudo--ranges caused by the slow clock.
Note:
The term pseudo--range describes ranges that contain errors (usually timing
errors).
While the pseudo--ranges of satellites A and B still cross at XX, that one of C is not
close to that point. So, there is no position that can really be 5 s from A and 7 s from
B and 9 s from C.
The computers in GPS receivers are programed in such a way that, if they get a
series of measurements which do not intersect at a single point, they will realise
something is wrong. They assume that the reason is their internal clock. Either it is
off or it has some offset.
Now, the computer starts subtracting (or adding) the same amount of time from (to)
all measurements. This is done until all ranges of one series hit one point.
Using this example, the computer will detect the error by subtracting one second
from all three measurements. Now, the circles will cross at one point and the
computer assumes that its clock is 1 s slow.
For the solution of this problem, algebraic formulas are used to keep the time
necessary for this procedure as short as possible. Usually, it takes not more than
one or two additional measurements to find out about the clock error of the receiver
and to correct it.
In three dimensions, four measurements are necessary to cancel out any error. This
means that a true, accurate position cannot be obtained unless four satellites are
in sight, i.e. above the horizon.
The GPS system consists of 18 active and three spare satellites. So there are always
more than four satellites visible from any position on earth.
Preliminary
Notes
5.15.7.3
Module 5
5.15
Digital Techniques
5.15.7 - HO - 5
Receiver Design
The need for four measurements affects the design of GPS receivers. If continuous,
real--time position measurements are needed, a receiver with at least four channels
is required in order to receive the signals of four satellites at the same time.
Many applications do not require such a high accuracy. For these, a single--channel
receiver may be enough. A single--channel receiver receives the signals of four
different satellites in sequence, i.e. one signal after the other. The whole operation
may take between 2 s and 30 s, which is fast enough for many applications.
But this type of receiver does not provide good velocity calculations, because any
movement of the receiver during one reception cycle can affect the accuracy of the
measurements.
Therefore, modern GPS receivers have up to 12 channels. With this number of
channels they are able to monitor up to 12 satellites at the same time. I.e. GPS
can measure the speed very accurately (with an accuracy of less than 1 m/s).
Another disadvantage of the single--channel receiver becomes obvious when
the satellites transmit their system condition messages. These messages take
approx. 30 s. During that period, navigation must be delayed every time a
new satellite is read.
A popular compromise is a two--channel receiver. One channel carries out the time
measurement calculations while the other establishes a radio lock on the next
satellite to be measured. When the first channel has finished its measurement,
it can instantly switch to the new satellite without wasting any time for locking--on it
or for listening to the system condition message. The other channel then looks
ahead to the next satellite and begins the lock--on procedure for that one. When it
is no longer needed for lock--on, it can be used for time measurement.
This method can greatly speed up the sequencing, and continuous position updates
are always available. A two--channel receiver can be preprogramed to track more
than four satellites. When one satellite is blocked (or hidden), another one can
be instantly ranged without any interruption of the navigation process.
5.15.7.4
Position of Satellites in Space

Satellites are continuously orbiting the earth and it is necessary to know the position
of each at any given moment.
The satellites orbit the earth at an altitude of approx. 11,000 nm (20,200 km). Here,
they are well clear of the earths atmosphere. They orbit the earth on known paths
like the moon.
The satellites are placed in a very precise orbit according to the GPS master plan.
Because there is no atmospheric drag at altitudes of 20,200 km, the satellites keep
their orbits exactly.
The orbits are known in advance. Most GPS receivers have these orbits stored in
their memory, which tells them where in the sky each satellite will be at any given
moment.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.7 - HO - 6
Monitoring Satellites
Refer to Figure 12.
The GPS satellites world--wide are constantly monitored by the US Department of
Defence.
Since the satellites orbit the earth once every twelve hours, they pass over one of the
monitoring stations twice a day. This lets the monitoring stations precisely measure
their altitudes, positions, clocks and speeds.
Each satellite transmits this information at two frequencies (L1 = 1575.42 MHz
and L2 = 1227.6 MHz). The variations from the perfect (i.e. preplanned) orbit are
usually very small.
Once a satellites position has been measured and the variations detected, this
information is processed by the master control station and transmitted to the satellite
via ground antennas.
Ground antennas are the S--band facilities that provide duplex communication with
the satellites by receiving telemetry and transmitting both commands and upload
data. The satellite broadcasts the corrections along with its timing information.
This message, with the exact orbital location and the system status, is called
system condition message (or: data message).
Most GPS receivers use this information, along with the information in their internal
memory, to precisely establish the position of the satellite.
Figure 13 shows the location of the
V master control station
V monitoring stations
V ground antennas.
Digital Techniques
5.15.7 - HO - 7
Module 5
Preliminary
Notes
5.15
Space segment
Downlink
Uplink
Time/
position
Control segment
B 2253 B
User segment
Figure 1
Global Positioning System
Digital Techniques
5.15.7 - HO - 8
Module 5
Preliminary
Notes
5.15
7
2
18
10
15
5
12
19
21
13
16
20
14
1
11
S 0163
17
Figure 2
GPS Satellite Constellation
Digital Techniques
5.15.7 - HO - 9
Module 5
Preliminary
Notes
5.15
3
2
5
2. For triangulation, the GPS

measures distances by using
the travel time of the signal.
4. Once the distance to a satellite is

known, the satellite position in
space needs to be known as well.
5. As the GPS signal travels
through the atmosphere,
it gets delayed.
FE 0502 B
1. Triangulation from satellites

is the basis of the GPS.
3. To measure the travel time, the

GPS needs very accurate clocks.
Figure 3
Basic Principles of the GPS
Preliminary
Notes
Digital Techniques
5.15.7 - HO - 10
Module 5
5.15
E 0503 A
Figure 4
Ranging with One Satellite
Digital Techniques
5.15.7 - HO - 11
Module 5
Preliminary
Notes
5.15
FE 0504 A
2 measurements provide
this circle of position
Figure 5
Ranging with 2 Satellites
Digital Techniques
5.15.7 - HO - 12
Module 5
Preliminary
Notes
5.15
3 measurements provide
2 possible points of position
FE 0505 A
Figure 6
Ranging with 3 Satellites
5.15
X X
X X
X X
E 0507 A
Transmitter (satellite)
Receiver
Figure 7
Digital Techniques
5.15.7 - HO - 13
Module 5
Preliminary
Notes
Pseudo--random Code Principle
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.7 - HO - 14
Receiver
E 0506
Time difference
Transmitter (satellite)
Figure 8
Time Difference Between Transmitter

and Receiver
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.7 - HO - 15
A
B
4s
FE 0508
6s
Figure 9
Position without Timing Faults
Digital Techniques
5.15.7 - HO - 16
Module 5
Preliminary
Notes
5.15
A
B
5s
(wrong time)
4s
7s
(wrong
time)
6s
FE 0509
XX
Figure 10 Position with Timing Fault

(Two Satellites)
Digital Techniques
5.15.7 - HO - 17
Module 5
Preliminary
Notes
5.15
A
B
5s
(wrong time)
X
7s
(wrong time)
XX
9s
(wrong time)
FE 0510
Figure 11 Position with Timing Fault

(Three Satellites)
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.7 - HO - 18
Monitor station
Figure 12 Monitoring Satellites
Note: DSCS=Defence satellite communication system
L1 and L2
downlink
GPS satellite
Master control
station
S--band
uplink/downlink
Ground antenna
E 0511 A
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.7 - HO - 19
Figure 13 Control and Monitoring Stations of the GPS
Ground antenna
Monitoring station
Master control station
Legend:
Equator
Hawaii
Colorado Springs
Ascencion
Diego Garcia
Kwajalein
E 0512 B
Preliminary
Notes
Module 5
5.15.8
Inertial Reference System
5.15.8.1
Introduction
5.15
Digital Techniques
5.15.8 - HO - 1
Inertial Reference System and Inertial Navigation System

To understand the modern inertial reference system (IRS) it is required to start with
the explanation of the INS (inertial navigation system) which is the forerunner of the
IRS and is still used in some types of aircraft.
The INS is a long range NAV system that does not rely on the reception of radio
waves. The key to the operation of INS is the very accurate measurement of the
acceleration forces.
Theory of Operation
Refer to Figure 1.
The INS is the only self--contained single source of all navigation data within the
aircraft.
After being supplied with initial position information, it can continuously update
extremely accurate displays with:
V position
V ground speed
V attitude
V heading.
It also provides guidance or steering information for the autopilot and flight instruments.
Refer to Figure 2.
The basic measuring instrument of the INS is the accelerometer. There are two
accelerometers fitted in the system. One measures the aircrafts acceleration in the
north/south direction. The other measures the aircrafts acceleration in the east/west
direction.
Basically, the accelerometer is a swinging device. When the aircraft accelerates, the
pendulum (due to inertia) swings off its null position. A signal pick--off device tells
how far the pendulum is off the null position.
The signal from the pick--off device is sent to an amplifier, and current from the
amplifier is sent back into the accelerometer to the torque motor. The torque motor
restores the pendulum back to its null position.
Triple--Axis Navigation Computation
As long as the aircraft flies in one direction only, one accelerometer is enough to
determine the distance travelled from the starting position. Since the aircraft may
move in any direction, three accelerometers are required to sense the acceleration
90 apart.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.8 - HO - 2
Platform Levelling
Refer to Figure 3.
To keep the accelerometer levelled, it is mounted on a gimbal assembly, known as the
platform. The platform is a mechanical device which lets the aircraft go through any
attitude change and at the same time keeps the accelerometers levelled.
The inner element of the platform (where the accelerometers are fitted) also carries
the gyroscopes and is used to stabilise the platform. The gyros supply signals to the
motors which control the gimbals of the platform.
5.15.8.2
Gyrocompassing
The platform is kept horizontal to the earths surface. Within the inertial reference
system there is a navigation computer which receives an input of latitude and
longitude from the pilot, after the system is turned on. This input tells the navigation
computer its present position. It is the starting point from which the INS can navigate.
Before navigation can start from an actual position there must be a reference to true
or magnetic north. This is called platform north alignment or gyrocompassing. The
most common method of platform north alignment is called the wander azimuth
system.
Wander Azimuth System

System Operation
Refer to Figure 4.
The basic fundamentals of a wander azimuth system are identical to a basic north
pointing system, except that during gyrocompassing the platform is allowed to take
an angle with respect to true north, that is the initial wander (or: alpha) angle.
The gyro platform is levelled. Firstly it is assumed that the alpha angle is zero, so all
the earth rate compensation is sent to the X--gyro (Figure 4, detail a)).
Because the initial assumption is not correct, the platform will tilt as the earth rotates
(detail b)).
This tilt condition is detected by the accelerometers. Now the gyro torquing signal will
be split between the two gyros, to compensate for the earths rate of rotation. Instead
of continuing to send all the earth rate compensation to the X--gyro and pointing the
platform to north to satisfy that condition, some earth rate compensation is sent to
the Y--gyro.
When the correct combination of earth rate compensation to the gyros is given for
the particular wander angle, then the platform will remain levelled as the earth rotates
(detail c)). The ratio of earth rate compensation sent to the gyros is then used to
compute the initial wander (or alpha) angle.
Preliminary
Notes
Digital Techniques
5.15.8 - HO - 3
Module 5
5.15
Accelerometer
Refer to Figure 5.
Operation of a wander azimuth system is the same as a basic north pointing system,
except that the wander angle is taken into account in all computer calculations.
The accelerometers do not point along north/south and east/west directions but are
offset by the wander angle. However, the computer knows the wander angle and can
easily work out north/south and east/west accelerations, using the sensed acceleration and the computed wander angle.
5.15.8.3
INS Block Diagram and Main Parts

Figure 6 shows the block diagram of an inertial navigation system. The main
components are:
V mode selector unit
V control display unit
V inertial reference unit.
This system is used both in military and civil aircraft. It has the advantage that is can
store way points (WPTS) and a flight plan to let the aircraft fly from the departure point
to its destination by using only INS as the navigation source. The INS can also control
the automatic flight control system.
Mode Selector Unit

Refer to Figure 7.
The mode selector unit (MSU) is used to operate the INS.
Refer to Figure 8.
The control display unit (CDU) is used by the pilot to input present position and way
points into the navigation computer. On the numerical displays, data are displayed
which come from the navigation computer.
The display selector switch controls what information is displayed on the numerical
displays.
The data keyboard is used to enter or modify present position or way point information.
Inertial Reference Unit
Figure 9 shows an inertial reference unit (IRU) with its main components:
V stable platform (gimbal assembly)
V computer
V power supply assembly.
Preliminary
Notes
5.15.8.4
Module 5
5.15
Digital Techniques
5.15.8 - HO - 4
The Strapdown Inertial Reference System
Theory of Operation
The disadvantage of the gimbal assembly in the INS is that it has many moving parts.
As these parts become older, they create errors in navigation accuracy.
The cost of servicing and maintenance of the gimbal assembly is high and the skill
level required to service the gimbal assembly is also high.
To improve reliability and to reduce maintenance costs the strapdown IRS has been
developed. With improvements in gyro technology and in navigation computer
software, the gimbal has been replaced.
The gyros and accelerometers are fixed or strapped to the airframe inside the IRS.
They still sense pitch, roll and yaw, and the accelerometers are still able to sense the
aircraft accelerations.
But the job of the gimbal has been replaced by a computer program.
The IRS performs the same basic navigational functions as an INS but as its fully
digital computer can also be pre--programmed with other relevant reference data
there was the necessity in changing its name.
Inertial Reference Unit
A modern IRS does not use conventional spinning gyroscopes and does not need a
gyro stabilized platform.
It contains a modern IRU (inertial reference unit) consisting of three accelerometers
and three ring laser gyros.
The three accelerometers measure acceleration forces along the aircrafts three
axes:
V vertical
V lateral
V longitudinal.
Ring Laser Gyro
Each ring laser gyro is a device with no moving parts that replaces a conventional
gyro with a spinning wheel.
Refer to Figure 10.
The ring laser gyro uses a triangular housing and two different laser beams. A
computer processes the signals from the three accelerometers and the three laser
gyro sensors to determine:
V aircraft heading
V position
V groundspeed.
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.8 - HO - 5
Strapdown System
This modern IRU is referred to as a strapdown system because it does not need a
gyro stabilized platform like that shown in Figure 3.
The corrections that are needed are calculated by the computer.
Like any inertial navigation system the strapdown IRS must be given the geographical coordinates for the present position during the alignment before take off.
The IRS can be programmed with complete routes of flight and can be coupled to the
aircraft autopilot to provide steering commands.
a) On track
Digital Techniques
5.15.8 - HO - 6
Module 5
Preliminary
Notes
5.15
True north
WPT 1
GS
TK
HDG
DSR
TK
POS
DA
DIS/TIME
WPT 0
Wind direction
and speed
b) Off track
TIME
True north
GS
DSR TK
WPT 1
TKE
DA
HDG
TK
DIS
XTK
POS
Wind direction
and speed
Figure 1
E 1506
WPT 0
INS/IRS Terminology
Digital Techniques
5.15.8 - HO - 7
Module 5
Preliminary
Notes
5.15
Torquer
Amplifier
E 1485 A
North
acceleration
Signal
pick--off
Force
Null
Figure 2
Principle of a North--Orientated
Accelerometer
Module 5
Preliminary
Notes
5.15
Digital Techniques
5.15.8 - HO - 8
Gyroscope
Accelerometer
Gimbal assembly
Platform
FE 1489 A
Aircraft
Figure 3
Mounting of the Gimbal--Stabilised

Platform in an Aircraft
Digital Techniques
5.15.8 - HO - 9
Module 5
Preliminary
Notes
5.15
a) Platform levelled
Platform levelled,
all earth rate
compensation
sent to X--gyro
=
Earth rate
compensation
Y
X
b) Platform not levelled
Y
Earth rate
compensation
Y
X
Wrong earth rate

compensation causes
platform to tilt
as earth rotates
Platform relevels and,
when correct X--/Y-combination is determined,
platform stays levelled
c) Platform relevelled
Y
X
Earth rate
compensation
Tilt is detected by accelerometers

causing earth rate compensation
to be split between the 2 gyros
Figure 4
FE 1500 C
Platform Alignment: Gyrocompassing
Preliminary
Notes
Module 5
5.15
Digital Techniques
5.15.8 - HO - 10
Computed
north acceleration
=
Sensed acceleration
Computed
east
acceleration
=
FE 1501
Sensed
acceleration
Figure 5
Accelerometer with Wander Azimuth

System
Preliminary
Notes
Digital Techniques
5.15.8 - HO - 11
Module 5
5.15
MSU
ON/OFF/Mode selection
Pitch/roll
Aircraft power
To ADI
TRUE HDG
INU
Backup battery
To HSI
MAG HDG
To HSI
NAV HDG
To AFCS
Steering
To HSI
commands
LAT/LONG
CDU
Figure 6
Inertial NAV unit

Mode selector unit
Control display unit
E 1502 C
Legend: INU
MSU
CDU
Input by pilot
Way points
Simplified Block Diagram of an INS
Digital Techniques
5.15.8 - HO - 12
Module 5
Preliminary
Notes
5.15
Ready navigation
light
ALIGN
NAV
STBY
READY
NAV
ATT
REF
BATT
FE 1503 A
OFF
Mode
selector
switch
Figure 7
Battery
light
Mode Selector Unit (MSU)
Digital Techniques
5.15.8 - HO - 13
Module 5
Preliminary
Notes
5.15
Left
numerical
display
DIM
control
Right
numerical
display
ALERT
light
BATT
light
FROM/TO
way point
display
TK CHG
push--button
AUTO/MAN/
RTM switch
INSERT
push--button
W
P
T
ALERT
BATT
WARN
N
2
W4
6E
L7
8
S
9R
D
I
M
TK
CHG
MAN
AUTO
POS
XTK/TKE
HDG
DA
TK
GS
RTM
WPT
INSERT
DIS/TIME
WIND
DSR TK
STS
TEST
HOLD
Display
selector
switch
Figure 8
WARN
light
0
DTK
CLEAR
Data
keyboard
FE 1504 D
WPT
selector
switch
HOLD
push--button
Control Display Unit (CDU)
Monitor
assembly
Cooling air
inlet
Elapsed-- System
fault
time
indicator indicator
Inertial Reference Unit (IRU)
Temperature
control
Analogue test
connector
Frequency
control
assembly
Stable
platform
Servo--amplifier
assembly
5.15
Figure 9
Mode
assembly
Analogue--to--digital
multiplexer
Analogue--to--digital
converter
Digital--to--synchro
electronics
Power
supply
assembly
Computer
Module 5
E 1505 B
Preliminary
Notes
Digital Techniques
5.15.8 - HO - 14
Digital Techniques
5.15.8 - HO - 15
Module 5
Gas discharge region
5.15
Cathode
Mirror (1 of 3)
Preliminary
Notes
Figure 10 Laser Beam IRU
Anode
Piezoelectric
dither motor
Light beam
Corner prism
Readout detector
Light beam
Anode
C 0139
Preliminary
Notes
5.15.9
Module 5
5.15
Digital Techniques
5.15.9 - HO - 1
Traffic Alert and Collision Avoidance System
Introduction
Refer to Figure 1.
A traffic alert and collision avoidance system (TCAS) is used to reduce mid--air
collisions and so--called near miss incidents between aircraft. TCAS helps to
prevent disaster by presenting a display of surrounding aircraft and, when necessary,
providing audible warnings and manoeuvre instructions to help pilots to avoid danger
with a gentle manoeuvre.
There are two categories of TCAS:
V TCAS I and
V TCAS II.
Both systems provide a map--like display of the surrounding traffic. Both provide a
traffic advisory (TA) whenever other aircraft come close. During a TA, a synthesized
voice announces TRAFFIC TRAFFIC, and the symbol for the other aircraft changes
shape and colour.
TCAS II, the more sophisticated TCAS, has an additional function called a resolution
advisory (RA). During an RA, the TCAS will command a manoeuvre such as CLIMB
CLIMB, or DESCEND DESCEND, or may tell the pilot not to manoeuvre.
Note:
The European organization for the safety of air navigation (EUROCONTROL),

which recommends aviation regulations for European nations, has suggested
requiring a system identical to the latest TCAS II system. In Europe, the system
will be called the airborne collision avoidance system (ACAS II).
Function
TCAS consists of a radio transmitter and a receiver (transponder), directional
antennae, a computer and a cockpit display. A TCAS sends out radio signals (called
interrogations), similar to those from the SSR part of an air traffic control (ATC) radar
on the ground.
When another airplanes transponder receives an interrogation, it transmits a reply.
The TCAS computer uses the time between the interrogation and the reply to
calculate the distance. It uses information from the directional antennae to determine
the direction.
If the other aircraft has a transponder that provides altitude data, the TCAS displays
the relative altitude of the other aircraft and shows whether it is climbing or descending.
Refer to Figure 2.
Example:
If an aircraft is 200 feet above and another is 1,400 feet below own aircraft, +02
appears at the higher aircrafts symbol and --14 at the lower aircrafts one. If the
aircraft is climbing at a rate of more than 500 feet per minute, an arrow pointing
upwards appears beside its symbol. If descending, the arrow points downwards.
Digital Techniques
5.15.9 - HO - 2
Module 5
Preliminary
Notes
5.15
A TCAS is not a radar and cannot detect an aircraft without a compatible transponder. Some transponders are incompatible with TCAS and will not be detected.
Regulations limit the TCAS power to reduce radio interference. This effectively limits
the TCAS range to approximately 45 nm forward and significantly less to the sides
and the rear. In some systems, the flight crew may select shorter display ranges to
provide greater detail and less clutter while in heavy traffic.
Although TCAS can track up to 45 aircraft, it can display a maximum of 30, selecting
the highest--priority targets for display.
A traffic advisory is issued when another aircraft is within approximately 48 s of its
closest point of approach, (the point where both aircraft will be closest together),
based on projections derived from the current flight path and speed. When a TA is
issued, the diamond--shaped aircrafts symbol changes to a yellow round dot and a
voice announces TRAFFIC TRAFFIC.
If both aircraft continue on a conflicting course after the TA, the system announces a
resolution advisory (only TCAS II) approximately 35 s before the closest point of
approach is reached. During an RA, the other aircrafts symbol changes to a solid red
square block and the voice announces a manoeuvre, e.g. CLIMB CLIMB.
The system also displays a green band on the vertical speed indicator to show the
desired rate for the manoeuvre. These suggested manoeuvres are gentle and
normally not noticed by passengers.
Note:
TCAS regulations allow commands for vertical manoeuvres only, not for turning
manoeuvres.
When a TCAS II issues an RA involving another TCAS II--equipped aircraft,
it coordinates with the other aircrafts TCAS II to avoid mirror--image manoeuvres,
such as having both airplanes climb.
The TCAS system includes a TCAS processor, one or two directional antenna(e),
a transponder and a cockpit display (separate indicator or integrated in the electronic
display system). Following information are provided by the transponder:
V Mode A transponder:
sends identification code without altitude
V Mode C transponder:
sends identification code and encoded altitude
V Mode S transponder (TCAS II only):
sends identification code, encoded altitude and other datafields including
aircraft discrete address.
Figure 3 shows a radio management unit (RMU) which includes the control panel for
transponder/TCAS operation.
Preliminary
Notes
Digital Techniques
5.15.9 - HO - 3
Module 5
5.15
TCAS System Components

Figure 1
Bottom antenna
TCAS indicator
Top antenna
TCAS
transponder
control
TCAS processor
Transponder
FE 2561 A
Digital Techniques
5.15.9 - HO - 4
Module 5
Preliminary
Notes
5.15
RNG 5
+02
--14
+02
--14
+02
+02
--14
--14
Symbol Legend
Distance more than 6 nm
Distance less than 6 nm
Closest point of approach within 20 s to 48 s
Closest point of approach within 15 s to 35 s
Own aircraft
Climb rate more than 500 feet
Sink rate more than 500 feet
Altitude 1,400 feet below own aircraft
Altitude 200 feet above own aircraft
Figure 2
FE 2562
--14
+02
TCAS Display
5.15
COM 1 NB
NAV1
123.20
131.27
110.25
109.35
MEMORY--3
MEMORY--1
ATC/TCAS
ADF1
1471
162.5
1 ATC ON
ANT
TCAS DSPY 1
REL
BELOW
MLS1
ERR
500 MD
BAZ:300M E
CH:
SQ
DIM
1/2
STO
ID
PGE
TST
DME
TUNE
E 2564
ALT:
Figure 3
Digital Techniques
5.15.9 - HO - 5
Module 5
Preliminary
Notes
RMU with TCAS Control

Digital Techniques: Understanding Electronic Instrument Systems and Numbering Systems

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Electronic Instrument Systems

Electronic Flight Instrument Systems

electronic attitude deviation indicator (EADI)

electronic horizontal situation indicator (EHSI)

V symbol generator (SG)

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For training purposes only -- Rev. 01/09

Electronic Flight Instruments

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Digital flight data

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EFIS Installation and Signal Interfacing

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Cockpit with EFIS and Conventional Indicators

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Modern Flight Deck Layout (Example)

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Mechanization and automation are increasingly used in production processes. Some

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The decimal system may be expressed fully in mathematical terms by considering

Other Number Systems

226 to the base of 8

1042 to the base of 5

1101 to the base of 2 .

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For training purposes only -- Rev. 01/09

The Binary Number System

The code shown in Figure 2 is weighted; a 1 in the 20 position of the

V The binary number 1010 has a decimal value of

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The Octal Number System

The Hexadecimal Number System

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Mathematical Conversion of Number Systems

Conversion of Decimal Numbers into Binary and Hexadecimal Numbers

The solution is (1 0100 1110)2.

The decimal remainder 14 equals the hexadecimal number E as shown in Figure 2,

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Value of digit place

Value of digit place

Remainder after division

The octal equivalent of 29810 is 4528.

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Conversion of Octal Numbers into Decimal Numbers

Decimal value of digit

Value of digit place

Value for this number

Running sum (from left to

Conversion of Hexadecimal Numbers into Binary Numbers and Vice Versa

The complete binary conversion therefore is:

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