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8051 C

2-1

2-1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD) P3.0
(TXD) P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
XTA L2
XTA L1
VSS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

MCS-51

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

VCC
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
EA (Vpp)
ALE (PROG)
PSEN
P2.7 (A15)
P2.6 (A14)
P2.5 (A13)
P2.4 (A12)
P2.3 (A11)
P2.2 (A10)
P2.1 (A9)
P2.0 (A8)

2-1 MCS-51

V CC (40) (+5V)
V SS (20) (GND)
RST (9)
(1) 2 24
12MHZ 2
(uS)

2-2

XTAL1/XTAL2 (19/18)
1
C1

XTAL1
C2

XTAL2

VSS

2-2

XTAL2
XTAL1

.
.

XTAL2
XTAL1
VSS

VSS

(a)

XTAL1
XTAL2

VSS

(b)

(c)

2-3 (a) HMOS (b) CHMOS (c) HMOS CHMOS


1 3.5MHZ~12MHZ
C1=C2=30pF 10pF
2C1C2

8051 C

2-3

EA (31)
1 EA=1 (V CC ) CPU (ROM) 8051
4KB 8052 8KBCPU

2EA=0 (GND)CPU
64KB ROM 8031 8032 EA

ALE/PROG (30) /
1 CPU
0 (P0)

74LS373)
1/6
2(Program)

PSEN (29)
1PSEN 2
2PSEN 2
CPU

P0 (32~39) 0
8 Open Drain I / O (
) 8 LS TTL

2-4

I / O (2K~10K)

(A0~A7) CPU
2 (A8~A15) 16
64K

P1 (1~8) 1
8 ( 20 K~30K) I / O
4 LS TTL

P2 (21~28) 2
8 ( 20 K~30K) I / O
4 LS TTL
(A8~A15)

P3 (10~17) 3
8 ( 20 K~30K) I / O
4 LS TTL 3
2-1

P3.0 RXD ()

P3.4 T0 ( 0 )

P3.1 TXD ()

P3.5 T1 ( 1 )

P3.2 INT0 ( 0 )

P3.6 WR ()

P3.3 INT1 ( 1 )

P3.7 RD ()

2-1 3

2-5

8051 C

2-2
XTAL1

XTAL2

T0

4KB(8KB)ROM

T1 T2

128(256)Bytes

0/1/(2)

/
I/O

8051 CPU

/INT0

/INT1

/EA ALE /PSEN

P0 P1 P2 P3

RXD

TXD

2-4 8051 (8052)

2-3 (CLOCK)
MCS-51
XTAL1 XTAL2
2-2
CPU
2 6 (S1~S6) 12
2-5 12MHZ
1 (uS)
(Fetch)

2-6

(Byte) CPU
(PC)
2-5

S1
XTAL2

S2 S3 S4 S5 S6 S1 S2

S3 S4 S5 S6

P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2

ALE

( )

S1 S2 S3 S4 S5 S6
(a) 1 1 INC A

S1 S2 S3 S4 S5 S6
(b) 2 1 ADD A#data

()

S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
(c) 1 2 INC DPTR

( )

( ALE)

S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6

(d) MOVX ( 1 2 )

2-5 MCS-51

8051 C

2-7

2-4 (RESET)
MCS-51 CPU RST ( 9 )
2 ( 24 )

2-6 ( 0 ~ 3)
CPU 0000H
(SFR) 2-2

+5V

SW

10uF

VCC (40)

RST (9)
10K

VSS (20)

2-6

1 MCS-51
RST MCS-51 RST
0MCS-51

2 SW MCS-51
3(P0~P3) CPU
0000H

2-8

SFR

0000H

E0H
00H
F0H
00H
D0H
00H
07H

DPL=82H
00H
DPTR
DPH=83H
00H
P0
80H
FFH
P1
90H
FFH
P2
A0H
FFH
P3
B0H
FFH
IP (8051)
B8H
XXX00000B
IP (8052)
B8H
XX000000B
IE (8051)
A8H
0XX00000B
IE (8052)
A8H
0X000000B
TMOD
89H
00H
TCON
88H
00H
TH0
8CH
00H
TL0
8AH
00H
TH1
8DH
00H
TL1
8BH
00H
TH2 (8052)
CDH
00H
TL2 (8052)
CCH
00H
RCAP2H (8052)
CBH
00H
RCAP2L (8052)
CAH
00H
T2CON (8052)
C8H
00H
SCON
98H
00H
SBUF
99H

PCON(HMOS)
87H
0XXXXXXXB
PCON(CHMOS)
87H
0XXX0000B
2-2 (SFR)
PC
ACC
B
PSW
SP

8051 C

2-9

2-5 (Program Counter ; PC)


PC 16
CPU 2 16 = 65536
64K (64KB)PC
0000H CPU
PC 1 CPU PC

( GOTO)()PC
CPU ()

2-6 ( ROM )
MCS-51
7 2-3 7

8051 4KB 8052 8KB


EA ( 31 )
(EA=1 ) CPU
8051 60KB 8052 56KB ROM
8031 8032 EA (EA= 0)
64KB

2-10

EPROM ( IC 27 ) EEPROM ( IC
28 ) 2-7

0000H
( RESET )
0003H
0 ( /INT0 )
000BH
/ 0
0013H
1 ( /INT1 )
001BH
/ 1
0023H

002BH
/ 2 ( 8052 )
2-3 MCS-51 7

FFFFH

FFFFH

56KB ROM

60KB ROM

2000H
1FFFH
1000H
0FFFH
4KB ROM
(a) /EA=1 (8051)

FFFFH

64KB ROM

8KB ROM
0000H

0000H
(b) /EA=1 (8052)

0000H
(c) /EA=0 (8051/8052)

2-7 MCS-51

2-7 ( RAM )
8031805189C51 128 (Byte)
8032805289C52 256 (Byte)
2-8 64KB

8051 C

2-11

7FH

FFH

FFH

RAM

80H

30H
2FH

SFR
80H

7FH


RAM
00H

20H
1FH
18H
17H
10H
0FH
08H
07H
00H

BANK3
BANK2
BANK1
BANK0

2-8 MCS-51

2-7-1
00H~1FH 32 4
8 PSW 4 (RS1)
3 (RS0) 8 R0 ~ R7
2-4 KeilC using 0~3

RS1 (PSW.4)
0
0
1
1

RS0 (PSW.3)

0
BANK0
1
BANK1
0
BANK2
1
BANK3
2-4

R0 ~ R7
R0 ~ R7
R0 ~ R7
R0 ~ R7

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