c3745 I1 Log

Jun 23 20:52:09.
010 VTTY: Console port: waiting connection on tcp port 2001 for
protocol IPv4 (FD 10)
Jun 23 20:52:09.052 slot0: C/H/S settings = 0/4/32
Jun 23 20:52:09.055 slot1: C/H/S settings = 0/4/32
Jun 23 20:52:09.322 C3745_BOOT: starting instance (CPU0 PC=0xffffffffbfc00000,id
le_pc=0x60a80f7c,JIT on)
Jun 23 20:52:09.322 CPU0: CPU_STATE: Starting CPU (old state=2)...
Jun 23 20:52:09.418 ROM: Microcode has started.
Jun 23 20:52:32.762 ROM: trying to read bootvar 'NO_CP0'
Jun 23 20:52:32.763 ROM: trying to read bootvar 'NO_RANDOM_NUM'
Jun 23 20:52:32.763 ROM: trying to read bootvar 'RANDOM_NUM'
Jun 23 20:52:32.763 ROM: trying to read bootvar 'OFFSET'
Jun 23 20:52:39.496 ROM: trying to read bootvar 'WARM_REBOOT'
Jun 23 20:52:39.499 CPU0: IO_FPGA: write to unknown addr 0x30, value=0x0, pc=0xf
fffffff80a76f68 (size=1)
Jun 23 20:52:39.499 CPU0: IO_FPGA: read from unknown addr 0x30, pc=0xffffffff80a
76f7c (size=1)
Jun 23 20:52:39.639 CPU0: IO_FPGA: read from unknown addr 0x6, pc=0x6023fca4 (si
ze=2)
Jun 23 20:52:39.640 CPU0: IO_FPGA: read from unknown addr 0x10000a, pc=0x602475a
0 (size=2)
Jun 23 20:52:39.640 CPU0: IO_FPGA: write to unknown addr 0x10000a, value=0x0, pc
=0x602475b0 (size=2)
Jun 23 20:52:39.640 ROM: unhandled syscall 0x00000047 at pc=0x60a786fc (a1=0x800
07db4,a2=0x00000010,a3=0xbfb00000)
Jun 23 20:52:40.502 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x20, pc=0x
60254a54 (size=2)
Jun 23 20:52:40.503 CPU0: PCI: read request for device 'gt96100' at pc=0x6025797
8: bus=0,device=0,function=0,reg=0x00
c: bus=0,device=0,function=0,reg=0x00
Jun 23 20:52:40.504 CPU0: PCI: write request (data=0x00000000) for device 'gt961
00' at pc=0x60257874: bus=0,device=0,function=0,reg=0x10
00' at pc=0x60257874: bus=0,device=0,function=0,reg=0xa0
00' at pc=0x60257874: bus=0,device=0,function=0,reg=0x0c
Jun 23 20:52:40.504 CPU0: PCI: write request (data=0xc0000000) for unknown devic
e at pc=0x60257874 (bus=0,device=0,function=1,reg=0x10).
Jun 23 20:52:40.504 CPU0: PCI: write request (data=0xe0000000) for unknown devic
Jun 23 20:52:40.505 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0xf000, pc=
0x60255098 (size=2)
Jun 23 20:52:40.505 CPU0: PCI: read request for device 'ti2050b' at pc=0x6025798
Jun 23 20:52:40.505 CPU0: PCI: write request (data=0xffff0000) for device 'ti205
0b' at pc=0x60257854: bus=0,device=1,function=0,reg=0x04
Jun 23 20:52:40.505 CPU0: PCI: write request (data=0x0000f810) for device 'ti205
0b' at pc=0x60257854: bus=0,device=1,function=0,reg=0x0c
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x00040100) for device 'ti205
Jun 23 20:52:40.506 PCI: PCI bridge 0,1,0 -> pri: 00, sec: 01, sub: 04
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x4d704d00) for device 'ti205
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x4d704d00) for device 'ti205
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x00014d01) for device 'ti205
0b' at pc=0x60257854: bus=0,device=1,function=0,reg=0xf0
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x4df04d80) for device 'ti205
Jun 23 20:52:40.506 CPU0: PCI: write request (data=0x4df04d80) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x000c0900) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x000c0900) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x4e704e00) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x4e704e00) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x00014e01) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x0280bfa0) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti205
Jun 23 20:52:40.507 CPU0: PCI: write request (data=0x4ef04e80) for device 'ti205
Jun 23 20:52:40.508 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x602478b4 (s
ize=2)
Jun 23 20:52:44.659 ROM: unhandled syscall 0x0000003e at pc=0x60a786fc (a1=0x800
07da4,a2=0x00002580,a3=0x64260000)
07dac,a2=0x00000000,a3=0x64260000)
Jun 23 20:52:45.930 ROM: trying to read bootvar 'BOOT'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'CONFIG_FILE'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'BOOTLDR'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'RSHELF'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'DSHELF'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'DSHELFINFO'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'RESET_COUNTER'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'CHRG_LOCRECSN'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'CHRG_ID'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'SLOTCACHE'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'OVERTEMP'
Jun 23 20:52:45.930 ROM: trying to read bootvar 'DIAG'
Jun 23 20:52:46.167 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x607e5fe8 (s
ize=2)
Jun 23 20:52:46.167 CPU0: MTS: read access to undefined address 0x3c080022 at p
c=0x607e5be4 (size=1)
Jun 23 20:52:46.168 CPU0: MTS: read access to undefined address 0x3c08002b at p
c=0x607e5c28 (size=1)
Jun 23 20:52:46.168 CPU0: MTS: write access to undefined address 0x3c08002b at p
c=0x607e5c34, value=0x00000020 (size=1)
c=0x607e5c38 (size=1)
c=0x607e5c40, value=0x00000000 (size=1)
c=0x607e5c4c (size=1)
c=0x607e5c58, value=0x00000040 (size=1)
c=0x607e5c6c (size=1)
Jun 23 20:52:46.168 CPU0: MTS: write access to undefined address 0x3c080023 at p
c=0x607e5c78, value=0x00000000 (size=1)
c=0x607e5c84 (size=1)
c=0x607e5c94, value=0x00000080 (size=1)
c=0x607e7a34 (size=1)
c=0x607e7a40, value=0x00000080 (size=1)
c=0x607e7a44 (size=1)
c=0x607e7a6c (size=1)
c=0x607e5d80, value=0x00000002 (size=1)
c=0x607e5d88, value=0x00000002 (size=1)
c=0x607e5d90, value=0x00000002 (size=1)
Jun 23 20:52:47.052 CPU0: MTS: write access to undefined address 0x3c08000a at p
c=0x607e5d94, value=0x00000002 (size=1)
c=0x607e5d98, value=0x00000002 (size=1)
Jun 23 20:52:47.052 CPU0: MTS: write access to undefined address 0x3c08000c at p
c=0x607e5d9c, value=0x00000002 (size=1)
c=0x607e6c20 (size=1)
Jun 23 20:52:47.982 CPU0: IO_FPGA: read from unknown addr 0x4c, pc=0x60248aa0 (s
ize=2)
Jun 23 20:52:47.982 CPU0: IO_FPGA: write to unknown addr 0x4c, value=0x0, pc=0x6
0248aa8 (size=2)
Jun 23 20:52:47.982 CPU0: IO_FPGA: read from unknown addr 0x2e, pc=0x60248ac8 (s
ize=2)
Jun 23 20:52:47.982 CPU0: IO_FPGA: write to unknown addr 0x2e, value=0x40, pc=0x
60248ad8 (size=2)
Jun 23 20:52:48.004 CPU0: JIT: partial JIT flush (count=792)
Jun 23 20:52:48.668 CPU0: JIT: flushing data structures (compiled pages=928)
Jun 23 20:52:50.091 ROM: trying to read bootvar 'PMDEBUG'
Jun 23 20:52:50.100 ROM: trying to read bootvar 'MONDEBUG'
Jun 23 20:52:50.858 ROM: unhandled syscall 0x0000001a at pc=0x60a786fc (a1=0x651
1d854,a2=0x00000001,a3=0x00000023)
1d854,a2=0x00000001,a3=0x00000023)
Jun 23 20:52:51.502 CPU0: IO_FPGA: read from unknown addr 0x16, pc=0x607e5fa8 (s
ize=2)
Jun 23 20:52:51.502 CPU0: IO_FPGA: write to unknown addr 0x16, value=0x1, pc=0x6
07e5fb0 (size=2)
Jun 23 20:52:51.511 ROM: trying to read bootvar 'ROM_PERSISTENT_UTC'
Jun 23 20:52:51.802 CPU0: MTS: read access to undefined address 0x3c08002c at p
c=0x607e6bfc (size=1)
Jun 23 20:52:52.088 ROM: trying to set bootvar 'BSI=0'
Jun 23 20:52:52.089 ROM: trying to read bootvar 'RET_2_RCALTS'
Jun 23 20:52:52.089 ROM: trying to set bootvar 'RET_2_RCALTS='
Jun 23 20:52:53.261 CPU0:

Jun 23 20:52:53.511 CPU0:
Jun 23 20:52:53.761 CPU0:
Jun 23 20:52:54.011 CPU0:
Jun 23 20:52:54.261 CPU0:
Jun 23 20:52:54.511 CPU0:
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Jun 23 20:52:55.012 CPU0:
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Jun 23 20:52:55.511 CPU0:
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Jun 23 20:52:59.766 CPU0:
Jun 23 20:53:00.014 CPU0:
Jun 23 20:53:00.264 CPU0:
Jun 23 20:53:00.515 CPU0:
MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:00.766 CPU0:

Jun 23 20:53:01.016 CPU0:
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Jun 23 20:53:08.259 CPU0:

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Jun 23 20:53:23.257 CPU0:

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Jun 23 20:53:59.237 VTTY:
)
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Console port is now connected (accept_fd=10,conn_fd=18
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Jun 23 20:54:25.209 ROM: trying to set bootvar 'RANDOM_NUM=478351719'
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Console port is now connected (accept_fd=10,conn_fd=18
Jun 23 21:49:09.556 CPU0: MTS: read access to undefined address 0x3c08002c at

Jun 23 21:49:15.488 ROM: trying to set bootvar 'WARM_REBOOT=FALSE'
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Jun 23 22:28:23.315 C3745_STOP: stopping simulation.
Jun 23 22:28:23.315 CPU0: CPU_STATE: Halting CPU (old state=0)...
Jun 23 22:28:23.377 VM: shutdown procedure engaged.
Jun 23 22:28:23.377 VM_OBJECT: Shutdown of object "ns16552"
Jun 23 22:28:23.377 DEVICE: Removal of device ns16552, fd=-1, host_addr=0x0, fla
gs=0
Jun 23 22:28:23.377 VM_OBJECT: Shutdown of object "mem_bswap"
Jun 23 22:28:23.377 DEVICE: Removal of device mem_bswap, fd=-1, host_addr=0x0, f
lags=0
Jun 23 22:28:23.377 VM_OBJECT: Shutdown of object "rom"
Jun 23 22:28:23.377 DEVICE: Removal of device rom, fd=13, host_addr=0xea6d0000,
flags=1
Jun 23 22:28:23.377 MMAP: unmapping of device 'rom', fd=13, host_addr=0xea6d0000
, len=0x200000
Jun 23 22:28:23.377 VM_OBJECT: Shutdown of object "ram"
Jun 23 22:28:23.377 DEVICE: Removal of device ram, fd=12, host_addr=0xea8d0000,
flags=34
Jun 23 22:28:23.377 MMAP: unmapping of device 'ram', fd=12, host_addr=0xea8d0000
, len=0x10000000
Jun 23 22:28:23.558 VM_OBJECT: Shutdown of object "gt96100"
Jun 23 22:28:23.558 DEVICE: Removal of device gt96100, fd=-1, host_addr=0x0, fla
gs=0
Jun 23 22:28:23.558 VM_OBJECT: Shutdown of object "io_fpga"
Jun 23 22:28:23.558 DEVICE: Removal of device io_fpga, fd=-1, host_addr=0x0, fla
gs=0
Jun 23 22:28:23.558 VM_OBJECT: Shutdown of object "ssa"
Jun 23 22:28:23.558 DEVICE: Removal of device ssa, fd=11, host_addr=0xfa8d0000,
flags=2
Jun 23 22:28:23.558 MMAP: unmapping of device 'ssa', fd=11, host_addr=0xfa8d0000
, len=0x7000
Jun 23 22:28:23.559 VM_OBJECT: Shutdown of object "remote_ctrl"
Jun 23 22:28:23.559 DEVICE: Removal of device remote_ctrl, fd=-1, host_addr=0x0,
flags=0
Jun 23 22:28:23.559 VM: removing PCI busses.
Jun 23 22:28:23.559 VM: deleting VTTY.
Jun 23 22:28:23.559 VTTY: Console port: closing FD 10
Jun 23 22:28:23.559 VM: deleting system CPUs.
Jun 23 22:28:23.559 CPU0: CPU_STATE: Halting CPU (old state=1)...
Jun 23 22:28:23.588 VM: shutdown procedure completed.

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Jun 23 20:52:09.

Jun 23 20:52:53.261 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:00.766 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:08.259 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:15.763 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:23.257 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:30.751 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:38.254 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:45.756 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:53:53.245 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:00.497 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:07.999 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:15.504 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:23.007 CPU0: MTS: read access to undefined address 0x3c08002c

Jun 23 20:54:30.249 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:37.753 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:45.254 CPU0:

MTS: read access to undefined address 0x3c08002c at p

Jun 23 20:54:52.760 CPU0:

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p

MTS: read access to undefined address 0x3c08002c at p