PS 431

Time-Overcurrent Protection
Device

T&D

Numerical Time-Overcurrent Protection with

Definite -Time and Inverse -Time Characteristics
PS 431 time-overcurrent
protection devices are used
for selective short-circuit
protection in high-voltage
networks.
The networks can be operated with impedance neutral
grounding, with resonant
grounding or with an isolated
neutral.

1 PS 431 in case for wall surface or panel flush mounting

The PS 431 time-overcurrent

protection device has the
following features:
Four-pole measurement
(A, B, C, N)
Phase-selective phase
current timer stage with
DTOC and IDMT characteristics (IDMT can be set to
normally inverse, very
inverse, extremely inverse,
long time ground fault or RI
inverse)
Time-lag high set phase
current timer stage
Residual current timer
stage with DTOC and IDMT
characteristics (IDMT can
be set to normally inverse,
very inverse, extremely
inverse, long time ground
fault or RI inverse)
Time-lag high set residual
current timer stage
Tripping matrix
Optional latching of the
individual tripping criteria
Possibility of reverse interlocking
Circuit-breaker failure
protection
The protection functions
listed above are complemented by comprehensive selfmonitoring and fault diagnosis. In addition, the PS 431 is
equipped with the following
supplementary functions:
Measuring circuit monitoring
Operating data measurement
Event counting
Fault data acquisition
Fault logging

The PS 431 is constructed

with a multifunctional case
design that is equally well
suited to wall surface mounting or panel flush mounting
due to the reversible terminal
blocks and reversible mounting brackets.
The auxiliary voltage for the
power supply can be separately switched internally from
110-250 V DC to 24-60 V DC.
The binary signal inputs may
be operated with control
voltages of 24-250 V DC.
Current measurement inputs
having a frequency range of
45-65 Hz, input transducers
with 1 A and 5 A taps, and
the surface-mounting design
provide for optimum use and
versatility without variance.
The PS 431 has the following
inputs and outputs:
4 current measurement
inputs
2 binary signal inputs
(optical couplers) with
freely configurable function
assignment
4 output relays with freely
configurable function
assignment
Control and display:
Local control panel
8 LED indicators, including
6 with freely configurable
function assignment
PC interface
Parameters may be set either
from the local control panel or
through the PC interface, as
desired.

PS 431 Time-Overcurrent Protection Device

Functions

Definite or
Inverse Time-Delay
Short-Circuit Protection
The PS 431 time-overcurrent
protection device is generally
equipped with four current
measurement inputs A, B, C
and N.
DTOC Mode
In DTOC mode (Definite Time
Overcurrent), PS 431 has the
following overcurrent timer
stages:
Phase-selective phase
current timer stage I>/tI>
Residual current timer
stage IN>/tIN>
High set phase current
timer stage I>>/tI>>
High set residual current
timer stage IN>>/tIN>>
The effect of the timer stages
measuring in the ground path
on the general starting signal
and therefore on the start of a
fault record can be suppressed, if desired. Formation of
the general trip command by
the residual current timer
stages is then automatically
disabled.

IDMT Mode

Tripping Matrix and Latch

Reverse Interlocking

In the IDMT (inverse definite

minimum time) mode the
phase current timer stage tI>
and/or the residual current
timer stage tIN> are delayed
by an inverse time lag. The
other stages and functions
correspond to the DTOC
mode.

The tripping matrix is used to

decide which of the individual overcurrent timer stages
shall participate in forming
the general trip command.
The phase-selective phase
current timer stage is permanently assigned to the general trip command; this cannot
be changed. Another matrix
is used to determine which of
the individual tripping criteria
shall result in latching of the
general trip command.

The individual overcurrent

timer stages can be blocked
externally by way of two
independent signals. In this
connection it is possible by
using the selection matrix to
determine which of the timer
stages shall be included in
the blocking. This makes it
possible to add on a feature
such as reverse interlocking,
for example (busbar protection with starting the corresponding scan).

For inverse-time delay the

following tripping time characteristics can be selected:
Normally inverse
Very inverse
Extremely inverse
Long time ground fault
RI inverse
The mode, base current,
characteristic type and characteristic factor can be set
independently for the phase
current timer stage and the
residual current timer stage.

All threshold operate values

and lag times can be set
independently.
2 Inverse-time characteristics
Normally inverse
0.14
s
t = characteristic
(I /Iref)0.02 1
factor
Very inverse
t = characteristic
factor

13.5
s
(I /I ref) 1

Extremely inverse
t = characteristic
factor

80
s

(I /Iref)2 1

Long time ground fault

t = characteristic
factor

120
s
(I /I ref) 1

RI inverse
t = characteristic
factor

1
s
0.236
0.339
(I /Iref)

The function of circuit breaker failure protection is also

considered in the tripping
matrix and in the matrix for
setting the latching function.

PS 431 Time-Overcurrent Protection Device

Functions
(continued)

Cir
cuit Br
eaker Failur
e
Circuit
Breaker
Failure
Pr
otection
Protection

Measuring Cir
cuit
Circuit
Monitoring

When the trip command is

issued a timer stage for
monitoring the circuit breaker
is also started. When this
timer stage has elapsed due
to a sustained general starting condition, then the circuit
breaker failure signal is
issued.

Measuring circuit monitoring

of the phase currents is
based on the principle of
maximum allowable magnitude unbalance. In this case
the arithmetic difference
between the maximum and
minimum phase currents as
referred to the maximum
phase current is compared
with the set threshold operate
value. With the appropriate
settings it is also possible to
monitor the phase currents
even with an economy-type
CT connection (CTs in only
two phases).

The input of a circuit breaker

failure signal through an
appropriately configured
binary input brings about a
non-delayed trip command if
the general starting signal is
present.

Operating Data
Measur
ement
Measurement
The PS 431 time-overcurrent
protection device acquires
the following measured
operating data and updates
them at approximately 1 s
intervals, as long as a fault is
not being processed at the
time:
Maximum value of the
three phase currents
Phase currents
Residual current

Event Counting

Self-Monitoring

The following events are

counted by the PS 431 timeovercurrent protection device:
Tripping on faults
Faults
Warning entries

Extensive monitoring routines

in the PS 431 ensure that
internal hardware or software
faults will not lead to malfunctioning of the protective
relaying system. When the
auxiliary voltage VA is turned
on, a function test is carried
out. Cyclic self-monitoring
tests are run during operation. If test results deviate
from the default value, a fault
signal is issued. The result of
fault diagnosis determines
whether a protective blocking
will occur or whether only a
warning will be issued. The
faults diagnosed in conjunction with self-monitoring
are stored in a memory
(monitoring signal memory).
The contents of the monitoring signal memory can be
read from the local control
panel.

Fault Data Acquisition

After the end of a general
starting condition, the following measured fault data are
acquired:
Running time
Short-circuit current
Fault Logging
Protection signals at the time
of a fault are stored in chronological order. A total of five
faults with a maximum of 64
start/end signals each, can
be held in a circular memory
- the signal memory. If more
than five faults occur and no
faults have been erased in
the interim, the oldest fault
record will be overwritten. A
four-digit resettable counter
identifies the individual faults
by serial number.
The fault records can be read
from the local control panel.

The measured data are

displayed as r.m.s. values
and are normalized to the
corresponding nominal value
of the protection device.

PS 431 Time-Overcurrent Protection Device

Design

Mechanical Design

Local Contr
ol Panel
Control

The PS 431 consists of an

aluminum case with reversible connector blocks and
adjustable side brackets.
The case can be used for
wall surface mounting or for
panel flush mounting, as
desired. In either case the
unit is connected by
threaded terminal ends.

The integrated local control

panel comprises two 4-digit,
7-segment LCD displays and
six function keys. The settings, signals and measured
variables are numerically
coded. This code is called
the address and is displayed
in the lower 4-digit 7-segment
display. Access barriers
safeguard against accidental
or unauthorized changing of
settings.

The processor module carrying the local control panel

is mounted directly on the
rear of the removable front
panel. It is connected to the
combined I/O (input/output)
module by a flat connecting
cable. The I/O module contains the voltage supply, the
input transformers, the output
relays, and the optical couplers for the binary inputs.
In the front panel are windows for the display and
label strips located behind
them. The keyboard for the
integrated local control panel
is also located in the front
panel.

Eight LED indicators are

provided for visual signaling.
The first two have permanent
signal assignments, while the
other six can be configured
as desired (see Page 9).
The control panel has two
label strips. The strip on the
left is used to label the LED
indicators, and the strip on
the right provides a visual
record of frequently
performed control steps.
Both strips can be replaced
and labeled by the user as
desired.

Figure 4 on Page 10 shows

the case and mounting
dimensions.

3 Local control panel

PS 431 Time-Overcurrent Protection Device

Technical Data

Notices

General Data

Type Tests

Type Tests (continued)

Manufacturers Conformity Statement

The product designated as PS 431
Time-Overcurrent Protection Device
has been developed and manufactured in conformity with the international standard series EN 60255-6
and in accordance with the provisions
of the Low Voltage Directive issued
by the European Community.

Design
Case suitable for wall surface
mounting or panel flush mounting.

All tests according to EN 60255-6

and DIN 57435 Teil 303

Insulation

Membership in ALPHA
AEG and the company that manufactures our measurement and protective
relays, Hartmann & Braun, are
members of the low-voltage equipment testing and certification association called ALPHA (Frankfurt am
Main, Germany). ALPHA promotes
independent responsibility on the part
of the manufacturer and the assurance of high product quality through
basic process specifications for
equipment inspection and testing in
compliance with applicable standards. When certain conditions are
met, ALPHA also issues officially
recognized product certificates if
required. Furthermore, ALPHA is
working toward international recognition of conformity declarations and
certificates.
DQS Certificate
The internationally recognized,
independent and impartial association for the certification of quality
assurance systems, DQS (Deutsche
Gesellschaft zur Zertifizierung von
Qualittssicherungssystemen), has
awarded AEG the DQS certificate,
thereby certifying that AEG has
introduced and uses a state-of-the-art
quality assurance system that
complies with all requirements stated
in EN ISO 9001 that apply to its
products and services.

Installation Position
Vertical 30
Degree of Protection
IP 51 according to DIN VDE 0470
and EN 60259 or IEC 529
Weight
3.4 kg
Dimensions
See Page 10
Terminal Connection Diagram
See Page 10
PC Interface
DIN 41652 connector, type
Submin-D, 9-pin.
A special connecting cable is
required for electrical isolation.
Terminals
Threaded terminal ends M4,
self-centering with wire protection for
conductor cross-sections of 0.5 to
6 mm2 or 2 x 2.5 mm2
Creepage Distances and Clearances
Per IEC 255-5, series C

Electromagnetic Compatibility
(EMC)
Interference suppression
According to EN 55022 and
DIN VDE 0878 Part 3, class B
1 MHz burst disturbance test
According to IEC 255 Part 22-1,
class III
Common mode test voltage: 2.5 kV
Differential test voltage: 1.0 kV
Test duration: > 2 s
Source impedance: 200
Immunity to electrostatic discharge
According to EN 60801 Part 2,
severity level 3
Contact discharge,
Single discharges: > 10
Holding time: > 5 s
Test voltage: 6 kV
Test generator:
50 to 100 MW, 150 pF/330
Immunity to radiated electromagnetic
energy
According to ENV 50140, level 3
Antenna distance to tested device:
> 1 m on all sides
Test field strength, frequ. band
80 to 1000 MHz: 10 V/m
Test using AM: 1 kHz / 80 %
Single test at 900 MHz:
AM 200 Hz /100 %
Electrical fast transient / burst
requirements
According to IEC 801-4, test severity
level 3
Rise time of one pulse: 5 ns
Impulse duration (50% value): 50 ns
Amplitude: 2 kV / 1 kV
Burst duration: 15 ms
Burst period: 300 ms
Source impedance: 50
Surge immunity test
According to IEC 1000-4-5,
test level 3
Testing of power supply circuits,
unsymmetrically / symmetrically
operated lines
Open-circuit voltage front time / time
to half-value: 1.2 / 50 ms
Short-circuit current front time / time
to half-value: 8 / 20 ms
Amplitude: 1 / 2 kV
Pulse frequency: > 5 / min
Source impedance: 12 / 42
Immunity to conducted disturbances
induced by radio frequency fields
According to IEC 65A/
77B (Sec) 145/110, test level 2
Disturbing test voltage: 3 V

Voltage test
According to IEC 255-5
2 kV AC, 60 s
For the voltage test of the power
supply inputs, direct voltage
(2.8 kV DC) must be used.
The PC interface must not be subjected to the voltage test.
Impulse voltage withstand test
According to IEC 255-5
Front time: 1.2 s
Time to half-value: 50 s
Peak value: 5 kV
Source impedance: 500
Mechanical Robustness
Vibration test
According to IEC 255-21-1,
test severity class 1
Frequency range, in operation:
10 to 60 Hz, 0.035 mm,
60 to 150 Hz, 0.5 g
Frequency range, during transport:
10 to 150 Hz, 1 g
Shock response and withstand test,
bump test
According to IEC 255-21-2,
test severity class 1
Acceleration: 5 g/15 g
Pulse duration: 11 ms
Seismic test
According to EN 60255-21-3, test
procedure A, class 1
5 to 8 Hz, 3.5/1.5 mm,
8 to 35 Hz, 10/5 m/s2
3 1 cycle

Routine Tests
All tests according to EN 60255-6
and DIN 57 435 Part 303
Additional thermal test
100 % controlled thermal endurance
test, inputs loaded

Environmental
Conditions
Allowable ambient temperatures
Operating temp.: 5 C to + 55 C
Storage temp.: 25 C to + 55 C
Shipping temp.: 25 C to + 70 C
Ambient humidity range
Relative humidity to preclude any
condensation;
45 to 75 % (annual mean)

Power frequency magnetic field

immunity
According to EN 61000-4-8, level 4
Frequency: 50 Hz
Test field strength: 30 A/m
Alternating component (ripple) in d.c.
auxiliary energizing quantity of
measuring relays
According to IEC 255-11
12%

PS 431 Time-Overcurrent Protection Device

Technical Data
(continued)

Inputs and Outputs

Information Output

Settings

Measurement Inputs

Operating Data Measurement

Global Function Parameters

Current
Nominal current I nom:
1 and 5 A (terminal choice)

Max. phase current

I P,max: 0.00-18.00 I nom

Increments
0.01

Phase currents
I A:
0.00-18.00 Inom
0.00-18.00 Inom
I B:
0.00-18.00 I nom
I C:

General Starting
without I N> or IN>>
with IN> or IN>>

0.01
0.01
0.01

Residual current
I N:
0.00-3.50 Inom

0.01

Nominal consumption per phase:

< 0.3 VA at Inom
Load rating:
continuous: 4 Inom
for 10 s: 30 Inom
for 1 s: 100 Inom
Frequency
Nominal frequency f nom:
50 or 60 Hz
Operating range:
45 to 65 Hz
Binary Signal Inputs
Equipment:
2 optical coupler inputs (freely
configurable)
Function assignment:
see Page 9
Nominal V In,nom :
24-250 V DC
Operating range:
0.8-1.1 VIn,nom with a residual ripple of
up to 12% of V In,nom
Power consumption per input:
35 mA 30% at V In, nom = 24 V DC
15 mA 30% at V In,nom = 48 V DC
4 mA 30% at VIn,nom = 60-250 V DC
Output Relays
Equipment:
4 output relays (freely configurable)

Event Counting
Number of trip commands:
0 to 9999
Number of faults: 0 to 9999

Fault Data Acquisition

Increments
Running time:
0.00-99.99 s
Short-circuit current:
0.00-36.00 I nom

0.01
0.01

Fault Logging
Up to 5 faults are stored, then the
oldest fault is erased.
Up to 64 signals per fault can be
stored, subsequent signals trigger the
overflow indication.

Trip Command 1/2

tI>
tI>
CBF
tIN>
tI>
tI>
tIN> CBF
tI> tI>>
tI> tI>>
CBF
tI> tI>> tIN>
tI> tI>> tIN> CBF
Latching 1/2
without latching
CBF
tIN>
tIN> CBF
tI>>
tI>>
CBF
tI>> tIN>
tI>> tIN> CBF
tI>
tI>
CBF
tIN>
tI>
tI>
tIN> CBF
tI> tI>>
tI> tI>>
CBF
tI> tI>> tIN>
tI> tI>> tIN> CBF
Trip Command 2/2
without tIN>>
with tIN>>
Latching 2/2
without latching at tIN>>
with latching at tIN>>
Blocking E1
without block

Function assignment:
see Page 9

tIN>>
tIN>
tIN> tIN>>

Contact rating

tI>>
tI>>
tIN>>
tI>> tIN>
tI>> tIN> tIN>>

Rated voltage:
300 V DC, 250 V AC
Continuous current: 5 A
Short-time current:
30 A for 0.5 s
Making capacity:
1000 W (VA) at L/R = 40 ms
Breaking capacity:
0.2 A at 220 V DC and
L/R = 40 ms
4 A at 230 V AC and cos = 0.4
Local Control Panel
Input or output of protection data:
via six keys and two 4-digit displays
State and fault signals:
8 LED indicators
(2 permanently assigned,
6 freely configurable)
Function assignment:
see Page 9
PC Interface
Transmission speed:
4800 baud
A special PC connecting cable is
required for connecting to a PC
(see Page 12).

tI>
tI>
tI>
tI>
tI>
tI>
tI>
tI>

tIN>>
tIN>
tIN> tIN>>
tI>>
tI>>
tIN>>
tI>> tIN>
tI>> tIN> tIN>>

Blocking E2
See selection for blocking E1
Mode for Current Timer Stages
Definite-time-lag (DTOC)
Inverse-time-lag (IDMT)

Definite-Time Overcurrent
Protection (DTOC)
Phase Current
Threshold operate value I>: Increments:
0.4-4.0 Inom
0.1
Delay time tI>:
0.00-9.99 s
10.0-99.9/ s

Increments:
0.01
0.1

Threshold operate value I>>: Increments:

0.1
0.4-40.0/ Inom
Delay time tI>>:
0.00-9.99 s

Increments:
0.01

Residual Current
Threshold operate value IN>: Increments:
0.05
0.05-2.00/ Inom
Delay time tI N>:
0.00-9.99 s
10.0-99.9/ s

Increments:
0.01
0.1

Threshold operate value IN>>:Increments:

0.05
0.10-8.00/ Inom
Delay time tI N>>:
0.00-9.99 s
10.0-99.9/ s

Increments:
0.01
0.1

Inverse Definite Minimum Time

Overcurrent Protection (IDMT)
Phase Current
Base current IB :
0.40-4.00 Inom

Increments:
0.01

Characteristic factor:
0.10-1.00 Inom

Increments:
0.05

Characteristic type:
Normally inverse
Very inverse
Extremely inverse
Long time ground fault
RI inverse
Threshold operate value I>>: Increments:
0.1
0.4-40.0/ Inom
Delay time tI>>:
0.00-9.99 s

Increments:
0.01

Residual Current
Base current I NB or
Threshold operate value I>: Increments:
0.01
0.04-0.40/ Inom
0.01
0.08-0.80/ Inom
Characteristic factor:
0.10-1.00 Inom

Increments:
0.05

Characteristic type:
Normally inverse
Very inverse
Extremely inverse
Long time ground fault
RI inverse
Delay time tI N>:
0.00-9.99 s
10.0-99.9/ s

Increments:
0.01
0.1

Threshold operate value IN>>: Increments:

0.05
0.10-8.00/ Inom
Delay time tI N>>:
0.00-9.99 s
10.0-99.9/ s

Increments:
0.01
0.1

PS 431 Time-Overcurrent Protection Device

Technical Data
(continued)

Settings (continued)
Circuit Breaker Failure
Protection
tCBF: 0.00-9.99/ s; increments: 0.01
Measuring-Circuit Monitoring
Mode:
without
IA , IB
IA , IB , I C
Imcm >: 0.25-0.50 IPmax; increments: 0.05
tmcm: 0.00-9.99s; increments: 0.01
0.0-99.9/ s; increments: 0.1

Typical Characteristic
Data

Deviations

Reset time
from 2-fold threshold operating value
to 0:
25 ms

Threshold Operate Values, PhaseCurrent Stages

Deviation when I < 0.2 Inom: 15%
Deviation when I 0.2 I nom: 5%
Variation at 20C 20 K: 2.5%
Variation at V A,nom 20%: 1%
Variation at f nom 5%: 5%

Resetting ratio:
0.95
Minimum output pulse for trip command:
100 ms

Power Supply

Time-Overcurrent Protection

1)

Threshold Operate Values, Residual

Current Stages
Deviation: 5%
Variation at 20C 20 K: 2.5%
Variation at V A,nom 20%: 1%
Variation at f nom 5%: 5%

Nominal auxiliary voltage VA,nom:

24-60 V DC and (internally switchable) 110-250 V DC / 100-230 V AC 3)
Operating range for direct voltage:
0.8 to 1.1 Vnom
with a residual ripple of
up to 12% of V A,nom
For alternating voltage:
0.9-1.1 V A,nom
Nominal consumption:
approx. 5 W at VA = 220 V DC

Delay Time of Definite-Time-Delayed

Stages
Deviation: 1% or 30 ms
Variation at 20C 20 K: 1%
Delay Time of Inverse-Time-Delayed
Stages
Deviation: 7.5%
Variation at 20C 20 K: 2.5%
Variation at V A,nom 20%: 1%
Variation at f nom 5%: 5%
Operating Data Measurement2)
Currents IA , I B, I C, IN each > 0.4 I nom
Deviation: 5%
Variation at 20C 20 K: 2.5%
Variation at V A,nom 20%: 1%
Variation at f nom 5%: 5%
Fault Data Acquisition2)
Short-circuit current > 0.4 Inom :
Deviation: 5%
Variation at 20C 20 K: 2.5%
Variation at V A,nom 20%: 1%
Variation at f nom 5%: 5%

1)

Deviations referred to the set value

with sinusoidal measured variables,
total harmonic distortion 2%,
ambient temperature 20C, and
nominal auxiliary voltage V A,nom

2)

Deviations referred to the

respective nominal value with
sinusoidal measured variables,
total harmonic distortion 2%,
ambient temperature 20C, and
nominal auxiliary voltage V A,nom

3)

V A,nom = 230 V AC only for units with

a corresponding indication on the
type identification label (beginning
with hardware version 302)

PS 431 Time-Overcurrent Protection Device

Signal List

Signal Inputs

LED Indicators

Output Relays

Abbreviations for
Function Groups

The signal inputs allow intervention in the Protection

sequence. Each input can be
set for one of the signals
given in Table 1. However, a
given signal may be assigned to only one input. The
signal names refer to the
active state of the input
signal. Each input can be set
as follows:
active = low signal or
active = high signal.

Two LED indicators on the

local control panel have
permanently assigned signals (Table 2a). The other six
LED indicators are freely
configurable and can be
assigned any of the signals
listed in Table 2b.

The output relays are freely

configurable and can be
assigned any of the signals
listed in Table 3. Any signal
can also be assigned to more
than one free output relay for
contact multiplication purposes.

CBF:

All relays are operated in an

energize-on-signal arrangement (open-circuit function,
the make contact is closed
when the signal is present)
except for the case where an
output relay is configured for
the signal MAIN: Blocked/
faulty. In this case the relay
operates in an normallyenergized arrangement
(closed-circuit function) and
the break contact is closed
for the blocked/faulty condition.

Circuit breaker
failure protection

DTOC: Definite-time
overcurrent
protection
IDMT:

Inverse definite
minimum time
overcurrent
protection

MAIN: Main function

MON: Self-monitoring

PS 431 Time-Overcurrent Protection Device

Signal List
(continued)

Table 1:
Freely Configurable Signal
Inputs

Table 2a:
Permanently Configured LED
Indicators

Table 2b:
Freely Configurable LED
Indicators

Table 3:
Freely Configurable Output
Relays

Input Function
Group

Indi- Funccator tion

Group

Indi- Funccator tion

Group

Re-

U1
U2

Signal

Without function
MAIN: Block outp. rel. EXT
E1 block. EXT
E2 block. EXT
Reset latch. + indic.
Reset latch. EXT
Reset indicat. EXT
CBF: Input EXT

H1
H2

MON:
MAIN:

Signal

Warning
Blocked/faulty

H3
H4
H5
H6
H7
H8

Signal

Without function
MAIN: Trip command
E1 block. EXT
E2 block. EXT
IDMT/
DTOC: Starting I> or Iref>
Starting I>>
Starting A
Starting B
Starting C
Starting GF
Gen. starting
tI>> elapsed
tI> or tI>>
tIN> elapsed
tIN>> elapsed
tIN> or tIN>>
tIref elapsed inv.
tINref elapsed inv.
CBF:
MON:

Input EXT
tCBF elapsed

lays

Function
Group

K1
K2

Without function

K3
K4

Signal

MAIN: Trip command

Blocked/faulty
IDMT/
DTOC: Starting I> or Iref>
Starting I>>
Starting GF
Gen. starting
tI>> elapsed
tI> or tI>>
tIN> elapsed
tIN>> elapsed
tIN> or tIN>>
tIref elapsed inv.
tINref elapsed inv.
CBF:

tCBF elapsed

MON:

tmcm
Warning

DTOC: tI> elapsed def.

tmcm

DTOC: tI> elapsed def.

PS 431 Time-Overcurrent Protection Device

Dimensional Drawing and Terminal Connection Diagram

20.6

20.6

4 Dimensional drawing and panel cutout

X3

36

X1

18

6.4

300

281 +1

256 +1

279

289

294.2

PS 431

254

299

294.2

X3

309

19

X6

X1

65.6

48.6

6.4

125 - 0.5

125

+ 0.5

93

162.5 -

175.6
Surface-mounting

172

Flush-mounting

Surface-mounting

Panel cut-out and mounting frame outline

5 Terminal connection diagram

LED
Indicators

Power Supply
X1
L+ 13

Aux. voltage VA 2)

U100

L 14

Meas. Inputs
A1
A2
A3
B1
B2
B3
C1
C2
C3
N1
N2
N3

X1
1 (1 A)
2 (5 A)
3
4 (1 A)
5 (5 A)
6
7 (1 A)
8 (5 A)
9
10 (1 A)
11 (5 A)
12

T1
T2

X1
15
16
17
18

3) Internal interface, voltage test is

prohibited

10

Blocked/Faulty

H3

IDMT/DTOC: Starting A 1)

H4

IDMT/DTOC: Starting B 1)

H5

IDMT/DTOC: Starting C 1)

H6

IDMT/DTOC: Starting GF 1)

H7

IDMT/DTOC: tI> V tI>> 1)

H8

IDMT/DTO

C: tIN> V tIN>> 1)

Output Relays

U1

K1

U2
K2

X6
D1 2
D2 3
E2 5

PS 431

K3

11801.DS4

2) L+ und L- circuit may be tested only

with 2.8 kV DC to ground

1)

Warning

MAIN:

T4

PC Interface
1) Freely configurable (see signal list on
page 9); signals as per factory setting
are entered in the diagram

MON:

H2

T3

Signal Inputs
MAIN: Reset latch.+indic. 1) L+
L
MAIN: Block. outp. rel. EXT 1) L+
L

H1

K4

X3
36
35
33
32
34
31
30
28
27
29
26
25
23
22
24
20
19
21

MAIN:

Trip command 1)

IDMT/DTOC: Gen. starting 1)

1)

Main:

Blocked/Faulty 1)

11800.DS4

PS 431 Time-Overcurrent Protection Device

Connection Example

6 PS 431 connection example

A
B
LED
Indicators

Power Supply

X1
L+ 13

Aux. voltage VA 2)

H1
U100

L 14

H2
H3
H4

Meas. Inputs

L+
L
L+
L

X1
15
16
17
18

H5
H6

T1

H7
H8

T2
T3
T4

Signal Inputs

Output Relays

U1

K1

U2
K2

PC Interface
X6
D1 2
D2 3
E2 5

PS 431

K3

11801.DS4

1)

K4

X3
36
35
33
32
34
31
30
28
27
29
26
25
23
22
24
20
19
21

11802.ds4

A1
A2
A3
B1
B2
B3
C1
C2
C3
N1
N2
N3

X1
1 (1 A)
2 (5 A)
3
4 (1 A)
5 (5 A)
6
7 (1 A)
8 (5 A)
9
10 (1 A)
11 (5 A)
12

11

PS 431 Time-Overcurrent Protection Device

Ordering Information

Numerical time-overcurrent protection

device with inverse-time and definitetime characteristics
Case for panel surface or flush
mounting
4-pole measurement (A, B, C, N)

AEG Energietechnik GmbH

Bereich Schutz- und Schaltanlagenleittechnik
System Protection and Control
Lyoner Strae 44-48
D-60528 Frankfurt
P.O. Box 71 01 07
D-60491 Frankfurt
Phone +49 69 6632 1521
Fax
+49 69 6632 2548

Designs

Order No.

PS 431
Wall-mounting case with 36 terminals
for wall surface mounting
for panel flush mounting with cover frame

89431-0- 1 1 2 3 3 1 0
89431-0- 2 1 2 3 3 1 0

AEG Starkstromanlagen Dresden GmbH

Bereich Schutz- und Schaltanlagenleittechnik
System Protection and Control
Knigsbrcker Strae 124
D - 01099 Dresden
P.O. Box 10 03 60
D-01073 Dresden
Phone +49 351 820 3360
Fax
+49 351 820 3366

Extension No.
(append to order no.)

User-selection of IDMT or DTOC mode

Phase-selective overcurrent timer
stage and starting signals
Time-lag high set phase current and
high set residual current stages
Tripping matrix

Nominal current Inom : Phase current inputs 1 A, residual current input 5 A

Nominal frequency fnom : 50 Hz and 60 Hz
Nominal auxiliary voltage for power supply V A,nom:
24-60 V DC and 110-250 V DC or 100-230 V AC 1)
Nominal auxiliary voltage for signal inputs V In,nom:
24-250 V DC

Optional latching of individual

tripping criteria

Additional Options

Circuit breaker failure protection

Labeling and documentation in English

Option of reverse interlocking

Accessories

Measuring circuit monitoring

Operating data measurement

PC connecting cable (2.5 m)

FPCC parameter setting program

-598

255 002 096

251 254 271

Event counting
Fault data acquisition

1)

Range selection via plug-in jumper, factory setting underlined.

Fault logging
Comprehensive self-monitoring

Integrated local control panel

8 LED indicators (6 freely configurable)
PC interface

SLTS.06.04185PDF/0597EN Ti

4 output relays (freely configurable)

Subject to modifications Printed in Germany

2 signal inputs (freely configurable)