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CMPE110 | Fall 2006

Andrea Di Blas

Fall 2006

CMPE110 | Computer Architecture

A. Di Blas

email: andrea@soe.ucsc.edu

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CMPE110 | Fall 2006

oce hours:

discussion session:

Tutor: Jon Faerber

oce hours:

sessions:

TA: Michael Lagrange

email: jwfaerbe@ucsc.edu

email: lagrange@soe.ucsc.edu

oce: Engineering 2, room 217

oce hours: Wednesday 2:00 PM to 4:00 PM

tel: 459-4193

Instructor: Andrea Di Blas

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CMPE110 | Fall 2006

Class forum: follow link on the web page

http://www.cse.ucsc.edu/classes/cmpe110

Notes: the lecture notes will be posted on the website

A. Di Blas

This book is not required, just recommended for MIPS aid

Programming Pearson/Prentice-Hall.

Additional book: Robert L. Britton, MIPS Assembly Language

Morgan Kaufmann Ed., Third Edition (Second kind of works too)

Organization and Design: The Hardware/Software Interface,

Textbook: David A. Patterson and John L. Hennessy, Computer

Location: Engineering 2, room 192

Class meetings: Tuesday and Thursday from 2:00 PM to 3:45 PM

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CMPE110 | Fall 2006

The nal exam is Thursday December 7th, from 8:00 AM to 11:00 AM.
The location will be announced.

week 10: PC architectures and I/O systems

week 9: Average Memory Access Time | (no quiz, 11/23 is Thanksgiving)

week 8: Virtual memory | QUIZ 6

week 7: Cache memory | QUIZ 5

week 6: Pipelined CPU | Midterm (Thursday Nov. 2)

week 5: Multicycle CPU | QUIZ 4

week 4: Single cycle CPU | QUIZ 3

week 3: Multiplication and division | QUIZ 2

week 2: Adders, MIPS ISA | QUIZ 1

week 1: Performance and benchmarks, Basics of logic design | (Intake 2)

week 0: Class presentation | Intake exam

Approximate syllabus

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CMPE110 | Fall 2006

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current 110 is oered without this prerequisite, all the basic concepts will be discussed in class
or in section.

CMPE100/L: Digital design is essential to understand computer architecture. Since the

Non-prerequisite:

Explanation of prerequisites
CMPE12: Computer organization, logic design, and (especially) assembly language
CMPE16: Basic concepts of logic gates and design

Prerequisites: CMPE12 and CMPE16.

Introduction to computer architecture, including examples of current approaches and the

eect of technology and software. Computer performance evaluation, basic combinatorial and
sequential digital components, instruction set architectures, MIPS ISA and RISC paradigm,
single-cycle, multicycle and pipelined CPU architectures, cache and virtual memory. May
include advanced topics such as parallel processing, MIMD, SIMD, VLIW.

http://www.soe.ucsc.edu/classes/cmpe110/

Extended Description

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CMPE110 | Fall 2006

and/or virtual memory.

A. Di Blas

7. Apply basic coding techniques to improve program performance in systems with a cache

6. Analyze and understand a memory system with a cache, with and without virtual memory.

understanding the tradeos of these approaches and in particular the issues and
techniques related to pipelining (hazards, forwarding, and branch prediction).

5. Implement a basic RISC ISA (MIPS) as single-cycle, multicycle, and pipelined,

disadvantages with respect to coding eciency and implementation eciency.

4. Recognize dierent Instruction Set Architectures (ISA) and their advantages and

complex computing machines, increasing the word size and/or the performance.

3. Use digital devices to build basic computing machines, and use basic blocks to build

2. Understand both integer and oating-point computer arithmetic.

performance of dierent computers or dierent applications.

1. Choose the appropriate method to measure computer performance and to compare

Required skills to pass the course

Extended Class Description

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CMPE110 | Fall 2006

recongurable datapaths.

9. Instruction set implementation. Design of an ALU and use of multiplexors to create

8. RISC concepts and MIPS instruction set architecture

architectures.

7. Instruction set design and analysis: stack, accumulator, and general-purpose register

6. Binary division and design of integer dividers: restoring and non-restoring.

A. Di Blas

5. Design of multipliers: shift-and-add, array. Booth's algorithm in Radix-2 and Radix-4.

4. Design of adders: ripple-carry, carry-lookahead, carry-select.

3. Number representations: integer and oating-point.

propagation delay time, ip- ops, registers, timing diagrams. Bitwise logical operation.

2. Basics of digital design: logic functions and logic gates, multiplexers, CMOS gates,

benchmarks: total run time, arithmetic mean, weighted arithmetic mean, geometric mean.
SPEC benchmarks. Amdahl's law.

1. Performance measures: clock frequency, CPI, IPC, MIPS, MOPS, FLOPS. Combining of

Core topics (must be taught)

Extended Class Description

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CMPE110 | Fall 2006

20. Cache-friendly programs.

19. Analysis of Average Memory Access Time (AMAT).

18. Virtual memory and TLB, and its integration with a cache.

fully-associative. Eect of cache on performance.

A. Di Blas

17. Memory hierarchy. Cache, dierent cache organizations: direct-mapped, set-associative,

16. Basic compiler optimization techniques.

execution. Delayed branches.

15. Branch and jump processing, static and dynamic branch prediction and speculative

14. Pipeline forwarding.

13. Pipeline hazards: types, eect on performance.

12. MIPS pipelined implementation and analysis.

11. MIPS multicycle implementation and analysis.

10. MIPS single-cycle implementation and analysis.

Core topics (must be taught) cont.

Extended Class Description

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CMPE110 | Fall 2006

5. Parallel computer architectures: MIMD, SIMD, clusters, etc.

execution, multi-threaded, VLIW.

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4. Advanced CPU architectures and techniques: super-pipelined, super-scalar, out-of-order

3. Floating-point rounding methods and implementation (guard, round and sticky bits).

2. Manchester carry chain adder, carry-save adder, stuck-at fault modelling.

Goldschmit), high-radix Booth's algorithm and Booth-encoded oating-point hardware

multiplier.

1. Additional computer arithmetic: oating-point division (SRT, Newton-Raphson,

Optional topics

Extended Class Description

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CMPE110 | Fall 2006

- IEEE-754 oating-point numbers

- positional number representation

- basics of logic design

- MIPS assembly language

prerequisite courses and that we will not cover in class, or topics that
anticipate what will be covered in class.

\Special" sessions will cover material that should be known from

homework exercises.

A. Di Blas

\Regular" TA/Tutor sessions will cover and expand on class lectures and

TA/Tutor sessions

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CMPE110 | Fall 2006

A. Di Blas

 a global score of less than 40% in either quizzes or midterm or nal means
not passing the class.

 there is no curve | passing is a total weighted score of 60.00% and above

 missed midterm or nal cannot be made up for, either, but with a

certicate from a campus doctor they will be left out of the nal score

 homework failed to be turned in, and missed quizzes cannot be made up

for (they score -1)

 the worst homework and the worst quiz will be left out of the nal score

 homework will contribute 5% to the nal grade, the project 10%, quizzes
25%, midterm 25%, nal 35%

Grading policy and rules

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CMPE110 | Fall 2006

>

95:0
[90:0; 95:0[
[85:0; 90:0[
[80:0; 85:0[
[75:0; 80:0[
[70:0; 75:0[
[65:0; 70:0[
[60:0; 65:0[
[40:0; 60:0[
< 40:0

A+
A
AB+
B
BC+
C
D
F

A
A
A
B
B
B
C
C
D
F

P
P
P
P
P
P
P
P
NP
NP

S
S
S
S
S
S
U
U
U
U

Total score % Ugrad LG Grad LG P/NP Grad S/U

Final grades breakdown

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CMPE110 | Fall 2006

 a nal will will be comprehensive of the entire program

 a midterm will cover the rst lectures

Midterm and nal:

 quizzes will be returned in section

 quizzes' solutions will be posted on the web

 quizzes are on Thursday about every week

 a short quiz approximately on previous week's material

Quizzes:

TESTS

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CMPE110 | Fall 2006

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 Students requiring special accomodations are invited to refer to the DRC.

 Going to the restroom is not allowed in quizzes. During midterm and nal,
going to the restroom is allowed only with appropriate escort.

 Notes, textbook, any other book, calculators, palmtops, laptops, PCs,

terminals, mainframes, cellphones, computer guru friends, or anything
other than a pen (or pencil) are not allowed in any test. Computer
architecture-related tattoos must be properly covered as well.

Tests rules

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CMPE110 | Fall 2006

 Is it totally worth it? YES!

 Does The Project involve a lot of work? Yes!

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 A special TA session will take place in the PC lab (BE 109) to receive
hands-on support: Tuesday from 7:00 to 9:00PM.

 Michael will manage the project, set the schedule, and assign the
assignments (!)

Details:

 Using Multimedia Logic: implement and simulate a hierarchical design

starting from basic logic gates.

 In C: you will implement a library of progressively more complex functions

that simulate real hardware components.

Implement a full simulator of our single-cycle CPU, in one of two ways:

The project

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CMPE110 | Fall 2006

 HW will be returned in section.

A. Di Blas

 HW is posted on Thursday after class and due the following Tuesday at

beginning of class.

 One or more exercises a week not from the textbook. These will be turned
in and graded. Solutions to these exercises will be posted on the web.

 Selected exercises from the textbook. These will not be

Solutions to these exercises will be distributed in class.

Homework will consist of:

Homework assignments

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to do so will be considered cheating)

CMPE110 | Fall 2006

(failure

A. Di Blas

 group work is ok, but ALL students in a group must turn in their hw, even
if it's identical (no joint submissions), and the names of all group
participants must be indicated on each hw

 name, due date, hw #, and page on top right corner on all pages (stapled)

 hw must be on paper and handwritten

Homework rules

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CMPE110 | Fall 2006

 in the

homework { why would you do that?

 in quizzes and exams it means SERIOUS troubles
{ from failing the class (minimum). . .
{ . . . to disqualication from the major
{ . . . and even dismissal from the university

NOT a good idea! Why? Because:

CHEATING

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