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MC34060A, MC33060A

Fixed Frequency, PWM,


Voltage Mode Single Ended
Controllers
The MC34060A is a low cost fixed frequency, pulse width
modulation control circuit designed primarily for singleended
SWITCHMODEt power supply control.
The MC34060A is specified over the commercial operating
temperature range of 0 to +70C, and the MC33060A is specified
over an automotive temperature range of 40 to +85C.

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MARKING
DIAGRAMS
14

Features

Complete Pulse Width Modulation Control Circuitry


OnChip Oscillator with Master or Slave Operation
OnChip Error Amplifiers
OnChip 5.0 V Reference, 1.5% Accuracy
Adjustable DeadTime Control
Uncommitted Output Transistor Rated to 200 mA Source or Sink
Undervoltage Lockout
These are PbFree and HalideFree Devices

Noninv
14 Input

Inv
13 Input

Noninv
Input

Inv
Input

Compen/PWM
Comp Input

Dead-Time
Control

11 N.C.

CT

10 VCC

RT

Ground

Error
2 Amp
VCC
5.0 V
ref

14
1

PDIP14
P SUFFIX
CASE 646

14

MC3x060ADG
AWLYWW
1

14
MC3x060AP
AWLYYWWG
1

1
x
A
WL
Y, YY
WW
G

PIN CONNECTIONS

+
Error
Amp 1
-

SOIC14
D SUFFIX
CASE 751A

= 3 or 4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.

12 Vref

0.1V

Oscillator
9

Q1

(Top View)

Semiconductor Components Industries, LLC, 2011

March, 2011 Rev. 7

Publication Order Number:


MC34060A/D

MC34060A, MC33060A
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.)
Symbol

Value

Unit

Power Supply Voltage

Rating

VCC

42

Collector Output Voltage

VC

42

Collector Output Current (Note 3)

IC

500

mA

Amplifier Input Voltage Range

Vin

0.3 to +42

Power Dissipation @ TA 45C

PD

1000

mW

Operating Junction Temperature

TJ

125

Storage Temperature Range

Tstg

55 to +125

Operating Ambient Temperature Range


For MC34060A
For MC33060A

TA

0 to +70
40 to +85

ESD Capability
200
2.0

Machine Model
Human Body Model

V
kV

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Pins 1 14: Human Body Model 2000 V per JEDEC Standard JESD22A114E.
Pins 1 8: Machine Model Method 200 V per JEDEC Standard JESD22A115A.
2. This device contains LatchUp protection and exceeds 100 mA per JEDEC Standard JESD78.

THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, JunctiontoAmbient
Derating Ambient Temperature

Symbol

P Suffix
Package

D Suffix
Package

Unit

RqJA

80

120

C/W

TA

45

45

RECOMMENDED OPERATING CONDITIONS


Condition/Value

Symbol

Min

Typ

Max

Unit

Power Supply Voltage

VCC

7.0

15

40

Collector Output Voltage

VC

30

40

Collector Output Current

IC

200

mA

Amplifier Input Voltage

Vin

0.3

VCC 2

Current Into Feedback Terminal

Ifb

0.3

mA

Reference Output Current

Iref

10

mA

Timing Resistor

RT

1.8

47

500

kW

Timing Capacitor

CT

0.00047

0.001

10

mF

Oscillator Frequency

fosc

1.0

25

200

kHz

0.3

5.3

PWM Input Voltage (Pins 3 and 4)


3. Maximum thermal limits must be observed.

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2

MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 mF, RT = 12 kW, unless otherwise noted. For typical values TA = 25C,
for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.)
Characteristics

Symbol

Min

Typ

Max

Unit

Vref

4.925
4.9
4.85

5.0

5.075
5.1
5.1

Line Regulation (VCC = 7.0 V to 40 V, IO = 10 mA)

Regline

2.0

25

mV

Load Regulation (IO = 1.0 mA to 10 mA)

Regload

2.0

15

mV

Short Circuit Output Current (Vref = 0 V)

ISC

15

35

75

mA

Collector OffState Current (VCC = 40 V, VCE = 40 V)

IC(off)

2.0

100

mA

Emitter OffState Current (VCC = 40 V, VCE = 40 V, VE = 0 V)

IE(off)

100

mA

CollectorEmitter Saturation Voltage (Note 4)


CommonEmitter
(VE = 0 V, IC = 200 mA)
EmitterFollower
(VC = 15 V, IE = 200 mA)

Vsat(C)

1.1

1.5

Vsat(E)

1.5

2.5

100
100

200
200

40
40

100
100

REFERENCE SECTION
Reference Voltage (IO = 1.0 mA, TA 25C)
TA = Tlow to Thigh MC34060A
TA = Tlow to Thigh MC33060A

OUTPUT SECTION

Output Voltage Rise Time (TA = 25C)


CommonEmitter (See Figure 12)
EmitterFollower (See Figure 13)

tr

Output Voltage Fall Time (TA = 25C)


CommonEmitter (See Figure 12)
EmitterFollower (See Figure 13)

tr

ns

ns

ERROR AMPLIFIER SECTION


Input Offset Voltage (VO[Pin 3] = 2.5 V)

VIO

2.0

10

mV

Input Offset Current (VC[Pin 3] = 2.5 V)

IIO

5.0

250

nA

Input Bias Current (VO[Pin 3] = 2.5 V)

IIB

0.1

2.0

mA

Input Common Mode Voltage Range


(VCC = 40 V)

VICR

0 to
VCC 2.0

VIR(INV)

0.3 to
VCC2.0

AVOL

70

95

dB

UnityGain Crossover Frequency


(VO = 0.5 V to 3.5 V, RL = 2.0 kW)

fc

600

kHz

Phase Margin at UnityGain


(VO = 0.5 V to 3.5 V, RL = 2.0 kW)

65

deg.

Common Mode Rejection Ratio


(VCC = 40 V, Vin = 0 V to 38 V))

CMRR

65

90

dB

Power Supply Rejection Ratio


(DVCC = 33 V, VO = 2.5 V, RL = 2.0 kW)

PSRR

100

dB

Output Sink Current (VO[Pin 3] = 0.7 V)

IO

0.3

0.7

mA

Output Source Current (VO[Pin 3] = 3.5 V)

IO+

2.0

4.0

mA

Inverting Input Voltage Range


OpenLoop Voltage Gain
(DVO = 3.0 V, VO = 0.5 V to 3.5 V, RL = 2.0 kW)

4. Low duty cycle techniques are used during test to maintain junction temperature as close to ambient temperatures as possible.
Tlow = 40C for MC33060A
Thigh = +85C for MC33060A
= 0C for MC34060A
= +70C for MC34060A

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3

MC34060A, MC33060A
ELECTRICAL CHARACTERISTICS (continued) (VCC = 15 V, CT = 0.01 mF, RT = 12 kW, unless otherwise noted.

For typical values TA = 25C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.)
Characteristics

Symbol

Min

Typ

Max

Unit

VTH

3.5

4.5

II

0.3

0.7

mA

Input Bias Current (Pin 4)


(Vin = 0 V to 5.25 V)

IIB(DT)

1.0

10

mA

Maximum Output Duty Cycle


(Vin = 0 V, CT = 0.01 mF, RT = 12 kW)
(Vin = 0 V, CT = 0.001 mF, RT = 47 kW)

DCmax

90

96
92

100

2.8

3.3

9.7
9.5
9.0

10.5

25

11.3
11.5
11.5

PWM COMPARATOR SECTION (Test circuit Figure 11)


Input Threshold Voltage
(Zero Duty Cycle)
Input Sink Current
(V[Pin 3] = 0.7 V)
DEADTIME CONTROL SECTION (Test circuit Figure 11)

Input Threshold Voltage (Pin 4)


(Zero Duty Cycle)
(Maximum Duty Cycle)

VTH

OSCILLATOR SECTION
Frequency
(CT = 0.01 mF, RT = 12 kW, TA = 25C)
TA = Tlow to Thigh MC34060A
TA = Tlow to Thigh MC33060A
(CT = 0.001 mF, RT = 47 kW)

fosc

kHz

Standard Deviation of Frequency*


(CT = 0.001 mF, RT = 47 kW)

fosc

1.5

Frequency Change with Voltage


(VCC = 7.0 V to 40 V)

Dfosc(DV)

0.5

2.0

Frequency Change with Temperature


(DTA =Tlow to Thigh)
(CT = 0.01 mF, RT = 12 kW)

Dfosc(DT)

4.0

UNDERVOLTAGE LOCKOUT SECTION


TurnOn Threshold (VCC increasing, Iref = 1.0 mA)

Vth

4.0

4.7

5.5

Hysteresis

VH

50

150

300

mV

TOTAL DEVICE
Standby Supply Current
(Pin 6 at Vref, all other inputs and outputs open)
(VCC = 15 V)
(VCC = 40 V)

ICC

Average Supply Current


(V[Pin 4] = 2.0 V, CT = 0.001 mF, RT = 47 kW). See Figure 11.

IS

mA

5.5
7.0

10
15

7.0

*Standard deviation is a measure of the statistical distribution about the mean as derived from the formula; =

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4

(xn x)2
n1
N 1

mA

MC34060A, MC33060A
6

RT

Reference
Regulator

Oscillator

5
CT

Dead-Time
Control

0.12V

Dead-Time
Comparator

Undervoltage
Lockout
-

12

PWM.
Comparator

+
-

Q1 8

+
1

1
2
Error Amp
1

Ref Out

VTH

0.7mA

VCC

0.7V
+

10

3
Feedback/PWM
Comparator Input

Collector
Emitter

13
14
Error Amp
2

GND

This device contains 46 active transistors.

Figure 1. Block Diagram

Description
The MC34060A is a fixedfrequency pulse width
modulation control circuit, incorporating the primary
building blocks required for the control of a switching power
supply (see Figure 1). An internallinear sawtooth oscillator
is frequencyprogrammable by two external components,
RT and CT. The approximate oscillator frequency is
determined by:
fosc ^

Output pulse width modulation is accomplished by


comparison of the positive sawtooth waveform across
capacitor CT to either of two control signals. The output is
enabled only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in controlsignal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)

1.2
RT CT

For more information refer to Figure 3.

Capacitor CT
Feedback/P.W.M.
Comparator
Dead-Time Control

Output Q1,
Emitter

Figure 2. Timing Diagram

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5

MC34060A, MC33060A
APPLICATIONS INFORMATION

A VOL , OPEN LOOP VOLTAGE GAIN (dB)

f osc , OSCILLATOR FREQUENCY (Hz)

500 k
VCC = 15 V
0.001 mF

100 k

10 k

CT = 0.01 mF

1.0 mF

1.0 k
500
1.0 k

2.0 k

pin varies from 0.5 V to 3.5 V. Both error amplifiers have a


common mode input range from 0.3 V to (VCC 2.0 V), and
may be used to sense power supply output voltage and
current. The erroramplifier outputs are active high and are
ORed together at the noninverting input of the pulsewidth
modulator comparator. With this configuration, the
amplifier that demands minimum output on time, dominates
control of the loop.
The MC34060A has an internal 5.0 V reference capable
of sourcing up to 10 mA of load currents for external bias
circuits. The reference has an internal accuracy of 5% with
a typical thermal drift of less than 50 mV over an operating
temperature range of 0 to +70C.

5.0 k 10 k 20 k
50 k 100 k 200 k 500 k 1.0 M
RT, TIMING RESISTANCE (W)

120
110
100
90
80
70
60
50
40
30
20
10
0
1.0

20
18

100

16

80

14
CT = 0.001 mF

12
10
8.0
0.01 mF

6.0

AVOL
q

10

100
1.0 k
10 k
f, FREQUENCY (Hz)

100 k

0
-20
-40
-60
-80
-100
-120
-140
-160
-180
1.0 M

Figure 4. Open Loop Voltage Gain and Phase


versus Frequency

PERCENT DUTY CYCLE (%)

% DT, PERCENT DEADTIME, Q1 OUTPUT

Figure 3. Oscillator Frequency


versus Timing Resistance

VCC = 15 V
DVO = 3.0
V
RL = 2.0 kW

, EXCESS PHASE (DEGREES)

The control signals are external inputs that can be fed into
the deadtime control, the error amplifier inputs, or the
feedback input. The deadtime control comparator has an
effective 120 mV input offset which limits the minimum
output dead time to approximately the first 4% of the
sawtoothcycle time. This would result in a maximum duty
cycle of 96%. Additional dead time may be imposed on the
output by setting the dead timecontrol input to a fixed
voltage, ranging between 0 V to 3.3 V.
The pulse width modulator comparator provides a means
for the error amplifiers to adjust the output pulse width from
the maximum percent ontime, established by the dead time
control input, down to zero, as the voltage at the feedback

4.0

VCC = 15 V
CT = 0.001
RT = 47 k

60
40
20

2.0
0
500

0
1.0 k

10 k
100 k
fosc, OSCILLATOR FREQUENCY (Hz)

500 k

Figure 5. Percent Deadtime versus


Oscillator Frequency

1.0
2.0
3.0
DEAD-TIME CONTROL VOLTAGE (V)

Figure 6. Percent Duty Cycle versus


DeadTime Control Voltage

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6

3.5

MC34060A, MC33060A
2.0
VCE(SAT) , SATURATION VOLTAGE (V)

VCE(SAT) , SATURATION VOLTAGE (V)

1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1

1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4

100

200
300
IE, EMITTER CURRENT (mA)

400

500

Figure 7. EmitterFollower Configuration


Output Saturation Voltage versus
Emitter Current

VTH, UNDERVOLTAGE LOCKOUT THRESHOLD (V)

10
I CC, SUPPLY CURRENT (mA)

8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
5.0

10

15

20

25

30

35

200
300
400
IC, COLLECTOR CURRENT (mA)

500

Figure 8. CommonEmitter Configuration


Output Saturation Voltage versus
Collector Current

9.0

100

40

VCC, SUPPLY VOLTAGE (V)

6.0

5.5
Turn On

5.0

Turn Off

4.5

4.0
0

Figure 9. Standby Supply Current


versus Supply Voltage

5.0

10

15

20

25

30

35

IL, REFERENCE LOAD CURRENT (mA)

Figure 10. Undervoltage Lockout Thresholds


versus Reference Load Current

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7

40

MC34060A, MC33060A
VCC = 15V

Test
Inputs

Error Amplifier
Under Test

Feedback
RT
CT
(+)
(-)
Error
(+)
(-)

Vin
Feedback
Terminal
(Pin 3)
+

150W
2W

VCC

DeadTime

C
E

Output

Ref
Out

50kW
Gnd

Vref

Other Error
Amplifier

Figure 11. Error Amplifier Characteristics

Figure 12. Deadtime and Feedback Control

15V

15V
RL
68W

C
Output
Transistor

VC

C
CL
15pF

Output
Transistor

E
RL
68W

90%
VC

VE
CL
15pF

90%

90%

90%
VE

10%

10%
tr

10%

tf

10%
tr

tf

Figure 14. EmitterFollower Configuration


and Waveform

Figure 13. CommonEmitter Configuration


and Waveform

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8

MC34060A, MC33060A
VO

To Output
Voltage of
System

Vref

R1
1

+
3

Vref

R2

Error
Amp

Error
Amp

2
R2

2
R1

Positive Output Voltage

Negative Output Voltage

R1
)
VO = Vref (1 +
R2

R1
VO = -Vref (1 +
)
R2

VO

To Output
Voltage of
System

Figure 15. Error Amplifier Sensing Techniques

R1

Vref
Output

DT
RT
6

4
+

CT

R2

Output
47k

0.001

Max % On Time 92 -

160
R
1+ 1
R2

DT

R2

Figure 16. Deadtime Control Circuit

Figure 17. SoftStart Circuit

Vref

RT
Master

RT

R1

Vref

CT

CT

Vref
6
RT
Slave

(Additional
Circuits)

CT

Figure 18. Slaving Two or More Control Circuits

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9

CS

MC34060A, MC33060A
150mH @ 2.0A
Vin = 8.0V to 40V

Vout

Tip 32

5.0V/1.0A
47
4.7k

0.01
47k

MC34060A

13

12

E
GND

Vref

4.7k

DT
4

10/16V
+
4.7k

CT
5

MR850

0.01

150

Comp

14

4.7k

75

1.0M

50/50

10
VCC

1000
6.3V

8
7

RT
6

0.001
47k

390
0.1

Test

Conditions

Results

Line Regulation

Vin = 8.0 V to 40 V, IO = 1.0 A

25 mV

0.5%

Load Regulation

Vin = 12 V, IO = 1.0 mA to 1.0 A

3.0 mV

0.06%

Output Ripple

Vin = 12 V, IO = 1.0 A

75 mV pp P.A.R.D.

Short Circuit Current

Vin = 12 V, RL = 0.1 W

1.6 A

Efficiency

Vin = 12 V, IO = 1.0 A

73%

Figure 19. StepDown Converter with SoftStart


and Output Current Limiting

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10

MC34060A, MC33060A
150mH @ 4.0A
Vin = 8.0V to 26V

20mH @ 1.0A
*

MR850

Vout
28V/
0.5A

22k
10
0.05

33k
2
4.7k

2.7M

14

50/35V
3.9k

13
12

VCC
+
C

Comp
+

MC34060A

+
-

Vref

GND
DT

4.7k

CT

470/
35V

300
Tip 111

7
0.1

RT
6

5
0.001

470
47k

390

Test

Conditions

Results

Line Regulation

Vin = 8.0 V to 26 V, IO = 0.5 A

Load Regulation

Vin = 12 V, IO = 1.0 mA to 0.5 A

Output Ripple

Vin = 12 V, IO = 0.5 A

24 mV pp P.A.R.D.

Efficiency

Vin = 12 V, IO = 0.5 A

75%

*Optional circuit to minimize output ripple

Figure 20. StepUp Converter

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11

40 mV

0.14%

5.0 mV

0.18%

*
470/
35V

MC34060A, MC33060A

Vin = 8.0V to 40V

Tip 32C

Vout

MR851
20mH *
@ 1.0A

47

-15V/
0.25A

30k
10
0.01
47k
7.5k

1
2

1.0M

+
50/50V

14
0.01

13
12

150mH
@ 2.0A

MC34060A

+
-

Vref

GND
DT

10/16V

CT

330/
16V

330/
+ 16V

8
7

RT

0.001

4.7k

3.3k

Comp

10k

47k

75

VCC
+

47k
820
1.0

Test

Conditions

Results

Line Regulation

Vin = 8.0 V to 40 V, IO = 250 mA

52 mV

0.35%

Load Regulation

Vin = 12 V, IO = 1.0 to 250 mA

47 mV

0.32%

Output Ripple

Vin = 12 V, IO = 250 mA

Short Circuit Current

Vin = 12 V, RL = 0.1 W

Efficiency

Vin = 12 V, IO = 250 mA

10 mV pp P.A.R.D.
330 mA
86%

*Optional circuit to minimize output ripple

Figure 21. StepUp/Down Voltage Inverting Converter


with SoftStart and Current Limiting

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12

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13
10

CT

300 mV

45 mV pp P.A.R.D.
75 mV pp P.A.R.D.

V in = 115 Vac, IO = 0.4 A to 0.9 A


V in = 115 Vac, IO = 3.0 A
V in = 115 Vac, IO = 0.75 A
V in = 115 Vac, IO 5.0 V = 3.0 A
IO 12 V = 0.75 A

Load Regulation 12 V

Output Ripple 5.0 V

Output Ripple 12 V

Efficiency

2.5%

2.7k

200

+
MPS
A55

10/25V

MPS
A05

47

1.0

MJE
13005

1N4937

1N4934

1000/25V

1000/25V

1N4934

2200/10V

1N5824

L3

10/35V

L2

100/10V

L1

Common

12/075A

5.0V/3.0A

-12/0.75A

10/35V

T1 Coilcraft W2961
T2 Core: Coilcraft 1146416,
0.025 gap in each leg.
Bobbin: Coilcraft 37573
Windings:
Primary, 2 each, 75 turns #25 Awg Bifilar wound
Feedback: 15 turns #26 Awg
Secondary, 5.0 V, 6 turns @33 Awg Bifilar wound
Secondary, 2 each, 14 turns #24 Awg Bifilar wound
L1 Coilcraft Z7156, 15 H @ 5.0 A
L2, L3 Coilcraft Z7157, 25 H @ 1.0 A

47/25V

1N4934

T2

Figure 22. 33 W OffLine Flyback Converter with SoftStart and Primary Power Limiting

74%

476 mV

V in = 115 Vac, IO = 1.0 A to 4.0 A

Load Regulation 5.0 V

9.5%

52 mV 0.26%

V in = 95 Vac to 135 Vac, IO = 0.75 A

47k

Line Regulation 12 V

E
GND
RT

MC34060A

0.001

DT

1N4148

11k

Vref

27k

12

13

14

Comp

Line Regulation 5.0 V

1.5k

8.2k

6.8k

Results

0.01

1N4687

33k
0.01

10
VCC

20 mV 0.40%

Pout
25k

7.5k

2.2M

180/200V

Vout
5.0k

22k

Conditions

Test

1N4742

1N4001

3/200
Vac

V in = 95 Vac to 135 Vac, IO = 3.0 A

15
Cold

*Optional R.F.I. Filter

115 Vac
20%

1.0A

*
T1

3 each
0.0047 UL/CSA

1N4003

MC34060A, MC33060A

MC34060A, MC33060A
ORDERING INFORMATION
Device

Operating
Temperature Range

MC34060ADG

Package

Shipping

SOIC14
(PbFree)

55 Units / Rail

SOIC14
(PbFree)

2500 / Tape & Reel

MC34060APG

PDIP14
(PbFree)

25 Units / Rail

MC33060ADG

SOIC14
(PbFree)

55 Units / Rail

SOIC14
(PbFree)

2500 / Tape & Reel

PDIP14
(PbFree)

25 Units / Rail

MC34060ADR2G

MC33060ADR2G
MC33060APG

TA= 0 to +70C

TA= 40 to +85C

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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14

MC34060A, MC33060A
PACKAGE DIMENSIONS
SOIC14
CASE 751A03
ISSUE H

NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.

A
14

P 7 PL
0.25 (0.010)

T
D 14 PL
0.25 (0.010)

T B

DIM
A
B
C
D
F
G
J
K
M
P
R

K
M

R X 45 _

SEATING
PLANE

SOLDERING FOOTPRINT*
7X

7.04

14X

1.52
1
14X

0.58

1.27
PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our PbFree strategy and soldering


details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

http://onsemi.com
15

MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50

INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019

MC34060A, MC33060A
PACKAGE DIMENSIONS
PDIP14
CASE 64606
ISSUE P

14

NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.

A
F

T
SEATING
PLANE

D 14 PL

0.13 (0.005)

DIM
A
B
C
D
F
G
H
J
K
L
M
N

INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310

10 _
0.015
0.039

MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87

10 _
0.38
1.01

SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.


ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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For additional information, please contact your local
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MC34060A/D

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