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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 7, JULY 2015

Two-Stage Solar Photovoltaic-Based

Stand-Alone Scheme Having Battery as Energy
Storage Element for Rural Deployment
Dipankar Debnath, Student Member, IEEE, and Kishore Chatterjee, Member, IEEE

AbstractSolar photovoltaic (PV)-based stand-alone

systems have evolved as a promising solution to the issue
of electrication in areas where the grid is not available. The
major challenges in designing such systems are as follows:
1) extraction of maximum power from the PV array; 2) protection of the battery from overcharge and overdischarge;
3) dc to ac conversion; and 4) provision for adequate
voltage boosting. As multiple objectives are required to be
satised, the existing schemes for stand-alone systems
require a minimum of three converter stages, leading to
considerable reduction in the reliability and efciency of
the system. In order to address this issue, a two-stage
stand-alone scheme consisting of a novel transformercoupled dual-input converter (TCDIC) followed by a conventional full-bridge inverter is proposed in this paper.
The proposed TCDIC can realize maximum power point
tracking and battery charge control while maintaining the
proper voltage level at the load terminal. The small signal
mathematical model of the TCDIC is derived. A suitable
control strategy for the proposed TCDIC is devised. The
operation of the scheme is veried by performing detailed
simulation studies. A laboratory prototype of the scheme is
developed. Detailed experimental validation of the scheme
utilizing the laboratory prototype is carried out to conrm
the viability of the scheme.
Index TermsBattery charge control, dual-input dcdc
converter, PV-based stand-alone scheme, solar photovoltaic (PV) converter.

I. I NTRODUCTION

LECTRICITY has been recognized as an essential requirement for the existence of human life. The socioeconomic development of a country has a strong dependence on
the level of consumption of electrical energy. Unfortunately,
over 300 million Indian citizens have no access to electricity,
and the majority of this population reside in rural areas [1], [2].
In order to improve this scenario of lack of electrical energy,
several initiatives have been taken, and the majority of them
Manuscript received March 11, 2014; revised March 26, 2014 and
September 13, 2014; accepted October 31, 2014. Date of publication
December 11, 2014; date of current version May 15, 2015. This work
was supported by the National Centre for Photovoltaic Research and
Education, funded by the Ministry of New and Renewable Energy,
Government of India.
The authors are with the Department of Electrical Engineering and the
National Centre for Photovoltaic Research and Education, Indian Institute of Technology Bombay, Mumbai 400076, India (e-mail: dipankar.
iitb@gmail.com; kishore@ee.iitb.ac.in).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2014.2379584

are focused toward the generation of electricity by exploiting

renewable energy sources (RESs).
Over the years, the solar photovoltaic (PV) has become
one of the most promising candidates among the available
RESs. However, the availability of PV power is intermittent
in nature, and hence, PV-based stand-alone systems need an
energy storage element which is generally realized by utilizing
a battery bank [3], [4]. Furthermore, such systems also require
the service of power electronic converters to form an interface
between the PV array, the battery, and the load. The focus of this
paper is to develop an efficient and reliable power electronic
interface for a PV-based stand-alone system. The interface is
designed for catering to the Indian loading condition but can
be extended to other loading conditions as well with suitable
modifications of the design parameters.
The household appliances in India generally require a singlephase 230-V 50-Hz supply. As the power output from the PV
array and battery is in dc form, a dc to ac inverter is required
to feed the load. Single-phase full-bridge inverters which are
generally employed for this purpose are required to maintain
a dc voltage of magnitude of 350 V or more to generate an ac
voltage of 230 V. The requirement of high-input dc-link voltage
for the inverter can be fulfilled by connecting several PV modules and/or batteries in series. However, a serially connected
PV system results in considerable reduction in power yield
when subjected to nonuniform insolation levels. To address this
issue, either a complex maximum power point (MPP) tracking
(MPPT) algorithm [5], [6] or an additional converter(s) [7]
[10] is required. The serial connection of several standard 12-V
batteries leads to an increment in the cost and size of the system.
Furthermore, the application of a high voltage level for the PV
array and/or battery demands an involved design for the system
to adhere to the safety of personnel and equipment [11], [12].
In view of the aforementioned limitations, a stand-alone
system is generally designed with low voltage levels for the
PV array and the battery in the range of 2436 V. However,
this results in the requirement of a high voltage gain for the
overall system to ensure a 230-V ac supply at the load terminal.
Such a high gain can be achieved by employing a low frequency
step-up transformer at the inverter output. However, this will
increase the size, weight, and volume of the system. In order to
address this issue, the high-gain requirement can be provided
through intermediate dcdc converters which interface the PV
and battery to the dc link of the inverter. This can be realized
by employing three stages of dcdc conversion [13]. However,
the use of more number of converters leads to poor efficiency

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DEBNATH AND CHATTERJEE: SOLAR PV-BASED STAND-ALONE SCHEME HAVING BATTERY AS ENERGY STORAGE ELEMENT

and makes the system less reliable. High-gain multiwinding

transformer-based converters can be used to address this issue.
However, such systems [14], [15] require a minimum of eight
controlled switches. This is in addition to the four switches
that are required to realize the inverter. Furthermore, existing
stand-alone schemes employ an additional dedicated dcdc
converter to realize MPP operation [16][19]. As PV power
remains unavailable for more than half of a day, the utilization
of this aforementioned dedicated converter becomes very poor.
A scheme wherein the use of a dedicated dcdc converter for
MPPT operation is avoided is proposed in [20]. This scheme
has the PV array and battery connected in series and is designed
for application in PV-powered lighting system. However, the
scheme presented in [20] has the following limitations: 1) The
presence of resonant elements makes the system sensitive to
parameter variation; 2) permissible variation in the duty ratio
of the switches is limited within a certain range; and 3) voltage
gain is quite limited. A similar approach has also been reported
in [21] and [22] for application in a grid-connected scheme.
However, the aforementioned schemes have to bypass the PV
array by a diode and an inductor when PV power goes to zero.
This results in overall gain reduction as the PV and battery are
connected in series.
In order to address the limitations encountered in [20][22],
a transformer-coupled dual-input converter (TCDIC)-based
stand-alone scheme is proposed in this paper. The input stage
of the proposed TCDIC is realized by connecting the PV array
in series with the battery, thereby facilitating the boosting
capability of the converter. The output voltage level of the
TCDIC is further enhanced by incorporating a high-frequency
step-up transformer. The unique feature of TCDIC is that it can
be made to perform MPPT operation, battery charge control,
and voltage boosting by employing a proper control algorithm.
Hence, all of the facilities that are achieved in the existing
stand-alone schemes by involving two or more stages of dcdc
converters can be obtained by employing the proposed singlestage TCDIC. A standard full-bridge inverter is employed at
the output of TCDIC to achieve dcac conversion. The basic
philosophy of this scheme and its very preliminary study have
been presented in [23], and subsequently, further work that
has been carried out on this scheme is presented in this paper.
The detailed analysis of TCDIC, its mathematical modeling,
detailed simulation study along with exhaustive experimental
validation of the proposed scheme, and comparison with the
typical stand-alone schemes which have not been presented in
[23] have now been included in this paper. The operating principle of TCDIC is presented in the following section. The small
signal-based mathematical modeling of the TCDIC is presented
in Section III. The control strategy devised for TCDIC is presented in Section IV. Results of detailed simulation studies are
presented in Section V. A laboratory prototype for the proposed
stand-alone scheme is developed, and relevant experimental
results obtained from the prototype are presented in Section VI.
II. O PERATING P RINCIPLE OF TCDIC
The schematic diagram of the TCDIC is depicted in Fig. 1.
From this figure, it can be noted that no dedicated converter

Fig. 1.

4149

Schematic circuit diagram of TCDIC.

Fig. 2. Waveforms of currents flowing through and voltage across

different key circuit elements of TCDIC when (a) iL is positive and
(b) iL is negative.

is employed for ensuring the MPP operation of the PV array,

which leads to the improved utilization of the converters involved. Furthermore, only one converter stage is present in the
path between the PV array and the battery, thereby improving
the charging efficiency of the battery. The inductor current iL is
designed to be continuous. The switches S1 and S2 are operated
in complementary fashion. All semiconductor devices and passive elements are assumed to be ideal in the following analysis.
A. Operation of the Converter When Inductor Current
is Positive
The waveforms of the currents flowing through and voltages
across different key circuit elements of TCDIC, while the
current flowing through the inductor L is positive, are shown
in Fig. 2(a). The various possible switching modes during this
condition are analyzed in this section.
a) Mode I (0 to t1; S1 and D3 conducting): When S1 is
turned on, the PV array voltage vpv is impressed across L, and
the inductor current iL increases. During this period, the voltage
impressed across the primary winding of the transformer is
vpri = (vpv + vb vC1 ), wherein vb is the battery voltage and
vC1 is the voltage across the capacitor C1 . Hence, the primary
current of the transformer, ipri , increases, and the capacitor
C1 gets charged. The current flowing through the secondary

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Fig. 3. Equivalent circuit diagram of TCDIC when operating in mode I

and inductor current is positive.

Fig. 4. Equivalent circuit diagram of TCDIC when inductor current is

positive: (a) Mode II and (b) mode III.

winding of the transformer, isec , also increases. The diode D3 is

forward biased, and the capacitor C2 gets charged. The voltage
across C2 is given by vC2 = n(vpv + vb vC1 ), wherein n is
the turns ratio of the transformer. The equivalent diagram of
TCDIC during this mode is shown in Fig. 3.
b) Mode II (t1 to t2; D2 and D4 conducting): This mode
begins when S1 is turned off and S2 is turned on. At the
starting of this mode, iL is positive, and as S1 is turned off,
ipri is zero. Since iL > ipri , the diode D2 starts conducting.
The voltage impressed across L is vL = vb , and hence, iL
starts decreasing. The voltage impressed across the primary
winding of the transformer is vpri = vC1 , and hence, ipri becomes negative and starts decreasing, thereby discharging C1 .
The current flowing through the secondary winding of the
transformer, isec , reverses, and the diode D4 gets turned on. The
capacitor C3 is getting charged, and the voltage across C3 can
be expressed as vC3 = n(vC1 ). During this mode, iL > (ipri )
and diode D2 is forward biased. This mode continues until iL
becomes equal to (ipri ). The equivalent circuit diagram of
TCDIC during this mode is shown in Fig. 4(a).
c) Mode III (t2 to t3; S2 and D4 conducting): When iL
becomes smaller than (ipri ), the diode D2 is reverse biased,
and the switch S2 starts conducting. The rest of the operation
remains the same as that of mode II. The equivalent circuit
diagram of TCDIC during this mode is shown in Fig. 4(b).
B. Operation of the Converter When Inductor Current
is Negative
The waveforms of the currents flowing through and voltages
across different key circuit elements of TCDIC, while the
current flowing through the inductor L is negative, are shown
in Fig. 2(b). The various possible switching modes during this
condition are analyzed in this section.

Fig. 5. Equivalent circuit diagram of TCDIC when inductor current is

negative: (a) Mode I and (b) mode II.

d) Mode I (0 to t1; D1 and D3 conducting): This mode

begins when S1 is turned on and S2 is turned off. At the starting
of this mode, iL is negative, and ipri is zero. Hence, the diode
D1 starts conducting. The rest of the operation is the same as
that of mode I discussed in the previous section. This mode continues until ipri becomes equal to (iL ). The equivalent circuit
diagram of TCDIC during this mode is shown in Fig. 5(a).
e) Mode II (t1 to t2; S1 and D3 conducting): When ipri
becomes greater than iL , the diode D1 is reverse biased, and
the switch S1 starts conducting. The rest of the operation is the
same as that of mode I discussed in the previous section. The
equivalent circuit diagram of TCDIC during this mode is shown
in Fig. 5(b).
f) Mode III (t2 to t3; S2 and D4 conducting): This mode
begins when S1 is turned off and S2 is turned on. During this
mode, both iL and ipri are negative, and the switch S2 conducts.
The negative current in the primary winding of the transformer
results in negative current in the secondary winding of the
transformer. Hence, the diode D4 is forward biased, and the
capacitor C3 gets charged. During operation in this mode, vL =
vb , vpri = vC1 , and vC3 = nvC1 . The equivalent circuit
diagram of TCDIC during this mode is the same as that shown
in Fig. 4(b), except that the direction of iL is reversed.
From Fig. 1, the voltage vL across the inductor L can be
expressed as
vL = vpv , when S1 is on
vL = vb , when S2 is on.

(1)

Therefore, the average voltage drop across the inductor is

VL = DVpv (1 D)Vb
wherein D is the duty ratio of the switch S1 . Equating the
average voltage drop across the inductor to zero,


(1 D)
Vpv =
(2)
Vb .
D
From (2), it can be inferred that the PV voltage can be controlled by manipulating D as battery voltage Vb can be assumed
to be a stiff source. Therefore, the MPPT operation of the PV
array can be achieved through a proper manipulation of D.
The average output voltage of the TCDIC, Vdc , is given by
Vdc = (VC2 + VC3 )
= [n (Vb + Vpv VC1 ) + nVC1 ]
= n(Vb + Vpv ).

(3)

DEBNATH AND CHATTERJEE: SOLAR PV-BASED STAND-ALONE SCHEME HAVING BATTERY AS ENERGY STORAGE ELEMENT

wherein x
 X. The linearized system equations are as follows:

Applying KCL at point A of Fig. 1,

iL + icpv = ib + ipv .

(4)

Considering the average values of iL , icpv , ib , and ipv over a

switching cycle and noting that icpv = 0, (4) transforms to
Ib = IL Ipv .

(5)

From (5), it can be noted that, for IL > Ipv , the battery is
charged and, for IL < Ipv , the battery is discharged. Therefore, by controlling IL , for a given Ipv , battery charging and
discharging can be controlled. The drawback of TCDIC and
the associated design constraints are presented in [23]. The
details of the control strategy devised for TCDIC are discussed
in Section IV.
III. S MALL S IGNAL -B ASED M ATHEMATICAL
M ODEL OF TCDIC
A small signal mathematical model of the TCDIC is derived
so that it can be utilized to design the closed-loop controllers
[24]. The following notations are used for developing the
model: x
is the average value of variable x over a switching cycle while X is its steady-state value, and x
represents the small
signal perturbation of x around its steady-state value X. The
equations describing the steady-state behavior of the system are
= d
vpv (1 d)
vb

)
= ipv ig = ipv d(iL + ipri
= (
vb + vpv vC
1 ) d vC1 (1 d)

= im + i p

iC2 = ip d iload
n
 
ip

iC3 = iLoad = (1 d)
n
i
= 2iload
+ iC3
n
d
v C2
d
v C3
+ C3
.
= C2
dt
dt

vL
iCpv
vLM
iC1ipri

iC2

Since [C2 = C3 = C],

d (
vC2 + vC3 ) ip
= 2iload
dt
n
d
vdc ip
= 2iload .
C
dt
n
In order to linearize the system, a small perturbation is applied
around a steady-state point so that all the variables d, vpv , ipv ,
iL , ipri , im , ip , iload , ic1 , ic2 , ic3 , and vdc get perturbed in the
following form:
C

x=X +x

4151

vpv + (vpv + vb )d
LsiL = D

1
L + Ipri ) D(i + ipri
)
sCpv +
= d(I
Rpv
dim
sLm
= (vb + vpv )d + vpv D vc1
dt
ic1 = im + ip
1
iLoad

sC2 vc2 = ic2 = [Dip + Ip d]

n
1
p
(1 D)ip dI
sC3 vc3 = ic3 =
n


2
1
vdc Cs +
= ip
R
n


vpv

(6)
(7)
(8)
(9)
(10)
(11)
(12)

wherein R = Vdc /Iload and Rpv = (Vpv /Ipv ). The required

transfer functions are obtained by solving (6)(12) and are
provided in (13) and (14), shown at the bottom of the page.
IV. C ONTROL S TRUCTURE
The controller of a stand-alone system is required to perform
the following tasks: 1) extraction of maximum power from the
PV array; 2) manipulate the battery usage without violating
the limits of overcharge and overdischarge; and 3) dcac conversion while maintaining the load voltage at the prescribed
level. A controller is devised for manipulating the TCDIC to
realize the first two aforementioned objectives, while the third
objective is achieved by employing a conventional proportional
integral (PI) controller to control the output voltage of the fullbridge inverter through sinusoidal pulsewidth modulation. As
the conventional control scheme is used for controlling the
output voltage of the inverter, its design issues are not discussed
in this paper. The details of the control algorithm devised for
TCDIC are presented in this section.
In order to achieve the desired functionalities, TCDIC is
required to operate in one of the following modes.
1) MPPT mode: Maximum power is extracted from the PV
array when the system is operating in this mode. However, in order to operate in this mode, one of the following
conditions must be satisfied: 1) Available maximum PV
power Pmpp is more than the load demand Pl , and the
surplus power can be consumed by the battery without
being overcharged; and 2) Pmpp < Pl and the battery
have the capability to supply Pl Pmpp without being
overdischarged. The PV power in MPPT mode is given by
Ppv = Pmpp = (Pb + Pl ), where Pb is the battery power
which is defined as positive during charging and negative
while discharging.

vpv
LCLm IL s3 + CD(vpv + vb )(Lm + L)s2 + LIL s + D(vpv + vb )
|v0 =0
L
M 3
2
2
2
Cpv CLm s4 + LCL
d
Rpv s + [Cpv LRpv + D CLm + CD ] + Rpv s + D

(13)

iL
(CLm s2 + 1) [(vb + vpv IL DRpv ) + (vpv + vb )sRpv Cpv ]
|v0 =0 =
Rpv CCpv LLm s4 + LCLm s3 + Rpv [LCpv + D2 C(Lm + L)] s2 + Ls + D2 Rpv
d

(14)

4152

Fig. 6.

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 7, JULY 2015

Control structure for the proposed TCDIC.

2) Non-MPPT mode: Based on the state of charge (SOC)

level of the battery, its charging current is required to be
limited to a maximum permissible limit Ib max to prevent
the battery from getting damaged due to overcharge.
The maximum charging current limit Ib max restricts the
maximum power that can be absorbed by the battery to
Pb max = Ib max Vb . When Pmpp > Pl and the surplus
power is more than Pb max , the system cannot be operated
in MPPT mode as it would overcharge the battery. During
this condition, power extraction from PV is reduced to
a value given by Ppv = (Pb max + Pl ). This mode of
operation is known as non-MPPT mode.
3) Battery only (BO) mode: The system operates in BO
mode when there is no PV power and the battery has
the capability to supply the load demand without being
overdischarged.
4) Shutdown mode: When Pmpp < Pl and the battery does
not have the capability to supply Pl Pmpp , the system
needs to be shut down to prevent the battery from being
overdischarged.
The control algorithm that is employed to select the proper
mode of operation for the TCDIC, depending on the status of
the SOC of the battery vis-a-vis the availability of power from
the solar array, is shown in Fig. 6. The proper mode selection is
done by four logical decision-making blocks (DMBs).
The control block DMB-1 sets the reference for the PV
array voltage (Vpvref ). It also decides whether the system will
operate in BO mode or in MPPT mode. When it is found that
ipv > 0, thereby indicating the availability of PV power, the
MPPT mode of operation is selected, and the output of the
MPPT algorithm block (i.e., Vmpp ) sets Vpvref . When the PV
power is not available, the BO mode is selected, and Vpvref
is taken as Vpvr wherein Vpvr is selected so as to maintain
the output voltage Vdc within the desired range of 350460 V
as per (3). The error between Vpvref and VP V is passed through
a PI controller to set the required reference for the inductor
current (iLstar ). An upper limit IL max and a lower limit IL min
is imposed on iLstar based on the relationship given in (5)
to prevent overcharging and overdischarging of the battery,
respectively. These two limits are derived as follows:
IL max = Ib max + Ipv
IL min = Ib min + Ipv

(15)
(16)

wherein Ib max and Ib min are the maximum permissible charging and discharging current of the battery, respectively. These
two limits are set based on the SOC level and the allowable
depth of discharge of the battery [25]. The block DMB-4 is
employed to carry out the aforementioned functions. The block

DMB-2 sets the reference level for the inductor current iLref
after resolving the constraints imposed by IL max and IL min .
When iLref remains within its prescribed limit, the system
operates either in MPPT mode (for ipv > 0) or in BO mode (for
ipv 0). When iLref hits its lower limit, thereby indicating
that the overdischarge limit of the battery is reached, DMB-3
withdraws gating pulses from all the switches and shuts down
the system. When the battery overcharging limit is attained,
iLref hits its upper limit. This situation arises only when the
system is operating in MPPT mode with Pmpp > Pl and the
surplus power is more than Pb max . In this condition, iLref is
limited to IL max to limit the battery charging current to Ib max ,
and the MPPT is bypassed. As the battery charging current is
limited to Ib max , power consumed by the battery is restricted
to Pb max . This makes the available PV power more than (Pl +
Pb max ). This extra PV power starts charging the PV capacitor,
and its voltage increases beyond Vmpp , thereby shifting the PV
operating point toward the right side of the MPP point, and the
power extracted from the PV array reduces. This process continues until the power drawn from the PV array becomes equal
to (Pl + Pb max ). Hence, during operation of the system in nonMPPT mode, the PV array is operated at a point on the right side
of its true MPP, and hence, Ppv < Pmpp . If there is a decrement
in load demand while operating in non-MPPT mode, power
drawn from the PV array becomes more than (Pl + Pb max ),
and this excess power drawn starts charging the PV capacitor,
thereby shifting the operating point of the PV further toward the
right side of its previous operating point. In case of an increment
in the load demand, the power drawn from the PV array falls
short of supplying the load demand and the dc-link capacitors,
and the PV capacitor starts discharging. As the voltage of the
PV capacitor falls, the operating point of the PV array shifts
toward the left side from its previous operating point. This leads
to an increment in the power drawn from the PV array, and this
process continues until the power balance is restored. In case
the load demand increases to an extent such that the PV power
available at its MPP falls short to supply this load, the battery
will come out of its charging mode, iLref will become less than
IL max , and the system operates in MPPT mode.

V. S IMULATED P ERFORMANCE
The system shown in Fig. 7 is simulated on Matlab/Simulink
platform, and the simulated responses obtained under different
operating conditions are presented in this section. The different
parameters/elements used in the simulation model are provided
in Table I.

DEBNATH AND CHATTERJEE: SOLAR PV-BASED STAND-ALONE SCHEME HAVING BATTERY AS ENERGY STORAGE ELEMENT

Fig. 7.

4153

Schematic of the complete stand-alone scheme.

TABLE I
PARAMETERS /E LEMENTS U SED FOR S TAND -A LONE S YSTEM

Fig. 9. Simulated response of the system under changes in load and

insolation level while operating in MPPT mode. (a) vpv , ipv , and ib .
(b) vdc and load voltage.

Fig. 8. Simulated response of the system under steady-state operation

in MPPT mode. (a) vpv , ipv , and ib . (b) vdc and load voltage.

The steady-state response of the system while operating in

MPPT mode is shown in Fig. 8. The level of insolation is chosen
to be 1 kW/m2 with the corresponding Impp , Vmpp , and Pmpp
as 14.8 A, 35.4 V, and 525 W, respectively. The load demand is
kept at 450 W which is less than Pmpp . It can be inferred from
Fig. 8(a) that vpv and ipv are at their respective MPP values,
whereas ib is positive, indicating that the battery is charged to
consume the surplus power. The load voltage which is being
maintained at 230 V and the dc-link voltage profile are shown
in Fig. 8(b).
The simulated response of the system under changes in load
and insolation level while it is operating in MPPT mode is shown
in Fig. 9. Initially, the insolation level is set at 0.75 kW/m2
(Impp = 11 A, Vmpp = 35 V). At 1.4 s, the insolation level
is changed to 1 kW/m2 (Impp = 14.8 A, Vmpp = 35.4 V).
The load demand profile to be negotiated is kept as follows:

Fig. 10. Simulated response of the system under mode transition

between MPPT and non-MPPT mode and the effect of load change in
non-MPPT mode. (a) vpv , ipv , and ib . (b) vdc and load voltage.

450 W from 0 to 2.6 s, 350 W from 2.6 to 3.8 s, and 450 W

from 3.8 s onward. It can be inferred from Fig. 9(a) that vpv
and ipv remain at their respective MPP values irrespective of
changes in load or insolation level, whereas ib gets adjusted to
maintain the operation at MPPT mode. The dc-link voltage vdc
and load voltage are shown in Fig. 9(b).
The simulated response of the system during the transition of
mode between MPPT and non-MPPT and the effect of change
in load demand while the operation is in non-MPPT mode
are shown in Fig. 10. The insolation level is kept fixed at
0.75 kW/m2 (Impp = 11 A, Vmpp = 35 V). The Ib max is set
at 1 A, which sets Pb max at 36 W. Initially, the load demand
is kept at 450 W which is more than Pmpp . As a result, the
battery is discharged, and the system operates in MPPT mode.
At 1.2 s, the load is reduced to 250 W which is less than
Pmpp , and hence, the surplus power from PV starts charging the
battery. Once the battery current reaches 1 A, it gets restricted

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 62, NO. 7, JULY 2015

TABLE II
M AXIMUM C URRENT AND VOLTAGE S TRESS TO B E H ANDLED BY
VARIOUS S EMICONDUCTOR D EVICES AT W ORST C ONDITION

Fig. 11. Response of the simulated system during mode transition

between MPPT and BO modes. (a) vpv , ipv , and ib . (b) vdc and load
voltage.

around this limit, and the system enters into the non-MPPT
mode of operation. It can be noted from Fig. 10(a) that, in
non-MPPT mode, the PV voltage settles at a value higher than
its value at MPP, i.e., the PV operating point gets shifted to
the right side of its MPP. At 2.2 s, the load is increased to
300 W. In order to supply this increased load demand, the PV
operating point shifts toward the left of the previous operating
point but remains on the right-hand side of the MPP. At 3.3 s,
the load demand is reduced to 250 W, and the operating point
of the PV shifts toward the right-hand side of MPP. At 4.2 s,
the load demand is increased to 450 W which is more than
Pmpp . As a consequence, the battery starts discharging. This
restores the system operation back to the MPPT mode. It can
be noted from Fig. 10(b) that vdc changes when vpv changes
as per (3). However, the value of vdc remains within the desired
range of 350460 V, and hence, the load voltage is conveniently
controlled at 230 V irrespective of changes in vdc .
The simulated response of the system during mode transition
between the MPPT and BO modes is shown in Fig. 11. The
load demand is kept fixed at 200 W. The insolation level is kept
at 0.2 kW/m2 (Impp = 3 A, Vmpp = 33 V) until 2 s. During
this time interval, the system operates in MPPT mode. At 2 s,
the insolation level is reduced to zero. This reduces the PV
current to zero, and the system enters into the BO mode. The
PV voltage reference for the BO mode is kept at 35 V. At 4.5 s,
insolation is increased to 0. 2 kW/m2 . It can be observed from
Fig. 11(a) that the PV voltage is controlled at its MPP value
when the system operates in MPPT mode, while it is maintained
at 35 V when the system operates in BO mode. The dc-link
voltage vdc and load voltage are shown in Fig. 11(b).
VI. E XPERIMENTAL VALIDATION
In order to demonstrate the viability of the proposed scheme,
a laboratory prototype is developed. The PV array is realized
by involving an Agilent make solar array simulator, E4360A.
Three 12-V 7-Ah valve-regulated leadacid batteries are connected in series to form the 36-V battery bank. The rms

Fig. 12.

Steady-state operation in MPPT mode (experimental result).

and peak values of currents and voltages to be handled by

various semiconductor devices in the worst cases are provided in Table II. Considering the safety factor, device loss,
and availability, the semiconductor devices chosen are as follows: 1) S1 and S2 : IRFP4668PbF (MOSFET, 200 V, 90 A);
2) D3 and D4 : STTH6010 (1000 V, 60 A); and 3) T1 T4 :
IRG7PH35UD1PbF (insulated-gate bipolar transistor, 1200 V,
20 A). The controller is realized by employing a Texas Instruments floating-point DSP, TMS320F28335. Other relevant
parameters/elements used to realize the prototype remain the
same as those used for carrying out the simulation study and
are provided in Table I.
The steady-state response of the system while operating in
MPPT mode is shown in Fig. 12. The load demand is kept at
400 W. The values for Vmpp and Impp are set as 34 V and 8 A,
respectively. The battery voltage is 33 V. From Fig. 12, it can
be inferred that vpv (ch2) and ipv (ch7) attain prescribed values
required for MPP operation. The dc-link voltage vdc is around
385 V (ch3) which is approximately the expected value as per
(3). The ac load voltage which is controlled at 230 V rms is
shown in ch1. The battery current (ch5) is negative, indicating
that the battery is getting discharged.
The system response under step changes in load demand
while operating in MPPT mode is shown in Fig. 13. The values
of Vmpp and Impp are set as 35 V and 5 A, respectively. The
step changes in load demand are made at instants t1, from
260 to 160 W, and at instant t2, from 160 to 260 W. From
Fig. 13, it can be inferred that the battery current (discharging)
(ch7) has increased when the load demand has increased and
it has decreased when the load demand has reduced; however,
vpv and ipv are maintained at their respective MPP values.
It can be noted that vdc (ch3) has reduced slightly when the
load is increased. This is due to the fact that the voltage drop
across the switches and passive elements of TCDIC increases
slightly when the current flowing through them has increased
due to an increment in the load demand. The load voltage

DEBNATH AND CHATTERJEE: SOLAR PV-BASED STAND-ALONE SCHEME HAVING BATTERY AS ENERGY STORAGE ELEMENT

Fig. 13. Response of the system under changes in load during operation in MPPT mode (experimental result).

Fig. 14. Response of the system under changes in insolation level

during operation in MPPT mode (experimental result).

4155

Fig. 16. Response of the system under changes in load during operation in non-MPPT mode (experimental result).

Fig. 17. Response of the system during mode transition between

MPPT and BO modes (experimental result).

Fig. 15. Response of the system during mode transition between

MPPT and non-MPPT modes (experimental result).

Fig. 18. Measured efficiency curves obtained from the laboratory

prototype: (a) PV feeding power to battery under no-load condition,
(b) battery feeding power to load when PV power is zero, (c) both PV and
battery simultaneously feeding power to the load, and (d) PV feeding
power simultaneously to the battery and the load.

(ch1) is maintained at 230 V, and variation in load demand

has negligible effect on it as closed-loop control is employed
to control the load voltage.
The system response to step changes in insolation level while
operating under MPPT mode is shown in Fig. 14. The load
demand is maintained at 120 W. The changes in insolation level
are emulated by changing the Vmpp and Impp values in the solar
array simulator. The values of Vmpp and Impp are set as follows:
30 V and 3 A until the instant t1, 38 V and 5 A during the
interval t1 to t2, and 30 V and 3 A beyond t2. From Fig. 14, it

can be inferred that the system tracks MPP satisfactorily while

there are abrupt changes in insolation level.
The response of the system during the transition of mode
between MPPT and non-MPPT is shown in Fig. 15. The Ib max
is set at 1.5 A. The PV voltage and current at MPP are set at
35 V and 5 A, respectively. Initially, the load demand is set at
170 W. The battery is being discharged, and the system operates
in MPPT mode. At instant t1, the load is reduced to 60 W. This
reduction in load forces the battery to go into charging mode
in order to maintain operation at MPPT mode. As the battery

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TABLE III
C OMPARISON OF THE P ROPOSED S CHEME W ITH T YPICAL S TAND -A LONE S CHEMES

current reaches 1.5 A, it gets restricted around this limit, and

the system enters into the non-MPPT mode of operation. Once
the system enters to the non-MPPT mode, the MPPT algorithm
gets deactivated, and PV starts operating at a point on the right
side of its MPP. This can be inferred from Fig. 15 that, when the
system enters into the non-MPPT mode, the PV voltage (ch2)
has become higher, and the PV current (ch6) has become lower
compared to their values at MPP. Due to an increment in the
PV voltage, the dc-link voltage has also increased as per (3). At
the instant t2, the load demand is changed back to the previous
value of 170 W, and the operation of the system shifts from
non-MPPT to MPPT.
The performance of the system during load change while
operating in non-MPPT mode is shown in Fig. 16. Initially,
the system is operating in MPPT mode with Vmpp = 32 V
and Impp = 6 A while maintaining the load demand at 200 W.
At the instant t1, the load is reduced to 60 W, and the system
operation is shifted to the non-MPPT mode with Ib max being
set to 1.5 A. At the instant t2, the load demand is reduced to 0 W.
As a result of further load reduction, the PV operating point
shifts further toward the right side of its MPP point, and the
power extracted from PV is reduced. This can be inferred from
Fig. 16 as there is a further increase in PV voltage from its
previous value. At the instant t3, the load demand is changed
back to 60 W.
The response of the system during transition between the
MPPT and BO modes is shown in Fig. 17. The reference for
the PV voltage during operation in the BO mode, Vpvr , is set at
35 V. The load demand is kept at 100 W. Initially, the system
operates in MPPT mode with Vmpp = 30 V and Impp = 3 A.
At the instant t1, the PV array is disconnected from the system.
As a result, the PV current becomes zero, and the system enters
into the BO mode. At the instant t2, the PV array is brought into
the system, and the system operation gets changed to MPPT
from the BO mode. From Fig. 17, it can be noted that the PV
voltage is controlled at its MPP value when the system operates
in MPPT mode, whereas it is maintained at 35 V when the
system operates in BO mode.
The measured efficiency curves for the proposed stand-alone
system for different operating conditions are shown in Fig. 18.
A peak efficiency of 93.9% is obtained when both the PV array
and the battery are simultaneously feeding a load demand of
around 300 W. A comparison of the proposed scheme with typical stand-alone schemes is shown in Table III. From this table,
it can be concluded that the proposed scheme is advantageous

in most of the attributes while it is comparable in the remaining

attributes with respect to a given existing stand-alone scheme.
VII. C ONCLUSION
A solar PV-based stand-alone scheme for application in rural
areas is proposed in this paper. It is realized by involving a
new TCDIC followed by a conventional full-bridge dc to ac
inverter. The salient features of the proposed scheme include
the following: 1) The MPPT of the PV array, charge control
of the battery, and boosting of the dc voltage are accomplished
in a single converter; 2) requirement of dedicated converter for
ensuring MPP operation of the PV array is eliminated leading
to enhanced utilization of power converters; 3) enhancement in
battery charging efficiency as a single converter is present in the
battery charging path; 4) lesser component count as only two
power conversion stages are required; 5) isolation is provided
between input sources and the load; and 6) simple and efficient
control structure ensuring proper operating mode selection and
smooth transition between different possible operating modes.
The efficacy of the scheme is verified by performing detailed
simulation studies. The viability of the scheme is confirmed
through detailed experimental studies.
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Dipankar Debnath (S13) was born in Tripura,

India, in 1988. He received the B.Tech. degree
in electrical and electronics engineering from
the National Institute of Technology, Agartala,
India, in 2009 and the M.E. degree in electrical engineering from Bengal Engineering and
Science University, Shibpur, India, in 2011. He
is currently working toward the Ph.D. degree in
the Department of Electrical Engineering, Indian
Institute of Technology Bombay, Mumbai, India.
His current research interests include power
electronic converter design for solar photovoltaic systems.

Kishore Chatterjee (M10) was born in Calcutta, India, in 1967. He received the B.E.
degree from the Maulana Azad College of Technology, Bhopal, India, in 1990, the M.E. degree
from Bengal Engineering College, Calcutta, in
1992, and the Ph.D. degree from the Indian
Institute of Technology Kanpur, Kanpur, India, in
1998.
From 1997 to 1998, he was a Senior Research Associate with the Indian Institute of
Technology Kanpur, where he was involved with
a project on power factor correction and active power filtering, which
was being sponsored by the Central Board of Irrigation and Power,
India. Since 1998, he has been with the Department of Electrical
Engineering, Indian Institute of Technology Bombay, Mumbai, India,
where he is currently a Professor. He was a Visiting Fellow at ETS,
University of Quebec, Montreal, QC, Canada, in 2004. His current
research interests are modern VAr compensators, active power filters,
utility-friendly converter topologies, and induction motor drives.