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Solar Energy Materials & Solar Cells 92 (2008) 16971705

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Solar Energy Materials & Solar Cells


journal homepage: www.elsevier.com/locate/solmat

Pilot production of concentrator silicon solar cells:


Approaching industrialization
M. Castro , I. Anton, G. Sala
Instituto de Energa Solar. E.T.S.I. Telecom. UPM, Ciudad Universitaria s/n, 28040 Madrid, Spain

a r t i c l e in fo

abstract

Article history:
Received 24 March 2008
Received in revised form
25 July 2008
Accepted 5 August 2008
Available online 21 September 2008

Using a simple process, high-efciency silicon concentrator solar cells have proved to achieve up to 21%
efciency at 100  . The purpose of this work is to prove the feasibility of their industrialisation by
setting up a pilot line and manufacturing a signicant number of cells for a 100  concentrator system.
The process has been successfully veried by modifying the antireection coating, the annealing
process and the back contact. This yielded an average efciency of 18.5% at 100  with 70% of cells
having an efciency 418% and costs ranging from 0.31 to 0.41 h/W. A fast learning curve is shown which
suggests optimistic results indeed for further industrialisation.
& 2008 Elsevier B.V. All rights reserved.

Keywords:
Silicon solar cells
Concentrator
Industrialization

1. Introduction
Photovoltaic concentrator systems (CPV) have been available
for almost 30 years in laboratories and research elds to provide
green electricity to the market. As in the development of at
plate photovoltaic systems (at plate PV or at plates) for
terrestrial purposes, R+D into CPV systems started soon after the
oil crisis in 1973. Unlike at plate systems which found a niche
application for remote systems (emergency and telecommunications, for example) and in developing countries, concentrator
systems were developed for large power plant applications where
they competed with well-established thermal power stations. As
oil prices came down again, the need for a commercial CPV system
disappeared together with a high percentage of funding [1].
Meanwhile, a number of interesting CPV systems with very
different approaches and degrees of success have been eld
tested, but none of them has achieved the mass production level
of at plates [2]. These systems include different optics (mirrors or
lensesFresnel or anidolic), spot sizes and geometries (point or
linear focus, from just a few to several hundred suns), tracking
strategies (static, single or double axis), refrigeration systems
(active or passive) and cells (Si or IIIV compound semiconductors, whether single or multijunction).
Though most of the demonstration systems have been
manufactured using silicon solar cells, the current, main research
effort into concentrator solar cells focuses on multijunction

 Corresponding author. Tel.: +34 915441060; fax: +34 915446341.

E-mail address: mcastro@foton.guascor.com (M. Castro).


0927-0248/$ - see front matter & 2008 Elsevier B.V. All rights reserved.
doi:10.1016/j.solmat.2008.08.001

IIIV-based solar cells (MJ cells) which have now achieved


much greater efciencies at higher concentration levels with up
to 40.7% efciency at 240 suns for a triple-junction metamorphic
solar cell [3].
Especially remarkable is the historical lack of concentrator-cell
suppliers, which may well be one of the factors that have held
back the CPV market. Most of the demonstration projects cited in
[2] used high-efciency silicon solar cells customised for each
particular system. The two remarkable exceptions were the
Euclides system, which used laser-grooved buried contact Si solar
cells made by BP Solar [4], and the back point contact Si solar cells
developed by Swanson et al. [5] at Stanford University since 1984,
and manufactured by Amonix, Inc. [6], and SunPower Corporation.
The parabolic dish system from the Australian company Solar
Systems Pty Ltd. focuses the light onto a large compact receiver,
something that used to be done using SunPowers back point
contact solar cells. Now a new receiver has been developed
together with Spectrolab, Inc., using their triple-junction solar
cells [7]. None of these silicon cells are available on the market for
anyone developing a CPV system. SunPower Corporation used to
sell them, but in 2004 the company started selling black modules
for at plate systems using screen-printed back point contact
solar cells and stopped producing concentrator solar cells [8]. BP
Solar only manufactured their concentrator solar cells for special
R+D projects such as Euclides [4], and Amonix, Inc., (and also
currently Guascor Foton S.L.) manufacture cells only for their own
systems in micro-electronics facilities [9]. Recently, as the result
of great effort regarding R+D into IIIV solar cells, several
companies have started selling triple-junction solar cells with
average production efciencies of around 37% at 200600 suns.

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As all of these very high-efciency solar cells are still quite


expensive (around 100 times more than conventional at plate
silicon cells [10]), the geometrical concentration ratio needed to
make the most of this efciency is also very high (more than
500  ). Generally speaking, the higher the concentration ratio, the
greater the accuracy needed in tracking the sun and the smaller
manufacturing and installing tolerances permitted. This means
that high efciency and high concentration concepts need very
accurate systems, including their manufacture, installation and
sun tracking.
A path that has not been sufciently explored is the use of
simpler solar cell structures based on silicon, which is still
currently the best proven and most widely available technology,
with intermediate concentration levels of around 100  . The
availability of such silicon solar cell, suited for smaller concentration levels, could be useful for the design of concentrator systems
with a reasonable cost reduction with respect to conventional at
plate PV systems.
Current commercial one-sun cells are not suitable for high
concentration levels for several reasons, including the quality of
the base material, emitter design and contact and sheet resistance
of the screen-printed metals. Some efforts have been made to use
this kind of cell under concentration by using static systems
working at a concentration ratio of 2  [2] or improving them by
using a denser front metallization grid and decreasing the
metallization bulk resistivity with an additional electrolytic silver
growth [11], but they reach their limit at concentrations of 15  .
One of the high-efciency technologies suitable for this
purpose based on the well-known planar technology of phosphorous/aluminium (P/Al) solar cells was developed for use in
concentrator solar cells at the Institute of Solar Energy (IES-UPM)
[12], giving results of up to 20.6% at 116  with selective textured
cells that are not textured under the metallization grid, thus
improving contact resistivity.
After promising results, the technology was transferred to ASE
GmbHnow called Azurspace Solar Power GmbH, within the
framework of the EU-MONOCHESS Project after several changes to
adapt it to the industrial environment resulting in very good
results in performance (up to 20.7% at 102  without selective
texturing) and with an initial 50% yield [13]. In spite of the room
for improvement, no more effort was dedicated towards the
industrialisation of this particular technology and Azurspace
focussed its concentrator research and manufacturing towards
MJ cell development.
Within this framework, the Institute of Solar Energy had the
opportunity to establish a pilot line for processing these cells
made using 4 inch diameter wafers so that the manufacturing
reliability and feasibility of this process could be veried
experimentally.
The different aspects and results of this production are set out
in this paper. Firstly, the structure, design and characterisation
method of the cell and the initial manufacturing process are
presented. Secondly, the results of the rst batch and the
subsequent modications of the process are analyzed. Finally,
the results of the main production are detailed, including the
learning curve, yield of every process and the strong and weak
points of the different processes. The cost of these cells is
estimated using the production efciency and yield results.

diameter round wafers are used since FZ materials meet the


micro-electronic industrys standards. Low resistivity (i.e., lowinjection operation mode) and a thick wafer were chosen as
opposed to high resistivity (and thus high injection mode) and
thin wafer, avoiding the handling of thin wafers on a manual
production line, thereby preventing probable high ratios of
breakages of wafers.
The geometry of the cell is rectangular with an active area of
10  30 mm2 and two bus bars of 1.5  30 mm2 outside of the
active area of the system on top of a thick layer of silicon oxide of
1.01.2 mm. The cells are produced in 400 diameter wafers having
10 cells per wafer. This geometry is related with a specic point
focus concentrator system providing a rectangular focal spot.
The cell structure is n+pp+ with textured surface and SiO2
antireection coating (ARC). The cell, designed for 100  , has a
50 O/sq deep P-doped emitter and Al-doped back surface eld
(BSF). Front and back metals are e-beam evaporated Ti/Pd/Ag and
Al/Ag, respectively, (Fig. 1).
Series resistance is very important in concentrator cells as in
higher concentration levels the efciency decreases proportionally to it [11], as in
Jsc 1X2 r s
where Jsc(1  ) is the short-circuit current density at one sun and
rs is the specic series resistance of the solar cell. In this case, the
shadowing factor is 5.65%, with a technological series resistance
(which includes all constant components, except for the one
related to the base material and the bus bars that are out of the
active area and will have thick tabs soldered to them when the cell
is encapsulated), of 9.6 mO cm2 and a total series resistance,
including base, of 14.4 mO cm2. The largest losses are due to gridlines (37%), base bulk (33%) and the emitter layer (17%). When
moving along the IV curve under concentrated light, the base
injection conditions vary and thus its resistance (known as
conductivity modulation). For high injection conditions (nEp),
the base resistivity decreases. With 100  illumination conditions
and low base resistivity, the base is far from high injection
conditions in the working voltage and the resistance due to this
component can be considered as constant in this case and
calculated as the product of the bulk resistivity and the thickness
of the wafer.
Table 1 shows the characteristics of the IES-UPM cell and its
performance at a concentration ratio of 100  and 25 1C simulated
in the one dimensional photodiode model software simulation
package PC1D.
The manufacturing process of these cells is based on planar
technology using patterns dened by photolithography, a diffused
emitter from a phosphorous liquid source (POCl3) and vacuumevaporated metals, (Fig. 2). This is a well-established technology

2. Description of the cell and process


The base-line solar cell made at IES-UPM, called the IES-UPM
cell, is a single crystal, oat zone (FZ), silicon solar cell. The base
material is p-type doped with boron with a background resistivity
of 0.2470.01 O cm and a thickness of 28973 mm. Four inch

Fig. 1. Cell structure.

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Table 1
IES-UPM cell characteristics and its performance at 100  concentration, 25 1C
simulated in PC1D
Material

Fz, p-silicon, boron doped

Total cell area


Cell active area
Base resistivity
Base thickness
Emitter sheet resistance
Shadowing factor
Technological series resistance

1.3  3 cm2
1  3 cm2
0.2470.01 O cm
28973 mm
50 O/sq
5.65%
9.6 mO cm2

Total series resistance


Front contact
Back contact
Emitter
Base
Front metal

14.4 mO cm2
0.9 (6%) mO cm2
1.0 (7%) mO cm2
2.5 (17%) mO cm2
4.8 (33%) mO cm2
5.3 (36%) mO cm2

Performance at 100  and 25 1C


Jsc
Voc
FF
Z (%)

3.47 A/cm2
776 mV
81.2%
21.83%

Fig. 3. Jig to measure the cells in concentration.

reducing its lifetime. To make sure this did not occur, lifetime
measurements using Photo Conductance Decay (PCD) and Quasi
Steady State Photo Conductance (QSSPD) methods were taken in
wafers after all thermal processes.
In order to process these cells, a new pilot line has been set up
at the IES-UPM facilities. This pilot line has been put into
operation using some of the previous laboratory installations
and adding some new equipment. Chemical and furnace steps are
carried out in batches of 20 wafers, evaporation steps in batches of
14 wafers and batches of 8 wafers were used for silver electrolysis.
Photolithography and lift-off steps are carried out wafer by wafer.
In an industrial environment, batch size could be uniform for
every process step, thereby permitting an improved manufacturing sequence and higher throughput.
After the devices are cut from the wafer into individual cells,
they are characterised under concentration. Measurements are
taken using a solar simulator with ash illumination and a data
acquisition system [15], while the cell is connected using a
specially-designed jig permitting rapid cell positioning and
introducing low resistance to the measurement prior to any
encapsulation or soldering process, (Fig. 3). The light intensity is
10 W/cm2 and the real concentration level is checked using a
previously-calibrated silicon concentrator cell and assuming
current linearity. The fast ash system allows the cell to be
measured at 25 1C.

3. Analysis of the rst results


Fig. 2. Initial processing sequence.

which is currently used for manufacturing space silicon solar cells


and all kinds of integrated circuits. It requires two photolithography steps which, in turn, means only one alignment step.
The main difference between this and the previous process
developed at IES-UPM is the ARC that was previously made of
evaporated Ta2O5 and is now made using SiO2 in order to integrate
the growing of the ARC in the P/Al drive-in step and eliminate the
need for one of the evaporation steps. This ARC layer is also more
resistant to a harsh working environment. This integration was
previously successfully carried out for one-sun cells, but not for
concentrator cells [14].
The previous 50 O/sq emitter developed for concentrator cells
consisted of a controlled deposition of phosphorous from a liquid
POCl3 source at 850 1C followed by a drive-in step in N2 at 1050 1C
for 16 h, during which the redistribution of the evaporated Al on
the back surface creates the BSF and gives a good gettering effect
[12]. An industrial process of 16 h would be very expensive and we
therefore reduced the time to 3 h by increasing the process
temperature to 1100 1C. This increase in the processing temperature could result in higher impurity diffusion in the bulk, thereby

In order to establish a steady-state pilot line, a rst batch of 20


wafers was processed. Results from this rst batch allowed the
process to be veried, complete with the detection of some
unexpected problems. The following observations were made.
3.1. Large number of broken wafers
Several wafers broke after high temperature drive-in (1100 1C)
caused by thermal stress on the thick SiO2 and SiAl layers. The
problem was later resolved by using alternative wafer manipulation and longer times for loading and unloading the wafers into
the furnaces during the high temperature processes, thus
diminishing thermal stresses whilst increasing mechanical yield.
3.2. Lifetime
Lifetime measurements after the process were found to be
satisfactory, resulting in average bulk lifetimes of 50 ms at an
injection level of 1015 cm3, which is the injection level of the
working point of these cells at 100  , a gure that is still far from
that using high injection. This lifetime gives diffusions lengths of

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the order of the cell thickness sufcient to obtain high-efciency


cells at 100  .
3.3. Non-solderable back contact
The Al/Ag back contact at the end of the process resulted in a
non-solderable layer. Additionally, it made poor contact to the
base copper plate of the characterisation system. This poor
contact introduces a high series resistance in the measurement,
preventing the maximum power point to be measured beyond
30  before encapsulating the cells. This problem was avoided in
successive batches by carrying out the annealing step prior to
back contact evaporation. This results in a solderable back contact
that allows measurement of up to 100 suns prior to encapsulation.
The annealing process was also modied, reducing the time
employed from 30 to 10 min and decreasing the temperature from
450 to 405 1C.
3.4. High series resistance
Some wafers from this batch where recovered by making a
nal silver evaporation on the back contact after the annealing
process, but before cutting the cells. When they were measured
under concentration, they showed the following results, (Fig. 4):

 A low short-circuit current density of the order of 32 mA/cm2


at 1  was discovered; this was approximately 10% lower than
expected, as a result of a higher front metal shadowing
factor than expected and a slightly larger thickness of the
SiO2 than optimum. Both problems were resolved in further
runs with a lower shadowing factor and thinner ARC, resulting
in 35 mA/cm2 short-circuit current densities or higher at onesun conditions.

 A very high series resistance of the cells (values ranging from 2


to 21 mO) were found instead of 4.8 mO, which is the designed
value. Furthermore, great disparity in the efciency and series
resistance values was found in the cells from wafer to wafer
and even within the same wafer, see Fig. 4 and Table 2. Emitter
sheet resistance and front-contact specic resistance were
measured and, though the front-contact resistance was slightly
higher than expected, it was concluded that this, in itself,
could not account for this increase. The back contact resistance
of the cells could not be measured directly in this batch
because of the lack of suitable measuring devices using the
current transfer length method (TLM) [16]. The specic
resistance was calculated as the difference between the
measured resistance and the designed value, using the
measured values of the rest of the components (front-contact
resistance, emitter, base and metals thicknesses and widths),
resulting in very poor values of between 1 and 4  102 O cm2,
more than an order of magnitude higher than the 103 O cm2
used in the optimisation.
This difference was attributed to the oxidized SiAl layer
created during the P/Al drive-in and ARC growing step. This
oxidation process during the drive-in was previously successfully
integrated into the process for one-sun cells. No problems of back
contact resistivity were reported [14]. However, as has been
previously mentioned, concentrator cells are much more sensitive
to series resistance than one-sun cells.
The presence of a thin layer of alumina in the BSF layer was
reported as occurring in previous studies and several attempts
were made to etch it chemically, but with no success for layers
processed at more than 730 1C, which is our case at hand [17].
However, the purpose of that task was the complete removal of
the eutectic layer of AlSi which is responsible for a high surface
recombination rate. In this case, only the most external or outer
resistive layer of alumina needs to be removed or avoided during
the process.
To avoid this contact problem, another ARC such as TiO2 or SiN
could be deposited. However, none of these processes was
available at IES-UPM for 4 inch diameter wafers at the time this
pilot line was set up. Therefore, this highly resistive layer had to
be removed in order to produce high-efciency concentrator cells.

4. Improvements to the back contact

Fig. 4. Efciency vs. concentration for several sample cells in the rst batch,
showing high series resistance, very low efciency and large dispersion in values.

Several processes were tested in order to remove the resistive


layer on the rear surface before back contact evaporation, as
summarised in Table 3.
These treatments were carried out after the front metal had
already been deposited on the wafers so all chemical etches need
a protective layer deposition prior to being etched followed by a
cleaning step afterwards. In the case of mechanical polishing, this

Table 2
Electrical performance at 100 suns for several sample cells taken from the rst batch processed
Cell

Short circuit current


Jsc (A/cm2)

Open circuit voltage


Voc (mV)

Fill factor FF

Efciency Z (%)

Series resistance Rs
(mO)

B9A
B9D
B9E
C3A
C3B
C3I
Average
Deviation (%)

3.1
3.0
3.1
3.7
3.0
1.8
3.0
21

752
743
759
753
736
748
749
1

0.59
0.48
0.75
0.41
0.38
0.35
0.49
31

13.9
10.7
17.8
10.5
7.6
4.5
10.8
43

10
17
N/A
21
18
14
16
26

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Table 3
Rear side resistive layer removal processes
Process

Etched materials

Time (min)

Temperature (1C)

Protective coating

Mechanical polishing with Al2O3


Buffered HF (BHF): NH4F:HF 9:1
HCl:H2O 1:5+BHF
NH3:H2O2:H2O 1:1:3+BHF

All
SiO2
Al+SiO2
Al2O3/Al+SiO2

5
10
40+10
13+5

N/A
Ambient
3740+Ambient
3540+Ambient

No
Yes
Yes
Yes

Table 4
Characteristics at 100  concentration of the average and best cells of each process
Process

Average Rs (mO)

Average Z (%)

Rs best cell (mO)

Z best cell (%)

Average Voc (mV)

Voc increase (%)

Initial
Mech. polish
BHF
HCl+BHF
NH3+BHF

1873
673
471
472
2775

872
1872
1772
1972
672

21
2
2
N/A
26

10.5
21.0
20.0
21.3
8.2

74877
76673
75673
76472
75073

2.4
1.1
2.1
0.3

is performed only on the back surface and does not require a


protective layer, just ultrasonic cleaning to remove both the
polishing powder and the Al removed from the back of the wafer.
At IES-UPM, this process was carried out manually, but it could be
easily integrated into an industrial environment using state-ofthe-art automatic grinding machines.
Another alternative is to perform the operation immediately
after the driving step when no front metal needs to be protected.
But, since a 10 min buffered HF etch (BHF, NH4F:HF 9:1) is needed
in all instances, this would etch the front thin SiO2 passivating and
ARC which means that the front surface would need to be
protected during all wet etches.
A large number of cells (100) were processed using each
option. The results of efciency versus concentration are detailed
in Table 4. Fig. 5 shows the average and best efciencies at 100 
concentration ratio for each process.
The decrease in series resistance was clearly evidenced,
from the average 18 mO in the initial process to 6 or 4 mO for
polished or HCl etched cells, respectively. The ammonia etch
gave even worst results than the initial process. In addition to
improving the contact resistance, an increase in the open-circuit
voltage was obtained for all processes, with the exception of the
ammonia etch which remained very similar. This increase can be
explained as being the result of the partial etching of the highly
recombinant AlSi eutectic layer in the BSF region. Mechanical
polishing gave the best open-circuit voltage since the part of the
BSF layer that was removed was thicker in this process than in wet
etches.
Fig. 6 shows a histogram of the efciency of the cells at a
concentration ratio of 100  manufactured using the best three
processes, namely: polishing, HCl and BHF. Mechanical polishing
and HCl processes gave very similar results at 100  , both for the
best and average cell. HCl etching gave a better result than
polishing with 78% of the cells with efciency at a concentration
ratio of 100  being higher than 18%, while 73% of the polished
cells gave more than 18% at 100  . Mechanical polishing was only
slightly worse than HCl etching, giving both processes the
maximum number of cells with efciencies between 19% and
20%. Furthermore, mechanical polishing was the easiest process to
implement at the facilities at IES-UPM. Wet etching requires the
front surface of each wafer to be covered with a photoresist
coating in order to protect the front side from the etch, something
which is not required for mechanical polishing. Further runs were
made in which a polishing step was carried out before back
contact evaporation.

Fig. 5. Efciency vs. concentration for several back resistive layer removal
processes, (A). average and (B). best cell. The best cell for HCl etch was measured
only at 100 suns.

5. Final manufacture and results: performance, learning curve


and yield
In view of these results, the new processing sequence was
nally established, as is shown in Fig. 7. With this new process,
two new runs were carried out during which more than 1000 cells
were processed and measured.

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Fig. 6. Statistics of several cells rear side removal.

Fig. 8. Efciency vs. concentration measurements of one of the best cells produced
which maintained almost 20% efciency up to 250  .

Fig. 7. Final processing sequence.

In these new runs, the problems arising during the rst run
were avoided. Short-circuit current densities higher than 35 mA/cm2
were measured, as a result of decreasing the shadowing factor and
optimal ARC thickness. Cells had a solderable rear surface and no
back contact resistance was found. The series resistance was of
the order of 45 mO, as per design. Some of the cells were
characterised up to 250  and gave efciencies as high as 19.8% at
250  , as can be seen in Fig. 8, which shows the expected
performance of the cells simulated with PC1D as well. The main
difference between the measured and the simulated performance
was due to a higher shadowing factor in the real cell. The last
curve in Fig. 8 shows the simulation in PC1D of the designed cell
with an increased shadowing factor, in agreement with the
measured performance.
Fig. 9a shows the histogram of the measurements at 100 
concentration level and the corresponding normal distribution

Fig. 9. Results of the main production and adjustment to the corresponding


normal distribution (black line). (A) shows all cells, while in (B) they are separated
by runs.

(black line). The distribution mean value is 18.5%, with a standard


deviation of 1.1%. Cells of up to 21.7% at 10 W/cm2 were measured.
The rst run comprising 3 batches gave the maximum number
of cells in efciencies between 19.0% and 19.5%, whilst run 2
comprising 5 batches gave between 18.5% and 19%, (Fig. 9b). The
cause of this efciency decrease was the emitter. Due to a problem
with the diffusion furnace, a non-optimum P diffusion was made

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Other sources of breakage were the rinsing/drying steps, in


addition to wafer handling in evaporation and cell handling
during ash measurement. These problems found in the rst run
were resolved for the remaining manufacturing processes. The
worst problem that remained unresolved during the entire
production process was breakage during the ultrasonic lift-off of
photoresist.

6. Cost information deduced from this work

Fig. 10. Short circuit current of main production according to runs and its
corresponding t to a normal distribution (lines).

Fig. 11. Learning curve: breakages and performance for each batch. Batches D, E
and F belong to Run 1, the remainder to Run 2. Black dashed line is the total
yield loss; the black solid line indicates those measured cells with Z416%.

in run 2 with emitter sheet resistance as high as 120 O/sq, a long


way from the optimum 50 O/sq for concentrator cells.
Even with this emitter, some of the characteristics of the cells
in group 2 were greatly improved. The main improvement was in
the short-circuit current which had a lower shadowing factor and
optimum ARC, (Fig. 10). The rst run had a Jsc of 3.2670.07 A/cm2
at 100  , whilst the second increased up to 3.5370.08 A/cm2.
However, this 8% increase did not represent an increase in the
maximum power due to the already-mentioned non-optimum
emitter.
In spite of these results in run 2, a clear learning curve in
this processing sequence can be seen in two ways, as detailed in
Fig. 11: rstly, the number of cells broken during the processing of
each batch decreased from almost 50% in the rst batches to
o10% of the initial number of cells in the last one. Secondly, an
increase in efciency can be observed in the nished cells.
Final batches have up to 99% of cells with efciencies surpassing
16% at 100  and 70% of measured cells in the batch surpassing
18% at 100  .
Those processing steps causing the largest number of broken
cells contemplated in Fig. 11, were lift-off (27% of the total broken
cells) and cell cutting in the dicing saw (51%). The nal cause of
breakage was related to the vacuum xture of wafers onto the
dicing saw platform. This was avoided in the second run, thus
reducing the number of breakages to o3% of total sawn cells.

Regarding the evaluation of cell manufacturing cost per unit


of peak power at 100 suns (10 W/cm2 on the cell), the main
gures obtained from this experimental work concern efciency
distribution and production yield.
These two gures have allowed us to calculate the product
cost based on the conventional materials, equipment, labour
and nancial costs for the space solar cell technology, which is
the technology bearing most similarity to IES-UPM base-line
processing.
Analysis is carried out by separating the cost components into
the following categories: equipment (including 5-year amortisation and maintenance), materials (including electricity and
consumables, but excluding silicon wafers), labour (including
people directly involved in production and maintenance, engineering, administration and executive personnel) and infrastructure costs (including building, stocks and nancial costs).
Initial silicon material (wafers) is added as a separated category
from the rest of the materials considered.
Two scenarios have been dened: the rst with the average
yield and efciency results shown in this paper (70% yield and 18%
efciency) and an improved case with higher yield and efciency
(90% and 19.5%, respectively). This improved case is probably a
good approximation when working in an automated line dedicated to running the same process in which dispersion can be
reduced in addition to increasing the average efciency which has
been demonstrated as being perfectly attainable in this paper.
This estimation is based on a 20 MW/year capacity plant
manufacturing 600 diameter FZ wafers in 3 working shifts daily,
operating 5 days a week and using weekends for maintenance and
working at a maximum capacity of 90% to account for any
unexpected equipment down-times. The facility cost has been
estimated with the current prices to build a 1000 m2 class
1,00,000 clean room. As has been demonstrated in this paper,
with the feature sizes we are using (15 mm) and Al-gettering step,
it is not necessary to have a classied clean room. However, air
ltering and recirculation have been included together with
laminar ow cabinets at the furnace entrances and in the
photolithography area. Installation costs include ancillary equipment for supplying of de-ionised water, compressed air and
vacuum and waste disposal. Equipment costs are calculated taking
into account that the micro-electronics industry is moving
forward to larger wafer sizes and smaller feature sizes and there
is a great availability of 600 -capable, refurbished equipment at a
fraction of the cost of the new equipment [18]. Updated costs and
through-puts are used to calculate the number of machines and
total cost. The line yield is taken into account in this step since the
factory is designed to handle the total number of wafers needed to
produce the nal 20 MW/year of good cells. Table 5 summarises
some of the key gures used for both scenarios.
Energy and materials are calculated taking into account the
materials used and the processing times of this pilot line. As can
be seen from the equipment needed, e-beam evaporation is the
process bottleneck. A faster alternative is sputtering, but its
inuence on the surface passivationhence efciencyhas not
been tested in this work.

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M. Castro et al. / Solar Energy Materials & Solar Cells 92 (2008) 16971705

Table 5
Key gures used in cost calculations
70% Yield, 18% efciency

90% Yield, 19.5% efciency

Key equipment
Wet benches
Diffusion furnaces
Aligner
E-beam evaporators
Grinders
Dicing saws

4
1 Stack with 4 tubes
1
8
2
2

4
1 Stack with 4 tubes
1
6
2
2

Labour
Direct labour
Engineering
Administration and Directors

19
5
8

14
5
8

Persons/shift
Persons
Persons

Materials
Silicon wafers
Silicon usage
Electronic grade chemicals
High purity gasses
Metals
Dopants

126,986
0.74
100  103
5.0  103
48
2.5

91,170
0.53
70  103
3.6  103
35
1.8

Wafers/year
g/W
l/year
m3/year
Kg/year
l/year

To calculate the number of wafers needed to be processed, the


nal line yield is taken into account, not the yield of individual
steps. In addition to which, an improved usage of the wafer has
been contemplated. The cell dimensions in this work were set by a
specic system and the wafer usage was very low (38% of the 400
diameter wafer if taking into account the active area, and 50%
when considering the total cell area) due to the elongated shape of
the cell (1  3 cm2 active area). In this cost calculation, a generic
cell of 1 cm2 with two buses of 0.5 mm out of the active area is
taken into account. This yields a 71% of active area and 78% of total
cell area in 600 diameter wafers.
Silicon usage ranges from 0.53 to 0.74 g/W compared with
values of 9.1 g/W for one-sun cells [19]. This, however, still
represents a high percentage of the cost (3841% of the cost of the
cell, opposite to 55% of the cost of the one-sun cells [19]) since
quality is higher and wafers are more expensive. In spite of the
higher efciency of the cell and the concentration ratio, usage is
not even one hundredth of the amount used in a one-sun cell
because, in our case, some parts of the rounded wafer are not
used and the entire cell area is not active, as opposed to the case of
one-sun cells.
The estimated cost ranges from 0.31 to 0.41 h/W for the best
and worst cases, respectively. Without the silicon wafer, the
process cost is 0.190.24 h/W. In the case of the standard
polysilicon at plate cells, the average cell processing cost using
current technology is 0.58 and 1.29 h/W, with and without the
polysilicon wafer [19]. In spite of the more complicated process,
using the 100  concentration factor, the cell price for these
concentration levels can be reduced (bearing in mind 85% optical
efciency and the fact that concentrators only use direct radiation,
this represents 140 suns geometric concentration factors). The
cost distribution for both cases is summarised in Fig. 12.
This cost is comparable to the current concentrator-cell prices
in the market (in terms of h/W), but using a 100  concentration
level instead of the 300  or more than 500  for Back Point
Contact silicon cells or IIIV-based multijunction cells. The
advantages of a lower concentration ratio are the need for a less
stiff system with lower tracking requirements (generally, the
lower the concentration ratio, the wider the acceptance angle) and
a smaller amount of heat to dissipate (allowing a lower operation
temperature and better reliability or a reduction in the heat
dissipation systems to work at the same temperature and
therefore its cost).

Units

Fig. 12. Cost distribution of the process for the two scenarios considered.

Though in this work we have not gone into the whole system
costs and characteristics, it is very reasonable to admit that with
these advantages, the whole 100  concentration system (140 
geometric) can achieve prices comparable to the current market
prices at a mass production level, not being limited by the cell
production or price.

7. Further improvements
The feasibility of manufacturing 100  concentration cells
using a simple process is demonstrated in this paper. However,
the process was additionally complicated during production
development by adding a highly resistive rear side layer removal
process. This layer appears during the growth of the silicon oxide
ARC during drive-in. For large mass production, other ARCs that do
not form an oxidised back surface should be considered. These
could be TiO2, SiN grown by chemical vapour deposition (CVD) or
plasma-enhanced chemical vapour deposition (PECVD), lowtemperature silicon oxide. PECVD silicon oxide could also be
easily used for this purpose, depending on the required refractive
index and passivation. All of these layers are deposited at low
temperature, preventing further lifetime degradation. SiN has the

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M. Castro et al. / Solar Energy Materials & Solar Cells 92 (2008) 16971705

advantage of having good bulk and surface passivation characteristics when grown in an excess of hydrogen [20].
Regarding yield, the weakest point is the ultrasonic lift-off
process. Further improvements in this specic step are needed
before tackling mass production. A better approach would be to use
metal etch instead of the lift-off process to dene the front metal
grid. This would avoid the ultrasonic step and probably produce a
better yield. This process would change the sequence to: front metal
evaporation/photolithography/metal etch, instead of the photolithography/front metal evaporation/lift-off sequence used here. The
main disadvantage of this sequence is the need to open the contacts
in the passivation and the antireection oxide before metal
evaporation processes, something that would require another
photolithography step and extremely precise alignment with the
metal etch mask after metal deposition. For mass production, the
trade-off between an increase in the number of photolithography
steps and the breakages in the ultrasonic lift-off process should be
evaluated in order to choose from these two alternatives. It was
denitely not worth it in the existing facilities at IES-UPM.
Last, but not least, the performance of the cells under
concentration should be considered. Although good performances
were achieved, dispersion of the results was quite high. More
automatic, continuous large volume processing would improve
the average efciency in addition to reducing the dispersion of
results. This is due to more controlled and stable processes, the
opposite of what happens under less repetitive conditions typical
of a research laboratory such as the facilities at IES-UPM. For
example, dispersions found in the emitter due to the variable
conditions of the diffusion furnaces during production could have
been easily avoided.

8. Conclusions
In this work, the feasibility of fabricating 100  concentration
cells using a simple process is proven. However, some unexpected
problems such as the highly resistive back contact layer arose
which required some major changes to the initial processing
sequence. These changes include annealing before back contact
evaporation, the need to add a polishing step on the back surface
in order to remove the highly resistive layer formed during the
drive-in and an ARC growth step.
Using this new process, more than 1000 good performance
cells were processed. This is one of the largest productions
reported for this simple manufacture process of high concentration (100  ) silicon solar cell of conventional structure, and just
two photolithography masking steps, showing very good performance, with an average efciency of 18.5% and 70% of the cells
produced having efciency in excess of 18% at 10 W/cm2. Cells of
up to 21.7% efciency at 100  were also measured.
The weakest points of the production line were the dicing of
the cells and the manual lift-off process. These results could be
easily improved by automating both of these manual processes. In
addition to which, the use of different ARC layers would prevent
the back resistive layer, resulting in a more simplied process.
The cost associated to this process has been evaluated and
ranges from 0.31 to 0.41 h/W. This indeed is perhaps the most
signicant purpose of this work: to demonstrate that the IES-UPM
base line and the technologies used for the space silicon solar cells
is capable of producing high-efciency concentration silicon solar
cells in mass production when manipulated in a production
environment, and cost-effectively.

1705

Acknowledgements
eiro and J.C.
The authors would like to thank J. Montes, J. Pin
Zamorano for the assistance in the setting up of the pilot and
izo for the help in calculating
during the cell processing; C. Can
costs and J. C. Jimeno and his team at TiM in Bilbao for their
photolithography support.
This work has been supported by The Spanish Ministry of
Education and Science under its Consolider Ingenio 2010 Programme, through the GENESIS-FV(CSD2006-0004) Project.
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