You are on page 1of 17

Electric VLSI Design

System
Training Manual
(Version 6.03)

Advanced Science and Technology Institute


Department of Science and Technology

ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Loading Electric
Load Electric by either clicking the Electric icon on the desktop or by clicking on
Start Programs Electric.

The Electric Display


Shown below is a typical Electric display with some of its essential features.

Components Menu Pulldown Menu

Editing Window

Messages Window

Status Area

The editing window or design window is the largest window that initially says No
facet in this window (this indicates that no circuit is being displayed in that window).

The messages window is a text window that is typically found at the bottom of the
screen. This is used for all textual communication.

The pulldown menu contains a list of command options.

The components menu shows a list of nodes or components (in black outline) and
arcs or wires (in red outline) that can be used in the design. The selected arc is highlighted
with a bolder red outline.

The status area provides useful information about the design state.

2 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

SCHEMATIC

Setting the Schematic Technology


1. Click on Technology Change Current Technology from the pulldown menu.
2. Select schematic, analog as the technology (you will have to scroll down to find it).
3. Click OK. Notice that the symbols in the components menu will change to a
schematic set.
4. Click on the 4 Port box in the components menu. This will convert all the
transistors in the components menu to 4-port transistors.

Changing the Lambda Size


1. Click on Technology Change Units.
2. Change Lambda Size to 2000.
3. Change Display Units to Microns.
4. Change Internal Units to Half-Millimicrons.
5. Click OK.

Creating a New Library


1. Click on File New Library on the pulldown menu.
2. Type the library name that you want to create.
3. Click OK.
4. To save the new library, click on File Save Library on the pulldown menu.
5. On the Library File Creation window, browse through the file folders and select the
folder where you want to save the library.
6. Click OK. A message confirming that the new library has been saved will be
displayed in the message window.

Creating a New Schematic Facet


1. Click on Facets Edit Facet.
2. Select the appropriate library.
3. Click New Facet.
4. Type the facet name that you want to create. Set the facet view to schematic.
5. Click OK.

Adding Components
1. Select the desired device in the components menu by using the left mouse button. A
white outline will appear around the chosen component.
2. Click on the design window to drop the component.

Selecting Components and Ports


1. To select a component, left click on the node or component in the
design window. A box that highlights the component appears, which
indicates that it has been selected.
In the second and third figure on the right, DC voltage sources are
shown with highlights indicating that these components were selected.
2. Ports are the connection sites on nodes where the wires connect. A
single node could have several ports. To select a port, click inside the
figure of the node near the location of the desired port.
The second and third figures on the right are voltage sources with the
positive and negative terminals selected, respectively.

3 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Changing Components Properties


1. Highlight the device property label by clicking it. A white X mark should appear on
this label.
2. Double click the property label to access the device Information window.
3. Modify the properties that you want to change.
4. Click OK.
For the voltage sources in the previous page, the device property label is DC.

Adding Export Pins


Table 1
1. Select the node in the components
Export
menu. Export Pin
Characteristic
2. Click on the design window to drop the export
Vdd Power
pin.
3. Type the export name and indicate the Gnd Ground
appropriate export characteristic. Table 1 lists Input Input
the most commonly used export pins and their Output Output
corresponding export characteristics.
4. Click OK.

Adding Wires
1. In the components menu, check if the wire arc (blue line) is highlighted (with a bold
red outline). If it is not highlighted, click on the wire arc to select it.
2. Select the wire starting point by left clicking the component near the desired port.
Make sure that the desired port is highlighted, as discussed in Selecting Components
and Ports, before proceeding to the next step.
3. To create the wire, right click on another device port (to connect two device ports) or
anywhere on the design window (to create a wire segment). Once a wire has been
created, the other end is highlighted.

Adding Voltage/Current Sources


1. In the components menu, click the Spice node to access the Spice list.
2. Choose Voltage/Current Source from the Spice list.
3. Click on the design window to drop the voltage/current source.
4. Type the appropriate SPICE card parameters in the SPICE Card window. Table 2 is
a list of SPICE card formats for the different types of sources.
5. Click OK.

Adding Voltage/Current Meters


1. In the components menu, click the Spice node to access the Spice list.
2. Choose Voltage/Current Meter from the Spice list.
3. Click on the design window to drop the voltage/current meter.
4. To plot the voltage across a device, connect the voltage meter in parallel to that
device. To plot the current through a device connect the current meter in series to
that device.

Choosing the Circuit Analysis


1. In the components menu, click the Spice node to access the Spice list.
2. Three options (transient, DC and AC) are available for the circuit analysis. Choose
the appropriate analysis from the Spice list.
3. Click on the design window to drop the chosen analysis.

4 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

4. Type the appropriate SPICE card parameters in the SPICE Card window. Table 3 is
a list of SPICE card formats for the different analyses.
5. Click OK.

Table 2

Source Type Syntax Parameters


DC DC Value Value the value of the source
V1 initial value
V2 peak value
PULSE(V1 V2 TD Tr Tf PW Pd) TD initial delay time
Pulse
Tr rise time
Tf fall time
PW pulse width
Pd period
Piecewise (Ti Vi) the value Vi of the source at
PWL(T1 V1 T2 V2 T3 V3)
linear (PWL) time Ti
VO offset value
VA amplitude
FREQ frequency in Hz
Sinusoid SIN(VO VA FREQ TD THETA PHASE)
TD delay in seconds
THETA damping factor per second
PHASE phase in degrees

Table 3

Analysis Syntax Parameters


TSTEP printing increment
TSTOP final time
TSTART starting time (if omitted,
TSTART is assumed to be zero)
TMAX maximum step size
Transient TSTEP TSTOP <TSTART> <TMAX> <UIC>
UIC (Use Initial Condition) instructs
SPICE to use the specified initial
condition instead of the quiescent
operating point before beginning
the transient analysis.
START starting value
DC START STOP STEP STOP ending value
STEP size of the increment
AC
With linear NP number of points
frequency LIN NP FSTART FSTOP FSTART start frequency in Hz
variation FSTOP stop frequency in Hz
ND number of frequency points
With decade per decade
DEC ND FSTART FSTOP
variation FSTART start frequency in Hz
FSTOP stop frequency in Hz
NO - number of frequency points
With octave per octave
OCT NO FSTART FSTOP
variation FSTART start frequency in Hz
FSTOP stop frequency in Hz

5 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Saving the Schematic


To save the schematic design that you created, click on File Save All Libraries from
the pulldown menu. (Using the shortcut control key Ctrl-S will also save the circuit.) A
message confirming that all facets of the library has been saved will be displayed in the
message window.

Creating an Icon for the Schematic


1. To create the icon facet of a schematic, open first its schematic facet. An icon is a
symbol facet associated to the schematic facet. Make sure that you have created all
the relevant exports before creating the icon.
2. To configure the appearance of the icon, Table 4
click on View Icon Options. Inputs on Left side
a. Make sure that the options have Outputs on Right side
the settings as listed in Table 4. Bidir. on Top side
b. Check the Draw leads option. Power on Top side
c. Check the Draw body option. Ground on Bottom side
d. Click OK. Clock on Left side
3. Click on View Make Icon from the Export location Lead end
pulldown menu to create the icon facet. Export style Outward
A new design window will appear Export technology Schematic
containing the icon.
4. Edit the icon facet if you want to make further changes on its appearance.

Creating a Schematic SPICE Netlist


1. Click on Tools Simulation Interface SPICE Options.
a. Set the File format to SPICE3 and the SPICE level to 3.
b. Check the Use Node Names option.
c. Click on Use Header Cards From File. In the SPICE Model File Selection
window set the file type to All Files (*.*).
d. Browse through the folder list to locate the model file
(\\Electric\models\BSIM3v31.txt). Select the model file.
e. Click OK.
2. Before creating the SPICE netlist, make sure that all connections are checked. Refer
to Checking for Connectivity on the Tips section of this manual.
3. Click on Tools Simulation Interface Write SPICE Deck from the pulldown
menu to create a SPICE netlist of your schematic design.
4. Add a .cir extension to the file name.
5. Click Save.

6 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

LAYOUT

Setting the Layout Technology


1. Click on Technology Change Current Technology from the pulldown menu.
2. Select mocmossub as the technology (you will have to scroll down to find it).
3. Click OK. The symbols in the schematic menu will change to a mocmos subset.

Changing the Lambda Size


1. Click on Technology Change Units.
2. Change Lambda Size to 350.
3. Change Display Units to Microns.
4. Change Internal Units to Half-Millimicrons.
5. Click OK.

Creating a New Layout Facet


1. Click on Facets Edit Facet.
2. Select the appropriate library.
3. Click New Facet.
4. Type the facet name that you want to create. Set the facet view to layout.
5. Click OK.

Adding Nodes
1. Select a node from the components menu by using the left mouse button.
2. Click on the design window.
Note: Nodes in the mocmossub components menu are the ones in blue outlines.

Adding Arcs
1. Select an arc in the components menu.
2. Choose the arc starting point by left clicking the node near the desired port. Make
sure that the desired port is highlighted before proceeding to the next step.
3. To create the arc, right click on another node port (to connect two node ports) or
anywhere on the design window (to create an arc segment). Once an arc has been
created, the other end is highlighted.
Note: Arcs in the mocmossub components menu are the ones in red outlines.

Adding Export Pins


1. Select the node or arc to be exported.
2. Click on Export Create Export.
3. Type the export name and indicate the appropriate export characteristic.

Checking the Layout for Design Rule Errors


Before proceeding to the simulation, check for any layout violations by running a Design
Rule Check (DRC). Design rules are the set of rules that must be followed when a given
design is laid out. To run a DRC, click on Tools DRC Hierarchical Check.

Saving the Layout


To save the layout that you created click on File Save All Libraries from the
pulldown menu. (Using the shortcut control key Ctrl-S will also save the layout.) A
message confirming that all facets of the library has been saved will be displayed in the
message window.

7 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Creating a SPICE Netlist Using the Layout Instance


1. Create a new schematic facet by following the instructions in the Schematic section
of this manual.
2. Click on Edit New Facet Instance. Click the name of the layout that you want
to instantiate.
3. Click OK and click on the design window. An instance box of the circuit layout now
appears on the design window.
4. Click on Export Re-Export Everything.
5. Add necessary components for simulation such as voltage/current sources, ground,
voltage/current meters and load capacitances.
6. Save the circuit.
7. Change the current technology to mocmossub. Notice that the symbols in the
components menu will change from a schematic set to a layout set.
8. Click on Tools Simulation Interface SPICE Options.
a. Set the File format to SPICE3 and the SPICE level to 3.
b. Check the Use Node Names option.
c. Check the Use Parasitics option.
d. Click on Use Header Cards From File. In the SPICE Model File Selection
window set the file type to All Files (*.*).
e. Browse through the folder list to locate the model file
(\\Electric\models\BSIM3v31.txt). Select the model file.
f. Click OK.
9. Before creating the SPICE netlist, make sure that all connections are checked. Refer
to Transistor Layout on the Tips section of this manual.
10. Click on Tools Simulation Interface Write SPICE Deck from the pulldown
menu to create a SPICE netlist of your circuit design.
11. Add a .cir extension to the file name.
12. Click Save.

Determining the Area of the Layout


1. Click on Info Measure Distance from the pulldown menu.
2. Press X on the keyboard. This key tells Electric that you are ready to specify the
starting point of your measurement.
3. Left click on the starting point of your measurement.
4. Left click on the end point of your measurement. A line appears and the value of the
length is shown.
5. Press the Enter key when done.

8 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

SIMULATION

Simulating the Circuit Behavior Using WinSpice


1. Run WinSpice by clicking on Start Programs WinSpice.
2. Open the *.cir file in WinSpice.
3. Wait until WinSpice starts displaying the simulation data. Press Esc to skip the
viewing of data points. WinSpice will automatically plot in a single window all
voltages and currents that were specified in the schematic.

Plotting Waveforms in Separate Windows


There are 2 ways to plot the parameters in separate windows.

Through the cir file:


1. Open the *.cir file using Notepad or any other text editor program.
2. Add the following line for each parameter to be plotted in a separate window:

.PRINT <analysis type> <parameter> <node name in parenthesis>

3. Run the simulation in WinSpice.

Example:
Plotting several parameters in one window,

.PRINT TRAN V(Va) V(Vb) V(Vout)

The above picture shows the transient response of Va, Vb and Vout superimposed in
one plot. To plot each parameter in separate windows, delete the above code and
rewrite it as:

.PRINT TRAN V(Va)


.PRINT TRAN V(Vb)
.PRINT TRAN V(Vout)

Through the WinSpice command prompt:

If the simulation has been run already, simply type the following on the WinSpice command
prompt:
plot <parameter><node name in parenthesis>

Example: Winspice 1 -> plot v(va)


Winspice 2 -> plot v(vb)
Winspice 3 -> plot v(vout)

9 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

SHORTCUT CONTROL KEYS

Open Library Ctrl-O


Save All Libraries Ctrl-S
Quit Ctrl-Q
Cut Ctrl-X
Copy Ctrl-C
Paste Ctrl-V
Duplicate Ctrl-M
Undo Ctrl-Z
Redo Ctrl-R
Rotate 90 Degrees Counterclockwise Ctrl-J
Select All Ctrl-A
Edit Facet Ctrl-N
Down Hierarchy Ctrl-D
Up Hierarchy Ctrl-U
Look Inside Highlighted Ctrl-P
Create Export Ctrl-E
Fill Window Ctrl-9
Zoom Out Ctrl-0
Zoom In Ctrl-7
Fit to Screen Ctrl-9
Focus on Highlighted Ctrl-F
Left Ctrl-4
Right Ctrl-6
Up Ctrl-8
Down Ctrl-2
Toggle Grid Ctrl-G
Delete Window Ctrl-W
Get Info Ctrl-I

10 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

ELECTRIC AND WINSPICE ERROR/ WARNING MESSAGES

Listed here are some of the most common errors encountered and their corresponding
solutions.

Electric Warning Messages

Warning: there may be inconsistent ground networks in <facet name>


Warning: there may be inconsistent power networks in <facet name>
Warning: top of source [nodex]/DC 3.3 in facet <facet name> not connected to
an export

This means that the ground and power in the circuit is not connected to the DC source.
Refer to Checking forCconnectivity in the Tips section of this manual.

WinSpice Error Messages

Illegal Characters in the SPICE Netlist

Error in x.cir on line x : _nodex xxx x


=> unknown device type - error

To remove this type of error, follow these steps.


1. Open the *.cir file using Notepad or any other text editor program.
2. Scroll down and look for the illegal character . Substitute all occurrences of this
character with the letter v.
3. Save the text file.

Example:

** Sources and special nodes:


node11 Vout_1 Vout DC 0
Vnode9 Vout_1 0 sin(1.65 1m 1k 0 0 0)
Inode6 VDD Ibias DC 100u
Vnode2 VDD 0 DC 3.3
.PRINT TRAN I( node11) V(Vout_1)
.TRAN 10u 10m 10u
.END

Corrected Example:
Notice that all occurrences of are now substituted with v.

** Sources and special nodes:


vnode11 Vout_1 Vout DC 0
Vnode9 Vout_1 0 sin(1.65 1m 1k 0 0 0)
Inode6 VDD Ibias DC 100u
Vnode2 VDD 0 DC 3.3
.PRINT TRAN I(vnode11) V(Vout_1)
.TRAN 10u 10m 10u
.END

Note: Text characters in a SPICE netlist are not case-sensitive.

11 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Unconnected Nodes

Error in x.cir on line x : mnodex Vout Vin 0 * N L=0.35U W=0.80U


Error in x.cir on line x : mnodex Vdd Vin Vout * P L=0.35U W=3.20U
Only level 9 B3S0I can have 5 nodes

Note: * in the beginning of a line denotes it is a comment in the program and is therefore not an error, while an *
within a command denotes a missing node in the program

To remove this type of error, follow these steps.


1. Open the *.cir file using Notepad or any other text editor program.
2. Scroll down and look for the line mentioned in the error message.

Example: Mnode5 Vout Vin 0 * N L=0.35U W=0.80U


Mnode6 Vdd Vin Vout * P L=0.35U W=3.20U

3. Check the schematic for unconnected nodes in the transistors. For this example, the
bulk nodes are unconnected. Connect the bulk correspondingly (to ground for NMOS
and to Vdd for PMOS).
4. Save the schematic and recreate the SPICE netlist. Check if the line is correctly
modified by opening the *.cir file again.

Corrected Example: Mnode5 Vout Vin 0 0 N L=0.35U W=0.80U


Mnode6 Vdd Vin Vout Vdd P L=0.35U W=3.20U

Missing Model Files

Unable to find definition of model 1 default assumed


Error: no unlabeled parameter permitted on mosfet
Error: unresolved model or device references: -p n

To remove this type of error, follow these steps.


1. Open the *.cir file using Notepad or any other text editor program.
2. Check if the model files for NMOS and PMOS are at the top most part of the file.

Example: .model P PMOS


+
+

.model N NMOS
+
+

3. If the model files are not found, go to the schematic window.


4. Check the spice options by clicking on Tools -> Simulation Interface -> SPICE
Options.
5. Make sure that all the settings are as specified in the Schematic section of this
manual.
6. Re-create the SPICE netlist by clicking on Tools -> Simulation Interface -> Write
SPICE Deck.
7. The model file should already be included in the *.cir file.

12 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

TIPS

Checking for Connectivity

Click on a component. All connections to the component should appear highlighted.

Example:

Notice that all the nodes connected to ground are highlighted. An example of an
unconnected wire is shown below:

The ground in black circle is not connected to the rest of the nodes connected to ground. If
this is the case, do the following:
1. Save the library (Ctrl-S).
2. Open the same library without closing the current facet.
3. Check for connectivity. The nodes concerned should now all be highlighted.

13 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

Transistor Layout

1. Overlapping two nodes does not automatically connect them. This will only generate
spacing errors. Make sure to connect them first using an arc and then move them closer
as in the example below:

a. Unconnected b. Connected c. Compress further

2. Try to move the node closer one step at a time while checking the message window
to see if a DRC error is generated. Or you can perform the DRC independently as
specified in the Layout section of this manual.
3. Checking their connectivity is the same as with the schematic. Clicking a node should
highlight all that is connected to it as in the figures below.

Connected Unconnected

All nodes connected are highlighted

4. If nodes are well connected, and there are still spacing errors, double click on the arc
connecting the nodes with the spacing error.

14 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

5. Uncheck ends extend (This option sizes the node / arc in proportion to the node
width).
6. Another cause of spacing errors is multiple components that are overlapping. One can
easily identify this by moving the component concerned and checking if there is an
extra component under it as in the example below.

Two coinciding nodes Extra component under the node

In this case, the extra component is not connected to the other nodes and so it
generates the other spacing errors. Simply delete the extra component and run a
DRC again.
7. If there is still a spacing error, then the two nodes must be really too close. One of
the nodes should therefore be moved until the error disappears.

15 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

DESIGN RULES FOR MOCMOSSUB TECHNOLOGY

Arc widths (minimum sizes):


metal1: 3
metal2: 3
metal3: 5
metal3: 3
metal4: 6
poly1: 2
poly2: 3
p/n active (active&select&well):
active: 3, select extends by 2, well extends by 6
active: 3

Pin/Node sizes (minimum sizes):


metal1: 3
metal2: 3
metal3: 5
metal3: 3
metal4: 6
poly1: 2
poly2: 3
active: 3
select: 2
well: 12

Special nodes:
p/n active-to-metal1 contact:
cuts 2x2, separated 3
metal1 extends around cut by 1 (4x4)
active extends around cut by 1.5 (5x5)
select extends around active by 2 (8x8)
well extends around active by 6 (17x17)
poly1-to-metal1 contact:
cuts 2x2, separated 3
metal1 extends around cut by 1 (4x4)
poly1 extends around cut by 1.5 (5x5)
poly2-to-metal1 contact:
cuts 2x2 , separated 3
metal1 extends around cut by 1 (4x4)
poly2 size: 3 (3x3)
poly1-to-poly2 (capacitor) contact:
cuts 2x2 [5.1], separated 3
poly2 size: 3 (3x3)
poly1 extends around poly2 by 2 (7x7)
Transistors:
active is 3 wide and sticks out by 3 (3x8)
poly1 is 2 wide and sticks out by 2 (7x2)
transistor area is 3x2
select surrounds active by 2 (7x12)
well surrounds active by 6 (15x20)
Via1:
cuts 2x2, separated 3

16 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow
Advanced Science and Technology Institute
Department of Science and Technology

metal1 extends around cut by 1 (4x4)


metal2 extends around cut by 1 (4x4)
Via2:
cuts 2x2, separated 3
metal2 extends around cut by 1 (4x4)
metal3 extends around cut by: 2 (6x6) (if 3-metal process)
metal3 extends around cut by: 1 (4x4) (if 4-metal process)
Via3:
cuts 2x2, separated 4
metal3 extends around cut by: 1 (4x4)
metal4 extends around cut by: 2 (6x6)
Substrate/well contact:
select extends around active by 2
well extends around active by 6

DRC:
metal1-to-metal1: 3
metal2-to-metal2: 4
metal3-to-metal3: 3
metal4-to-metal4: 6
poly1-to-poly1: 3
poly1-to-active: 1
poly2-to-poly2: 3
poly2-to-active: 1
poly2-to-polyCut: 3
active-to-active: 3
select-to-trans: 3
polyCut/actCut-to-polyCut/actCut: 3
polyCut/actCut-to-via1: 2
polyCut-to-active: 2
actCut-to-poly: 2
via1-to-via1: 3
via1-to-via2: 2
via2-to-via2: 2
via3-to-via3: 4

Metals: Metal-1 Metal-2 Metal-3 Metal-4 Metal-5 Metal-6

2-metals: 3 wide 3 wide


3 apart 4 apart
1 over via1 1 over via1

3-metals: 3 wide 3 wide 5 wide


3 apart 3 apart 3 apart
1 over via1 1 over via1/2 2 over via2

4-metals: 3 wide 3 wide 3 wide 3 wide


3 apart 3 apart 3 apart 3 apart
1 over via1 1 over via1/2 1 over via2/3 1 over via3

5-metals: 3 wide 3 wide 3 wide 3 wide 4 wide


3 apart 3 apart 3 apart 3 apart 4 apart
1 over via1 1 over via1/2 1 over via2/3 1 over via3/4 1 over via4

6-metals: 3 wide 3 wide 3 wide 3 wide 3 wide 4 wide


3 apart 3 apart 3 apart 3 apart 3 apart 4 apart
1 over via1 1 over via1/2 1 over via2/3 1 over via3/4 1 over via4/5 1 over via5

Note: All dimensions are given in lambda.

17 ASTI-VCTI OpenLab Training Series


Introduction to Full-Custom Digital IC Design Flow

You might also like