Analog Electronics Lab (10ESL37)

Experiment 1

Half Wave Rectifier

Objective of the experiment: To determine the efficiency, ripple factor and voltage
regulation for Half Wave Rectifier with and without Capacitor filter.

Components:

Component Specification Quantity

Diode 1N4007 1
Transformer 9 0 9V 1
Capacitor 33F 1
CRO 1
Resistors 1k, 1M 1
Patch cords 10
DMM 2

Circuit Diagram:

DMM 1 To CRO
D
+ -

Transformer 1N4007
0-100mA +
230V, 50Hz 1.0k DMM 2
AC Input Load R 0-20V
230/9-0-9V -

fig. 1 HWR without filter

DMM 1 To CRO
D
+ -

Transformer 1N4007
0-100mA +
230V, 50Hz 1.0k DMM 2
33F
AC Input Load R 0-20V
C
230/9-0-9V -

fig. 2 HWR with capacitor filter

Theory:

Procedure:

1. Connect the circuit as per fig. 1 for HWR without filter.

2. Switch ON the AC supply and observe the output waveform across load R = 1k.

3. From the DMM1 and DMM2 note the current IoDC and voltage VoDC respectively.

4. From the CRO note the peak value of output voltage, Vom.

5. Switch OFF the AC supply and connect 1M instead of 1k.

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 Analog Electronics Lab (10ESL37)
6. Switch ON the AC supply and note the no load voltage, VNL on DMM2, and calculate the
voltage regulation with VFL = observed value of VoDC.

7. Connect the circuit as per fig. 2 for HWR with capacitor filter, and observe waveform
across 1k load.

8. From CRO note the Vom and ripple voltage VRp p, and VoDC from DMM2, and calculate
ripple factor.

Observations:

(a) H.W.R. without filter

VoDC IoDC % %R
Vom Vorms Iom
Obs. Theo. Obs. Theo.

Calculation

i. Peak value of output voltage, Vom = .V

ii. DC component of output voltage, VoDC = Vom/ = V

iii. AC component of output voltage, Vorms = Vom/2 = V

iv. Peak value of output current, Iom = Vom/R = A

v. DC component of output current, IoDC = Iom/ = A

vi. AC component of output current, Iorms = Iom/2 = A

vii. Ripple factor, = {(Vorms/ VoDC) 2 1}1/2 =

viii. Efficiency, = (VoDC. IoDC)/(Vorms. Iorms)*100 = %

ix. Percentage Voltage Regulation, R = (VNL VFL)/VFL*100 = . %

(b) H.W.R. with capacitor filter

VoDC
Vom VRp p VRrms
Obs. Theo. Obs. Theo.

Calculation

i. RMS value of ripple voltage, VRrms = VRp p/(23) = .V

ii. Theoretical value of ripple factor, r = 1/(23*RCf) = V

iii. Theoretical value of DC output voltage, VoDC = 2fCR/(1 + 2) = V

iv. Observed value of ripple factor = VRrms/ VoDC =

Result:

Conclusion:

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 Analog Electronics Lab (10ESL37)
Experiment 2

Full Wave Bridge Rectifier

Objective of the experiment: To determine the efficiency, ripple factor and voltage
regulation for Bridge Rectifier with and without Capacitor filter.

Components:

Component Specification Quantity

Diode 1N4007 4
Transformer 9 0 9V 1
Capacitor 33F 1
CRO 1
Resistors 1k, 1M 1
Patch cords 10
DMM 2
Signal Generator 1

Circuit Diagram:
DMM1 To CRO
+ -

0-100mA
D1 D4
+
Transformer
DMM2
1.0k 0-50V
Load R -

230/9-0-9

D3 D2

fig. 1 Bridge rectifier without filter

DMM1 To CRO
+ -
0-100mA
D1 D4

Transformer +
DMM2
1.0k 33F
0-50V
Load R C -
230/9-0-9

D3 D2

fig. 2 Bridge rectifier with capacitor filter

Theory:

Procedure:

1. Connect the circuit as per fig. 1 for bridge rectifier without filter.

2. Switch ON the AC supply and observe the output waveform across load R = 1k.

3. From the DMM1 and DMM2 note the current IoDC and voltage VoDC respectively.

4. From the CRO note the peak value of output voltage, Vom.

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 Analog Electronics Lab (10ESL37)
5. Switch OFF the AC supply and connect 1M instead of 1k.

6. Switch ON the AC supply and note the no load voltage, VNL on DMM2, and calculate the
voltage regulation with VFL = observed value of VoDC.

7. Connect the circuit as per fig. 2 for bridge rectifier with capacitor filter, and observe
waveform across 1k load.

8. From CRO note the Vom and ripple voltage VRp p, and VoDC from DMM2, and calculate
ripple factor.

Observations:

(a) Bridge rectifier without filter

VoDC IoDC % %R
Vom Vorms Iom
Obs. Theo. Obs. Theo.

Calculation

i. Peak value of output voltage, Vom = .V

ii. DC component of output voltage, VoDC = 2Vom/ = V

iii. AC component of output voltage, Vorms = Vom/2 = V

iv. Peak value of output current, Iom = Vom/R = A

v. DC component of output current, IoDC =2 Iom/ = A

vi. AC component of output current, Iorms = Iom/2 = A

vii. Ripple factor, = {(Vorms/ VoDC) 2 1}1/2 =

viii. Efficiency, = (VoDC. IoDC)/(Vorms. Iorms)*100 = %

ix. Percentage Voltage Regulation, R = [(VNL VFL) / VFL ] *100 = . %

(b) Bridge rectifier with capacitor filter

VoDC
Vom VRp p VRrms
Obs. Theo. Obs. Theo.

Calculation

i. RMS value of ripple voltage, VRrms = VRp p/(23) = .V

ii. Theoretical value of ripple factor, r = 1/(43*RCf) = V

iii. Theoretical value of DC output voltage, VoDC = [4fCR/(1 + 4)]*Vm = V

iv. Observed value of ripple factor = VRrms/ VoDC =

Result:

Conclusion:

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 Analog Electronics Lab (10ESL37)
Experiment 3

Clipper Circuits

Objective of the experiment: To study the working of various types of series and
parallel clipper circuits.

Components:

Component Specification Quantity

Diode 1N4007 2
Signal Generator 1
CRO 1
Resistors 10k 1
Patch cords 10

Circuit Diagram:

Series Clippers

D 2V, DC -2V, DC

1N4007 1N4007 1N4007

5Vp-p, 1kHz 10k 10k 10k
Load R 5Vp-p, 1kHz Load R 5Vp-p, 1kHz Load R

(a) (b) (c)

fig. 1 Positive Clipper (a) without bias (b) with positive bias (c) with negative Bias

D 2V, DC -2V, DC

1N4007 1N4007 1N4007

5Vp-p, 1kHz 10k 10k 10k
Load R 5Vp-p, 1kHz Load R 5Vp-p, 1kHz Load R

(a) (b) (c)

fig. 2 Negative Clipper (a) without bias (b) with positive bias (c) with negative Bias

Parallel Clippers

Load R Load R
Load R 1N4007 1N4007
D
5Vp-p, 1kHz 1N4007 5Vp-p, 1kHz 5Vp-p, 1kHz
2V, DC
-2V, DC

(a) (b) (c)

fig. 3 Positive Clipper (a) without bias (b) with positive bias (c) with negative Bias

Load R Load R
Load R D1 1N4007 1N4007
1N4007
5Vp-p, 1kHz 5Vp-p, 1kHz 5Vp-p, 1kHz
2V, DC
-2V, DC

(a) (b) (c)

fig. 4 Negative Clipper (a) without bias (b) with positive bias (c) with negative Bias
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 Analog Electronics Lab (10ESL37)
Theory:

Procedure:

1. Connect the circuit as per fig. 1(a) for Series Positive Clipper without bias.

2. From signal generator give 5Vp p, 1 kHz AC signal.

3. Note the output waveform and the transfer characteristics across 1k from the CRO.

4. Connect 2V DC supply as shown in fig. 1(b) for series positive clipper with positive bias,
and repeat steps 2 and 3.

5. Connect 2V DC supply as shown in fig. 1(c) for series positive clipper with negative bias,
and repeat steps 2 and 3.

6. Repeat above procedure for Series Negative Clipper circuits shown in fig. 2.

7. Connect the circuit as per fig. 3(a) for Parallel Positive Clipper without bias.

8. From signal generator give 5Vp p, 1 kHz AC signal.

9. Note the output waveform and the transfer characteristics across DIODE from the CRO.

10. Repeat above procedure for Parallel Positive clippers with bias, in fig. 3 and Parallel
Negative Clippers shown in fig. 4.

Result:

Conclusion:

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 Analog Electronics Lab (10ESL37)
Experiment 4

Clamper Circuits

Objective of the experiment: To design clamper circuits for the given specifications,
and observe the variations in the clamping levels by changing the RC time constant and
also DC reference voltage.

Components:

Component Specification Quantity

Diode 1N4007 1
Signal Generator 1
CRO 1
Resistors 100k 1
Capacitor 1F 1

Circuit Diagram:

Design: -

For appropriate working of the clamper circuit the values of R and C must to be
chosen such that the time constant RC is much greater than the period of the input
signal.
Therefore, RC >> T
Assume T = 1 ms
To satisfy the requirement for clamping R is chosen as 100 K~ and C as 1F
i.e. RC= 100ms >>1 ms
Positive clamper

1F
D
1F 100k
1kHz 100k 1kHz Vdc
D 5Vp-p R
5Vp-p R 1V

(a) (b)

fig. 1 Positive Clamper (a) without bias (b) with positive bias

Negative clamper

1F
D
1F 100k
1kHz 100k 1kHz
D 5Vp-p R
5Vp-p R -1 V
Vdc

(a) (b)

fig. 2 Negative Clamper (a) without bias (b) with negative Bias

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 Analog Electronics Lab (10ESL37)
Theory:

Procedure:

1. Connect the circuit as per fig. 1(a) for Series Positive Clamper without bias.

2. Set the input signal from signal generator to 5Vp p, 1 kHz AC signal.

3. Note the output waveform and the transfer characteristics across 100k from the CRO.

4. Connect the circuit for positive clamper with positive bias as shown in fig 1(b) and repeat
steps2 and 3

5. Repeat above procedure for negative clamper shown in fig 2 (a) and (b).

Result:

Conclusion:

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 Analog Electronics Lab (10ESL37)
Experiment 5

R C Coupled Amplifier

Objective of the experiment: To design clamper circuits for the given specifications,
and observe the variations in the clamping levels by changing the RC time constant and
also DC reference voltage.

Components:

Component Specification Quantity

Diode 1N4007 1
Signal Generator 1
CRO 1
Resistors 100k 1
Capacitor 1F 1

Circuit Diagram:

5V
+Vcc

Rb1 Rc
To CRO

Co

Ci
SL100
Vi
1Vp-p Rb2 Re

fig. 1 R C Coupled Amplifier without bypass capacitor

5V
+Vcc

Rb1 Rc
To CRO

Co

Ci
SL100
Vi
1Vp-p Rb2
Re Ce

fig. 2 R C Coupled Amplifier with bypass capacitor

Theory:

Procedure:

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 Analog Electronics Lab (10ESL37)
6. Connect the circuit as per fig. 1(a) for Series Positive Clamper without bias.

7. Set the input signal from signal generator to 5Vp p, 1 kHz AC signal.

8. Note the output waveform and the transfer characteristics across 100k from the CRO.

9. Connect the circuit for positive clamper with positive bias as shown in fig 1(b) and repeat
steps2 and 3

10. Repeat above procedure for negative clamper shown in fig 2 (a) and (b).

Result:

Conclusion:

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