24C44 PCB24

CAT24C44
256-Bit Serial Nonvolatile CMOS Static RAM

FEATURES
Single 5V Supply JEDEC Standard Pinouts:
Infinite E2PROM to RAM Recall 8-pin DIP
8-pin SOIC
CMOS and TTL Compatible I/O
100,000 Program/Erase Cycles (E2PROM)
Low CMOS Power Consumption:
Active: 3 mA Max. Auto Recall on Power-up
Standby: 30 A Max. Commercial, Industrial and Automotive
Power Up/Down Protection Temperature Ranges

10 Year Data Retention

DESCRIPTION
The CAT24C44 Serial NVRAM is a 256-bit nonvolatile store protection circuitry prohibits STORE operations
memory organized as 16 words x 16 bits. The high when VCC is less than 3.5V (typical) ensuring E2PROM
speed Static RAM array is bit for bit backed up by a data integrity.
nonvolatile E2PROM array which allows for easy trans-
The CAT24C44 is manufactured using Catalysts ad-
fer of data from RAM array to E2PROM (STORE) and
vanced CMOS floating gate technology. It is designed to
from E2PROM to RAM (RECALL). STORE operations
endure 100,000 program/erase cycles (E2PROM) and
are completed in 10ms max. and RECALL operations
has a data retention of 10 years. The device is available
typically within 1.5s. The CAT24C44 features unlimited
in JEDEC approved 8-pin plastic DIP and SOIC pack-
RAM write operations either through external RAM
ages.
writes or internal recalls from E2PROM. Internal false

PIN CONFIGURATION PIN FUNCTIONS

Pin Name Function
DIP Package (P) SOIC Package (S) SK Serial Clock

CE 1 8 VCC CE 1 8 VCC DI Serial Input

SK 2 7 STORE SK 2 7 STORE DO Serial Data Output
DI 3 6 RECALL DI 3 6 RECALL
DO 4 5 VSS DO 4 5 VSS CE Chip Enable
RECALL Recall
5157 FHD F01

STORE Store
VCC +5V
VSS Ground
CAT24C44

BLOCK DIAGRAM
E2PROM ARRAY

RECALL
ROW STATIC RAM STORE
DECODE ARRAY STORE
256-BIT CONTROL
LOGIC RECALL
CE
INSTRUCTION COLUMN
DI DO
REGISTER DECODE
SK VCC
VSS

INSTRUCTION 4-BIT
DECODE COUNTER

5157 FHD F09

MODE SELECTION(1)(2)
Software Write Enable Previous Recall
Mode STORE RECALL Instruction Latch Latch
Hardware Recall(3) 1 0 NOP X X
Software Recall 1 1 RCL X X
Hardware Store(3) 0 1 NOP SET TRUE
Software Store 1 1 STO SET TRUE
X = Dont Care

POWER-UP TIMING(4)
Symbol Parameter Min. Max. Units
VCCSR VCC Slew Rate 0.5 0.005 V/m
tpur Power-Up to Read Operations 200 s
tpuw Power-Up to Write or Store Operation 5 ms

Note:
(1) The store operation has priority over all the other operations.
(2) The store operation is inhibited when VCC is below 3.5V.
(3) NOP designates that the device is not currently executing an instruction.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
 CAT24C44

ABSOLUTE MAXIMUM RATINGS* *COMMENT

Temperature Under Bias ................. 55C to +125C
Storage Temperature ....................... 65C to +150C
Voltage on Any Pin with
Respect to Ground(2) ............. 2.0 to +VCC +2.0V
VCC with Respect to Ground ............... 2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300C
Output Short Circuit Current(3) ........................ 100 mA
Stresses above those listed under Absolute Maximum
Ratings may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica-
tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor-
mance and reliability.

RELIABILITY CHARACTERISTICS
Symbol Parameter Min. Max. Units Reference Test Method
NEND(1) Endurance 100,000 Cycles/Byte MIL-STD-883, Test Method 1033
TDR(1) Data Retention 10 Years MIL-STD-883, Test Method 1008
VZAP(1) ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015
ILTH(1)(4) Latch-Up 100 mA JEDEC Standard 17

D.C. OPERATING CHARACTERISTICS

VCC = 5V 10%, unless otherwise specified.
Limits
Symbol Parameter Min. Typ. Max. Unit Conditions
ICCO Current Consumption (Operating) 3 mA Inputs = 5.5V, TA = 0C
All Outputs Unloaded
ISB Current Consumption (Standby) 30 A CE = VIL
ILI Input Current 2 A 0 VIN 5.5V
ILO Output Leakage Current 10 A 0 VOUT 5.5V
VIH High Level Input Voltage 2 VCC V
VIL Low Level Input Voltage 0 0.8 V
VOH High Level Output Voltage 2.4 V IOH = 2mA
VOL Low Level Output Voltage 0.4 V IOL = 4.2mA

CAPACITANCE TA = 25C, f = 1.0 MHz, VCC = 5V

Symbol Parameter Max. Unit Conditions
CI/O(1) Input/Output Capacitance 10 pF VI/O = 0V
CIN(1) Input Capacitance 6 pF VIN = 0V

Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is 0.5V. During transitions, inputs may undershoot to 2.0V for periods of less than 20 ns.
Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1V to VCC +1V.
CAT24C44

A.C. CHARACTERISTICS
VCC = 5V 10%, unless otherwise specified.
Symbol Parameter Min. Max. Units Conditions
FSK SK Frequency DC 1 MHz
tSKH SK Positive Pulse Width 400 ns
tSKL SK Negative Pulse Width 400 ns CL = 100pF + 1TTL gate
tDS Data Setup Time 400 ns VOH = 2.2V, VOL = 0.65V
tDH Data Hold Time 80 ns VIH = 2.2V, VIL = 0.65V
tPD SK Data Valid Time 375 ns Input rise and fall times = 10ns
tZ CE Disable Time 1 s
tCES CE Enable Setup Time 800 ns
tCEH CE Enable Hold Time 400 ns
tCDS CE De-Select Time 800 ns
A.C. CHARACTERISTICS, Store Cycle
VCC = 5V 10%, unless otherwise specified.
Limits
Symbol Parameter Min. Max. Units Conditions
tST Store Time 10 ms CL = 100pF + 1TTL gate
tSTP Store Pulse Width 200 ns VOH = 2.2V, VOL = 0.65V
tSTZ Store Disable Time 100 ns VIH = 2.2V, VIL = 0.65V

A.C. CHARACTERISTICS, Recall Cycle

VCC = 5V 10%, unless otherwise specified.
Symbol Parameter Min. Max. Units Conditions
tRCC Recall Cycle Time 2.5 s
tRCP Recall Pulse Width 500 ns CL = 100pF + 1TTL gate
tRCZ Recall Disable Time 500 ns VOH = 2.2V, VOL = 0.65V
tORC Recall Enable Time 10 ns VIH = 2.2V, VIL = 0.65V
tARC Recall Data Access Time 1.5 s

INSTRUCTION SET
Format
Instruction Start Bit Address OP Code Operation
WRDS 1 XXXX 000 Reset Write Enable Latch (Disables, Writes and Stores)
STO 1 XXXX 001 Store RAM Data in E2PROM
WRITE 1 AAAA 011 Write Data into RAM Address AAAA
WREN 1 XXXX 100 Set Write Enable Latch (Enables, Writes and Stores)
RCL 1 XXXX 101 Recall E2PROM Data into RAM
READ 1 AAAA 11X Read Data From RAM Address AAAA
X = Dont care
A = Address bit
 CAT24C44

DEVICE OPERATION from the device: If the CE pin is prematurely deselected

The CAT24C44 is intended for use with standard micro-
processors. The CAT24C44 is organized as 16 registers
by 16 bits. Seven 8-bit instructions control the devices
operating modes, the RAM reading and writing, and the
E2PROM storing and recalling. It is also possible to
control the E2PROM store and recall functions in hard-
ware with the STORE and RECALL pins. The CAT24C44
operates on a single 5V supply and will generate, on
chip, the high voltage required during a RAM to E2PROM
storing operation.
Instructions, addresses and write data are clocked into
the DI pin on the rising edge of the clock (SK). The DO
pin remains in a high impedance state except when
outputting data from the device. The CE (Chip Enable)
pin must remain high during the entire data transfer.
The format for all instructions sent to the CAT24C44 is
a logical 1 start bit, 4 address bits (data read or write
operations) or 4 Dont Care bits (device mode opera-
tions), and a 3-bit op code (see Instruction Set). For data
write operations, the 8-bit instruction is followed by 16
bits of data. For data read instructions, DO will come out
of the high impedance state and enable 16 bits of data
to be clocked from the device. The 8th bit of the read
instruction is a Dont Care bit. This is to eliminate any
bus contention that would occur in applications where
the DI and DO pins are tied together to form a common
DI/DO line. A word of caution while clocking data to and
while shifting in an instruction, that instruction will not be
executed, and the shift register internal to the CAT24C44
will be cleared. If there are more than or less than 16
clocks during a memory data transfer, an improper data
transfer will result. The SK clock is completely static
allowing the user to stop the clock and restart it to
resume shifting of data.
Read
Upon receiving a start bit, 4 address bits, and the 3-bit
read command (clocked into the DI pin), the DO pin of
the CAT24C44 will come out of the high impedance state
and the 16 bits of data, located at the address specified
in the instructions, will be clocked out of the device.
When clocking data from the device, the first bit clocked
out (DO) is timed from the falling edge of the 8th clock,
all succeeding bits (D1D15) are timed from the rising
edge of the clock.
Write
After receiving a start bit, 4 address bits, and the 3-bit
WRITE command, the 16-bit word is clocked into the
device for storage into the RAM memory location speci-
fied. The CE pin must remain high during the entire write
operation.

Figure 1. RAM Read Cycle Timing

CE

1 2 3 4 5 6 7 8 9 10 11 12 22 23 24
SK

(8)
(1)
DI 1 A A A A 1 1 X

HIGH-Z
DO D0 D1 D2 D3 D14 D15 D0

5157 FHD F02

Figure 2. RAM Write Cycle Timing

CE

1 2 3 4 5 6 7 8 9 10 11 12 22 23 24
SK

DI 1 A A A A 0 1 1 D0 D1 D2 D3 D13 D14 D15

Note:
5157 FHD F03
(1) Bit 8 of READ instruction is Dont Care.
CAT24C44

WREN/WRDS (STO). The WRDS (write/store disable) can be used to

The CAT24C44 powers up in the program disable state
(the write enable latch is reset). Any programming
after power-up or after a WRDS (RAM write/E2PROM
store disable) instruction must first be preceded by the
WREN (RAM write/E2PROM store enable) instruction.
Once writing/storing is enabled, it will remain enabled
until power to the device is removed, the WRDS instruc-
tion is sent, or an E2PROM store has been executed
disable all CAT24C44 programming functions, and will
prevent any accidental writing to the RAM, or storing to
the E2PROM.
Data can be read normally from the CAT24C44 regard-
less of the write enable latch status.

Figure 3. Read Cycle Timing

SK CYCLE # 6 7 8 9 10 11

SK

V IH
CE
t PD

DI

t PD tZ
HIGH-Z HIGH-Z
DO D0 D1 Dn

5157 FHD F04

Figure 4. Write Cycle Timing

1/F SK
t SKH t SKL

SK x 1 2 n

t CES t CEH t CDS

CE

t DS t DH

DI

5157 FHD F05

 CAT24C44

RECALL
RCL/RECALL
Data is transferred from the E2PROM data memory to
RAM by either sending the RCL instruction or by pulling
the RECALL input pin low. A recall operation must be
performed before the E2PROM store, or RAM write
operations can be executed. Either a hardware or soft-
ware recall operation will set the previous recall latch
internal to the CAT24C44.
POWER-ON RECALL
The CAT24C44 has a power-on recall function that
transfers the E2PROM data to the RAM. After Power-up,
all functions are inhibited for at least 200ns (Tpur) from
stable Vcc.
STORE
STO/STORE
Data in the RAM memory area is stored in the E2PROM
memory either by sending the STO instruction or by
pulling the STORE input pin low. As security against any
inadvertent store operations, the following conditions
must each be met before data can be transferred into
nonvolatile storage:
The previous recall latch must be set (either a
software or hardware recall operation).
The write enable latch must be set (WREN
instruction issued).
STO instruction issued or STORE input low.
During the store operation, all other CAT24C44 func-
tions are inhibited. Upon completion of the store opera-
tion, the write enable latch is reset. The device also
provides false store protection whenever VCC falls below
a 3.5V level. If VCC falls below this level, the store
operation is disabled and the write enable latch is
reset.

Figure 5. Recall Cycle Timing

tRCC
tRCP

RECALL

tRCZ tARC
HIGH-Z
DO VALID DATA

tORC UNDEFINED DATA

5157 FHD F06

Figure 6. Hardware Store Cycle Timing

tST
tSTP

STORE

tSTZ
HIGH-Z
DO

5157 FHD F07

CAT24C44

Figure 7. Non-Data Operations

CE

1 2 3 4 5 6 7 8
SK

DI 1 X X X X

OP-CODE
5157 FHD F08

ORDERING INFORMATION

Prefix Device # Suffix

CAT 24C44 S I -TE13

Optional Product Temperature Range Tape & Reel

Company ID Number Blank = Commercial (0 - 70C) TE13: 2000/Reel
I = Industrial (-40 - 85C)
A = Automotive (-40 - 105C)*

Package
P: PDIP
S: SOIC (JEDEC)
24C44 F11

* -40 to +125C is available upon request

Notes:
(1) The device used in the above example is a 24C44SI-TE13 (SOIC, Industrial Temperature, Tape & Reel)