PS9850

Multi-channel Digital Audio Processor

Eight-channels, 192kHz, 24-bits

Digital Audio Processor for Full Digital Amplifier
Introduc- Fea-
tion_______________________ tures___________________________
The PS9850 is a highly integrated system-on-chip audio Audio Interface
solution for multi-channel AV systems such as upper 5.1 ü 8-Channel serial audio interface.
channels, 6.1 channels or 7.1 channels. This device is a ü Supports 16/18/20/24-bit input
high performance PWM modulator and a high resolution ü Supports 13kHz ~ 192kHz input Fs.
digital audio processor.
ü Supports up to 192kHz Fs for 8 Channels.
ü Data formats
This device uses AD modulation operating at a 384kHz 2
ü (I S, left-justified or right-justified)
switching rate, supports AM interference rejection function,
and has PWM sequences for pop-less. ü Microphone serial audio interface.
ü Sony Philips Digital Interface (SPDIF)
This device has an asynchronous sample rate converter
for a variety of input sample rates with an embedded jitter Audio Processor
correction function. For high performances and high reso- ü 192kHz sampling rate of audio processing
lutions, audio processors operate 30bit data paths and a ü 30x24 multipliers and 54-bit accumulator architec-
192kHz sample rate. ture
ü 8-Channel sample rate converter
This processor consists of equalizers, volume controls, a ü Fully programmable 69-band equalizers
bass management and automatic gain limiting functions. ü Preset Graphic Equalizers
Equalizers are fully programmable that have 69 band bi- ü (+12 to -12, 0.5dB/step)
quad filters with either a static or graphic mode and have ü Pop Noise Reduction when equalizer coefficient
usable preset graphic equalizer. Downloads
ü Bass management
This device is operated with a single power source, as it ü Four subsonic filter and LPF for subwoofer chan-
has regulators for its core. This device has a built-in PLL nel
without external loop filter. Therefore the external compo- ü Digital de-emphasis filter
nents are minimized. ü Pre/post full matrix channel mixing.
ü Pre/post mapping.
Applications______________________ ü Main volume control
ü DVD receiver ü (+18dB to -70dB, 0.5dB/step)
ü Hi-Fi AV Receiver ü Soft/trim volume control
ü Set-top box ü (+12dB to -12dB, 0.5dB/step)
ü Car AV Systems ü Four independent automatic gain limiter
ü Digital audio workstations ü Supports night mode
ü Clipping Free Processing
Features__________________________ ü (30-bit data processing)
General
ü 3.3V single power supply PCM to PWM modulator
ü Embedded regulator for 1.2V Power ü Pop noise reduction
ü 64pin TQFP package ü AM interference rejection
ü Built-in PLL without external loop filter ü 2-Channel PWM headphone output
ü Internal clock generation with X-tal ü 8-Channel PWM speaker output
2
ü I C or SPI serial control slave interface ü PWM on/off control per channel
ü AD modulation operation
ü 384kHz carrier frequency

Copyright ©1999-2009 Pulsus Technologies, Inc. Version: 0.93

Reserves the right to make changes to the information contained in this document without notice August 17, 2009
Contact PULSUS Technologies for recent information. CONFIDENTIAL Page: 2 / 3
PS9850

Block Diagram___________________________________________________________
MBCK Sync. generator
MLRCK HP_LEFT P/M
MSDIN0

Pre-mapper
Sample Rate
MSDIN1 Level Input HP_RIGHT_P/M

Convertor
cut

Post-mixer
Equalizer
MSDIN2 interface
MSDIN3 Receiver

Volume control
(I2S / PWM_CH1_P/M

Post-mapper
Bass mixer
Pre-mixer
SPDIF)
PWM_CH2_P/M
SBCK Sync. generator
SLRCK PWM_CH3_P/M

interpolator
SSDIN0 PWM
Convert

MIC
SSDIN1 or PWM_CH4_P/M
Input interface
SSDIN2 Bass
Transmitter
SSDIN3 managem PWM_CH5_P/M
ent
MIC_SDIN PWM_CH6_P/M
MIC_LRCK
MIC interface
MIC_BCK PWM_CH7_P/M
MIC_MCLK
POP
SPDIF NR PWM_CH8_P/M

EXT_MUTE
Internal Internal
Clock Reset
SPI_I2C
SO_SDA Host Internal Clock control
SCK_SCL Interface Controls
SI_AD0 (I2C, SPI)
Crystal
nCS_AD2
Oscillator PLL Power Supply Regulator
XIN
XOUT

VDD_CORE
VDD_IO
VDD_A

VDD_VIN1/2

VDD_VOUT1/2
nRESET

Copyright ©1999-2009 Pulsus Technologies, Inc. Version: 0.93

Reserves the right to make changes to the information contained in this document without notice August 17, 2009
Contact PULSUS Technologies for recent information. CONFIDENTIAL Page: 3 / 3