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SUB: Linear IC applications

UNIT-I

1. a) Draw the ac equivalent circuit of dual input balanced output differential amplifier and derive the

expressions for small signal voltage gain, input resistance and output resistance.[10M]

b) Compare the above results with a dual input unbalanced differential amplifier. [6M]

2. a) Draw the ac equivalent circuit of single input unbalanced output differential amplifier and derive the

expressions for small signal voltage gain, input resistance and output resistance. [10M]

b) Compare the above results with a single input balanced differential amplifier. [6M]

3. a) What is an op-amp? Draw the equivalent circuit of a typical op-amp and explain. [6M]

b) Draw the ac equivalent circuit of single input balanced output differential amplifier and derive the

expressions for small signal voltage gain. [10M]

4. a) Explain the operation of Level translator with relevant diagrams and expressions. [6M]

b) Draw the small signal equivalent circuit of differential amplifier circuit and obtain the expressions for

common mode gain and differential mode gain. [10M]

5. a) Perform AC and DC analysis of an emitter coupled pair. [8M]

b) Draw the circuit diagram of level translator and explain its operation in detail.[8M]

6. (a) What are the features of the difference amplifier? [6M]

(b) The specifications of the dual input balanced output differential amplifier are given below. RC=4.7

Kohm, RE=4.7 Kohm, RS=70 ohm, hie=1.47 Kohm, Vcc= 12 V, VEE=-12 V, hfe=75, VBE=0.7 V.

Determine (i) Operating point values. (ii) Differential Voltage gain (iii) Common mode gain

(iv) input resistance (v) Output Resistance (vi) CMRR. [10M]

UNIT-II

1. a) List out the ideal characteristics of an operational amplifier. [3M]

b) Define slew rate of an Op-amp and explain its significance in the dynamic characteristics of an Op-

amp. [8M]

c) An op-amp has a slew rate of 2V/μs. What is the maximum frequency of an output sinusoid of peak

value 5V at which the distortion sets in due to the slew rate limitation [5M]

2. a) Explain the basic internal block diagram of a typical operational amplifier. [8M]

b) Explain the measurement procedure for input and output offset voltages of a practical Op-amp.[8M]

3. a) With suitable sketches, explain the measurement procedure for the slew rate and CMRR.[8M]

b) What is input bias current and explain the bias current compensation in an inverting and non-inverting

amplifier circuits?[8M]

4. a) An OP-AMP has a differential gain equal to 90 dB and CMRR is 100 dB. If the two input voltages are

3μV, and 2 μV respectively, calculate the differential mode output and common mode output voltages.[8M]

b) What is thermal drift and mention the techniques to minimize the effect of thermal drift? [4M]

c) Draw and explain the three open loop op-amp configurations with neat circuit diagram. [4M]

5. a) Explain the Frequency Compensation techniques of op-amp in detail. [8M]

b) Draw the IC 741 op-amp pin diagram and explain the function of each pin in detail.[8M]

6. a) Explain different frequency compensation techniques of op-amp in detail. [8M]

b) Explain the terms (i) Input & Out put Off set voltages & currents, (ii) slew rates, (iii)

CMRR and (iv) PSRR.[8M]

UNIT-III

1. a) What are the two closed loop configurations of an Op-Amp, obtain the gains in both the cases.[8M]

b) Draw the frequency response curve of a differentiator. How is it modified when a small resistor is

connected in series with the capacitor? [8M]

2. a) Draw the Instrumentation amplifier and explain its operation in detail. [8M]

b) Draw the Anti log Amplifiers circuit diagram and derive its output voltage in detail. [8M]

3. a) Explain the operation of Square wave generators along with circuit diagram. [8M]

b) Draw the block diagram of Non- Linear function generation and explain its operation.[8M]

4. a) Draw the block diagram of log Amplifiers and explain its operation in detail. [8M]

b) What are the limitations of log amplifier and how to overcome those limitations explain in detail.[8M]

5. a) Design a practical op-amp differentiator circuit for the frequency of 1KHz and explain its frequency

response. [8M]

b) Design a Schmitt trigger circuit for UTP and LTP of +3V and -3V respectively. Explain its hysteresis

curve. [8M]

6. a) Design an Opamp based circuit to produce an output –(V1+2V2-5V3), where V1, V2 and V3 are the

input voltages. [8M]

b) What is the difference between conventional rectifier and precision rectifier? [4M]

c) Explain the operation of a grounded load V to I converter using op-amp. [4M]

UNIT-IV

1 a) Design a first order band pass filter with lower cutoff frequency of 100Hz and a higher cutoff frequency

of 1KHz. The pass band gain should be 4. Calculate the ‘Q’ of the filter. [6M]

b) Compare butterworth and chebyshev filter responses. [4M]

c) Design a first order wide band reject filter with a higher cutoff frequency of 100Hz and a lower cutoff

frequency of 1kHz. Calculate the Q of the filter. [6M]

2 a) Classify the filters based on range of frequencies, frequency response, type of components used and

type of input signal. [6M]

b) Design a first order low pass & high pass filter with cutoff frequency of 1KHz and pass band gain of 11.

Also draw its frequency response. [10M]

3 a) Draw the block diagram of balanced modulator and explain its operation in detail. [8M]

b) List the differences between the frequency responses of first order and second order filters. [8M]

4 a) Explain the term frequency scaling with a suitable example. [6M]

b) Design a wide band-pass filter with fH=200Hz ,fL=1KHz and a pass-band gain=4. Draw the frequency

response and calculate Q factor for the filter. [10M]

5 a) Draw the block diagram of Sample & Hold amplifier and explain its operation in detail. [6M]

b) Explain the operation of 2nd order band reject, band pass filter and draw its frequency response in detail

along with circuit diagram. [10M]

6 a) Draw the block diagram of Four Quadrant multiplier, Explain how it is obtained from single

quadrant multiplier and explain its operation in detail. [8M]

b) Draw the circuit diagram of All pass filters and derive its output response. [8M]

UNIT-V

1 a) Explain the block diagram of PLL emphasizing the capture range and lock range. [8M]

b) Design monostable multivibrator using 555 timer to produce a pulse width of 100 m sec.[8M]

2 a) Explain the operation of an astable multivibrator using 555 timer. Derive the expression for on and off

state time periods. [8M]

b) With a clear block diagram explain frequency multiplier and frequency translation of PLL. [8M]

3 a) Design a symmetrical square wave generator with 1KHz frequency and 5V peak value using 555 timer

IC. Assume necessary data. [8M]

b) Explain the application of PLL as a FSK demodulator. [8M]

4 a) Explain the operation of Monostable multivibrator using 555 timer. Derive the expression for quasi

stable state time period of a Monostable multivibrator using 555 timer. [10M]

b) Draw the block diagram of PLL and explain the operation of individual blocks in detail. [6M]

5 a) Draw the internal diagram of a 555 timer IC and explain significance of each pin. [10M]

b) Draw the circuit diagram of VCO 566 and explain its operation. [6M]

6 a) Draw the astable applications of Schmitt Trigger and explain its operation in detail. [8M]

b) Draw the circuit diagram of FSK demodulators and explain its operation in detail. [8M]

UNIT-VI

1 a) Draw the block diagram of dual slope ADC and explain its operation in detail. [8M]

b) Draw the circuit diagram of weighted resistor DAC, explain its operation in detail and derive expression

for output-analog voltage. [8M]

2 a) Describe the operation of dual slope A/D converter with necessary diagrams. Give some of its

advantages & disadvantages. [8M]

b) How many resistors are required for an 8-bit weighted resistors D/A converter? What are those resistor

values, assuming the smallest resistance is R? [8M]

3 a) Explain in detail with a neat circuit diagram the operation of 3-bit parallel ADC. [6M]

b) List the advantages and disadvantages of flash type ADC. [4M]

c) List out the DAC and ADC Specifications and compare them in detail. [6M]

4 a) With a clear block diagram explain the data conversion procedure for dual slope ADC. [6M]

b) List the advantages of dual slope ADC compared to other ADC models. [4M]

c) Draw the block diagram of inverted R-2R DAC and explain its operation in detail. [6M]

5 a) Draw the block diagram of parallel Comparator type ADC and explain the operation of it. [8M]

b) Draw the block diagram of R-2R ladder DAC, explain its operation and List the advantages of R-2R

ladder DAC compared to weighted resistor DAC [8M]

6 a) Draw the block diagram of successive approximation ADC and explain its operation in detail. [8M]

b) Draw the circuit diagram of counter type ADC and explain its operation in detail. [8M]

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