ECE485/585: Programmable Logic Controllers

Exam #2 (sample style questions)

1. A certain process is to count the number of true-to-false transitions on input I:0.0/0 for a 10 second period. Counting is
to occur if input word I:0.1 has a value less than 10000 or greater than 20000. The 10 second counting period is to begin
15 seconds after the process starts. I:0.0/1 is a process start input and input I:0.0/2 is a process stop input. The count
display is to be output to word O:0.0 only at the end of the count period. All outputs are to be de-energized 5 seconds
after the count period. The process should repeat only after another distinct press of the process start input. Write an
efficient ladder logic program for this process.
2. Write a program that ANDs B3:0 with B3:1 when I:0.0/0 is energized, ORs B3:0 with B3:1 when I:0.0/1 is energized, XORs
B3:0 with B3:1 when I:0.0/2 is energized and COMPLEMENTS B3:0 when I:0.0/3 is energized. B3:1 is to hold the result in
each case. If more than one input I:0.0/0-I:0.0/3 is energized, only one of the operations will be performed. The
precedence order for operations should be from AND (highest precedence) to COMPLEMENT (lowest precedence).

3. Discuss the setup and use of subroutines within the Allen Bradley PLCs.

JSR, SBR, and RET instructions are used to direct the controller to execute a separate subroutine file within the ladder
program and return to the instruction following the JSR instruction. The SBR instruction must be the first instruction
on the first rung in the program file that contains the subroutine.

– Use a subroutine to store recurring sections of program logic that must be executed from several points
within your application program
– A subroutine saves memory because you program it only once.
– Update critical I/O within subroutines using immediate input and/or output instructions (IIM, IOM),
especially if your application calls for nested or relatively long subroutines
– Otherwise, the controller does not update I/O until it reaches the end of the main program (after executing
all subroutines)
– Outputs controlled within a subroutine remain in their last state until the subroutine is executed again.

When the JSR instruction is executed, the controller jumps to the subroutine instruction (SBR) at the beginning of
the target subroutine file and resumes execution at that point. You cannot jump into any part of a subroutine except
the first instruction in that file.
 The target subroutine is identified by the file number that you entered in the JSR instruction. The SBR instruction
serves as a label or identifier for a program file as a regular subroutine file. The instruction must be programmed as
the first instruction of the first rung of a subroutine.

The RET instruction marks the end of subroutine execution or the end of the subroutine file. The rung containing the
RET instruction may be conditional if this rung precedes the end of the subroutine. In this way, the controller omits
the balance of a subroutine only if its rung condition is true.

4. Assume there are sixteen stations along a conveyor system. The stations are numbered from 0-15 with station zero being
the first (i.e. the point where parts enter the conveyor). Parts are to advance along the conveyor at the rate of one station
every four seconds. A part may or may not be at a given station at any point in time. An input sensor I:0.0/0 is used to
detect a part entering the conveyor. At station 5, parts are checked for defects and an input sensor I:0.0/1 is energized
if the part is defective. At station 10, any defective parts are to be removed from the conveyor by energizing output
O:0.0/0. Write an efficient ladder logic program for this process.

5. Label the following statements as TRUE or FALSE.

PLC scan time is dependent on the complexity of the PLC program ___TRUE______

Most PLC timers have microsecond resolution ___FALSE_____

6. Design an efficient ladder logic program that samples analog input (I:1.0) at the rate of 2Hz and outputs the average
value to analog output O:1.0 once every two seconds.

7. Show a diagram of a typical input for a current sinking input module.

8. Discuss the setup of a MSG instruction that would send 10 words of information across an Ethernet-based network
once per second. The source data should begin at B3:0 in the source PLC and be written to a location starting at B3:20
in a target PLC with IP address 10.115.222.100. Show MSG setup screens.

The MSG instruction setup requires selecting a communication channel, a communication command, the starting
address in the source PLC for the data, the target PLC data table address, a corresponding routing information file
entry, and the IP address for the target PLC.

9. How are interrupt priorities assigned in the Micrologix 1100 series PLC?

Micrologix PLCs support the following User Interrupts: User Fault Routine, Event Interrupts (4), High-Speed Counter
Interrupts(1), and Selectable Timed Interrupt. Priorities for these interrupts are fixed. The priorities from highest to
lowest are:

• User Fault Routine

• Event Interrupts
• High-Speed Counter Interrupts
• Selectable Timed Interrupt