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Incremental Encoder Based Position and Velocity

Measurements VLSI Chip with Serial Peripheral Interface


Ndubuisi Ekekwe, Ralph Etienne-Cummings Peter Kazanzides
Department of Electrical & Computer Engineering Department of Computer Science
Johns Hopkins University Johns Hopkins University
Baltimore, MD, USA Baltimore, MD, USA
{nekekwe1, retienne} @jhu.edu pkaz@jhu.edu

Abstract—This paper presents an incremental optical encoder of these techniques may not be optimal because they are
based position and velocity measurements VLSI chip with a physically large. In addition, discrete differentiation often
serial peripheral interface (SPI). It combines period and produces a noisy velocity estimate. For compactness and
frequency countings to provide velocity estimates with good
dynamic behavior over a wide speed range. By sensing the power savings, a VLSI approach offers a better option. For
velocity of the encoder, it reserves the computational power of a medical robots described in [7, 8], where control of multi-
supervisory microcontroller, and subsequently enhances the axis movements is needed, e.g. during ear, nose and throat
performance of the total system. Furthermore, multiple copies surgery, many incremental encoders are used and need to be
of the velocity encoder can access the behavior of multiple read simultaneously. Fig.2 shows the system described in [8]
motors in parallel. It is compact with lower power consumption which is designed for adaptive speed control of dc motors for
compared to traditional FPGA implementations. Although
designed for use in the control unit of a medical robot with 34- low power robotic systems. The microprocessor utilizes the
axes and tight space and power constraints, it can be readily position and speed estimates from the Digital Position and
used in other applications. It is implemented in a 2P3M Speed (DPS) module to implement adaptive speed motor
0.5 µ m CMOS process and consumes 4.82mW power with active control. To accommodate other on-chip modules on the same
area of 0.45mm2 .
die, the realization of the position and speed module (DPS)
in a compact form is needed.
In this paper, we present the DPS module, a position and
I. INTRODUCTION velocity measurement VLSI chip with an SPI interface to a
Most modern motor control systems with applications in micro-controller. This chip is compact and implemented with
robotics, manufacturing, automobile and medical industries a standard readout architecture that makes it easy to interface
require instantaneous velocity information. Incremental with any computer or microcontroller. The chip assists in
encoders, which have been used for this purpose, are implementing control algorithms in the microprocessor for
characterized by high accuracy, high resolution and high optimal motion control of the low power medical robot. In
noise immunity. With high noise immunity, low addition, it could be used in other applications that require
maintenance, and low cost, they are the preferred method for precise estimates of speed and position of a DC motor.
obtaining motor velocity information and are generally This paper is organized as follows: position and velocity
considered to be superior to direct current tachometers [1]. estimation techniques are presented in section II. Chip
Typically, incremental encoders are made up of circular glass architecture and implementation is discussed in section III;
disc imprinted with m slots, which are equally distributed. section IV presents and discusses the testing and
Light shining through the slots activates two sensors, which experimental results while section V gives the final
produce two pulses that are 90 degrees out of phase conclusions.
(quadrature) with each other as shown in Fig.1. Depending
on the direction of rotation, one of these pulses will lead or
lag the other. The number of cycles and frequency of the
pulses are respectively proportional to the angle of rotation
and the rate of change of the angle.
FPGA implementations of encoder based velocity
measurements are reported in [3-6]. In [1], VHDL
synthesized logic was used to obtain a velocity estimate.
Commercially available quadrature decoder and interface ICs
(e.g., HCTL2000 family) only measure position, leaving
speed to be computed by differentiation within the
supervisory µ C . For space constrained applications, the use Fig.1. Quadrature encoder [2]

1-4244-0921-7/07 $25.00 © 2007 IEEE.


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One component of the error is the quantization error due to
R2 the lack of synchronization between the pulses from the
Vcontrol
RI
encoder and the time observation window. This quantization
G1 Motor Encoder
Vout error creates an uncertainty in the measured value of the
Microprocessor
Vs
∆N f and is given by [11]:
SpeedCmd G2 Buffer
Digital Control D/A
(PID + FF) Vifb Rs
60
Position,
Velocity or MotorFeedbk ∆ω f = [rpm] ` (5)
mT f
A/D
Torque
SPI Interface

Motor G2-value
Setup Frequency counting is useful for medium and high speeds
SpeedMeas Digital but degrades in performance at low speed because the
position
PosMeas and speed On-chip systems relative error increases at low speed. Fig. 3 shows that at
high pulses per revolution (m), the error is significantly
lower. Besides, increasing the fixed time window reduces the
Fig.2. Architecture of robotic control unit
relative error. In this design, the period counting and
frequency counting techniques are combined for accurate
II. VELOCITY AND POSITION ESTIMATION
measurement of both the high and low speed motor
TECHNIQUES
movements and the best technique is selected off-chip. An
Two major techniques of obtaining velocity from an on-chip selector would require a 16 bit digital comparator,
incremental encoder are period counting and frequency which would require significant silicon space.
counting [1, 4, 5, 9, 10]:
a). Period counting: This involves counting pulses from a
clock between successive pulses of the encoder. If the clock 250
frequency and counter final values are respectively fp and Np,
200
then the velocity is given by (1): Qerror[rpm]

150

2π f p 60 f p 100

ωp = [rad / sec] = [rpm] (1) 50


m Np m Np 0
4000
0.02
The above equation shows that at low speed (large Np), the 2000
0.01
0.015

technique has a high accuracy while at high speed (small Np); m 0 0


0.005
Fixed Time [s]
it suffers accuracy problems as the quantization error of Np
becomes more significant. The relative error arising from the Fig.3 Simulated Frequency counting quantization error
quantization error of the system is given by [9] : A. Design Constraints
There are three major constraints in the design: maximum
∆ω p mω possible count, encoder maximum frequency, and the lowest
= ∆N p (2)
ω 2π f p measurable velocity. The number of counts, which translates
to the number of bits in the counter, depends on m, fp and Tf
[5]. The encoder maximum frequency depends on the
b). Frequency counting: This is counting the number of encoder type; this influences the value of m (the number of
pulses from the encoder in a known time, Tf. High count slots in the encoder). The least measurable velocity takes into
value means high speed while small count number indicates consideration that in frequency count, at least a complete
low speed. If Nf is the final counter value, then the speed of encoder pulse is required. This is important since the encoder
the encoder is given by (3) [9,10] pulse and sampling (control) period, Tf, are not synchronized
creating an uncertainty modeled in (5). To minimize this
2π N f 60 N f uncertainty, the period of the latter must be at least double
ωf = [ rad / sec] = [ rpm] (3) the former to maintain Nyquist criterion and consequently
m Tf m Tf reduce the relative error. This implies that the minimum
The relative error of the system is given in (4). measurable speed for frequency counting is given by (6);
lower speeds can be measured by period counting:
∆ω f 60 ∆N f
= [rpm] (4) 60 2
ω m ωT f ω min = [rpm] (6)
m Tf

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If (1) and (3) are combined and equated, we obtain the speed
where the period counts and frequency counts are the same.
This speed is given by (7).
60 f p
ω thr = (7)
m Tf
B. Position Measurement
Position measurement involves counting the encoder
pulses to estimate the position of the encoder. To determine
the direction of encoder rotation, the channels are first
decoded into an UP or DOWN signal for clockwise and anti- Fig.4. The VLSI Chip Architecture
clockwise directions, respectively.
C. Acceleration Measurement
Acceleration, rate of change of velocity, can be computed
III. CHIP ARCHITECTURE AND IMPLEMENTATION in the microcontroller using (8) [12]. Using the frequency
counting gives the acceleration as:
Figure 4 shows the simplified block diagram of the 3600 N fk − N fk −1
fabricated chip. It is comprised of digital circuits that are a= 2
[rpm 2 ] (8)
used to realize the position and velocity measurements. Each mT f
implementation is discussed in the next sections. where N f k and N f k −1 are two successive counter results at
A. Position Measurement time stamps k and k-1, respectively.
For position measurement, the encoder outputs are
decoded to an UP or DOWN signal (the encoder direction IV. TESTING AND EXPERIMENTAL RESULTS
signal) by the block, QDECODER. A 16-bit UP/DOWN The fabricated chip is shown in Fig.5. Fig.6 shows the
synchronous counter (UP/DN CTER) is used to count the experimental setup with the chip and a processor that
quadrature pulse. The microcontroller uses the direction provides the encoder signals (the test board contains
signal to determine the direction of rotation of the motor. unrelated components for testing this chip). Results are
PISO (parallel-in-serial-out) register is used to transfer the presented in Figs. 7 and 8.
parallel outputs of the counter into serial format. Transfer is
completed within 16 clocks cycles supplied by the SPI clock
(not shown). The SPI CONTROL block ensures that results Frequency Position
of each of the measurements (position, velocity-period and
frequency counting) are synchronized for the
microcontroller. Period
B. Velocity Measurement
The velocity measurement as described above was
implemented with two techniques: period and frequency SPI module
counting. The upper section of Fig.4 shows the frequency
counting velocity measurement. Here, a fixed time pulse
(timer) is applied to a toggle flip flop which is connected to Fig.5. Chip Microphotograph
an enable input (En) of a counter. This ensures that counting
is only possible when the En is active. Channel A, ChA, of This chip uC
the encoder is applied to the clock input. The counter counts
the number of pulses of the ChA within the window when En
is active. The final value of the counter is latched and
through PISO is transferred to the microcontroller. The
implementation for the period counting velocity
measurement technique is similar to the frequency method
except that the input to the flip flop is channel A (ChA) and a
pulse (ClkP) is applied to the clock input of the counter. The
counter counts the number of ClkP pulses that occur between
successive encoder pulses.
Fig. 6. Experimental test setup. The system is large only
for simplicity of testing. After the chip has been tested
and characterized, a compact PCB will be developed.

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V. CONCLUSION
Fastclk
In this paper, an incremental encoder based position and
ChA
velocity measurement VLSI chip with SPI interface has been
So_per described. It is based on two techniques: counting pulses
Clkp from a clock between successive pulses of the encoder for
low speed application and counting the number of pulses
Shift from the encoder in a known time for medium and high
speeds. The combined techniques enable the chip to deliver
high accuracy for a wide speed range without degradation in
dynamic behavior. With on-chip velocity estimate, it reduces
Fig.7. Period counting measured results. When shift goes computational complexity imposed on the supervisory
high, latched counter outputs are shifted within 16 fastclk
microcontroller. It is compact with lower power consumption
cycles. The results appear on So_per.
when compared to FPGA versions. The chip is implemented
in a 2P3M 0.5µ m CMOS process. Though designed for use
Fastclk in the control unit of a surgical medical robot, it could be
Timer used in varieties of applications requiring precise motion
So_Freq
estimation and control.
Shift ACKNOWLEDGMENT
ChA The NSF provided funding and research infrastructure for
this work under ERC cooperative agreement EEC-9731748.

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Speed range 10Hz – 50MHz

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