8 FREQUENCY SYNTHESIZERS The oscillators used in RF transceivers are usually embedded in a synthesizer environment so as to achieve a precise definition of the output frequency. Syn- thesizer design still remains one of the challenging tasks in RF systems because it must meet very stringent requirements. In this chapter, we describe a number of approaches to frequency synthe- sis, emphasizing their merits and drawbacks with respect to low-power mono- lithic implementation. We first study the concept of phase locking and ana- lyze different types of phase-locked loops (PLLs).! Next, we present several synthesizer architectures, including integer-N,, fractional-N , and direct-digital synthesis techniques, Finally, we deal with the problem of frequency division. For a more extensive treatment of frequency synthesizers, the reader is referred to (1, 2, 3}. 8.1 GENERAL CONSIDERATIONS The frequency of oscillators in RF transceivers must be defined with very high absolute accuracy, Furthermore, in most cases the frequency must also be varied in small, precise steps. Recall from the wireless standards described in Chapter 4 that the channel spacing can be as small as 30 kHz while the center frequency is in the vicinity of 900 MH7 or 1.9 GHz. In other words, to change the receive or transmit channel, the LO frequency may be required to vary by only 30 kHz. Also, the lower and upper edges of each channel are well defined and can tolerate an error of no more than a few hundred hertz. Thus, the error in the output frequency must remain below a few parts per million. The role of the synthesizer is illustrated in the generic transceiver of Fig. 8.1. portions of Section 8.2 are reprinted, with permission, from Monolithic Phase-Locked Loops and Clock Recovery Circuits, B. Razavi, IEEE Press, Piscataway, NI pp. 4-32, ©1996 IEEE. 247248 Chap. 8 Frequency Synthesizers Figure 8.1 Generic transceiver architecture. In addition to accuracy and channel spacing, several other aspects of syn- thesizers influence the performance of a transceiver: phase noise, sidebands (“spurs”), and lock time. As explained in Chapter 7, the phase noise of the local oscillator impacts both the receive and transmit paths While a free-running oscillator usually exhibits no sidebands, when it is embedded in a synthesizer, it may. Shown in Fig. 8.2, the effect of unwanted sidebands is particularly troublesome in the receive path. Suppose the syn- thesizer output consists of a carrier at ozo and a sideband at ws, while the received signal is eccompanied by an interferer at @iq.. It can be seen that two important components appear after downconversion: the desired chan- nel convolved with the carrier and the interferer convolved with the sideband. If @m — @s = & — @L0(= rr), the downconverted interferer falls into the desired channel. For this reason, typical systems require that spurs be Interferer Desired RF Input Signal Or Om o Lo ‘Synthesizer Output Sideband Bio Os © IF Output A, Orr a Figure 82 Effect of synthesizer sidebands in a receiver,Sec. 8.2. Phase-Lockeé Loops 249 approximately 60 dB below the carrier. Nevertheless, if #; 0 — ws and hence © — ia are large enough, the interferer appears out of the receive band and is therefore suppressed by the front-end duplexer or bandpass filter to some extent The lock time of synthesizers is also a critical parameter. As shown in Fig. 8.3, when the digital channel select input commands a change in the channel, the synthesizer requires a finite time to establish the new frequency, Defined more accuratcly in Section 8.3.1, the lock time is an indication of how fast the new frequency is stabilized. This parameter is especially important in fast freyuency-hoppedspread-spectrum systems. Lock times required in typical RF systems vary from a few tens of milliseconds to a few tens of microseconds. Lock Transi Figure 83. Synthesizer settling. 8.2 PHASE-LOCKED LOOPS 8.2.1 Basic Concepts VCO Dynamics Recall from Chapter 7 that an ideal VCO is charac- terized by @on = OR + Kvcoveon and y(t) = Ac cosfwrrt + Kyco fx. Veont(f)dt]. In studying PLLs, we usually consider a VCO as a linear time- invariant system, with the control voltage as the system’s input and the excess phase (Chapter 3) of the carrier as the system's output. Since the excess phase Soult) = Kyo f Vem? , the input-output transfer function is Pour Kvco Yoox = The integration in VCOs leads to an interesting property: to change the out- put phase, we must first change the frequency and let the integration take place For example, suppose for 1 < f), a VCO oscillates at the same fre- quency as a reference but with a finite phase error (Fig. 8.4). To reduce the error, the control voltage, Mont, is stepped by +AV at ¢ = fo, thereby increas- ing the VCO frequency and allowing the output to accumulate phase faster than the reference. Att = f), when the phase error has decreased to zero, : (8.1) 2 We assume the VCO has no other input to set its phase.