Total No: of Pages 02 Roll No: bys ‘FOURTH SEMESTER MID SEMESTER EXAMINATION March-2018 EC202 ANALOG ELECTRONICS-Il Time: 1:30 Hours Max. Marks: 20 [Note: Answer all questions. Assume suitable missing data, if any. ] 1 ompute the upper cutoff frequency of the circuit shown in Fig.1 using the dominant-pole approximation. Assume both transistors op Saturation and Vy represents DC voltage a of 10 GHz. Assume Ie = Determine the maximum alle 2 Daw the circuit of a pr load SSP E, capacitors a: expression for lower cut off frequency of the oan amplifier wi d gain 0 and hi KHz and 4 MHz, is connected in rae Eat factor as 0.02. Calculate to amplifier gain-and also determine the upper | eu feedback amplifier. 1 mA (a) For the circuit shown in Fig,3(a) if the value of R is 500Q select an appropriate value of L so that this c selects only audio frequencies. Draw Bode magnitude and phase plots for the same. 3 P.T.Oa Magnitude Tesponse of an amplifier is shown in Fig. 3(b). Plor phase Tesponse for this amplifier. Assume that On>> Oz >> i where the terms have their usual meaning. 2 20log]H| a Op2 log scale