1063, MORSE AVENUE

SESHADRI VENKATARAMANAN APT #3-204, SUNNYVALE CA-94089

480-297-6625
seshadri.venkataramanan@asu.edu

OBJECTIVE
To be an active member in a challenging team and leverage my skill set focused on Circuit
and Logic Design, Simulation and Test.

SUMMARY OF QUALIFICATIONS
• Adept in circuit design and EDA tools such as Cadence (Spectre,
Virtuoso Schematic and Layout Editor) for Analog and Mixed Signal Circuit Design,
Agilent ADS for RF Circuit Design, and other electronic design tools such as Orcad Pspice.
• Very comfortable and experienced in using simulation tools such as
Hspice, Gnucap for batch mode simulations, Matlab modeling using Simulink.
• Most of the Coursework directly related to VLSI Design specializing
in Advanced Analog Circuit Design and Digital and Mixed Signal Design.
• Knowledge in Design for Test (DFT), Automating Test procedures,
Design Verification Testing (DVT) and Product Qualification Testing.
• Extensive work experience in ATE Testing and applications, HSPICE
and IBIS Circuit modeling and simulation, Applications and Design experience for a Mixed
Signal Design EDA tool(Analog Rails).
• Good knowledge of Computer Architecture and Hardware
Description Languages (HDL), VerilogA.

EDUCATION
Master of Science in Electrical Engineering Graduation Date: May
2009
Arizona State University, Tempe, AZ GPA -
3.5/4.00
Bachelor of Engineering Graduation
Date: May 2006
Electrical and Electronics GPA -
3.7/4.00
Anna University

WORK EXPERIENCE
Applications Engineer Intern Jan 2010 to present
• Manual Testing of FM Transceiver chips for industry standard measurements using
Litepoint’s IQFM Tester.
• Create Design Specification for Automated FM Test Solution using Litepoint’s IQFM
Tester.
• Develop a customized FM Test Solution in C++ and deliver to customers.

Research work on Process Variability Analysis on Digital circuits using LUT

Approach
(Under the guidance of Dr. Sule Ozev) June 2009 to Dec
2009
• Working on identifying the critical paths in a Digital circuit under process variations with
reduced and judicious usage of Monte Carlo simulations.
• Running HSPICE Simulations for characterization and analysis of specific digital gates.
• Scripting simulation results using PERL to create a look up table for LUT based Process
Variability Analysis of Complex Digital Circuits.
Design and Simulation Engineer June 2009 to
Dec 2009
Analog Rails, Chandler, Arizona
• Working extensively on Gnucap, a modern “post-spice” analog and mixed signal circuit
simulator, creating complex measurements and analysis test benches.
• Working on Circuit optimizer and creating topologies to test its functionality.
• Attended Design Automation conference (DAC 2009) representing Analog Rails for
product demonstration.

Design Engineer Intern (HSPICE and IBIS Circuit Modeling) October 2007 to
May 2009
NXP Semiconductors (formerly Philips Semiconductors), Tempe, Arizona
• Developed Perl Script to convert CDL netlists to HSPICE netlists
• Developed and Verified HSPICE and IBIS models for I2C and Analog parts and was in-
charge of the IBIS Models, Developed Verilog - A models for Analog circuits for system
level simulations.
• Developed Encrypted HSPICE models from HSPICE models.
• Verified Analog and High Speed Digital Circuits.

Applications and Test Engineer June 2006 to July

2007
Teradyne - India Design Center, HCL Technologies, Chennai, India
Job Description:
• Was actively involved in Product Functional Verification of DI-750, an LCD Tester
developed by Teradyne and was recognized for developing extensive test plans.
• Developed Test Patterns for testing logic devices. Worked on Digital verification and
testing of packaged ICs using J750, Teradyne digital device tester
• Worked on the development and testing of “Catalyst to Ultra-Flex Converter" tool in PERL
to convert test programs in IMAGE platform to FLEX platform.
• Delivered Lectures on Applications and Hardware Engineering - FLEX Tester and IGXL
Software which was received well by managers and engineers working on the software
division.
• Attended a two month training program on fundamentals of Mixed Signal testing and
test program development for mixed signal devices on FLEX platform at Teradyne,
Shanghai and Developed Test Programs for digital device 8243 I/O expander and mixed
signal device AC01, as part of training projects.

COURSEWORK
• Analog Integrated Circuits, Advanced Analog Integrated Circuits, Digital Circuits, VLSI
Design, Power Electronics
• Fundamentals of Solid State Devices, Feedback Systems, Computer Architecture,
Microprocessors
• Over sampled Sigma Delta Data converters, Nyquist rate Analog to Digital Converters
• VLSI High Speed I/O circuits, Communication Transceiver Circuit Design

GRADUATE PROJECTS
• Design of 32 X 32 Register File with two read ports and one write port and Optimized the
design for performance and power – to achieve the best Energy Delay Product.
• Digital standard cells design and layout.
• Developed Matlab Model of a 1.5 bit per stage RSD Pipeline Analog to Digital Converters
and characterization of ADCs.
• Designed an 80MHz, 10-bit fully differential RSD-based pipelined ADC in Cadence.
• Designed a Common Source Cascode LNA with inductor degeneration for GSM900
Receiver.
• Designed a fully differential Gilbert-cell mixer for Direct Conversion GSM900 Receiver.
• Designed a GSM900 Direct Conversion Receiver in TSMC 0.35um technology conforming
to GSM standards.
• Designed a 4 phase, 1.6GHz Phase Locked Loop for Data Recovery Circuit Applications.
• Designed a 70dB, 200 KHz, fully differential second order continuous-time sigma delta
modulator.
• Designed a High Gain 50Ω Class AB Output Driver Amplifier for Folded Cascode Amplifier.
• Designed a Folded Cascode Differential Transconductance Amplifier.
• Design and laid out a Telescopic Cascode Differential Transconductance Amplifier.

SKILLS
Programming and Tools: C, C++ , VHDL, Verilog ,Perl, Unix Script, VB. SVN Version
Control
Simulation Tools: Cadence (Spectre, Virtuoso Schematic and Layout Editor), Agilent ADS,
Orcad PSpice, Matlab with Simulink, HSPICE, and IBIS Toolkit, Gnucap.
Platforms: MS Windows, Linux and Mac OS X.

REFERENCES AVAILABLE ON REQUEST