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Si84 X X 2.5
KV

D IGITAL I SOLATOR TE S T R EPORT S UMMAR Y

1. Introduction
This application note summarizes various performance, quality, and reliability test results for the Si84xx digital isolator family. A summary of tests and their results is listed in Table 1. For more details on a particular test, see the relevant section in this document.

Table 1. Test Report Summary

Test Description Isolation barrier life-time Surge Immunity Radiated Emissions E-field Immunity Magnetic Field Immunity Electrical Fast Transients Immunity ESD (CDM) ESD (HBM) ESD (MM) Latch-up Relevant Specification IEC62539 IEC60065 (1.2/50 s) SAE J1752 None IEC61000-4-8 IEC61000-4-9 IEC61000-4-4 JEDEC (JESD22-C101C) JEDEC (JESD22-A114E) JEDEC (JESD22-A115A) JESD78 Test Result Pass (60 years at 396 VRMS) Pass to 6 kVPEAK Passes FCC Part 15 (Class B) with 20 dB margin Up to 300 V/m (100 MHz to 10 GHz) Best in Class >1000 A/m magnetic field immunity Passes to 2 kV 2.5 +2.5 kV 4 +4 kV 400 + 400 V Passes to 200 mA

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Copyright 2010 by Silicon Laboratories

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2. Isolation Barrier Lifetime Test
Table 2. Isolation Barrier Lifetime
Test Description Isolation Barrier Lifetime Relevant Specification IEC62539 Test Result Pass (60 years at 400 VRMS)

2.1. Specification
IEC62539 Guide for the Statistical Analysis of Electrical Insulation Breakdown Data.

2.2. Purpose of Test

The purpose of this test was to determine the high-voltage lifetime of the Si84xx isolation barrier.

2.3. Description of Test Setup

Devices under test were converted to two terminals and placed in parallel with various high-voltage levels across their barriers. The high voltage was maintained on the barrier until a given device failed. After a failure occurred, the elapsed time was noted; the failing device was removed, and the test was resumed until all devices failed. After all data points were gathered, IEC62539 was consulted to create the lifetime plot shown in Figure 1.

2.4. Test Results

Note: TDDB = Time-Dependent Dielectric Breakdown (Standard Dielectric Characterization Methodology)

Figure 1. High Voltage Lifetime for Si84xx at 150 C

Even with conservative estimates assuming worst case use at 150 C and failure levels of 10 ppm, lifetime expectancy at a rated working voltage of 560 Vpeak (or Vdc) is 60 years. Typical operating conditions at lower temperatures yield even better lifetimes. For convenience, the high-voltage lifetime expectancy at different working voltages is listed in Table 3.

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Table 3. Voltage vs. Lifetime
VRMS 200 396 600 800 VPEAK/ VDC 283 560 (rated) 848 1131 Lifetime (Years) 131 60 26 12

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3. Surge Immunity
Table 4. Surge Immunity
Test Description Surge Immunity Relevant Specification IEC60065 (1.2/50 s) Test Result Pass to 6 kVPEAK

3.1. Specification
IEC60065 audio, video, and similar electronic apparatus safety requirements.

3.2. Purpose of Test

This purpose of this test was to verify the surge performance for Silicon Labs S84xx family of 2.5 kVrms rated digital isolators. The robustness of the device's isolation barrier (per IEC60065) as well as the device's ability to maintain error-free data transmission during harsh surge events were tested.

3.3. Description of Test Setup

3.3.1. Test 1: Isolation Barrier Robustness during Surge Events This test applied increasingly higher 1.2x50 s voltage surge transients to the isolation barrier. The devices were tested to destruction, meaning that transient amplitudes were increased until the case of the DUT fractured or the device visibly arched internally. Tests were performed at 1, 2, 3, 4, 5, 6, and 7 kV. Ten transients were applied at one-second intervals at each level, and the level was increased in each test until the DUT failed. The DUT was tested as a two-terminal device with all Side 1 pins connected together and all Side 2 pins connected together per the IEC60065 specification requirement. 3.3.2. Test 2: Data Integrity during Surge Events This test applied increasingly higher 1.2x50 s voltage surge transients to the isolation barrier ground pins. 100 kHz, 30 percent duty cycle data was transmitted across the barrier during the surge event. The parts were tested to failure, meaning that transient amplitudes were increased until data was not transmitted across the barrier or the device was visibly damaged. Each sample was tested by applying one transient at 1, 2, 3, 4, 5, and 6 kV. Then, nine additional transients were applied at 5 kV for a total of 10 at that voltage. 3.3.3. Test 2: The Test Fixture Data Integrity during Surge Events This test used a Haefely Technology EMC PSURGE 8000 surge generator with VTM15000 Voltage Transformer Multiplier for Surge voltage. The test used Associated Research, Inc. Model 7715 AC Withstand Voltage Tester to perform the hi-pot testing as necessary.

3.4. Test Results

3.4.1. Test 1: Isolation Barrier Robustness during Surge Events Findings The results of the tests are summarized in Table 5. The 2.5 kVRMS rated devices maintain isolation barrier integrity to 6.1 kV.

Table 5. Surge Test Results Si8442 Samples

1 kV Si84xx-1 Si84xx-2 Si84xx-3 Si84xx-4 Si84xx-5 Si84xx-6 Pass Pass Pass Pass Pass Pass 2 kV Pass Pass Pass Pass Pass Pass 3 kV Pass Pass Pass Pass Pass Pass 4 kV Pass Pass Pass Pass Pass Pass 5 kV Pass Pass Pass Pass Pass Pass 6 kV Pass Pass Pass Pass Pass Pass 7 kV Fail

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3.4.2. Test 2: Data Integrity during Surge Events Findings All of the Silicon Labs samples reliably and accurately transferred 100 kHz data while surges were applied at 1 through 5 kV peak amplitudes. Data were transferred correctly during a total of 10 surges at 5 kV at 10-second intervals. The results of the tests are summarized in Table 6.

Table 6. Results of Si84xx's Data Integrity during Surge Events

1 kV Si84xx-1 Si84xx-2 Si84xx-3 Si84xx-4 Si84xx-5 Si84xx-6 Pass Pass Pass Pass Pass Pass 2 kV Pass Pass Pass Pass Pass Pass 3 kV Pass Pass Pass Pass Pass Pass 4 kV Pass Pass Pass Pass Pass Pass 5 kV Pass Pass Pass Pass Pass Pass 6 kV Fail

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4. Radiated Emissions
Table 7. Radiated Emissions
Test Description Radiated Emissions Relevant Specification SAE J1752 Test Result Passes FCC Part 15 (Class B) with 20 dB margin

4.1. Specification
SAE J1752 Audio, Video And Similar Electronic Apparatus Safety Requirements.

4.2. Purpose of Test

The purpose of this test was to determine emissions radiated by the Si84xx up to 1 GHz.

4.3. Description of Test Setup

Radiated emissions tests were performed on the Si8442 digital isolator using the SAE J1752 TEM cell protocol. This protocol requires that the DUT be mounted on a PCB board where only the DUT radiates energy. In this test, the DUT was installed on a PCB, which was, in turn, mounted over the measurement window of a 1 GHz TEM cell. With the Si84xx IC and surrounding ground plane facing into the cell and the support components facing outward, emissions measured inside the cell could only originate from exposed portions of the IC. Measurements were taken with inputs at logic 0, 1, and at 10 MHz. A second test was performed to explore how emissions occur whether they are caused by the operation of the Si8442 digital isolator or related to the test board layout. In the second test, the IC was both powered and un-powered; a 10 MHz signal was applied to the IC, and emissions were then measured.

4.4. Test Results

Figures 2 through 7 show essentially no emissions from the IC when inputs are at logic 0 or logic 1. The figures also show some level of emissions when a 10 MHz signal was applied. After powering on the IC and taking the data, then powering off the Isolator and repeating the measurement, it was found that the amplitude of the emissions was not related to the operation of the Si8442 because the emission levels are essentially the same, regardless of whether the IC is operating. It follows that the Si8442 does not directly cause the emissions. The signals measured in the TEM cell are conducted into the cell through connections to the leads of the IC and, possibly, through internal connections to the integrated circuit die (bond wires).

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4.5. Silicon Labs Si8442 Quad Digital Isolator Radiated Emissions Plots
Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz Com pan y - Si li con L abs Mo del # Descri ptio n - S i 8442 LOW 0 P roj ect # - 10 235-90 V oltag e -

70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

FCC Part 15 Class B Limit

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 04 :30:31 P M , Tu esday, Aug ust 25, 2009

0 F req uency (Hz) d egre es

c_ d at a_ 2

Figure 2. Si8442 (All Inputs Low, 0 Rotation)

Com pan y - Si li con L abs Mo del # Descri ptio n - S i 8442 LOW 90 P roj ect # - 10 235-90 V oltag e -

Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz

70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

FCC Part 15 Class B Limit

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 04 :36:00 P M , Tu esday, Aug ust 25, 2009

F degr ees 90 req uency (Hz)

c_ d at a_ 2

Figure 3. Si8442 (All Inputs Low, 90 Rotation)

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Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz Com pan y - Si li con L abs Mo del # Descri ptio n - S i 8442 HIGH-0 P roj ect # - 10 235-90 V oltag e -

70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

FCC Part 15 Class B Limit

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 03 :33:29 P M , Wedn esday, Au gust 26, 2009

0 F req uency (Hz) d egre es

c_ d at a_ 2

Figure 4. Si8442 (All Inputs High, 0 Rotation)

Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz Com pan y - Si li con L abs Mo del # Descri ptio n - S i 8442 HIGH-90 P roj ect # - 10 235-90 V oltag e -

70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

FCC Part 15 Class B Limit

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 03 :35:47 P M , Wedn esday, Au gust 26, 2009

F degr ees 90 req uency (Hz)

c_ d at a_ 2

Figure 5. Si8442 (All Inputs High, 90 Rotation)

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Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz Com pan y - Si li con L abs Descri ptio n - S i 8442 10Mh z 0 In A P roj ect # - 10 177-90
70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 09 :29:06 AM , Th ursd ay, Au gu st 27, 20 09

0 F req uency (Hz) d egre es

c_ d at a_ 2

Figure 6. Si8442 (All Inputs 10 MHz, 0 Rotation)

Professional Testing
SAE J1752-3
Radi ated Em i ssion s . 150-100 0 M Hz

Com pan y - Si li con L abs Descri ptio n - S i 8442 10Mh z 90 In A P roj ect # - 10 177-90

70 .0 60 .0 50 .0 40 .0 30 .0 20 .0 10 .0 0 -10 .0 -20 .0 10 0. 0K

Am pl itud e (dBu V)

1.0 M

1 0.0 M

1 00 .0M

1.0 G c_ d at a_ 1

O perato r: Dan G aas 09 :33:25 AM , Th ursd ay, Au gu st 27, 20 09

F degr ees 90 req uency (Hz)

c_ d at a_ 2

Figure 7. Si8442 (All Inputs 10 MHz, 90 Rotation)

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5. E-Field Immunity
Table 8. E-Field Immunity
Test Description
E-Field Immunity

Relevant Specification
None

Test Result
Up to 300 V/m (100 MHz to 10 GHz)

5.1. Specification
None

5.2. Purpose of Test

To determine the susceptibility of the Si84xx to E-fields

5.3. Description of Test Setup

The devices under test were installed on a PWB specifically designed for emissions and immunity testing in a 1 GHz TEM cell. The DUT was mounted on the bottom of the PWB, and support circuitry and external connections were placed on the top of the board. 1001000 MHz immunity tests were conducted with the PWB installed in the 1 GHz TEM cell. Tests from 1 to 10 GHz were conducted in a semi-anechoic chamber, where standard-gain horn antennas were used to irradiate the DUT. Two DUT inputs were tied low using a 1 k resistor. Two inputs were tied high using 1 k resistors. The four output signals were monitored using two 2-input oscilloscopes, which were set to trigger and capture a disturbance event on one of their inputs.

5.4. Test Results

The Silicon Labs Si8440B and Si8445B isolators performed without producing false output glitches when exposed to 300 V/m fields at 100 MHz through 10 GHz. The ADUM-1400 devices produced some false output glitches when subjected to 300 V/m fields at specific frequencies above 1 GHz.

Figure 8. E-Field Immunity

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6. Magnetic Field Immunity
Table 9. Magnetic Field Immunity
Test Description
Magnetic Field Immunity

Relevant Specification
IEC61000-4-8 IEC61000-4-9

Test Result
Best in Class >1000 A/m magnetic field immunity

6.1. Specification
IEC61000-4-8 Electromagnetic Compatibility (EMC)Part 48: Testing and Measurement Techniques, Power Frequency Magnetic Field Immunity Test IEC61000-4-8 Electromagnetic Compatibility (EMC)Part 4: Testing and Measurement Techniques, Section 9: Pulse Magnetic Field Immunity Test. Basic EMC Publication

6.2. Purpose of Test

The purpose of this test was to determine the susceptibility of the Si84xx to magnetic fields.

6.3. Description of Test Setup

The Silicon Labs Si8463BB Isolator mounted on the Silicon Labs Si84xx-ENG SO16 REV2.0 Evaluation PCB was subjected to magnetic field strengths at frequencies of 1, 3, 10, 20, and 30 kHz. The Evaluation PCB was rotated such that the EUT was subjected to the magnetic field in three axes. Magnetic field strength was increased until one of two limits was met: 1. The limit of the generating equipment or 2. The output of at least one of the Si8463BB channel outputs is upset. The following equipment was used: 1. Crown Macro-Tech 2400 audio amplifier 2. HP 33120A arbitrary waveform generator 3. 6.625 inch inside diameter Helmholz coil pair 4. Tektronix THS720P Oscilloscope 5. Pearson Current Monitor, Resolution 0.1 Volt / Amp 6. Fluke 8840A/AF Multimeter The HP 33120A arbitrary waveform generator drove the Crown Macro-Tech 2400 audio amplifier at all frequencies through 30 kHz. One output channel of the Macro-Tech 2400 was connected to the Helmholz coil fixture through an isolation transformer. The Si8463BB part was installed in the Silicon Labs Si84xx-ENG SO16 REV2.0 Evaluation PCB, and the board was placed in the Helmholz coil fixture. During the test, the output level of the waveform generator was increased slowly until the data monitored on one Si8463BB channel output is affected or until the limit of the generating equipment was met. Current through the Helmholz coil pair was monitored and recorded.

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6.3.1. Test 1: InputHigh
Input - High to Input A1 Monitor - Output B1 One input of the Si8463BB was be set to logic 1, and the corresponding output was monitored by the THS720P Oscilloscope until the limit of the generating equipment was met or the Si8463BB output was upset. The PCB was rotated through 3 axis (X,Y,Z) and the test was repeated in each axis.

6.3.2. Test 2: Input10 MHz

Input -10 MHz to Input A1 Monitor - Output B1 One input of the Si8463BB was wired to another HP 33120A waveform generator, and a 10 MHz square wave was applied to this input. The corresponding output was monitored by the THS720P Oscilloscope until the limit of the generating equipment was met or the Si8463B output was upset. The PCB was rotated through three axes (X, Y, and Z), and the test was repeated in each axis.

6.4. Test Results

Table 10 summarizes the test results.

Table 10. Test Results Summary

Magnetic Field Frequency
1 kHz 3 kHz 10 kHz 20 kHz 30 kHz

Maximum Field Strength

2,500 Amp/m 2,000 Amp/m 1,000 Amp/m 450 Amp/m 200 Amp/m

Results In all axis

No effect* No effect* No effect* No effect* No effect*

*Note: The 10 MHz input signal was passed though the Si8463 with no visible signal distortion. There was a slight

ground bounce (in all cases less than 0.5 V), but that was attributed to the magnetic field affecting the scope and power supply connections.

Note that 30 kHz was the frequency limit of the tests. Theoretical magnetic immunity is illustrated in Figure 9 since measurement above 30 kHz at these magnetic field intensities is virtually impossible to recreate.

1.00E+06 1.00E+03 1.00E+00 1.00E-03 1.00E-06 1.00E-09 1.00E-12 1.00E-15 1.00E-18 0.001

Magnetic Flux Density(Wb/m2)

ISO721 IEC61000-4-8 IEC61000-4-9

0.01

Si84xx

ADuM1100

0.1 1 10 Frequency (MHz)

100

1000

Figure 9. Magnetic Susceptibility Graphical Summary

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7. Electrical Fast Transients
Table 11. Electrical Fast Transients
Test Description
Electrical Fast Transients

Relevant Specification
IEC61000-4-4

Test Result
Passes to 2 kV

7.1. Specification
IEC61000-4-4 Testing and measurement techniques-Electrical Fast Transient Burst Immunity Test, IEC Standard

7.2. Purpose of Test

The purpose of the test was to find the levels at which operation of the Si84xx isolator was affected by the surges delivered to input cables through a capacitive clamp. Transients were delivered at 500, 1000, and 2000 V peak amplitude.

7.3. Description of Test Setup

A length of RG-174 coaxial cable was connected to each isolator input in turn. 50 termination resistors on the inputs and outputs of the part on the demo board were connected using the Berg header jumpers. The coaxial cables were terminated at the ends opposite the board with 50 resistors. An oscilloscope was connected to each BNC output jack to monitor the output level during testing. Changes in the output level would indicate that operation of the isolator had been affected by an applied transient. In configuring the equipment for the test, when the oscilloscope was located close to the capacitive clamp (less than 1 meter), transients coupled directly into its input. To eliminate this effect, the power supplies, evaluation PWB, and the oscilloscope were moved approximately 1.5 meters from the capacitive clamp. Instead of using a high-impedance scope probe to monitor the voltage developed across the output terminations on the demo board, the probe was replaced with a length of 50 coax, and the 50 termination in the oscilloscope was enabled. Residual coupling to the oscilloscope on the outside of the coax shield was reduced by wrapping five turns of the cable around a Steward 28A22029 ferrite toroid core. Transients were applied to each isolator input at 500, 1000, and 2000 VP, and the effects were monitored at each output. No effects were observed on any of the outputs.

7.4. Test Results

Table 12 summarizes the test results.

Table 12. EFT Results Summary Table

Test Voltage
500 VP 1000 VP 2000 VP

J22 J21
Pass Pass Pass

J14 J13
Pass Pass Pass

J18 J17
Pass Pass Pass

J3 J4
Pass Pass Pass

J5 J6
Pass Pass Pass

J11 J12
Pass Pass Pass

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Figure 10 shows a typical oscilloscope display while transients were being applied. The small ripple in the waveform is due to setup noise and is not related to transients being applied.

Figure 10. Typical Oscilloscope Plot with Transients Applied

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8. ESD Immunity
Table 13. ESD Immunity
Test Description
ESD (CDM) ESD (HBM) ESD (MM) Latch-up

Relevant Specification
JEDEC (JESD22-C101C) JEDEC (JESD22-A114E) JEDEC (JESD22-A115A) JESD78

Test Result
2.5 +2.5 kV 4 +4 kV 400 + 400 V Passes to 200 mA

8.1. Specifications
JEDEC (JESD22-C101C) JEDEC (JESD22-A114E) JEDEC (JESD22-A115A) JESD78

8.2. Purpose of Test

All packaged semiconductor components, thin film circuits, surface acoustic wave (SAW) components, optoelectronic components, hybrid integrated circuits (HICs), and multi-chip modules (MCMs) containing any of these components are to be evaluated according to these standards for ESD immunity. The test methods described in these standards may also be used to evaluate components that are shipped as wafers or bare chips. To perform the tests, the components must be assembled into a package similar to that expected in the final application. The package used shall be recorded.

8.3. Description of Test Setup

See specific standard for details.

8.4. Test Results

The test results are listed in Table 13.

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CONTACT INFORMATION
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