sanchez@ece.tamu.

edu

T e x a S A & M U n i v e s i t

Why do we need to use Common-Mode Feedback Circuits ? In the past, circuits have mainly one input and one output and both referred to ground. Low voltage power supply make single ended circuits very difficult to perform optimally. An alternative to single-ended circuits is to use fully differential circuits. To double the output swing a fully differential circuit are used. The output terminals of fully differential circuits are equal and opposite polarity. it l it Additional properties of fully differential circuits are: improved output swing, linearity and common-mode rejection ratio. p g y j How are the differential outputs referred to ? How are the common-mode signals eliminated in a Fully differential circuit ?

 A CMFB circuit, in a fully differential circuit, is generally needed for two reasons: (1) To control the common mode voltage at different nodes that cannot be stabilized by the negative differential feedback. This is usually chosen as a reference voltage yielding maximum diff i ldi i differential voltage gain and/or ti l lt i d/ maximum output voltage swing (2) To suppress the common mode components, that tends to saturate different stages, through applying common mode negative feedback.

Background and motivation . VDD ID Vin R M1 Vo1 1 Vo1 = VDD - IDR Vb Vin VDD M2 M1 Vo2

VSS=0

VSS=0

Can we determine the DC operating points for Vo1 and Vo2? Let us f rst cons der the case of one trans stor and one res stor. first consider transistor resistor.

Vo1 M1 saturation Vo1 = Vin - VT1 M1 ohmic M1 OFF Vin

ID1 VDD R

omhic

saturation

VGSn VGS2 VGS1 VDS

Vo1

Analog and Mixed-Signal Center

VDD

Vo2 Second case: Two transistors one n-type and one p-type M1 triode M1 saturation ID1 VDD I VGS1 = VIB P2 VDD - (VSG |Vtp|) P1 V =V
GS1 IA

II

III P1

IV

Vo2B For F VSS 0

VDD - VSG

VDD - (VSG - |Vtp|)

VDD

VDS

Vo1B

P2 I M1 cutoff II M1 sat, M2 triode 1 d III M1 sat, M2 sat IV M1 triode, M2 sat VI

K pW2 K W1 2 N Vin V SS VT1 (1 + N (V01 VSS )) = VDD Vb VT2 2 1 + p (VDD V01 ) 2 L1 2 L2

)[

KCL

I D1 = I D2
Small variations due to process (or to the input) could force the operations in III to move to regions II or IV. V02 is difficult to fix and the regions of operation of M1 and M2 are very sensitive to process variations and input variations.
Analog and Mixed-Signal Center (AMSC)

What is the effect of mismatch between the p-type current source and the n-type current source?
Ip

I p - In

In

rop Vo ron

ro = rop // ron

Vo due to the transistor mismatches, in ID1 and ID2 , is given by Vo=(Ip - In) ro = IRo For instance for =15 and ro = 266 k, this results in Vo = 4V. Since this error can not be produced, M2 is forced into triode region region. We will study techniques to force I close to zero.
Analog and Mixed-Signal Center (AMSC)

Examples of voltage amplifiers types

Single-Input Single-Output Amplifiers
Vb Vin Vo MD R Vin MD Vo Vref Vin + Ib MD Vo Vo M2 MD Is M4 Ic M3 Vc Vin MD Ib2 Vb Ib1 Vo

Vin

Pseudo Differential Amplifiers

Vin+ Vin+ - Vo + VinVb Vin+ - Vo +
VB

Vin+

- Vo +

VB

Fully-Differential y
Vb3 Vin
+

Vin- Vo +

Vo+ - Vo +

Vin-

Vin

Vb2 VinVb4 - Vo +

Vb

How is the common source amplifier related to common-mode feedback?

Fully differential (FD) circuits need common-mode feedback to operate properly and to fix the DC of the output nodes. FD amplifiers consist of common source circuits embedded in differential pairs. Thus, the properties of the single-input common source circuits are part of the FD amplifiers amplifiers.
VDD RD Vin+ M1 Vo + M1 ISS RD VinVin + M2 + Vo Vin+ M1 VDD M2 + M1 ISS Vin-

Vb Vo

Analog and Mixed-Signal Center (AMSC)

 In a number of applications the inputs and output are short circuited, i.e.,

From previous slide, for the load resistor RD, the p ,

Vin + + Vo

input and output common-mode levels is well defined

Vo,cm = VDD I SS R D / 2

For the case of a current source load implemented by PMOS

transistors M2 and M2 the common-mode level is not well M2 common mode defined.
Vb Vin+ M2 PM1 - Vo + VDD M2 M2 P+ Vin
-

CM Levels depend on how close IDM2 and IDM2

are to ISS/2. In practice ISS is implemented by a NMOS current source, and similarly for M2 and M2 by means of a PMOS current source. These two current sources are not ideal creating a finite error between ID, M2, M2 and ISS/2.

M1 ISS

Vb2 M3

Reference.-J.F. Duque-Carrillo, Control of the Common-Mode Component in CMOS Continuous-Time Fully Differential Signal Processing, Analog Integrated and Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993

Effects of drain current mismatches on the DC output voltage: An example of a FD resistor equivalent:
VDD W L P+ M1 M1

W L

M M2 MB2 PM1

M2

+ -

P-

Vo
P+

Vo

Rb

MB3

W L

W 2 L

M3

ISS

Suppose that the drain currents of M2 and M2 (in the saturation region) are slightly smaller than ISS/2, to satisfy KVL at nodes P- and P+, then Vp- and Vp+ must drop forcing M3 to enter in triode region, producing only 2IDM2, DM2. Also if drain currents of M2 and M2 are slightly greater than M2 ISS/2 then both M2 and M2 must enter into the triode region, so that their drain currents remain ISS/2.
Analog and Mixed-Signal Center (AMSC)

Closed loop negative feedback effects on the DC output voltage The high impedance nodes are difficult to fix their DC operating points. This is the case of Single-Ended Differential Amplifiers (Op Amps and OTAs). p p Op Amps in open loop yield VDD Vo = or -VSS Fortunately, Linear Applications of single ended circuits are based on negative feedback and this feedback circuitry also fixes the DC feedback, operating point, i.e.,
R2 R1 V+ A Vo Vo = A (0 - V-)
o 1 but V = R1 + R 2 and Vo dc = 0 o,dc for symmetric power supplies.

VR

Closed-Loop Negative Feedback

Analog and Mixed-Signal Center (AMSC)

I/0 characteristics of a FD Amplifier.

Vo,dm = Vo+ - Vo- = A (V+ - V-) R1 Vo,dm = AVo,dm R1 + R 2 Therefore Vo,dm = 0 if V+ = V- (well defined) d But Vo,cm = 1/2 (Vo+ + Vo-) = ? (undefined) Where should the value of Vo,cm be set? Determined?
Output Vo+ This i th Thi is the region where Vo,cm i h must be fixed. Yielding maximum output voltage swing and (maximum) differential voltage gain.

V + - VSlew Region Linear Region Slew Region Vo-

I/0 characteristics of a FD Amplifier.

Analog and Mixed-Signal Center (AMSC)

Vo,cm is usually fixed by an additional negative (common-mode) feedback circuit such that the differential voltage gain is maximized. Basic Operations Vin+ Vo+ Fully Sensing the output CM level, Differential i.e., Amplifier
Vin ( (H1) Vo VCMC CM (H ) 2 Level + Sense Circuit CM Detector Reference Voltage g

H3 Vcorrection

Comparison with a voltage reference i.e.,

+ Vo + Vo = Vo,cm 2

Vo,cm Vref
Injecting the error correcting level to the amplifier bias circuitry. y Avoid injection of CM signals to nodes of the amplifier which do not correct the hi h d h Vo,cm.
Analog and Mixed-Signal Center (AMSC)

Conceptual Architecture of Common-Mode Feedback Stability requires to have negative feedback:

PHASE (H1H2H3) < 135 FOR < u

If the output signals are current signals, the CMF architecture could be represented as follows:
Viin+ VinFully ll Differential Amplifier ICMC CM Sense + Current Amp + Iref + Transconductance Level Sense Circuit CM Sense Current Amp S C A io+ Icmc MY MX Iref MY MX ioVoicm Vo+ Vo+ Vo-

A conceptual current mode implementation of Level Sense Circuit, CM Sense Current Amplifier (Comparator)

A Simple CM Feedback Without Reference

VDD M10 VCM M11

Vo1 Output O t t Branch

CORE OP AMP Output Branch

Vo2

Simple Si l approach h Core Op Amp can be a two-stage, folded cascode or other Needs higher power supply Sacrifices output voltage swing. swing

EXAMPLE OF LOCAL CM FEEDBACK WITHOUT REFERENCE TWO-STAGE AMPLIFIER VDD

+

M10

Vcm M3

VBP
-

M11

M4

M7

M6

Vo1

CZ

RZ M1 M2

RZ CZ

2 Vo

v i+

v i

M9

VBN
-

M5

M8

p Output Branch
Reference. CMOS Analog Circuit Design, P. E. Allen and D. R. Holberg 2nd Edition , Oxford

p Output Branch

CM signal detectors : two conventional cases

Performance Observations
High DC offset due to source followers Oth buff s can be used t Other buffers n b us d to reduce the DC offset Mismatching between the passive resistors is the dominant error in 2

VS = 1vo ,cm + 2vo ,dm + 3v

CM Detector 2
VoR1 IB1 R2 Vo+

R I B + + R 1 2R 4I B 4 2 = + 4R 8 I B 2 2R + I B
1 8 I B VT + I B 2I B 2I B

1 = 1
o , dm

VS

IB2

2 I B 2R + I B 1 1 1 3 = 2 I B 8 I B 2R + 2 I B

CM Detector 3
VoVo+

1 = 1
2 = VT + 4 4 IB
1 8 IB

VS

High DC offset Highly non-linear CM signal detector

3 =

J.F. Duque-Carrillo, Control of the Common-Mode Component in CMOS Continuous-Time Fully Differential Signal Processing, Analog Integrated and Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993

Amplifier performance with CM control by current steering.

STRUCTURE
* ADC

ACM GBWCM = ADM GBWDM

THD 1V p p @ 100KHz

M1A M2A VoM4A

Vbias1

M1B
Vo+

VDD

To gates of M1AM1B Vref

Vbias2 M2B Vbias3 M3B Vbias4 M4B

VSS

+ Vo CM detector Vo 2

mean=8.2 dB =11.1 dB WC=21 dB

1.1

0.05 %

Vi+

MA M4C

MB

Vi-

M3A

Vbias5

To gates of M1AM1B Vref

+ Vo CM detector Vo 3

mean=20 dB 9.5 =9.5 dB WC=33.7 dB

1.2 .

0.22 %

A folded amplifier as an example of a FD amplifier l f lf

To gates of M1AM1B Vref

Vo

Vo Vbias

mean=22.1 dB =9.6 dB WC=36.2 dB

1.3

0.06 %

To gates of M1AM1B

+ Vo

Vref

Vo Vbias

To gates of M1AM1B + Vo

Vref

Vo Vbias

mean=9.4 dB =8.5 dB WC=23 dB

1.2

0.015 %

Low-distortion CM steering loop.

Example of a compensated Op Amp and a CM sense circuit

Vi1 Vi2
+ - +

Vo1 1 Vcm Vo2 Vcm 2 VCMC VB1

+ +

VCMC
VDD M5 VB1 M7 M25 ICMS VCM

M10 Vo2

Vi1 C M9

M1

M2 VB2

Vi2 C

Vo1 M21

M22

M23

M24

M3

M4

M6

M26

VB3

M27

VB3

-VSS op amp CM sense

What is a common mode feed forward common-mode feed-forward correction circuit ?

A common mode feed-forward circuit is a circuit sensing the input voltage. Then this input common-mode current is p pp added at each of the two output terminals (or applied to an internal node of the amplifier) with the purpose to cancel the output common-mode current component. Next we consider two examples, one with a BiCMOS OTA implementation and another one with a fully balanced fully symmetric CMOS OTA. We will discuss the advantages and limitations of this feed-forward versus the common-mode feedback.

+ Vin Vin

gmd

+ IC,d

I C,d

Cancellation of the output common mode current signal + I0 I0

IC
gmc
(a)

gmd = gmc Note that the output of gmc has two identical current copies

I C = g mc Vcm

+ Vin = Vcm + Vin / 2 I0 VC Vin = Vcm Vin / 2 + I C , d = g md Vcm + Vin / 2 + I C , d = g md Vcm Vin / 2 Vin + + I 0 = I C , d I C = g md Vin / 2 I 0 = I C , d I C = g md Vin / 2

+ I0

Vbias

( (

) )

M1

W L

M2 W L

Vin

M1

W 2L

M2

(b) Pseudodifferential BiCMOS transconductor with feed-forward common-mode cancellation. (a) Conceptual idea (b) BiCMOS implementation cancellation idea. implementation.
[*] F. Rezzi, A. Baschiroto, and R. Castello, A 3V 12-55 MHz BiCMOS Pseudo Differential Continuous-Time Filter, IEEE Trans. Circuits Systems I, vol. 42, pp 896-903, November 1995.

Let us explore how a common-mode feedforward can be sensed and then applied. Consider a fully differential OTA with two current-mirrors
aIo+ aIo-

Vcm

Io Vo+ Vin+ Vin-

Io Vo-

Icm level sensing circuit

Ibias

Itaill

Ibias

CM correcting Sense Amp signal

Iref

Correcting signal can be voltage or current. Note that Io+, and Io- are equal to gmDRIVER (Vin+- Vin-) and gmDRIVER( Vin- -Vin+) , respectively. That is, we are sensing the input voltage. We are not sensing the output voltage. voltage voltage aIo+ and aIo- are copies of Io+ and Io-, respectively. In practice the value of aIo is a = 1 or a = 1/2.

FD OTA

FD OTA with common-mode feedforward (current-mode)

M3 io VoVinVcm MX MY Vb Vb MY Vin+ M4 io M2 M2 M3 io + Vo+ M4 io +

Vcm MX

current addition transformed into a Vcm

Since Vreference = 0, Vcorrection = Vcm and can be applied to MY and MY. MY

Analog and Mixed-Signal Center (AMSC)

FD OTA CMFF (current-mode)

M4

M3

M2

M2

M3

M4

ioVoVinM1 M1 Vin+

io+ Vo+

MY

MX

MX

MY

OTA FD CMFF Implementation (Self-Bias)

Analog and Mixed-Signal Center (AMSC)

Common feedback of more than one amplifier and their interconnections Observe that only one CMFB circuit is needed per output. If the Amp 1 is connected with a CMFB, any other amplifier connected to this amplifier does not need the extra CMFB. p Furthermore, in some architectures the CM detector is a feedforward and forms part of the amplifier. An example of this type has been discussed before i.e., the Fully Balanced 4 current-mirror OTA
p p Complete Amplifier 1 Complete Amplifier 2 p p

Vin1+ Vin1-

CommonMode Feedforward Detector

Vo+, previous = Vin+ Vo-, previous = Vin-

CommonMode Feedforward Detector

Vo+ Vo-

Vcm

g m5

Vin

g m1 g m2

V1

g m3

I1 1 2 g m4
Vx=Vcm

+
g m6

Io1

+ Ving m1 g m2

V2

g m3

I2
g m5

g m6

Io2

Block Bl k Diagram Representation

VDD M3 I1
I1 + I 2 2

Vref
Vo+

M7 Io1
I1 I 2 2

M5

V1 I1 vin+

M2 I1 M1

M2 I2 M1

V2

M3 I2 I2

M5
I 2 I1 2

M7

Vref
Vo -

vin

Io2 M4 M6
I1 + I 2 2

VCMFB

M8

M6

M4

Vx

M8

VCMFB
(from next stage)

NEXT OTA IS DETECTING THE COMMON MODE FROM THIS OTA AND FEEDING BACK TO THIS OTA

Common-Mode Rejection Ratio (CMRR):

a) CMFF b) CMFB c) CMFB & CMFF

Transient Response

Total Harmonic Distortion ( g (Single-ended) )

Total Harmonic Distortion ( (Double-ended) )

COMMON-MODE FEEDBACK AMPLIFIERS:

Characterization and Simulation
Merged Amplifiers

Ideal Response

Vi Vi

+ + -

H1
' H1

v s = 1vo , cm

VREF VS

Vo+
Vo

1 1 = 2

Taking into account mismatches on the ' Amplifiers H1 and H1yields:

2 v s = 1vo , cm + 2 vo , dm + 3 vo , dm

H2
+ CM Detector +

Fully Differential Amplifier With Common-Mode Feedback

Analog and Mixed-Signal Center TAMU (ESS)

Let assume the linearized ideal case 1 0, 3 = 0 and 2 0. Note here that the notation is changed to 1 = ACS , 2 = ADS
Vi,dm ADC Vi,cm ACD ACC ADD ASD vs Vo,dm

.
ASC

ADS ACS Vo,cm

Using MASONs Rule

LGCM = ASC ACS

LG DM = ASD ADS

LGCM = ACS ASD LG DM = ADS AS

D = 1 LGCM LG DM

ADD (1 LGCM ) + ADC LGCM ADD D A (1 LG DM ) + ACD LG DM ACC ,effective = CC D ADS ADC , effective ADD ACS ADD , effective =

ACD , effective ACD ff i

To investigate the non-linear effects, assume 1 0, 3 0 and 2 = 0. The following expressions can be approximated.

Thus

vo ,dm = ADD g m vi ,dm ADD f vo ,dm + ASD vs vo ,cm = ADC g mv i ,dm ADC f vo ,dm + ASC vs where vs ACS vo ,cm + 3vo ,dm ; 1 = ACS
It can be shown that:

vi , dm

gm

FD with CMFB f

vo, dm
vo ,cm

vi , dm = vi cos t
1 3 ASD ACL HD2 Vi 2 LGCM LG DM ,ex ACL = gm f ;

2 2 2 1 3 ASD ACL HD3 2 2 2 LGCM LG DM ,ex

LG DM ,ex = f ADD
Analog and Mixed-Signal Center TAMU (ESS)

COMMON-MODE FEEDBACK LOOP

+ Vin

Vin

+ Fully Differential p Amplifier H1

+ Vo

Vo

+ CommonMode Detector +

vocm

vCM,control = vCMC

H2

(vOCM VCM )
Negative Feedback, H1H 2 H 3 < 1
H CM

+ H3 VREF = VCM
In Common - Mode In Differential - Mode

H1CM H1CM ( s ) VOC = = = ' ' VinC 1 + H1H 2 H 3 1 + H1 ( s ) H 2 ( s ) H 3 ( s )

H DM = H1 ' Stability determined by open loop H1H x H 3 H3 is the CM-sense (or comparator) Amplifier. Goal to force vOCM = VREF

' H1 is defined as the gain between input vCMC and the output Vo+ Vo i.e. two examples

VDD

Vbias
+ vin vin

Vo+ Vo

VFIX determines the current for vCMC = 0.

VSS A Simple Fully-Differential Op Amp VDD Vbi 1 bias

vCMC

VFIX

Vbias2 Vo+ Vbias3 vi+

Inherent CM detector

vOCM

vi

Vbias2 Vo
Vbias3

vOCM VGS ?

vCMCV

VSS A Simplified Folded-Cascode Fully Differential Op Amp

STABILITY REMARKS
The poles of the common-mode feedback are given by the open loop gain ' H1 ( s ) H 2 ( s ) H 3 ( s ) The bandwidth of the common-mode gain and the differential-mode gain. common mode differential mode gain For differential inputs in an ideal amplifier
vind 2 vind 2 Vo+
Vo

+ + - -

CM Detector + -

Differential-Mode. How to simulate this D-M?

Vref

Common-Mode
H CM = H1CM
' 1 + H1H 2 H 3

H1

vicm

+ + - -

H i Vo cm

CM Detector + -

H2

i.e. H 2 =

1 2

H3

Vref f

How to check stability of this loop?

+ -

+ -

+ Vocm

. V
ocm

CM Detector

+ -

v i , cm

+ -

Vref

Analog and Mixed-Signal Center TAMU (ESS)

LV CMFB FOR OTAS

VB1 IB IB IB IB

VDD VB2

Typical OTA connection in i l i i fully differential OTA-C based circuits. The common-mode voltage is b i d f i obtained from the input of h i f the following stage. Poor PSRR

Vin+

Vin- + VC

IB

IB

VREF

IB

IB VSS

VDD

IB

IB

IB

IB

Vo VinMC IB IB IB

IB

Vin+

GND R1 M1 IB R1 M1 IB VSS

Pseudo-differential OTAs including the CMFB for the first one with good PSRR

Final Remarks
DC operating points for high impedances are difficult to fix Fully differential amplifiers with high output impedance nodes must use common-mode feedback circuits . common mode Common mode circuits can fix the DC operating points as well as eliminate th common m d output component. ll s limi t the mm mode tp t mp t Low voltage constraints impose optimal bias conditions at p p both the input and output ports of an amplifier. Common mode circuits for LV should be used both at the input and output