EE7V82:EnergyEfficientVLSIDesign Assignment#5,2April2010 DueDate:9April2010

(100Points)Inthisassignment,youwillsizethe16bitKoggeStoneaddercircuit.Theschematicofthe adderisgivenbelow.

Fig.1.16bitKoggeStoneadderschematic. 1. Readthetutorialofthesizingtoolandgetfamiliarwithit(postedonthecoursewebpage).Follow thestepsgivenbelow. 2. Most of the CAD tools, including MATLAB, are accessible in various labs with UNIX workstations in EC building including EC 4.304 (VLSI CAD Student Lab). RunMATLAB; Typethefollowingcommands; addpath'/net/core/export/home/ee/001/m/mxa086100/MATLAB/sizing_v1.4/ggplab' addpath'/net/core/export/home/ee/001/m/mxa086100/MATLAB/sizing_v1.4/lib' addpath'/net/core/export/home/ee/001/m/mxa086100/MATLAB/sizing_v1.4/netlist' addpath'/net/core/export/home/ee/001/m/mxa086100/MATLAB/sizing_v1.4/bin' 3. Generatenetlistofa16bitKoggeStoneadder.Checkthenetlistfile(sks2_w_n16_netl.sp)inthe workingdirectory. sks2_w_spice(16)%generatespicenetlistofa16bitKoggeStoneadder 4. ReadthenetlistintoMATLAB. globaltauwminmin_invbitpitchwire_cap%globalparameters. adder_net_list = read_spice('sks2_w_n16_netl.sp' , ptm_45nm_bulk_lib) % read spice netlistintoMATLABandbindwith45nmCMOStechnology.

5. Extract the switching activity of the circuit using sim_rnd_swa(net_list, number of vector to be applied).Use16384vectors. swa=sim_rnd_swa(adder_net_list,16384)%Extracttheswitchingactivityrates. 6. Setoutputloadto100minimuminverter. cout=100*min_inv; 7. Find the minimum delay when the all gates are minimum sized and the input capacitance is 100*min_inv(LogicalEffortSolution). adder_le_c=ed_le_vx(adder_net_list,cout,[100]*min_inv);%Logicaleffortsizingwhen Cinis100*min_inv. dmax=max(delay(adder_net_list,cout));%Allminimumsizedgates. dmin=max(delay(adder_net_list,cout,adder_le_c));%Cin=100*min_inv. 8. Select21differentdelaypointsbetweenminimumandmaximumfoundaboveandsizethecircuit forminimumenergyfortheselectedpoints.Usetheenergyminimizationscripted_me_v85. delay_target=dmax:(dmindmax)/20:dmin;%21differentdelaytargets adder_me_c = ed_me_v85(adder_net_list,cout,delay_target); % Size for minimum energy 9. Forthesizingsolutionsattheselected 21pointsfindthe delayandenergyvaluesusingthedelay and energy scripts. The delay script returns the cumulative delay at the output of each gate from inputs. To find the delay of the circuit we need to find the maximum value in the returned delay vector. The energy script returns the energy consumed in each gate. To find the total energy we needtosumthereturnedenergyvector. fori=1:1:21 adder_me_d(i) = max(delay(adder_net_list,cout, adder_me_c(i,:))); % Calculate delay values.Delayvaluesarereportedintermsoftauofthetechnology. adder_me_e(i) = sum(energy(adder_net_list,cout, adder_me_c(i,:),swa)); % Calculate energyvalues.EnergyvaluesarereportedintermsoffJ. end%endofforloop 10. Plottheenergyanddelayspaceoftheaddercircuit(energyversusdelay).Alsoplotthedelayversus EDandED2.FindthedelaypointsatwhichEDandED2areminimized. ed0=adder_me_e; ed1=adder_me_e.*adder_me_d; ed2=adder_me_e.*adder_me_d.*adder_me_d; figure1=figure; axes1=axes('Parent',figure1,'LineWidth',1,'FontSize',20); box('on');grid('on');hold('all'); plot(adder_me_d, ed0/max(ed0), 'DisplayName', 'ED0', 'Parent',axes1, 'LineWidth',2,'Color',[100]); plot(adder_me_d, ed1/max(ed1), 'DisplayName', 'ED1', 'Parent',axes1, 'LineWidth',2,'Color',[010]); plot(adder_me_d, ed2/max(ed2), 'DisplayName', 'ED2', 'Parent',axes1, 'LineWidth',2,'Color',[001]);