Dig Tech

PREFACE
The INTELSAT Digital Satellite Communications Technology

Handbook has been prepared by the INTELSAT Application
Support and Training department. The handbook is provided
free of charge to INTELSAT signatories and users under the
INTELSAT Assistance and Development Program (IADP) and
INTELSAT Signatory Training Program (ISTP).
INTELSAT will update the handbook from time to time. Please

address your questions or suggestions concerning the
handbook to:
Manager
Application Support and Training (IADP/ISTP)
Mail Stop 20B
INTELSAT
3400 International Drive, NW
Washington, DC 20008-3098, USA
Telephone: +1 202 944 7070

Facsimile: +1 202 944 8214
Telex: (WUT) 89-2707
International Telex: (WUI) 64290
First printed on: December 1989

Revision 1: April 1992
Digital Satellite Communications Technology Handbook Contents
Contents
Chapter 1 - Overview
1.1 INTELSAT Overview .................................................................................................... 7

1.2 Digital Revolution ......................................................................................................... 8
1.3 Why Digital Instead of Analog? .................................................................................... 8
Chapter 2 - Digital Basics
2.1 Pulse Code Modulation (PCM)..................................................................................... 9

2.2 Delta Modulation ........................................................................................................ 14
2.3 ADPCM ...................................................................................................................... 17
2.4 Advances in Speech Coding ...................................................................................... 25
2.5 Speech Coding at 16 Kb/s Using LD-CELP Technique.............................................. 25
2.6 Digital Multiplexing Basics.......................................................................................... 28
2.7 Time Division Multiplexing.......................................................................................... 29
2.8 Digital Hierarchies ...................................................................................................... 32
2.9 Digital Multiplexing/ Multiple Access........................................................................... 35
2.10 PCM Signaling Systems............................................................................................. 42
2.11 Alarms in Digital Environment .................................................................................... 44
2.12 Redundancy Switching............................................................................................... 50
2.13 Higher Order Digital Multiplexing................................................................................ 51
2.14 Multiple-Access Techniques....................................................................................... 60
Chapter 3 - Modem Basics
3.1 Modulation.................................................................................................................. 63
3.2 Network Line Codes................................................................................................... 68
3.3 User Interfaces........................................................................................................... 74
3.4 Echo Control .............................................................................................................. 81
3.5 Synchronization.......................................................................................................... 83
3.6 Digital Impairments..................................................................................................... 92
3.7 Errors ....................................................................................................................... 106
3.8 Error Detection and Correction................................................................................. 112
Last Updated: 12 March 1999 Page 3 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Verify document currency before use. Pub. Rel. No.: 1
Digital Satellite Communications Technology Handbook Contents
Chapter 4 - Applications
4.1 Network Architecture: Principles and Applications................................................... 129

4.2 Data Network Compatibility and ISO ........................................................................ 133
4.3 Intermediate Data Rates (IDR) Carriers ................................................................... 136
4.4 IDR Implementation ................................................................................................. 148
4.5 Engineering Service Circuits (ESC) for IDR Carriers................................................ 160
4.6 Alarm Concepts in IDR............................................................................................. 166
4.7 Digital ESC............................................................................................................... 167
4.8 TDMA and SSTDMA................................................................................................ 168
4.9 INTELSAT Business Service (IBS) .......................................................................... 168
4.10 INTELNET................................................................................................................ 170
4.11 Circuit Multiplication Equipment ............................................................................... 172
4.12 Packet Circuit Multiplication Equipment (PCME)...................................................... 191
4.13 INTELSAT DAMA ................................................................................................... 198
4.14 Very Small Aperture Terminal (VSAT) Networks...................................................... 208
4.15 VSAT IBS................................................................................................................. 208
4.16 Trellis-Coded Modulation Intermediate Data Rate (TCM IDR) Carriers.................... 210
Appendix A - Echo Control
1.0 Introduction .............................................................................................................. 215

2.0 Echo Problems in Satellite Communications............................................................ 215
3.0 Echo Control ............................................................................................................ 216
4.0 Echo Suppressor...................................................................................................... 216
5.0 Principle of Echo Cancellers .................................................................................... 219
6.0 Summary.................................................................................................................. 224
Glossary

Digital Satellite Communications
Technology Handbook
Revision 3

Digital Satellite Communications Technology Handbook Chapter 1 - Overview
&+$37(5
$129(59,(:

,17(/6$7 INTELSAT is an acronym for International Telecommunications
2YHUYLHZ Satellite Organization. INTELSAT is an organization that belongs to
more than 142 countries, and owns and operates the most extensive
global communications satellite system. Many customers around the
world use INTELSAT’s communications satellite system for high-
quality, reliable, and cost-effective international telecommunications
services. Many countries also use INTELSAT satellites for domestic
public communications. INTELSAT is the major provider of international
voice and data communications traffic whose global satellite system
carries much of the international television transmissions.
Since INTELSAT first began operations in 1965, communications

satellites have virtually revolutionized society. Today, instantaneous
"live" television coverage of headline events is commonplace, the
televising of special events continues to claim increasingly larger
audiences, and efficient, low-cost telecommunications services are
now at one's fingertips. All of this happened much faster than anyone
could have envisioned at the time when the United Nations first put out
its call for the peaceful exploration of outer space.
In accordance with its charter, INTELSAT provides international public

telecommunications services of high quality and reliability to all
countries of the world on a nondiscriminatory basis, and at the lowest
possible cost. Over 40 countries provide domestic services using
INTELSAT space segment capacity. International television services,
including full-period leases, continue to grow rapidly, as do INTELSAT
Business Services (IBS) that provide fully integrated digital voice, data,
and videoconferencing capabilities.
The successful implementation and growth of the INTELSAT system

has, in large measure, been the result of an efficient organizational
structure, a solid financial basis, and close continuing cooperation
among the organization and its users. The INTELSAT charter has

Digital Satellite Communications Technology Handbook Chapter 1 - Overview
enabled countries with different political systems and economic

capabilities to collaborate in an efficient commercial organization.
INTELSAT has grown from a consortium consisting of a small number
of countries to a global organization, whose members include a majority
of the States in the International Telecommunication Union (ITU).
The achievements of INTELSAT during its relatively short history

demonstrate the enormously useful results that can be gained by
cooperative efforts between the nations of the world. INTELSAT has
provided international digital communications since the days of its
earliest satellites, and is now in the throes of a new revolution in
telecommunications -- the “digital revolution”.
To encourage digitalization, INTELSAT has introduced new digital

services and tariffs to provide an economic incentive for administrations
to convert from analog to digital operation. This handbook was created
to help support this initiative by providing an introduction to digital
satellite communications technology.
When INTELSAT was first formed, all satellite telephone traffic was
'LJLWDO carried over the system using analog modulation . In the early 1960s,
5HYROXWLRQ an alternative to analog modulation became a reality, and soon found
its place among the range of services offered by INTELSAT. The
alternative technique, known as Pulse Code Modulation (PCM), was
digital technology, offering many advantages over the earlier analog
transmissions.
Now, more and more traffic carried by INTELSAT uses digital

techniques as countries convert their national communications systems
to digital systems. This handbook provides the knowledge necessary
to operate and maintain digital services carried through an INTELSAT
Earth station.
Advantages of digital over analog systems are, by now, too well known
:K\'LJLWDO to be repeated here. Digital systems have superior quality of reception
,QVWHDGRI and regeneration capabilities, and offer highly cost-effective solutions in
$QDORJ" addition to better network management capabilities.

Digital Satellite Communications Technology Handbook Chapter 2 – Digital Basics
&+$37(5
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The object of any transmission system is to produce at the output, an

3XOVH&RGH exact replica of any input signal. In an AM or FM system, a carrier is
continuously varied by the signal, i.e., in an analog manner. This
0RGXODWLRQ
continuous transmission of information about the original signal is not
3&0 necessary; it is sufficient to send "samples" at certain intervals to
represent it fully. This is similar, in concept, to a movie, where the
samples are individual photographs, which give the impression of
continuous motion when displayed at the correct rate. If this "sampling"
is carried out at a rate of at least twice the highest frequency in the
signal, it is possible to recover all the information at the receiving end
by suitable processing. For example, it is sufficient to sample an
ordinary telephone speech channel at 8000 times per second to
reconstruct the signal fully.
PCM is the representation of a signal by a series of digital pulses;

sampling, quantizing, and encoding. Such a system offers significant
technical and economic advantages over an analog system. A.H.
Reeves, an Englishman, invented PCM in 1937, but it was not until the
advent of the transistor technology that the complicated circuitry
became a practical proposition.
3ULQFLSOHVRI Sampling of an analog waveform results in a train of Pulse Amplitude

3&0 Modulation (PAM) signals. Each sample is encoded into a binary
number that represents the amplitude of the sample. It undergoes
further processing, and is transmitted. These digital signals can be
"regenerated" and retransmitted free from accumulated noise at any
point in the transmission path. It is in this regeneration process that
PCM has an advantage over an analog system.

In an analog system, the amplification of the signal at repeaters also

results in the amplification of noise and crosstalk "picked-up", thus the
signal-to-noise ratio deteriorates progressively. In the case of PCM, the
final output signal should be completely free from induced noise,
irrespective of the complexity of the system, as the regenerators and
receiving equipment only detect whether a pulse is present or not.
At the receiver the digits are decoded and reformed into an analog
signal.
Figure 2.1 shows the basic process. For reasons of clarity, only one
regenerator is shown.
TRANSMIT TERMINAL
ENCODE
Analog R
input
Noise
REMOTE REGENERATOR
REGEN
Noise
x10
DECISION
LEVELS
REGEN DECODER Reformed analog

output, free from
RECEIVE TERMINAL
line noise
Figure 2.1 Simplified Digital Transmission System

PCM is the classical and PCM is the classical and most widely used
form of digital transmission. It converts the quantized samples into
code groups of binary pulses using fixed amplitudes. It allows only
certain discrete values of sample size, rather than transmitting the
exact amplitude of the sampled signal. When the signal is sampled in a
PAM system, a discrete value closest to the true one is transmitted. At
the receiving end, the signal level will have a value slightly different
from any one of the specified discrete steps due to noise and
distortions encountered in the transmission channel. If the disturbance
is negligible, it will be possible to tell accurately which discrete value
was transmitted, and the original signal can be almost accurately
reconstructed.
Representing the original signal by discrete values which leads to a

limited number of signal values is called “quantizing”. This process
introduces an error in the magnitude of the samples, called quantization
noise. However, once the information is in a quantized state, it can be
relayed over a reasonable distance without further loss in quality through
regeneration of the binary levels.
Systems using codes to represent discrete signal values (samples) are

called PCM systems. In general, a group of on-off pulses can be used to
represent 2n discrete sample values. For example, 8` pulse positions
would yield 256 sample values.
For a linear codec with “n” binary digits per sample, the ratio of the signal
power to quantizing-distortion power (S/D) is given by the equation:
S/D = 6n + 1.8 dB
This relationship shows that each added binary digit increases the S/D
ratio by 6 dB.
4XDQWL]DWLRQ In practice, it is almost impossible to transmit information about the exact

amplitude of the analog signals at various levels, as it will require
enormous bandwidth and power. Thus, when the analog signal is
sampled in a PAM system, the level nearest to the true amplitude is
transmitted. At the receiving end, the signal is reformed to this level. This
process of representing the signal by allowing only certain discrete
amplitudes is called quantizing. It introduces an initial error in the
amplitude of the samples, giving rise to quantization noise, or quantization
distortion.

Provided that line impairments do not prevent a correct decision regarding

the presence or otherwise of a pulse, the regeneration process can
eliminate line noise. Therefore, only quantization noise will be present in
the reformed signal at the receiving end. In quantized signal transmission
systems, design considerations decide the maximum noise whereas in
analog systems the transmission path determines it.
(Note: If the analog/digital transformation is made more than once, the

quantization noise is cumulative.)
/LQHDU
4XDQWL]DWLRQ Figure 2.2 illustrates linear quantization coding and decoding processes.
Let the actual amplitude of the signal be +1.7V. This is assigned decision
level 2, the same for any voltage between 1V and 2V, and is transmitted
to the line as code 101. At the receiving end, the sample with code 101 is
converted to a pulse of +1.5V, the middle value of the decision level at the
encoder. This results in an error of 0.4V between the input and the output
signals. This type of error will occur in every sample except when the
sample size exactly coincides with the mid-point of a decision level.
Encoder characteristics
Decoder characteristics
+4 +4 111 111
3 3 110
input code
quantizing
(decision) 2 2 101
levels
1 +1 100
-1 000
o/p
1 input volts volts
2 001
2 3 010
3 -4 011 011
-4
samples output
original signal
signal
quantizing
input
error
signal
Figure 2.2 Linear Quantization using 8 Levels and 3-Bit Code

Quantization error will be less if there are smaller steps. However,

because increasing the number of steps complicates the subsequent
coding operation and increases the bandwidth requirements, it is
desirable not to use more steps than necessary.
Quantization noise depends on step size and not on signal amplitude. If

linear quantization is used, the signal-to-quantizing noise ratio, or simply
signal-to-distortion ratio, will be large for high-level signals and small for
low-level signals. For this reason, it is preferable to use a nonlinear
quantizing characteristic to obtain uniform distortion ratio.
1RQOLQHDU
4XDQWL]DWLRQ
By tapering the step size, it is possible to divide small signals into many
steps while large signals have correspondingly fewer steps for a given
number of levels. This results in much better signal-to-distortion ratios for
the weak signals, but is slightly worse for the stronger signals. Because
the quantization process is now virtually compressing the signal, it has to
be connected to a device at the distant end that performs the reverse
process. This process of compressing and expanding is called
“companding”. Hence this nonlinear process is said to have a
companding characteristic.
Two separate coding systems are in use, A-Law and µ-Law. Figure 2.3
shows the A-Law companding characteristics for positive signal amplitude
adopted by the ITU-T for 30-channel PCM systems. As the negative part
is identical, it follows that the complete characteristics consist of 8 positive
and 8 negative segments. Each segment consists of 16 equal quantizing
steps giving a total of 256 steps (0 to +127 and 0 to -127), but as the
slope of adjacent segments (except 0 and 1) changes in the ratio 2:1, the
steps of segment 7, for instance, cover twice the range of signal
amplitude as those in segment 6. It is possible to relate input levels
(measured in dBmO) to the highest quantizing level. The highest signal
level allowed is about +3dBmO, corresponding to a highest quantizing
level (or "peak code") of ±128. Lower signal levels correspond to lower
peak codes.
A-Law characteristic is most commonly used throughout the world. A

different curve, known as the µ-Law characteristic, is used mainly in the
U.S.A. and Canada. The shapes of the two curves are very similar
except that they are coded differently.

$OLDVLQJ Earlier, a reference was made about the relationship between the highest
input frequency and the sampling rate. If this relationship is not
maintained, the frequency of the output signal will be incorrect. This error,
or distortion, is called “aliasing”. To prevent it from occurring, a low pass
filter, cutting off at 4 kHz, is fitted at the analog input to every PCM
multiplexer. The filter is known as the anti-aliasing filter.
(128)
(Level 128 is a virtual decision level and
cannot be signalled in practice)
112 16 steps each of range
64 amplitude units
96 16 steps each of range

32 amplitude units
80 16 steps each of range 16 amplitude units 1xx xxxxx
- +
0x x xx x x x input
64 16 steps each of range 8 amplitude units
Quantizing level
48 16 steps each of range 4 amplitude units

Complete
characteristic
16 steps each of range 2 amplitude units
32
Any signals above this
ampitude will be sent
16 steps each of range 1 amplitude unit
16 as level 127
16 steps each of range 1 amplitude unit
input signal level
Figure 2.3 ITU-T A-Law Encoding Characteristics: Positive Values

'HOWD
0RGXODWLRQ Delta modulation is an alternative method to encode an analog signal
into a digital bit-stream. There are several alternatives to conventional
PCM. Most of these result in bit rates lower than 64 Kb/s that
conventional PCM requires for each voice channel, and are commonly
known as Low Rate Encoders (LREs). One such example is delta
modulation. Figure 2.4 shows the principal components used in the
encoding process, and Figure 2.5 shows the process.
The audio signal is band limited by a low pass filter and is applied to a
comparator. Here, it is compared with the output of an integrator whose
voltage level is dictated by the preceding bit pattern that was transmitted
to the line.

&RPSDUDWRU The comparator output has two states:

a. Positive output, if the audio signal is at a higher level than the
integrator.
b. Negative output, if the audio signal is at a lower level than the
integrator.
Then the comparator output is fed into a sampling gate before being fed
to a squaring circuit.
6DPSOHUDQG The sampler (shown as a switch) opens and closes at the output bit rate,
6TXDUHU typically 32 Kb/s. The bits transmitted to line depend on the state of the
squaring circuit:
positive = 1
negative = 0
Simultaneously, the output bit pattern is fed into the integrator.
,QWHJUDWRU In its simplest form, the integrator can be a capacitor charged via a
resistor, where a "1" charges the capacitor in a positive direction. The
charge on the capacitor is fed to the comparator. As the audio input level
continues to rise, it will be at a higher level than the integrator and another
"1" will be transmitted to the line. This positive voltage charges the
capacitor, which is again compared with the audio input.
While the audio input rises rapidly, it will keep ahead of the charging
capacitor in the integrator and a string of "1"s will be transmitted at 32
Kb/s. (Refer to Figure 2.5.) When the audio input falls to a level which is
below that of the integrator, a "0" is transmitted which, in turn, charges the
capacitor in the opposite direction, i.e., the positive charge is reduced.
From Figure 2.5, it can be seen that the integrator voltage approximately
follows the input waveform, the shape of the integrator variations being
controlled by the transmitted bit pattern.
5HFHLYH The incoming bit pattern at 32 Kb/s is applied to an integrator identical to

7HUPLQDO that shown in the feedback path at the transmit end. The integrator’s
output voltage will vary in a manner dictated by the bit pattern. This
analog output is applied to a low pass filter that removes residual high
frequency components.
/LPLWDWLRQV The integrator voltage variations are, at best, only an approximate

representation of the input waveform. The integrator will be unable to
follow a rapidly rising input, due to the finite time required to charge the
capacitor. This gives rise to a distortion, called “Slope Overload”.

Similarly, the output bit pattern oscillates between "1" and "0" during flat
portions of the input waveform; hence, the charge on the integrator varies
giving rise to quantizing error.
SAMPLER
SQUARER
INTEGRATOR
TRANSMIT SECTION
INTEGRATOR
RECEIVE SECTION
Figure 2.4 Principles of Delta Modulation

Analog
input
Sampling
periods
Digital Line
Code 1 1 1 1 0 0 0 0 1 1
Signal building
auto receive
integrator
Smoothed
Analog
Output
Figure 2.5 Process of Delta Modulation
Delta modulation is one of the groups of codes known as Differential

$'3&0 Codes, where the difference between two signals is transmitted instead of
a series of coded signal samples. One of the most commonly used
differential codes is Adaptive Differential Pulse Code Modulation
(ADPCM).

ADPCM is a code recognized by INTELSAT and the ITU-T as a method

of at least doubling the number of analog users on most digital links, and
is commonly used by Digital Circuit Multiplication Equipment (DCME) to
increase the circuit usage even more.
$GDSWLYH
3&0$3&0 In ordinary PCM, S/D performance can be made more satisfactory over a
wide range of signal powers and the quantizer step size is made roughly
proportional to the signal amplitude. Adaptive PCM (APCM) systems, in
contrast, use a linear quantizer in which the step size is adjusted in time
to match the short-term statistics of the signal. The coder is effectively
operated at its instantaneous peak S/D point.
One practical use of APCM is Nearly Instantaneous Companding (NIC),

which is compatible with 15-segment, µ-255 and 13-segment, A-law
PCM.
3ULQFLSOHRI
$'3&0 The principle of ADPCM, shown in Figure 2.6, is to take conventionally
produced 8-bit words that represent coded samples of analog signals,
and compare each with an estimate of what that 8-bit word will be. The
difference between these two signals, the real and the estimate, is
transmitted. Provided that the estimate is good enough, there will be no
difference between the two 8-bit words. Consequently, less than 8 bits are
needed to represent the signal.
TRAFFIC INPUT RESULTING

(8-BIT WORDS) DIGITAL OUTPUT
COMPARATOR
ESTIMATE
(8-BIT WORDS)
Figure 2.6 ADPCM Principle

$Q,OOXVWUDWLRQ
RIWKH3ULQFLSOH If the actual incoming traffic sample to have ADPCM applied is:
RI$'3&0 10110101 (= quantizing level +53)
and that the estimate of what that word might be is:
10101110 (= quantizing level +46)
The resulting difference between these two words will be:
10110101 = quantizing level +53

-10101110 = quantizing level +46
00000111 = 7
:KHUH'RHVWKH Because the estimate was quite close, the difference between the two 8-
(VWLPDWH&RPH bit words is so small that the leading four zeros can be dropped, and the
)URP" 4-bit word:
0111
is transmitted in place of the original 8 bits.
The performance of this system will be degraded if the estimate is not

close to the actual signal. The estimate comes from a circuit module
known as an estimator, which examines the result of the previous 8-bit
comparison, and is then able to make a judgement of what the next 8-bit
word is likely to be. The circuit uses a series of complicated rules, known
as an algorithm, to make this judgement. The rules have been
standardized by the ITU-T to enable different manufacturers to make
compatible equipment.
:LWK$'3&0 This is true for one type of ADPCM, and providing that a similar decoder
(DFKELW is present at the receiving end of the circuit, a surprisingly good quality
:RUG%HFRPHV telephone circuit can be obtained. A diagram showing the basic
DELW:RUG components of an ADPCM encoder is shown in Figure 2.7, where the
estimator circuit is a little more complex than described above.

64 DIFFERENCE
kbit/s NON-UNIFORM SIGNAL
INPUT TO UNIFORM + ADAPTIVE
LEVEL 32 KBIT/S
PCM OUTPUT
QUANTIZER
CONVERTER -
SIGNAL
ESTIMATE INVERSE
ADAPTIVE
QUANTIZER
QUANTIZED
DIFFRENCE
SIGNAL
RECONSTRUCTED
ADAPTIVE SIGNAL
PREDICTOR
+
+
Figure 2.7 ADPCM Encoder: Basic Components
ADPCM provides such a good quality on each voice circuit that it was
developed further to take account of the possibility of using circuits for
"Voice Frequency Data" (VF data), which is more difficult to predict.
Before ADPCM is applied, a circuit is examined to see the nature of the

traffic. If a voice circuit occupies the circuit, then the ADPCM process is
altered to code each 8-bit word into a 3-bit word, and if a VF data circuit
occupies any circuit, then each 8-bit word is made into a 5-bit word. This
process, which could be continuously changing, still produces a tolerable
voice quality circuit, while allowing up to 9.6 Kb/s data. Further details of
the coding algorithm can be found in ITU-T Recommendation G.723.
,78
There are four different ITU-T recommendations for ADPCM algorithms.
5HFRPPHQ ITU-T G.721 was the first ADPCM recommendation to use 4 bits per
GDWLRQVRQ sample. The process reduced the digital rate from 64 Kb/s to a fixed rate
$'3&0 of 32 Kb/s. This algorithm had two drawbacks: voice band data rates
higher than 4.8 Kb/s could not be transmitted and low speed voice band
data rates (< 1.2 Kb/s with FSK modulation) were affected by high BER.
ITU-T G.723 introduced the variable bit rate concept to cope with the
voice band data limitation. The bit rate can be 3/4/5 bits per sample; 3 or
4 bits for speech (24 and 32 Kb/s respectively), and 4 or 5 bits (32 and 40
Kb/s) for voice band data up to 9.6 Kb/s. Moreover 3 bits per sample can
also be used for overload channels carrying voice in DCME.

ITU-T G.726, the last enhancement to ITU-T G.723, recommends the use
of 2 and 3 bits per sample (16 and 24 Kb/s) for overload channels
carrying voice in DCME. The overload channels are created by a ’bit
robbing’ method.
ITU-T G.727, known as ’Embedded ADPCM,’ is an extension of ITU-T

G.726 and is recommended for use in packetized speech systems
(PCME). In this algorithm, the overload channels are created by ’bit
dropping’.
Both recommendations (G.726 and G.727) for ADPCM show essentially

the same performance for voice and voice band data rates from 16 to 40
Kb/s.
:KDWDUHWKH
GLIIHUHQFHV The differences between ADPCM and Embedded ADPCM are the way
the predictor operates and how the quantized signal is encoded. Review
EHWZHHQ* the steps to convert a PCM signal into an ADPCM.
DQG*"
*3URFHVV
The 64 Kb/s PCM (refer to Figure 2.8) is first converted from A-law or µ-
law to uniform PCM signal (S). A difference signal (D) is obtained by
subtracting the input signal (S) from the estimated signal (E).
The difference signal (D) is quantized in the adaptive quantizer where the
signal is scaled and converted to a base 2 logarithmic representation. An
adaptive 31-, 15-, 7-, or 4-level quantizer is used to assign 5, 4, 3 or 2 bits
respectively to the value of the difference signal for transmission to the
decoder.
The inverse quantizer produces a quantized difference signal (D1), which

is a reconstruction of the difference signal, from the 5, 4, 3, or 2 bits. This
signal is added to the estimated signal (E) and a reconstructed version of
the input signal (S1) is obtained. Both signals (S1 and D1) are fed to the
adaptive predictor, where a new signal estimate will be generated for the
next PCM sample. A process summary is shown in Table 2.1.

Table 2.1 Description of ADPCM Prediction Process
« Remember the last PCM input sample.

« Predict what the next PCM sample will be.
« Compare the actual PCM sample with prediction.
« Determine the difference signal (actual minus
prediction).
« Quantize the difference signal.
« Encode the quantized difference signal.
1
In G.726, the adaptive predictor relies on the whole ADPCM codeword --

its adaptation, as well as the adaptation of the inverse quantizer, depends
on all the output bits (2, 3, 4, or 5). (See Figure 2.8.)
Remember that a 31-, 15-, 7-, or 4-level nonuniform adaptive quantizer is

used for operation at 40, 32, 24, and 16 Kb/s, respectively. Each rate has
its own separate quantizer table and the decision levels are not aligned.
When the ADPCM codeword representing the PCM sample is obtained,
the value is transmitted and also used to obtain the next prediction.
The decoder includes a structure identical to the feedback portion of the

encoder, together with a uniform PCM to A-law or µ-law conversion and a
synchronous coding adjustment.
The synchronous coding adjustment prevents cumulative distortion

occurring on synchronous tandem coding (ADPCM-PCM-ADPCM, etc.,
digital connections), and is achieved by adjusting the PCM output codes
in a manner which attempts to eliminate the quantizing distortion in the
next ADPCM encoding stage.

INPUT DIFFERENCE
64 kbit/s CONVERT TO SIGNAL SIGNAL
+ ADAPTIVE
PCM UNIFORM
PCM S
+ D
QUANTIZER
- ADPCM
OUTPUT
SIGNAL
ESTIMATE
E
RECONSRUCTED
+
ADAPTIVE
SIGNAL
S1
+ INVERSE
ADAPTIVE
PREDICTOR +
D1 QUANTIZER
ENCODER QUANTIZED
DIFFERENCE
SIGNAL
QUANTIZED RECONSRUCTED
DIFFERENCE SIGNAL
SIGNAL
ADPCM INVERSE CONVERT SYNCHRONOUS
INPUT ADAPTIVE
QUANTIZER
+ TO
PCM
CODING
ADJUSMENT
64 kbit/s
PCM
SIGNAL
ESTIMATE
ADAPTIVE
PREDICTOR
DECODER
Figure 2.8 Simplified Block Diagram of G.726 ADPCM Encoder /Decoder
*
3UHGLFWLRQ In G.727, a 32-, 16-, 8-, or 4-level nonuniform adaptive quantizer is used
3URFHVV to quantize the difference signal for 40, 32, 24, or 16 Kb/s rates
respectively. (See Figure 2.9.)
Various quantizer tables are embedded within each other so that the
decision levels are forcibly aligned to ensure that the decision levels for
16, 24, and 32 Kb/s quantizers are subsets of those for the 40 Kb/s
quantizer. This contrasts with the algorithm for G.726 where the decision
levels are not aligned.
The output codeword is structured as core bits and enhancement bits.

(See Figure 2.10.) Core bits are used for prediction both in the encoder
and decoder, while enhancement bits are used to reduce the quantization
noise in the reconstructed signal. Thus, the core bits must reach the
decoder to avoid mistracking, but the enhancement bits can be discarded.

INPUT DIFFERENCE
64 kbit/s SIGNAL SIGNAL
CONVERT TO + ADAPTIVE ADPCM
PCM UNIFORM
PCM
+ QUANTIZER
OUTPUT
-
SIGNAL
ESTIMATE BIT
MASKING
+
ADAPTIVE
RECONSRUCTED
SIGNAL + INVERSE
PREDICTOR + ADAPTIVE
QUANTIZER
ENCODER QUANTIZED
DIFFERENCE
SIGNAL
RECONSRUCTED
SIGNAL
DECODER
FEED-
FORWARD CONVERT SYNCHRONOUS
INVERSE
ADAPTIVE
+ TO
PCM
CODING
ADJUSMENT
QUANTIZER
64 kbit/s
SIGNAL
ESTIMATE
PCM
FEED-BACK
BIT INVERSE ADAPTIVE
MASKING ADAPTIVE + PREDICTOR
QUANTIZER
ADPCM QUANTIZED
INPUT DIFFERENCE
SIGNAL
Figure 2.9 Simplified Block Diagram of G.727 ADPCM Encoder/Decoder
As there are four embedded ADPCM rates, the embedded ADPCM

algorithms are referred to by (x, y) pairs, where x refers to the core plus
enhancement bits and y to the core bits. For example, if y is set to 2 bits,
(5, 2) will represent the 40 Kb/s embedded ADPCM algorithm, (4,2) the
32 Kb/s, (3,2) the 24 Kb/s and (2,2) the 16 Kb/s. Not all the bits
necessarily arrive at the decoder (because some can be dropped), but for
a given sample, the core bits must be received.
Bit masking is another difference with G.726. Through this process the
enhancement bits are discarded by logically right-shifting the ADPCM
codeword. The remaining bits are the core bits.

MSB LSB
CORE ENHANCEMENT
BITS BITS
Figure 2.10 Core and Enhancement Bits

$GYDQFHVLQ Several speech coding techniques are available that will enable speech
coding at low bit rates. The advantage of low bit rate speech coding is
6SHHFK&RGLQJ obvious. It will require less bandwidth, and hence a service provider
can multiplex an additional number of voice channels in a given
bandwidth.
High bit rate coders, such as 64 Kb/s PCM and 32 Kb/s ADPCM
provide very good quality speech. Nowadays, several coding
techniques, such as Linear Predictive Coding (LPC), Adaptive
Predictive Coding (APC), Adaptive Transform Coding (ATC), and Code-
Excited Linear Prediction (CELP) are available that can provide good
speech quality at 16 Kb/s. However, these coding techniques produce a
large coding delay, typically up to 60 ms. This delay is undesirable in
many applications. Current ITU-TU standards require very low delay.
An important requirement is that one-way encoder/decoder delay
should not exceed 5 ms, with the objective being less than 2 ms.

6SHHFK&RGLQJ
DW.EV
This section describes speech coding at 16 Kb/s using Low Delay-Code
8VLQJ Excited Linear Prediction (LD-CELP) that ITU-T Recommendation
/'&(/3 G.728 recommends. The LD-CELP uses a backward adaptation of
7HFKQLTXH predictors and gain to achieve an algorithmic delay of 0.635 ms.

/'&(/3 Figure 2.11 shows a simplified block diagram of an LD-CELP encoder.

(QFRGHU The input signal from the PCM encoder, either A-law or 1-law, is
converted into uniform PCM signal. The uniform PCM signal is
partitioned into blocks of five consecutive input signal samples. For
each input block, the encoder passes each of 1024 codebook vectors
through a gain scaling unit and a synthesis filter. The 1024 codebook
vectors are stored in an excitation codebook. Each of these vectors is
quantized into signal vectors and is compared with the input signal
vector. The encoder identifies the one vector out of 1024 codebook
vectors (codevectors) that produces least mean-squared error with
respect to the input signal vector. The index of each of the 1024
codevectors is 10 bits long. The 10-bit codebook index of the best
codevector that gives rise to that best candidate quantized signal
vector, is transmitted to the decoder. The best codevector is then
passed through the gain scaling unit and the synthesis filter to establish
the correct filter memory in preparation for the encoding of the next
signal vector. The synthesis filter coefficients and the gain are updated
periodically in a backward adaptive manner on the previously quantized
signal and gain-scaled excitation. This backward adaptation of
predictors enables achieving low delay.
64 Kb/s
A-law or
1 -law PCM input Convert to
Vector
uniform
buffer
PCM
Excitation Perceptual VQ index

Synthesis Minimum
Gain
VQ weighting
filter MSE
codebook filter 16 Kb/s output
Backward Backward
gain predictor
adaptation adaptaion
Figure 2.11 Simplified Block Diagram of LD-CELP Encoder

(Reference: ITU-T Recommendation G.728)

VQ
index Excitation
VQ Convert to
Gain
codebook Synthesis filter Postfilter
16 Kb/s PCM
input
64 Kb/s
1 -
A-law or
law
PCM output
Backward
Backward gain
predictor
adaptation
adaptaion
Figure 2.12 Simplified Block Diagram of LD-CELP Decoder

(Reference: ITU-T Recommendation G.728)
/'&(/3 Figure 2.12 shows a simplified block diagram of an LD-CELP decoder.

'HFRGHU Just like the encoder, the decoding operation is also performed on a
block-by-block basis. When the decoder receives a 10-bit index, it looks
up to a table to extract the corresponding codevector from the
excitation codebook. The extracted codevector is passed through a
gain scaling unit and a synthesis filter to produce the current decoded
signal vector. The synthesis filter coefficients and the gain are then
updated in the same way as in the encoder. The decoded signal vector
is then passed through an adaptive postfilter to enhance the perceptual
quality. The postfilter coefficients are updated periodically using the
information available at the decoder. The five samples of the postfilter
signal vector are next converted to five A-law or 1-law PCM output
samples.
The 16 Kb/s LD-CELP speech coding technique produces a near-toll

quality signal. It requires less bandwidth and power, and is suitable in
resource-constrained satellite communications, particularly in VSAT-
type applications.


'LJLWDO
After learning about how analog signals are converted into digital streams
0XOWLSOH[LQJ through filtering, sampling, quantizing, and coding,and alternative coding
%DVLFV techniques, such as delta modulation that produce lower bit rates, this
section studies the principles of multiplexing.
3ULQFLSOHRI The primary multiplexer, sometimes called the first order multiplexer, is
0XOWLSOH[LQJ the first stage in the multiplexing process. The multiplexer combines
either 24 or 30 voice channels into a digital stream, and does roughly the
same job as the Channel Translating Equipment (CTE) in FDM
technology.
The primary multiplexer was the first to be developed, and 24 channels

were initially multiplexed together in both the European and North
American Systems (NASs). Europe, however, went on to develop the 30-
channel system that is different from the NAS version.
'LJLWDO/LQH
Primary multiplexers were first used to upgrade the capacity of existing
6\VWHPV line plant, particularly multi-pair cables. Two pairs of wires that were
earlier capable of carrying only one two-way conversation were now able
to carry 24 or 30 conversations. Thus these links were used to provide
trunk connections between exchanges.
Many systems around the world still operate this way, except that
nowadays it is usual to find specially manufactured cable, “Transverse
Screened Cable". In several locations, this forms the backhaul route from
Earth station to the International Telephone Exchange.
3ULPDU\
Most primary order multiplexers are either fitted in the International
0XOWLSOH[LQJLQ Transmission Maintenance Center (ITMC) or combined with the
WKH(DUWK international exchange, or "switch". There will probably be one or two
6WDWLRQ primary multiplexers for service channels to the ITMC or Main Office.
(QYLURQPHQW
The 2 Mb/s, or 1.5 Mb/s signal consists of all the channels from that
multiplexer into one digital stream. In most cases, the 2 Mb/s signals are
received from the ITMC, and fed into the IDR channel modems at the
Earth station.


7LPH'LYLVLRQ
In Time Division Multiplexing, many channels can share the same
0XOWLSOH[LQJ medium by "taking turns", each being connected to the line very briefly,
then replaced by the next. This is repeated again and again so swiftly
that there is no loss of data from any channel.
At the receive end of the link, a matching demultiplexer carries out the
reverse action. It receives a digital stream and feeds it out, 8 bits at a
time, first to one channel then to another, like dealing playing cards to
each player in a game of cards. It is apparent that to work properly, the
distant demultiplexer must be "locked" to the transmit multiplexer.
6\QFKURQL]DWLRQ The receive demultiplexer, must "know" the sequence to "deal out" the 8
bit words it receives. This is done by inserting a synchronizing "word" into
the traffic at the transmitting multiplexer that can be recognized at the
distant end, and is used as a reference by the demultiplexer.
Several extra words are added to the traffic. This extra information is often
referred to as "overhead", because it is carried along with the traffic, and
has nothing to do with the traffic information.
The 2 Mb/s rate is actually 2.048 Mb/s and not 1.92 Mb/s because of
these overheads.
Traffic 30 x 64 Kb/s = 1.92 Mb/s

Overheads 0.128 Mb/s
Line Rate 2.048 Mb/s

2.048 Mbit
Input
Traffic
Decoders
Recovered
Timing
Receive Primary Multiplexer (part)
1 0 1 0 1 0 1 0
1 cycle = 2 bits
Figure 2.13 Clock Recovery
7LPLQJ It is not just sufficient for the receiver to recognize a particular starting
point in the digital sequences; the receiver actually has to work at the
same speed as the transmitter. The way in which this is usually achieved
is through clock recovery.
A multiplexer is operating at a particular rate. The ITU-T sets limits for

permitted deviation from the nominal. The demultiplexer monitors and
extracts the signal-timing rate from the incoming signal. Although it is not
common these days, a simple tuned circuit could be employed, as shown
in Figure 2.13. As long as signals are present on the line, there will be
energy at the output of the tuned circuit, which will be at the same
frequency as at the transmitting multiplexer. This recovered timing signal
can be used to operate the demultiplexer that will extract the signal at
exactly the same rate as that the transmitting multiplexer.

3OHVLRFKURQRXV
:RUNLQJ The multiplexer usually transmits signals at a rate controlled by a very
accurate oscillator located within the network. Figure 2.14 shows the
oscillators located at both ends of the network. Their frequencies are
nearly, but not exactly, the same, and thus, the rates will not be same at
both the ends. This type of system, where traffic in opposite directions is
nearly synchronized, is called a plesiochronous system [Greek : "Plesio" =
"nearly"].
This type of system is most commonly encountered in international

operations.
f1
PRIMARY
MUX
PRIMARY
MUX
f
2
f1 IS NOT EXACTLY EQUAL TO f2

Figure 2.14 Plesiochronous Operation
$Q,QWURGXFWLRQ There will be rate discrepancies if two ends of a network operate with
WR&ORFN6OLS even slightly different clock speeds. The network will experience a
problem because one of two situations is possible:
Situation 1: Incoming traffic is fast. In this situation, an odd incoming

traffic bit will be lost occasionally, resulting in errors being created and
passed out to end users.
Situation 2: Incoming traffic is slow. In this situation, an occasional

incoming traffic bit will be repeated, again causing an error to be sent to
our end user.

These two situations are shown diagrammatically in Figure 2.15.
There are ways to minimize the error rate. This will be the subject of a
later section (3.5) and involves the use of a buffer, which is often installed
at the Earth station.
1) Incoming Traffic Too Fast 2) Incoming Traffic Too Slow
bit 1
bit 1 bit 1
bit 2 bit 1
bit 2 bit 2
bit 2
bit 3
ERROR
bit 3 bit 3 bit 3 ERROR
bit 4
bit 5 bit 3
bit 5 bit 4
bit 4
bit 6
bit 6 bit 5
bit 5
bit 7
bit 7
Interface
Interface
Figure 2.15 Clock Slip

'LJLWDO In the same way that groups are combined into supergroups in analog
+LHUDUFKLHV systems to carry more traffic over a single carrier system, outputs from
the primary multiplexers are combined into higher bit rate blocks for
onward transmission in digital systems.
There are three different hierarchies, which are recognized by the ITU-T
in G.702.
(XURSHDQ Commonly called the CEPT hierarchy, the European hierarchy is built on
the basic building block of 2.048 Mb/s primary multiplexers, and is
+LHUDUFK\ illustrated in Figure 2.16.
The process that the ITU-T recommends is to combine four of these 2

Mb/s blocks into an 8 Mb/s data stream. This is achieved by taking one bit
from each 2 Mb/s input in turn and adding framing signals to produce an
output of 8.448 Mb/s. The name given to each input is tributary, “trib”. The
multiplexer described is a second order multiplexer.

Four 8 Mb/s blocks can be combined to produce a 34 Mb/s data stream

by a third order multiplexer, and so on. Other higher order multiplexers
are 140 Mb/s and up to 565 Mb/s.
1st Order 2nd Order 3rd Order 4th Order 5th Order
(Primary)
1
Audio
only G732
1
30
2.048 Mbit/s G742
1
1 1 1
4
Audio 34.368 Mbit/s 139.264 Mbit/s 564.992
&/or Mbit/s
64 Kbit/s G735 8.448 Mbit/s
G751 G751 G954
30
4 4 4
64 Kbit/s
only G736
31
Figure 2.16 CEPT Digital Hierarchy
1RUWK$PHULFDQ The NAS has, as its basic building block, a 1.544 Mb/s multiplexer,
6\VWHP1$6 illustrated in Figure 2.17. Four primary streams of 1.544 Mb/s are
combined to produce a 6 Mb/s stream by a second order multiplexer.
+LHUDUFK\ The next stage combines seven 6 Mb/s tributaries into a 45 Mb/s stream.
Note: Often, one single piece of equipment will do all of this, taking up to
28 1.544 Mb/s systems, and multiplexing them to produce 45 Mb/s.
Above 45 Mb/s, the current trend is to multiplex three 45 Mb/s streams to

produce one 140 Mb/s stream that is same as the CEPT hierarchy.
-DSDQHVH Japan uses a slightly different version of the NAS. The basic building
+LHUDUFK\ block, as before, is a 1.544 Mb/s stream, and is illustrated in Figure 2.18.
It starts with the NAS hierarchy, using µ-Law coders, but changes as the
hierarchy develops.

T1 T1 T3 T2
LINES LINES LINES LINES
1.544 6.312 44.736 274.176
Mbit/s Mbit/s Mbit/s Mbit/s
1
SPEECH DS - 1
& /or channel
56 Kbit/s 24 bank
1
G 733(2)
DS - 2 DS - 3 DS - 4
MUX MUX MUX
1 7
DS - 1 (G 743) (G 752)
SPEECH (Fe)
& /or channel
64 Kbit/s 24
bank
G 733(1)
Figure 2.17 NAS Digital Hierarchy
PRIMARY SECOND THIRD FOURTH

ORDER ORDER ORDER ORDER
MUX MUX MUX MUX
1.544 6.312 32.064 97.728

Mbit/s Mbit/s Mbit/s Mbit/s
lines lines lines lines
Figure 2.18 Japanese Digital Hierarchy
,QWHUQDWLRQDO
As one can easily notice, different hierarchies are incompatible, and the
:RUNLQJ ITU-T recommends that, whenever possible, international traffic should be
exchanged using the CEPT hierarchy because it is used in more
countries. Hence, some conversion may be necessary at Earth stations.
However, when both ends of an international link use the NAS hierarchy,
administrations can exchange the traffic in the NAS.


'LJLWDO This is the first of three sections that will discuss details of multiplexing
0XOWLSOH[LQJ and multiple access.
0XOWLSOH$FFHVV
3ULPDU\ A digital system combines 30 or 24 channels into a digital block. The

0XOWLSOH[LQJ equipment that carries out this function is called a Primary, or First Order,
Multiplexer.
&(37)UDPH The European (CEPT) system will be described first. The NAS will be
6WUXFWXUH introduced later. The primary stages of Japanese hierarchy are identical
to the NAS.
The CEPT Frame Structure and Timing are shown in Figure 2.19. The 8-
bit words are produced every 125msec, using the anti-aliasing filter,
sampler, quantizer, and encoder.
In the CEPT system, 30 channels are multiplexed together onto the same
line by transmitting an 8-bit word from each channel in turn - the
technique is known as Time Division Multiplexing (TDM). The 8-bit words
are produced from each channel at the rate of 8000 samples every
second. In a time period of 125msec between two words from channel 1,
an 8-bit word from each of the channels 2-30 will be transmitted. This
period of 125msec is called a frame.

samples
amplitude
time
125us
- magnitude
sign
1 0 1 0 0 0 1 1
Sampling and Encoding Processes
time
slot 0 1 15 1617
no.
Time slots for telephone Time slots for telephone
channels 1-15 channels 16-30
frame synch slot telephone

(FAW or FDW) sig slot
125us
Frame Structure and Timing
Figure 2.19 Frame Structure and Timing
)UDPH It is essential that the receiver operate in synchronization with the

$OLJQPHQW transmitter. To achieve this, an identification signal is transmitted at the
start of every frame. This is recognized at the receiver, bringing the
:RUG system into synchronization. The name given to this signal is the Frame
Alignment Word (FAW).
The FAW is a particular 8-bit word specified by the ITU-T in G.704

paragraph 5. It is:
X0011011
The bit marked “X” could be either 1 or 0. Although the bit marked “X” is
part of the FAW, it plays no part in the synchronization - it is reserved for
another purpose.

)UDPH'DWD To introduce alarm and telemetry systems into the frame structure, the
:RUG FAW is alternated with a data signal, known as the Frame Data Word
(FDW), or sometimes as the NOT Frame Alignment Word. Although this
is its main purpose, one bit is permanently set to a 1, to assist with initial
synchronization.
Each 8-bit word, whether FAW, FDW, or encoded audio, occupies a time
slot (TS). The first time slot in a frame is called time slot zero, or TS0, and
contains alternately the FAW or FDW. The encoded audio for channel 1
is in TS1 and for channel 2 is in TS2.
7HOHSKRQH It is essential to accommodate telephone signal transmission. Telephone

6LJQDOLQJ signaling is taken to mean on-hook/off-hook conditions and/or dial pulses
necessary to set up a call. There are several ways to do this, but they
often demand the use of one dedicated time slot per frame. The signaling
information is inserted in TS16.
&RPSOHWH
Figure 2.20 shows a complete frame structure that is made up of 32 time
)UDPH6WUXFWXUH slots, each containing an 8-bit word. There are therefore 32 x 8 = 256 bits
making up each frame.
The first time slot TS0 contains alternately the FAW or FDW. The next
time slot TS1 contains an 8-bit word from channel 1; TS2 contains an 8-
bit word from channel 2, and so on, until 15 8-bit words have been sent,
one from each of the first 15 channels. The next time slot, TS16, is
reserved for signaling purposes, and the remaining time slots, TS17-31,
contain 8-bit words from channels 16-30.
As the duration of each frame is 125msec, the bit rate can be calculated
to be 2.048 Mb/s.

sample periods
amplitude
time
1 0 1 0 0 0 1 1
time
slot 0 1
no.
Time slots for telephone Time slots for telephone
channels 1-15 channels 16-30
telephone
frame synch slot sig slot
(FAW or FDW)
125us
Frame Structure and Timing
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
2 ms
Figure 2.20 Multiframe Structure and Timing
1RUWK$PHULFDQ The NAS differs from the CEPT system in the makeup of the frame
6\VWHP1$6 structure. The process by which each 8-bit word is produced from each
sample 8000 times a second is identical, although the encoder used is
the T-Law.
1$6)UDPH Figure 2.21 shows a sequence of 12 frames in the NAS structure. Each
frame starts with one single alignment bit, followed by an 8-bit word from
6WUXFWXUH each channel in turn. As there are 24 channels in each frame, plus the
alignment bit, each frame contains 193 bits (24 x 8 + 1 = 193). The
duration of each frame is 125ms, so the bit rate is 1.544 Mb/s. The
alignment bits at the start of each frame build up into the frame alignment
word and multiframe alignment word as shown.
6LJQDOLQJ8VLQJ When channel -associated signaling systems (such as ITU-T R1) are
WKH1$6 used, a process known as bit stealing often carries signaling
requirements. In bit stealing, the least significant bit of each 8-bit word in
each 6th and 12th frame is used to carry the signaling for that channel
(i.e., bit 8 of channel 2 in frame 6 carries signaling information for channel
2).

$ODUP'DWD
8VLQJWKH1$6 Alarm information is transmitted by changing the status of the alignment
bit of the 12th frame or by setting one bit of each 8-bit word to a 1.
/LPLWDWLRQVRI There are various restrictions in using the frame structure just described.
WKH1$6 The most significant is the absence of any useful telemetry channel, and
absence of provision for extra bits reserved for development. An
alternative structure, called the "extended superframe" has been
introduced to deal with these limitations.
([WHQGHG The extended superframe has been developed from the standard NAS by
extending the frame structure to include 24 frames. Figure 2.21 shows a
6XSHUIUDPH full frame structure, and the use of the alignment bits is given below.
)UDPH In the irregular pattern 001011, the first bits of the frames indicated make
$OLJQPHQW%LWV up the frame alignment bits. The fact that the pattern is irregular avoids
the necessity of a multiframe alignment signal.
7HOHPHWU\ The 12 telemetry alignment bits, marked “D”, of the frames indicated
,QIRUPDWLRQ provide a data link for control purposes. Because 8 bits are available in
every 24 frames (3 msec), the usable data rate is 4 Kb/s.
(UURU&KHFNLQJ The six alignment bits marked “E”, associated with the frames indicated,
,QIRUPDWLRQ provide the capability to check the presence of errors. This system is
known as cyclic redundancy checking (CRC) and will be discussed later.

alignment bit
Frame chan 1 chan 2 chan 3 chan 22 chan 23 chan 24
1 1 1 81 1 81 81 8
2 0 1 81 1 81 81 8
3 0 1 81 1 81 81 8
4 0 1 81 1 81 81 8
5 1 1 81 1 81 81 8
6 1 1 7s 1 7s1 7s1 7 s1 7s
7 0 1 81 1 81 81 8
8 1 1 81 1 81 81 8
9 1 1 81 1 81 81 8
10 1 1 81 1 81 81 8
11 0 1 81 1 81 81 8
12 1 1 7s 1 7s1 7s1 7 s1 7s
193 bits: 125 us
frame align signal: 101010 (bit 1, frames 1,3,5,7,9,11)

m-f align signal 001110 (bit 1 frames 2,4,6,8,10,12)
signalling bit bit 8 of each on time slot frames 6.12
Figure 2.21 NAS Multiframe Structure

alignment bit
chan 1 chan 2 chan 3 chan 22 chan 23 chan 24

D 1 81 1 1 1 1 1 8
E 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
0 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
E 1 7s1 7s 1 s1 s1 s1 s1 7s
D 1 81 1 1 1 1 1 8
0 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
E 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
1 1 7s1 7s 1 s1 s1 s 1 s1 7s
D 1 81 1 1 1 1 1 8
E 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
0 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
E 1 7s1 7s 1 s1 s1 s1 s1 7s
D 1 81 1 1 1 1 1 8
1 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
E 1 81 1 1 1 1 1 8
D 1 81 1 1 1 1 1 8
1 1 7s1 7s 1 s1 s1 s1 s1 7s
D = Telemetry Data
E = Error Checking Bit
Figure 2.22 NAS "Extended Superframe" Format
7HUPLQRORJ\ A word about terminology:
Bell Telephone Laboratories Inc., which developed the NAS, called the
primary multiplexing equipment DS1. To transmit the 1.5 Mb/s signals,
they used lines called T1 lines. Over the years, the two terms have
become synonymous, and these days the multiplexer itself is often called
a T1 MUX. CEPT primary multiplexers are called E1 MUX.

&(37DQG1$6 Table 2.2 shows a list of the important differences between the CEPT and
NAS Primary Multiplexers.
Table 2.2 CEPT and NAS - Differences
Characteristics NAS PRIMARY MUX CEPT PRIMARY MUX
Bit Speed 1.544 Mb/s 2.048 Mb/s
Traffic capacity 24 Channels 30 Channels
Frame synchronization Distributed in alignment bits Bunched in TS0
Multiframe synchronization Distributed in alignment bits TS16 of frame 0
Alarms Either Alignment bit frame 12 or one Bit Carried in frame data word
of each > ’1’
Signaling Bit stealing Data word
Digital channel data rate 56 Kb/s, although 64 Kb/s available with 64 Kb/s
B8ZS*
Coding law µ-Law A-Law
* Note: This will be covered in Section 3.2.

3&06LJQDOLQJ A number of signaling systems are in use worldwide, and they fall into two
6\VWHPV main groups:
- Common Channel Signaling (CCS)
- Channel Associated Signaling (CAS)
Figure 2.23 tabulates these two groups, and gives a breakdown of the
various types.
&KDQQHO CAS systems are systems where the signaling for each channel is either
$VVRFLDWHG sent on that channel, or in a specially dedicated signaling link.
6LJQDOLQJ&$6
An analog example of CAS is VF, either “in band” using a single
frequency (SF) tone, or “out of band” using a frequency of 3825 Hz that
falls outside the normal audio channel frequency band.
In digital transmission, CAS uses TS16 to transmit the signaling

information for two specific channels in every frame. It would also
describe the system used in the NAS, where signaling for channel 1 is
carried as the least significant bit of that channel in every sixth frame.

&RPPRQ In CCS, the signaling information relating to a number of circuits is

&KDQQHO concentrated into one transmission path dedicated exclusively to
signaling.
6LJQDOLQJ&&6
There may, for example, be several primary digital blocks operating

between two locations. On one of these blocks, one of the channels
might be given over to a 64 Kb/s data link between the exchanges. This
data link would carry the signaling for all the circuits.
ITU-T systems 6 and 7 are both examples of CCS.
Signaling over PCM Systems
Channel Associated Common Channel
Fixed length Variable length

message message
Inband VF DC
Signaling
International National
In Slot Out Slot CCITT No.7 DPNSS*
DASS* 2
CCITT No.6 ** CCITT No.6
Bell D1 (T1) CEPT 30
chan system * UK Systems
** North America (AT&T)
Figure 2.23 Signaling over PCM Systems
$GYDQWDJHVRI Advantages of CCS are:

&&6
• Greater signaling speed
• Enhanced system flexibility
• Higher reliability

,QWHUSUHWDWLRQ
RI1HWZRUN Problems can arise because the signaling link might fail, leaving the
telephone trunks unusable. For this reason, wherever possible, the
7HVWV:KHQ signaling link is duplicated over another route.
&&6LVLQ8VH
Another problem source is that the 64 Kb/s data channel is sometimes
carried in TS16, in which this case, it is important to differentiate between
the use of TS16 as a carrier of CAS or of CCS. If this is not clear, then a
good indication of which type is in use can be obtained from examining
TS16 of frame 0 to see whether a multiframe structure exists. If such a
structure exists, then it is likely that CAS is in use.
$/DZT/DZ
&RQYHUVLRQ The direct conversion from A-Law to T-Law is straightforward. The
shapes of the two curves are almost identical; so, the ITU-T has prepared
two "look up" tables (ITU-T Recommendation G.711) to convert
quantizing levels of one law to the other.

$ODUPVLQ Alarms in the analog (FDM-FM) environment have been based mainly on
'LJLWDO pilot monitoring systems. A pilot is always associated with each group and
(QYLURQPHQW supergroup, and it becomes an integral part of that group until it is
$QDORJ6\VWHP disassembled. It is possible to recognize whether that group is being
received or not by monitoring the pilot.
$ODUPV
3UREOHPVZLWK Some problems with pilot monitoring systems exist which make it unclear
3LORW where exactly the failure is, particularly if one is monitoring a pilot that has
0RQLWRULQJ transited through another country.
$ODUP ITU-T has recommended an alarm system for the digital environment that
2EMHFWLYHV will help identify the exact location of faults. This will ensure that:
• the right people are sent to

• the right place with
• the right equipment with
• the right information at
• the right time to perform
• ITU-T Recommendation M20
'LJLWDO$ODUP
3KLORVRSK\ ITU-T has established two alarm categories, called “PROMPT” and
$ODUP “DEFERRED”.
&DWHJRULHV

PROMPT: action required by service personnel attending to that

equipment.
DEFERRED: this is an advisory alarm, indicating that all the traffic

passing that point has been degraded in some way, but the fault does not
fall into the area of maintenance responsibility for personnel attending to
that equipment.
It is sometimes said that "PROMPT" and "DEFERRED" are the equivalent

to the "URGENT" and "NON-URGENT" alarms. This tends to be an
oversimplification and should not be used because it can be misleading.
3ULQFLSOHRI
There will be one prompt alarm for one fault that affects traffic, located at
2SHUDWLRQ a point which will enable service personnel to logically identify the faulty
equipment or section without any ambiguity. This normally means that a
prompt alarm is displayed close to the actual source of the fault.
+LJK2UGHU To understand the operation of alarms in practice, consider the situations

$ODUPV that can cause prompt alarms on a higher order multiplexer, and then
examine some examples.
3URPSW$ODUPV In general, faults that will cause a prompt alarm are:
• Loss of input at higher orders (e.g., loss of 34 Mb/s incoming for an

8/34 multiplexer).
• Loss of tributary input (e.g., loss of at least one 8 Mb/s input of an
8/34 multiplexer).
• Loss of frame alignment (e.g., loss of the frame alignment word
received in the 34 Mb/s incoming signal of the 8/34 equipment).
• Loss of power (e.g., a component failure within the equipment itself).
Note: Other faults may be added. These are the minimum requirements
suggested by the ITU-T. Refer to Table 2.3 for an example of alarms at a
third order multiplexer.

Table 2.3 Fault Conditions and Consequent Action

(ITU-T Table 2/G.753) Third Order (8/34 Mb/s) Multiplexing
Consequent actions
AIS applied
Prompt Alarm
Equipment Fault conditions maintenance indication to
part To the To the relevant
alarm the remote To all time slots of
indication multiplexer tributaries composite the composite
generated generated signal
signal
Multiplexer Failure of Yes, if Yes, if Yes, if

and YES
demultiplexer power supply practicable practicable practicable
Multiplexer Loss of
incoming signal YES YES
only on a tributary
Loss of incoming
signal at 34 Mb/s YES YES YES
Demultiplexer Loss of frame

only alignment YES YES YES
AIS recived from the

remote multiplexer
Note:– A “Yes” in the table signifies that appropriate action

should be taken as a consequence of the relevant fault condition.
An open space in the table signifies that the action should not be
taken as a consequence of the relevant fault condition, if this
condition is the only one present. If more than one fault condition
is present simultaneously, appropriate actions should be taken if a
“Yes” is defined in relation to this action for at least one of the
conditions.
Examples:
Consider the section of a digital network illustrated in Figure 2.24.
A B C D
8 34 8 2
2 8 34 8
Figure 2.24 Part of a Digital Network

Case 1: Multiplexer C not receiving signal from B
Consider the case of a break in the 34 Mb/s line between B and C such
that C does not receive any signal from B, but the opposite direction is
operating satisfactorily.
The most logical position for a prompt alarm to show is on multiplexer C,

as that equipment is receiving no high order signal.
Case 2: Multiplexer A not receiving signal from B
Consider next the case of a break in the 8 Mb/s connection between B

and A. The prompt alarm would show on multiplexer A, as A has no 8
Mb/s input.
'LVWDQW$ODUPV When equipment experiences a problem that leads to a prompt alarm,

ITU-T recommends that the equipment should automatically advise its
counterpart of that fact. In the two cases above, C should automatically
inform B of a problem in case 1, and A should automatically inform B of a
problem in case 2. This is not done on FDM systems.
The way in which any multiplexer can inform its counterpart of a problem
is by using a bit in the frame structure specially reserved for this purpose,
called the alarm bit.
In case 1, where C does not receive any signal from B, the equipment at
C will automatically alter the state of the alarm bit in its transmitted frame
structure at 34 Mb/s from a 0 to a 1. Multiplexer B constantly scans the
34 Mb/s incoming signals, and if the alarm bit is seen to be a 1, it realizes
that multiplexer C has a problem. In this way, we have achieved the
objective of automatically informing our counterpart of a problem.
$ODUP
The second consequential action is called the Alarm Indication Signal
,QGLFDWLRQ (AIS) that is automatically inserted to take the place of a traffic stream,
6LJQDO which is lost, or degraded. This signal is unique because it is a series of
"1"s, without any frame structure whatsoever, although a different unique
signal is used at 45 Mb/s.

Any multiplexer receiving this series of 1s will recognize the pattern. It will
not only realize that there is a fault somewhere between the signal source
and the multiplexer input port, but will also be assured that the link directly
incoming is operating satisfactorily - the very fact that something is
received means that something is transmitting the signal.
Referring to the examples and Figure 2.24 again, if the 34/8 multiplexer at
C does not receive any signal from B (case 1), then multiplexer C will
automatically feed the AIS to each of its four tributaries. Multiplexer D will
recognize this and indicate a “Receipt of AIS” condition on its alarm
display unit. Multiplexer D, in turn, will feed the AIS to each of its 2 Mb/s
tributaries, where a similar indication will be displayed. Figure 2.25 shows
the complete set of alarms activated in this case.
Case 2 is straightforward. A receives nothing from B, so all the 2 Mb/s

tributaries going out from A are replaced by the AIS.
PROMPT
DEFERRED
ALARM
ALARM
A B BREAK C D
AIS
8 34 8 2
2 8 34 8
ALARM BIT IN
34 Mbit/s
FRAME
DEFERRED
ALARM DEFERRED
ALARM
ALARM BIT IN
8 Mbit/s FRAME
Figure 2.25 Alarms Present as a Result of a Fault
'HIHUUHG Faults, which will cause a deferred alarm on a high order multiplexer, are
$ODUPV in general:
• Receipt of AIS at higher order (e.g., the 34 Mb/s incoming signal has
been replaced by the AIS); and,
• Receipt of a distant alarm from far end (e.g., the distant 8/34
multiplexer is experiencing a problem at its end).

Note: Others may be added. These are the minimum requirements

suggested by ITU-T.
3ULPDU\0X[ ITU-T alarms around a primary order multiplexer are different because
$ODUPV their operation includes aspects of analog-to-digital conversion. If, for
example, a primary order multiplexer receives a large number of errors in
the incoming digital signal, these must be suppressed, otherwise they will
be decoded (digital to analog), and fed into the customer’s telephone
earpiece as a burst of noise. Table 2.4 from ITU-T Recommendation
G.732, shows the alarms and consequential actions of a 2 Mb/s primary
order multiplexer, and a comparison with Table 2.3 will make the
differences clear.
3URPSW$ODUP Faults, which will cause a prompt alarm, are:

&RQGLWLRQV
• Failure of power supplies (e.g., a component failure within the
equipment itself).
• Loss of frame alignment (e.g., the frame alignment word, FAW, from
the distant end is not being received).
• High Error Rate in the incoming signal (e.g., the number of errors
received at 2 Mb/s is worse than 1 in 103).
• Failure of (A-Law) coder/decoder - Codec Failure (e.g., the
coder/decoder is tested on a regular basis automatically. If any
discrepancy is noticed, an alarm is raised).
• Loss of 64 Kb/s input (e.g., no signals coming from a 64 Kb/s
customer).

Table 2.4 Fault Conditions and Consequent Actions (ITU-T Table

2/G752) for a 2.048 Mb/s Primary Multiplexer
Consequent actions
AIS applied to
Prompt Alarm AIS applied
Transmission time slot 18 of
Service alarm maintenance indication to to
Equipment Fault indication alarm the remote
suppressed at
64 Kbit/s
the 2048
part conditions generated indication end
the analog
output (time
Kbit/s
outputs composite
generated transmitted slot 16)
signal
Failure of power yes YES YES YES YES

Multiplexer yes
supply (if practicable) (if practicable) (if practicable) (if practicable)
and
Demultiplexer
Failure of codec yes yes yes yes
Multiplexer Loss of incoming

signal at 64 Kbit/s yes yes yes
only
input time slot 16
Loss of incoming
signal at 2048 yes yes yes yes yes
Kbit/s
Loss of frame
alignment yes yes yes yes yes
Demultiplexer
only -3
Error ratio 10 yes yes yes yes yes
on the frame
alingment signal
Alarm indication
received from the
yes
remote end (bit 3
of time slot 0)
'HIHUUHG$ODUP Faults, that will cause a deferred alarm, are:

&RQGLWLRQV
• Receipt of AIS (i.e., 2 Mb/s incoming signal has been replaced by the
AIS.
NOTE: The Prompt Alarm, loss of FAW, will also be received.)
• Receipt of Distant Alarm from far end (i.e., the distant primary
multiplexer is experiencing a problem at its end).
• Receipt of Distant Multiframe Alarm (i.e., the distant end is having
trouble receiving multiframe alignment word (MFAW)).

5HGXQGDQF\ Present-day equipment offers many varieties of redundancy switching
6ZLWFKLQJ capabilities that permit very reliable remote control of digital
communications facilities. Reliable remote control and monitoring is
usually based on a central monitor facility that monitors remote equipment
units, circuit cards, and equipment configurations.

Such monitoring may include, but is not limited to:
• Antennas and path switching

• Up-converters and path switching
• Down-converters and path switching
• Modems and path switching
Entire networks are now frequently monitored and controlled very

efficiently in this manner. When faults or out-of-parameter conditions are
detected, backup equipment is automatically switched into service and
the control facility notified.
The desired ratio of online to backup equipment is for the user to decide.
The reliability of modern digital equipment now permits one backup unit
for several online units. New digital communications equipment
purchasers are well advised to research the latest market developments
based upon system requirements. If a user has an extensive network,
introduction of new network control and monitor facilities may also warrant
consideration.

+LJKHU2UGHU Earlier sections described the detailed operation of a primary order
'LJLWDO multiplexer, and the need to synchronize the multiplexer with the network.
This section studies details of higher order multiplexing equipment.
0XOWLSOH[LQJ
+LJKHU2UGHU In the FDM-FM environment, higher order multiplexing refers to

0XOWLSOH[LQJ combining several basic groups into a supergroup, or several
supergroups into a hypergroup. The reason for doing this is to reduce the
number of required transmission carriers (e.g., satellite carriers), and
hence, economize on the transmission equipment.
In the digital environment, this is achieved by concentrating several low-

bit rate systems into a higher rate system by a process of time division
multiplexing. The objective is the same as before, i.e., reduction of carrier
systems, and hence costs.

/RFDWLRQDQG Higher order multiplexers are used to combine received traffic from
$SSOLFDWLRQRI several destinations with any local traffic onto a common backhaul. This
+LJKHU2UGHU can be seen in Figure 2.26 where two 2 Mb/s IDR channels from different
destinations are combined with a single 2 Mb/s system for local traffic
0XOWLSOH[HUV (Earth station phones, fax, etc.) onto an 8 Mb/s radio backhaul. Some
large Earth stations will require higher order multiplexing towards the
satellite.
IDR
Modems
International 1
8 2
Exchange 2
RAD RAD
2 8
Digital
Radio
Backhaul
Local P Local
1 P 1
Traffic Traffic
Main Office Site Earth Station Site
Figure 2.26 Digital System Block Diagram
7UDIILF The lower order traffic inputs are called tributaries. One bit at a time is
+DQGOLQJ taken from each tributary input and transmitted into the line at a higher
bit rate. This process is known as bit interleaving, and is shown in
Figure 2.27.
This process is adopted in each hierarchy, and at each level in the

hierarchy.

2.048 Mbit/s 8.448 Mbit/s 2.048 Mbit/s
F.A.W. F.A. Det.
1 1 1 1
2 2 2 2
1 2 3 4
3 3 3 3
4 4 4 4
MULTIPLEXER DEMULTIPLEXER
Figure 2.27 Principle of Higher Order Multiplexing
(TXLSPHQW The receiving equipment requires synchronization with the transmitting

6\QFKURQL]DWLRQ equipment. This is achieved by inserting a frame alignment signal into
the higher order traffic which, when detected at the receiver, enables
alignment. This principle is also shown in Figure 2.27.
3OHVLRFKURQRXV Although the principle is the same in each hierarchy, the details differ. In
2SHUDWLRQ the CEPT hierarchy, for example, the frame alignment word is transmitted
as a block of 10 bits at the start of each 8 Mb/s frame. In the NAS and
Japanese hierarchies, the frame alignment word is scattered through the
frame structure.
-XVWLILFDWLRQRU Figure 2.26 shows an Earth station that combines traffic originating from
%LW6WXIILQJ three sources: two via satellite, probably from different countries, and one
locally derived. Because each of these traffic streams originates from a
different place, they will all be operating at slightly different rates. ITU-T
Recommendation G.703 states that the output of a primary multiplexer
may vary by ± 50 parts per million, i.e., about ± 100 Hz at 2 Mb/s. To
combine all four tributaries, each operating at a different rate, a process
known as justification, or bit stuffing is adopted. These inputs are called
plesiochronous inputs, because they are operating near the nominal rate.
%LW6WXIILQJ$Q To ensure that any tributary operating within a certain degree of the
([DPSOH nominal tributary rate can be carried over a higher order system, the rate
of each tributary is increased by the multiplex equipment to a common
speed which is higher than that normally envisaged. This is achieved by
occasionally adding an extra bit into each traffic stream.

The process is generally referred to as bit stuffing. Bits will be added to

each tributary running at a different rate, to increase their rate to a
common rate. One bit is reserved for each tributary in each frame for
possible bit stuffing to do this.
Consider a second order multiplexer in the CEPT hierarchy, combining

four tributaries at 2.048 Mb/s into one data stream of 8.442 Mb/s.
5HFRYHU\RI If the rate of each tributary is to be raised to 2.052 Mb/s, then for any
7UDIILF tributary running at exactly 2.048 Mb/s, 4000 bits will have to be added
every second (2052000 - 2048000 = 4000). For any tributary running at
2.0481 Mb/s, 3900 bits will have to be added every second, and for any
running at 2.0479 Mb/s, 4100 bits must be added each second.
From these examples, it is clear that a range of tributary rates that vary
from nominal rates can be carried over a higher rate system.
5HWLPLQJ Because a number of extra bits are added to each tributary, some method
5HFHLYHG of removing them at the receiver has to be adopted. A control signal is
7UDIILF added by the transmit multiplexer to each frame to indicate whether or not
stuffing has taken place. This control signal is called the justification
control word, or stuffing indicator, and is transmitted three times each
frame to ensure correct interpretation of the stuffing indicator, in case of
errors.
It has been mentioned earlier that the output traffic should be the same as
the input traffic. This applies to the bit rate as well as to the actual traffic
content. Figure 2.28 shows how this is achieved. The amount of bit
stuffing varies according to the speed of the traffic entering the transmit
multiplexer, is monitored at the receiver, and produces a control voltage
that serves to finely adjust the frequency of a VCO operating normally at
the nominal output rate.
To use the example quoted earlier, if 4000 extra bits are added each
second to any one tributary, the control voltage would be that is
necessary to produce an output of 2.048 MHz from the VCO. For 3900
extra bits, the control voltage produced causes the VCO to run at a
slightly higher frequency so that the output traffic is at 2.0481 Mb/s. For
4100 extra bits, the output rate would be 2.0479 Mb/s.

control voltage
VCO
CR
Tributary Output
Received traffic Traffic

Elastic Store
Figure 2.28 Receive Elastic Store
2SHUDWLRQRI The operation of a CEPT high order multiplexer is identical at each

&(37+LJKHU hierarchy. A second order multiplexer (2/8 Mb/s multiplexer) is described
2UGHU here, and any significant differences will be highlighted later.
0XOWLSOH[HU
6HFRQG2UGHU Operation of the second order multiplexer can be understood by referring

0XOWLSOH[HU to the 8 Mb/s frame structure shown in Figure 2.29. More details are
provided in ITU-T Recommendation G.742.
)UDPH The frame alignment signal is a 10-bit word transmitted at the start of
$OLJQPHQW each frame:
1111010000
6HUYLFH'LJLWV Two service digits follow the frame alignment signal and are used in the
following ways.
• Distant alarm
The first service digit is used to inform the distant second order
multiplexer of a problem at the local multiplexer. This is the remote or
distant alarm. Refer to Section 2.8.
• National bit
The second service digit is available for national use. One of the possible
uses is an error-checking system, but when not in use, it is set to a 1. On
international systems, this bit is set to 1.

Bit
1 1 1 1 0 1 0 0 0 0 0/1 N 1 2 3 4 1 2 3 4 1 2 etc. 3 4 1 2 3 4
50 bits from each of 4 inputs 212

FRAME ALIGN ALARM
J J J J 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 etc. 3 4 1 2 3 4
JCW
213 1 52 bits from each of 4 inputs 424
J J J J 1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4 1 2 etc. 3 4 1 2 3 4
JCW
425 2 52 bits from each of 4 inputs 636
J J J J J J J J 1 2 3 4 1 2 3 4 1 2 3 4 1 2 etc. 3 4 1 2 3 4
JCW Justifiable
637 3 bits 848
51 bits from each of 4 inputs
No. of bits in frame: 848 frame repitition rate 9962/s
Figure 2.29 Frame Structure of 8448 Kbs/s Digital Multiplexer

for Plesiochronous Inputs Cyclic Bit Interleaving
ITU-T Recommendation G742
7UDIILF Fifty bits of traffic are transmitted from each tributary, using the principle of
bit interleaving.
)LUVW%ORFN
-XVWLILFDWLRQ The next four bits make up the first justification control word (JCW). By
&RQWURO:RUG this time, a decision has been taken whether or not to add an extra bit in
-&:RU the frame, and the JCW is set for each tributary: a 1 indicates bit stuffing
6WXIILQJ will take place, and a 0 indicates it will not.
,QGLFDWRU
As an example, if the JCW or stuffing indicator is 1 0 0 1, it would indicate
that in this frame, tributaries 1 and 4 have extra bits added, and tributaries
2 and 3 do not.
7UDIILF6HFRQG Traffic continues from each tributary, for two more blocks, carrying 52 bits
DQG7KLUG from each tributary in each block.
%ORFNV
5HSHDWHG The same JCW is repeated two more times. This is done to help the
-XVWLILFDWLRQ receive multiplexer correctly decide whether bit stuffing takes place or not.
&RQWURO:RUG If one JCW contains an error, a correct decision can be deduced by
comparing all three JCWs.

As an example:
Tributary 1234
1st JCW 1001
2nd JCW 1101
3rd JCW 1001
Correct output 1001
The correct output is deduced by taking the majority decision. In the first
JCW, tributary 2 is 0, in the second it is a 1, and in the third it is a 0.
Because there are more 0s than 1s, the receiver interprets the portion of
the JCW associated with tributary 2 as a 0.
-XVWLILDEOH%LWV The next four bits are those reserved for possible bit stuffing. If the three
JCWs are 1001, bits 641 and 644 in the frame are stuffed bits, inserted
because tributaries 1 and 4 are running a little slow, while bits 642 and
643 are bits of real traffic, and will be fed to the outputs in the normal way.
5HPDLQGHURI The remaining bits in the frame are used to transmit more traffic, bit-
WKH)UDPH interleaved, as earlier.
0EV)UDPH The 8 Mb/s frame is made up of 848 bits, and has a duration of 100.38
msec. Each frame contains:
A frame alignment signal 10 bits

Service digits 2 bits
Justification Control Words (4 x 3 =) 12 bits
Traffic (4 x 205) 820 bits
Justifiable bits 4 bits
848 bits
The differences between multiplexers at different hierarchical levels can

&(37 be seen from the table in Table 2.5. There are two significant differences:
0XOWLSOH[HUVDW
2WKHU • More traffic/frame
+LHUDUFKLFDO
There is more traffic squeezed into each frame: 1508 bits in the case of
/HYHOV 34 Mb/s, and 2888 bits for 140 Mb/s.

• Five JCWs at 140 Mb/s
Five JCWs are used at 140 Mb/s so that extra security can be applied to
the interpretation of the justifiable bits. An incorrect decision will lead to
loss of frame synchronization at lower orders, hence degrading the
performance of the network as a whole.
2SHUDWLRQRI Operation of the NAS second order (1.5/6 Mb/s) system in the NAS will
1$6+LJKHU be studied. Refer to Figure 2.30.
2UGHU0XOWLSOH[
)UDPH6WUXFWXUH
The 6 Mb/s frame is made up of four subframes, comprising 1176 bits.
)UDPH Alignment of the frames is achieved by four bits marked F0 and four bits
$OLJQPHQW marked F1 (F0 = binary 0 and F1= binary 1). Subframe alignment is
achieved by the four bits M1 to M4 (M1=0, M2 = 1, M3 = 1, and M4 =
alarm bit).
6HUYLFH'LJLWV The only service digit in the NAS higher order system is the M4 bit, which
may be used for distant alarm indication.
7UDIILF Traffic is carried using bit interleaving, as shown in Figure 2.30. Each
subframe carries 288 bits of traffic, 72 from each tributary, including one
justifiable bit.
6WXIILQJ The stuffing indicator for tributary 1 is carried as bits C11, C12 , and C13
,QGLFDWRU in subframe 1. The stuffing indicator for tributary 2 is carried as bits C21,
C22 , and C23 , in subframe 2. Tributaries 3 and 4 are carried in
subframes 3 and 4 in a similar manner.

Table 2.5 Higher Order CEPT Frames

Multiplexed bit rate (Mbit/s) 8.448 34.368 139.264
No. of tributaries 4 4 4
Tributary bit rate 2.048 8.448 34.368
SEQUENCE:
Frame Alignment Signal 10 10 12
Service Digits 2 2 4
Digits from tributaries 200 372 472

(bit interleaved)
1st JCW 4 4 4
2nd JCW 4 4 4
3rd JCW 4 4 4
Digits from tributaries - - 484
4th JCW - - 4
Digits from tributaries - - 484
5th JCW - - 4
Justifiable digits 4 4 4
(one per tributary)
Total digits in frame 848 1536 2928
-XVWLILDEOH%LWV The justifiable bit for tributary 1 is the first tributary 1 bit after F1 in
subframe 1. The justifiable bit for tributary 2 is the first tributary 2 bit after
F1 in subframe 2. The justifiable bits for tributaries 3 and 4 are the first
bits for tributaries 3 and 4 in subframes 3 and 4. These bits are indicated
in Figure 2.30.
0EV)UDPH The 6 Mb/s frame is therefore made up of the following:
Traffic (287 x 4) 1148 bits

Justifiable bits 4 bits
Frame alignment bits (F1, F0) 8 bits
Multiframe alignment bits (M1-M4) 4 bits
Stuffing indicator (C bits) 12 bits
1176 bits
The duration of each 6 Mb/s frame is therefore about 186.3msec.

time slots available for

stuffed bits (See Note
M1 48 DATA BITS C11 48 DATA BITS F0 48 DATA BITS C12 48 DATA BITS C13 48 DATA BITS F1 12 3 4
M1 SUBFRAME
M2 C 21 F0 C22 C23 F
1 12 3 4
M2 SUBFRAME
M3 C31 F0 C32 C33 F

1 12 3 4
M3 SUBFRAME
M4 C41 F0 C42 C43 F

1 12 3 4
M4 SUBFRAME
F0 = 0 F1 = 1 is the frame alignment signal

M1 M2 M3 M4 are multiframe alignment signals
at 011X pattern. X may be used as
an alarm service digit.
Ci1 Ci2 Ci3 (j = 1,2,3,4) are justification control signals
Note 1: The bit available for the justification of tributary j is the first time slot of tributary j following F1
th
in the j frame.
Figure 2.30 NAS 6 Mb/s Frame Structure

0XOWLSOH$FFHVV In the INTELSAT system, two main Multiple-Access schemes are in
7HFKQLTXHV operation.
• FDMA - Frequency Division Multiple Access
Each Earth station employing this mode of operation is required to

transmit one or more carriers to the satellite. Each carrier contains traffic
to one or more different destinations. These multichannel carriers have
their own preassigned uplink frequencies, hence the term “Frequency
Division”. In the downlink, Earth stations will receive and demodulate
different carriers from various destinations. Only the traffic that a particular
Earth station requires is extracted from the demodulated baseband, and
the remainder is ignored because it is meant for other destinations.

• Time Division Multiple Access (TDMA)
TDMA is characterized by the allocation of a preassigned TS for access.

Each Earth station transmits at the same frequency to the satellite and
thus there will be only one carrier on the transponder at any time. Refer to
Figure 2.31.
Because there is only one carrier operating at any one time,

intermodulation noise is nonexistent and a greater amount of traffic can
be handled. Each Time Slot or burst can contain traffic for many different
destinations. The allocation of time slot bursts from the various sources is
controlled by a Reference Earth Station. A further advance in INTELSAT
TDMA system is use of Satellite Switched TDMA (SS-TDMA) on
INTELSAT VI satellites. This means that each Earth station is allotted
different time slots for traffic, and also the bursts are also allocated to any
beam at a given time. This SS-TDMA results in greater flexibility.
RB1
RB2
BEL HOL F G I
832 321 870 483 586
0 20,000 40,000 60,000 80,000 100,000 120,000

120,832
TDMA FRAME (120,832 SYMBOLS < = > 2 msec)
(OPERATING IN 72 MHz)
Figure 2.31 Time Division Multiple-Access System

Digital Satellite Communications Technology Handbook Chapter 3 – Modem Basics
&+$37(5
02'(0%$6,&6

0RGXODWLRQ Modulation is a process by which some characteristics of the waveform is
varied in accordance with another signal. For example, a sinusoidal wave
has three features that can distinguish it from other sinusoidal waves,
namely amplitude, frequency, and phase. For radio transmission,
modulation is essentially varying amplitude, frequency, or phase of a
radiofrequency (RF) carrier in accordance with the information to be
transmitted. Figure 3.1 shows examples of digital modulation formats for
Phase Shift Keying (PSK), Frequency Shift Keying (FSK), Amplitude Shift
Keying (ASK), and a combination of ASK and PSK, also known as
Quadrature Amplitude Modulation (QAM). Figure 3.1 also shows the so-
called M-ary PSK (MPSK) signaling case, where the processor accepts k
source bits at a time, and instructs the modulator to produce one of an
available set of M = 2k waveform types. In practice, M is usually a non-
zero power of 2 (2, 4, 8, 16, ....)
When a receiver in a transmission system makes use of the carrier’s

phase reference to detect the information, it is called coherent detection.
Otherwise it is referred to as noncoherent detection. In ideal coherent
detection, prototypes of all the possible arriving signals would be available
at the receiver. These prototype waveforms replicate the signal set, even
RF phase, and the receiver would be phase-locked to the transmitter.
During detection, the receiver correlates the incoming signal to the
prototypes.
Transponder nonlinearities and power efficiency usually require

the modulation format to have a constant envelope and this means that
Amplitude Shift Keying (ASK) cannot be used in satellite communications.
Thus for satellite communications, primary interest in PSK and the phase-
continuous version of FSK known as minimal shift keying. Biphase or
BPSK modulation is the simplest form of PSK. The phase shift changes
with each new data bit and a binary source code is mapped one bit at a
time into a pair of phase states with 180-degree phase difference.

%LQDU\3KDVH Biphase or Binary Phase-Shift Keying (BPSK) modulation is the simplest

6KLIW.H\LQJ form of PSK, where the phase shift changes with each new data bit. In
this case, a binary source code is mapped one bit at a time into a pair of
%36. phase states with 180-degree phase difference.
4XDGUDWXUH Quadriphase modulation or Quadrature Phase Shift Keying (QPSK)

3KDVH 6KLIW encodes each pair of bits into one of four phases, as shown in Figure 3.2.
.H\LQJ436. One of the principal advantages of QPSK over BPSK is that QPSK
achieves the same power efficiency as BPSK with only half of the
bandwidth. QPSK is of particular importance for satellite data
transmissions and, therefore, for the IBS and Intermediate Data Rate
(IDR) services. The name four-phase or quadriphase refers to the fact
that one carrier is modulated along a 0-degree, 180-degree phase vector
(the in-phase or cosine channel), and the other along a 90-degree, 270-
degree phase vector (the quadrature or sine channel). Ideally, the two
channels are independent.
ANALYTIC WAVEFORM VECTOR

Μ=2
Ψ1(t)
PSK E
Si(t) = 2 /T Cos (ω0t + 2niM)
t S2 S1
I = 1,2....M T
0 < t < T
Ψ2(t)
S2
Μ=3
Ψ1(t)
FSK Si(t) = 2E/T Cos (ωit)
t S1
Ψ3(t) S3
T
Μ=2
Ψ1(t)
Ei
ASK Si(t) = 2 /T Cos (ωot)
t S2 S1
Μ=8 Ψ2(t)
ASK/PSK
or Ψ1(t)
Si(t) = 2Ei/T Cos (ωot + φi) t
QAM
T
Figure 3.1 Digital Modulation Formats

QPSK modulation encodes each pair of bits into one of the four phases
as described above. A typical PSK modulator is shown in Figure 3.3.
The input streams are converted into two analog multilevel signals at the
D/A converter that also performs signal encoding. The two signals have
amplitudes varying with Ak Sin Qk and Ak Cos Qk and so that they are
mapped to vector point K. The signals pass through a low pass filter and
are filtered for cosine roll-off shaping. They modulate carriers that are
arranged to have a quadrature phase relationship. The two modulated
carriers are summed to get a modulated carrier. This process converts
the baseband digital signal into a modulated Intermediate Frequency (IF)
signal.
A digital modem at the receiving end uses coherent detection with an

instantaneous sampling decision. A typical demodulator is shown in
Figure 3.4. The received signal (1) is band-limited at band pass filter 2
and divided into two signals (3). The local carrier recovery circuit that
provides two signals in a quadrature relationship coherently detects these
signals. The detected signals (4) are low-pass filtered to restore data
signals (5). The demodulated signals (5) each have amplitude Ak Sin Qk
and Ak Cos Qk corresponding to the input signal vector position. The A/D
converts these signals into the original data signals (6). Operation of the
demodulator requires the provision of a carrier recovery as well as a
symbol timing recovery circuit.

1) 2 Phase PSK
’0’
64 kbit/s
180 0
1 0 1 1 1 0
’1’
2) 4 Phase PSK
’11’
i.e. 2 BIT STREAM EACH AT 32 kbit/s.

’01’ ’10’ EACH PHASE REPRESENTS 2 BITS (DIBITS)
’00’
Figure 3.2 Example of 2- and 4- Phase PSK
AK Sin (θK) LOW-PASS

b1 FILTER
2 3 4
b2 90o 5
D/A Modulated
signal
& IF PHASE
OSCILLATOR SPLITTER
1 SIGNAL
PROCESSOR
0o
bn
2 3 4
LOW-PASS
FILTER
AK Cos (θK)
Figure 3.3 Block Diagram of a PSK Modulator

LOW-PASS
A K Sin ( θK)
FILTER b1
3 5
90 o b2
2 A/D
SYMBOL
BAND PASS PHASE CARRIER TIMING &
1
FILTER SPLITTER RECOVERY & 6
RECOVERY SIGNAL
PROCESSO
0o
bn
3 5
LOW-PASS
FILTER
4
A K Cos ( θK)
Figure 3.4 Block Diagram of a PSK Demodulator
(LJKW3KDVH In eight-phase shift keying, eight phase states are used. Adjacent phase
6KLIW.H\LQJ states are separated by 45 degrees. Each phase state represents a
36. symbol consisting of a sequence of three bits: 000, 001, 010, 100, etc.
Thus a representation for three bits is sent each time the transmitter is
keyed. Hence this technique provides a theoretical limit of 3 bits/s per Hz.
The BER performance of 8-PSK using coherent detection is:
BER=1/3 erfc{Sqrt (3Eb/No) sin(X/8)}
The relationship between the bits to be transmitted and the carrier phase
of the modulator output is given in Table 3.1.
Table 3.1
Relationship Between Transmitted Bits and
Carrier Phase of the Modulator Output
Transmitted bits Resultant phase

P Channel Q Channel R Channel
0 0 0 22.5°
0 0 1 67.5°
0 1 1 112.5°
0 1 0 157.5°
1 0 0 202.5°
1 0 1 247.5°
1 1 1 292.5°
1 1 0 337.5°

For a given bit-error ratio, 8-PSK modulation technique has a higher

spectral efficiency than QPSK modulation, but it requires more satellite
transmit power.
Figure 3.5 shows a typical block diagram to implement an 8-PSK

modulator. The input stream is split into three streams. The transmit logic
circuit produces two 4-level streams, which are used to modulate two
quadrature carries using double sideband suppressed-carrier amplitude
modulation. The power combiner, accordingly, produces the 8-PSK
output centered at 70 MHz. The inverse functions are accomplished in the
receiver.
i1(t)
4-level modulator
i2(t)
Transmit Logic Circuits Power Combiner Amplifier
i3(t)
4-level modulator
90 degree
IF Local Oscillator
Phase Splitter
Fig 3.5 Block Diagram of 8-PSK Modulator

1HWZRUN/LQH
When interconnecting various pieces of equipment, there are various
&RGHV points to consider regarding the interface. In analog systems, it is
important to make sure that the transmission levels are compatible. In
digital transmission, it is important to consider that the amplitudes of the
pulses are within clearly defined limits, so that they can be correctly
detected. It is also necessary to ensure that the clock recovery systems
work properly. These are all taken care of by the correct use of line
codes.
$OWHUQDWH0DUN
,QYHUVLRQ$0, A most straightforward code is the one that produces pulses of alternate
polarity, called Alternate Mark Inversion (AMI). Whenever a binary “1” is
applied to the input of the coder, the output alternates between a positive
and a negative voltage. (A binary "0" applied, leaves the output at zero
volts.)

5HTXLUHPHQWVRI
/LQH&RGHV One of the requirements of line codes is to ensure efficient working of the
clock recovery circuits.
&ORFN5HFRYHU\ In Section 2, the need for clock recovery was discussed. It was explained
that the system relies on tuned circuits being able to recover energy from
the signals present on the line. To do this, there have to be a relatively
large number of transitions transmitted.
&ORFN5HFRYHU\ The NAS ensures that there are a sufficient number of transitions present
ZLWK$0, by adopting the T-Law encoding characteristic. A low-level signal, or no
signal, is allocated a small quantizing level, e.g., level 1 or 2 of 128.
The binary codes produced by these quantizing levels using the A-Law
characteristic would be:
Level 1 (positive) - 10000001, or
Level 2 (positive) - 10000010.
Along with the T-Law code, the binary signal is inverted; the mathematical
term is to say that the 2’s complement was taken, so that the low-level
signals just considered would become:
Level 1 (positive) - 11111110, or
Level 2 (positive) - 11111101.
'DWD6HUYLFHV
ZLWK$0,
The theory is that it is very unlikely that the highest possible peak codes
will be present on several encoded voice channels simultaneously, and
consequently a long sequence of zeros will be naturally avoided.
&ORFN5HFRYHU\
LQ&(37 Although it is quite unlikely that several encoded voice channels will join
+LHUDUFK\ together to produce a long sequence of 1s, this may not be the case in
data channels. In the NAS and AMI, this is avoided by changing a long
sequence of zeros into a maximum of 15 zeros, followed by a 1.
+'%/LQH
&RGH
Long sequences of zeros are likely to occur naturally in the CEPT
hierarchy. This is particularly likely during nighttime when all the 30
channels might well be idle. To counteract this problem and still allow
data customers to operate, an alternative line code was adopted by the
CEPT, called HDB-3.

This code is a bipolar code, designed to ensure a large number of

transitions, by limiting the maximum number of zeros to three (HDB-3 =
High Density Bipolar code, with a maximum of 3 zeros.). The code is
based on AMI, but is modified by the following rules:
Rule 1: If more than 3 consecutive zeros occur, the fourth zero is

changed to a "1", known as a V pulse.
Rule 2: Successive V pulses must be of alternate polarity.
Rule 3: Every V pulse must be of the same polarity as the last transmitted
pulse.
Rule 4: If rules 2 and 3 cannot both be satisfied, the first of four

consecutive zeros is changed to a 1, which must be of opposite polarity to
the last transmitted pulse. This pulse is called a B pulse.
The name given to the V pulse is a violation, because it breaks the

established rules. The name given to the B pulse is a balancing pulse,
because without it, the code would become unbalanced (e.g., more
positives than negatives). Figure 3.6 shows the operation of this code.
The first example in Figure 3.6 shows alternate V pulses occurring

naturally; consequently, rules 1, 2, and 3 can be applied without difficulty.
The second example in Figure 3.6 just as likely in real traffic, shows the
case where rule 2 cannot be applied directly and rule 4 has to be applied.
Because this code replaces a sequence of eight zeros by a unique,

recognizable sequence, all 8 bits can be offered to data customers
allowing 64 Kb/s.

LINE CODER
ALARM
1 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 1 0 0
0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0
AMI
1 1 1
0 0 0 0 1 0 0 0 1 0 0 0 v 0 0 0
1 v 1 1
HDB-3
RULES 1,2 & 3 APPLIED

WITHOUT DIFFICULTY
HDB-3 EXAMPLE A
CONSIDER 0 1 0 0 0 0 0 1 0 1 0 0
1 0 0 1 0 0 0 0 0
LINE
CODER
INPUT 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0
SIGNAL
1 v 1 1 v
THIS BREAKS RULE 2, SO APPLY RULE 4 TO INTRODUCE ’B’
CORRECT
HDB-3
OUTPUT 1 B v
0 0 0 0 0 0 0 0 1 0 0 0 0 0
1 v 1 1
HDB-3 EXAMPLE B
Figure 3.6 HDB-3 Examples
$OWHUQDWLYH1$6 An alternative line code, used in the NAS, has been developed that
/LQH&RGH allows 64 Kb/s to be offered to customers in the US environment. This is
achieved by replacing a sequence of eight zeros by a unique code,
recognizable by the receiver, and which is capable of being converted
back into a sequence of eight zeros.

The code, known as B8ZS (= Binary, 8 Zeros Suppressed), is illustrated

in Figure 3.7.
A sequence of eight consecutive zeros is replaced either by:

000-+0+-
if it follows a negative pulse, or by:
000+-0-+
if it follows a positive pulse.
These sequences can be recognized by the violations, and hence can be

translated back into a sequence of zeros. As a result, 64 Kb/s can be
offered to customers.
/LQH&RGHVDW
The line codes discussed all apply to the primary order of multiplexing,
+LJKHU2UGHUV CEPT and NAS.
&(37+LJKHU The CEPT higher order line code is HDB-3 for 2, 8, and 34 Mb/s,
2UGHU&RGHV whenever an interface point appears on cable.
At bit rates above this, the interface is generally not on copper cable, and
other line codes, such as Coded Mark Inversion (CMI) are used.
1$6+LJKHU The NAS higher order line codes are variations of the B8ZS code
2UGHU&RGHV described above. ITU-T Recommendation G.703 provides complete
details.
$6XPPDU\RI ITU-T Recommendation G.703 specifies the line codes used in the CEPT,
/LQH&RGHV NAS, and Japanese hierarchies. Table 3.2 provides a summary of these
codes.

LINE 1 0 1 0 0 0 0 0 0 0 0 1
CODER
OUTPUT
B8ZS
OUTPUT
B8ZS - Case 1
LINE
1 1 1 0 0 0 0 0 0 0 0 1
CODER
OUTPUT
B8ZS
OUTPUT
B8ZS - Case 2
Figure 3.7 B8ZS Line Code
Table 3.2 Summary of ITU-T Line Codes
Bit Rate at Hierarchial Line Codes Recommended

Interface (Mb/s) by ITU-T (G.703)
1.544 AMI or B8ZS

2.048 HDB-3
6.312 B8ZS or B6ZS
8.448 HDB-3
32.064 AMI
34.368 HDB-3
44.736 B3ZS
97.728 AMI
139.264 CMI

&RGHG0DUN CMI is a two-level code and is ideal for optical fiber communication,
,QYHUVLRQ&0, where a laser would be either on or off.
A high density of transitions is achieved by subdividing each bit interval

into two, and coding a 0 as 01, and a 1 as either 00 or 11. Figure 3.8
illustrates the application of CMI to a binary sequence.
1 0 0 1 1 0
LINE
CODER
INPUT
CMI 0
OUTPUT
0 0 0 1 0 1 1 1 0 0 0 1
Figure 3.8 Coded Mark Inversion

8VHU,QWHUIDFHV This section examines how the user interfaces with the network
particularly at the FDM/digital interface, the data users interface, and
the way an analog user interfaces with the network.
)'0'LJLWDO
Some Earth stations around the world still operate FDMA systems over
,QWHUIDFH satellite links. A problem arises when converting the networks to digital
regarding how to connect FDM satellite traffic to a digital backhaul. Two
possible ways of achieving this are:
(i) FDM/Digital Interface at Channel Level
One method to interconnect FDM and digital systems is to convert all

traffic to channels and crosspatch at the channel level. This is a
practical solution when the existing channeling equipment is located
where the digital channel interface is being installed.

However, this is not a practical solution when the existing channel

banks are in the ITMC, and the requirement is to upgrade the link from
the Earth station to the ITMC. This is because a set of Channel
Translating Equipment (CTE) and channel carrier generating equipment
would be required at the Earth station instead of at the ITMC. This
would mean either purchasing new equipment or transferring
equipment from the ITMC to the Earth station.
(ii) FDM/Digital Interface Using Transmultiplexers
A transmultiplexer, or T-Mux, is a self-contained unit that automatically

converts the FDM hierarchy to the digital hierarchy and vice versa.
There are several versions recognized by the ITU-T, but basically they
all do the same job; namely, accept a properly formatted digital block
(or blocks), and convert them to a properly formatted FDM baseband.
([DPSOHVRI7 Typical T-Mux equipment in the CEPT network accepts one basic
0X[&RQYHUVLRQ supergroup (312-552 kHz) and converts it into two 2.048 Mb/s digital
blocks. It also performs the reverse conversion. Typical T-Mux
equipment in the NAS network accepts two basic groups (60-108 kHz)
and converts them into one 1.544 Mb/s digital block. There is no loss of
traffic in either case- a supergroup carries the same number of
channels as two 2 Mb/s blocks, and two groups carry the same as one
1.5 Mb/s block.
There is also logic to the conversion. For example, in the CEPT system,
Channel 1 of group 1 becomes channel 1 of the first digital block;
Channel 12 of group 5 becomes the last channel of the second digital
block, and all the other channels are allocated as shown in the table in
Table 3.3.
6LJQDOLQJ The signaling systems used in FDM networks are different from those
&RQYHUVLRQ used in PCM networks. The T-Mux is capable of automatically
converting between many of these. For example, in many FDM
networks the telephone circuit, busy/idle condition is transmitted by
means of a 3825 Hz “out-of-band” frequency. The T-Mux can be
configured to detect this tone in each channel, and convert it into
appropriate signaling bits of the TS16 associated with individual
circuits.
One of the signaling systems that T-Mux can not support is ITU-T
system Number 7 because it depends on a continuous 64 Kb/s data
circuit between switches.

Table 3.3 Digital/Analog Channel Interchange for Transmultiplexer
FDM DIGITAL
GROUP CHANNEL TS DIGITAL BLOCK
1 1 1
2 2 1
1 . . .
. . .
12 12 1
1 13 1
2 14 1
2 . . .
. . .
12 24 1
1 25 1
2 26 1
. . .
3 6 31 1
7 1 2
. . .
12 6 2
1 7 2
2 8 2
4 . . .
. . .
12 19 2
1 20 2
2 21 2
5 . . .
. . .
12 31 2
)'03LORWVDQG The CTEs or GTEs normally produce pilot frequencies, but when a T-
'LJLWDO$ODUPV Mux replaces this equipment, the pilots are generated by the T-Mux. An
alarm indication from the digital to the FDM network is achieved by
removing a pilot if the digital network becomes faulty, thus alerting the
distant end. In the opposite direction, loss of a supergroup into the T-
Mux would result in an AIS being sent forward.

70X[ It is common for the T-Mux equipment to be installed at the Earth

$SSOLFDWLRQ station where FDM international networks have to interface with digital
backhaul equipment. A typical application is shown in Figure 3.9.
FDM
SATELLITE
LINK 2x2 Mbit/s Blocks
T-MUX
FDM BASIC
NETWORK SUPERGROUP
Figure 3.9 Typical Application of a Transmultiplexer (T-Mux)
6\QFKURQL]DWLRQ Output data from a T-Mux will conform to ITU-T Recommendation

RID70X[ G.703. For a CEPT T-Mux, this means that the output bit rate should
be 2.048 Mb/s ±50 parts/million. The transmit clock could be either
derived from a suitable stable internal oscillator or from the national
clock.
Receive digital traffic is detected initially by using recovered timing, but

then they are stored in a buffer before being processed into an FDM
signal. The buffer, which is an integral part of the T-Mux, is necessary
because there may be two different digital streams entering the T-Mux,
each originating in different countries operating at different rates. Each
T-Mux operates plesiochronously, which is adequate for the voice
grade circuits carried over these systems.
8VHRI Sometimes, an analog signal has to be carried between two places that
:LGHEDQG are connected by an existing digital system. This situation can be
&RGHFV overcome by using a coder/decoder system. A common example is in
handling analog TV over a digital backhaul.
79&RGHF Analog TV transmission is still popular, although use of digital TV over

satellite is increasing. Therefore, the problem of getting an analog TV
baseband signal over a digital backhaul remains.

Figure 3.10 illustrates a solution that is a logical application of PCM

principles. The TV baseband typically occupies a bandwidth of 5.5
MHz. This signal can be filtered to prevent aliasing, sampled at twice
the highest frequency (11 million samples/sec), and coded to produce a
digital signal. At present there are a number of coding laws available -
some linear, some nonlinear - all producing different digital bit rates.
The bit rate used depends on the picture quality required.
Transmission rates for compressed digital TV are discussed in another
INTELSAT handbook entitled Digital Compressed TV.
TV 34 Mbit/s 34 Mbit/s TV
VIDEO CODEC microwave microwave CODEC TV GCE
TV STUDIO EARTH STATION
S Q C
ANALOG TV DIGITAL TV
BASEBAND BASEBAND
0 - 5.5 MHz 34 Mbit/s
DC
KEY:
S = SAMPLER
Q = QUANTIZER
C = CODER
DC = DECODER
Figure 3.10 TV Codec Application
'DWD,QWHUIDFLQJ For many years, data customers used FDM network channels to carry
traffic at bit rates up to 9.6 Kb/s, or 13.2 Kb/s occasionally. If the user
wanted to operate at higher rates, they used a complete basic group
(60-108 kHz) to transmit traffic up to 64 Kb/s. This was, of course,
expensive, but did follow a set of rules developed by the ITU - i.e., ITU-
T Recommendation V.35. Although this recommendation has been
superseded by more recent ITU-T recommendations, it is still
sometimes referred to for the physical and electrical interfaces between
the customer equipment (FAX, PCs, etc.) and the network.

5HTXLUHPHQWVRI There are a number of different customer/network interfaces - many are

'DWD&XVWRPHU proprietary, but all have some aspects in common.
Data customers need to be able to transmit and receive data traffic at

rates up to 64 Kb/s. Additionally, they need to transmit and receive
timing signals as well as alarm and other control signals.
Usually an interface or converter box, sometimes incorrectly referred to

as a modem, connects the network to the customer. The correct name
for this box is Data Circuit Terminating Equipment (or DCE). Adopting
more recent ITU-T terminology, the data user’s equipment is called the
Data Terminal Equipment (DTE). Between the DTE and the DCE is
normally a fairly short connection - tens of metres, and interfacing here
is often achieved by multipair cables. Between the DCE and the
network is often one single cable pair for transmit data, timing, and
controls, and another for receive data, timing, and controls.
,QWHUIDFH The usual interface between the DCE and the network is a system
%HWZHHQ'&( known as Codirectional Interface, from ITU-T Recommendation G.703.
DQG1HWZRUN This type of channel is sometimes called “Isochronous” or
“Synchronous”. This interface combines data and timing information.
&RGLUHFWLRQDO The codirectional interface sends network timing information to the

,QWHUIDFH DCE, together with the data. The timing frequencies supplied are 64
kHz for bit timing, and 8 kHz for byte timing. The 64 kHz timing
information is used to ensure that the DCE can transmit traffic back to
the network at the correct bit rate. The 8 kHz timing signals are always
transmitted from the network, but are not always used by the DTE. The
timing signals are sent to signify the end of each sequence of eight bits.
The operation can be described by the five stages in the coding

process.
Step 1 - 64 Kb/s bit period is divided into four unit intervals.

Step 2 - binary 1 is converted to 1100.
Step 3 - binary 0 is converted to 1010.
Step 4 - binary signal is converted to 3 levels by alternating the
polarity of consecutive blocks.
Step 5 - alternating of polarity is violated every 8th block.
The violated block marks the last bit of an octet.

Note: Steps 1-3 ensure that there are sufficient transitions to

enable clock recovery to work. Step 4 ensures that there is no
build up of charge on the line. Step 5 enables byte timing to be
recovered, if required.
'7('&( There are many protocols at this level, but one of the most commonly
,QWHUIDFLQJ used protocols is known as V.24. The main interconnections are listed
below along with their standard names (circuit numbers).
9
Consider each circuit number as a wire (or pair, if appropriate) between

DTE and DCE. Not all will always exist - only those required by the
user. The section marked “use” lists the functions only. No attempt is
made to define voltages, or pulse shapes, in this recommendation.
%DVLF'DWD
Circuit Use
([FKDQJH 102 Signal Earth: a reference for signal measurement.
103 Transmit Data: from DTE to DCE.
104 Receive Data: from DCE to DTE.
&RQWURORI'DWD In addition, there may be control data.

'LUHFWLRQ
Circuit Use
105 Request to send: informs DCE that DTE wishes to
transmit data.
106 Ready to send: allows DCE to inform DTE that it is able
to transmit.
109 Data channel received line signal detector: allows DCE to
inform DTE that it is able to accept incoming data (which
will appear at DTE on circuit 104).
(QDEOLQJWKH
There may also be certain enabling signals.
,QWHUIDFH
Circuit Use
107 Data set ready: informs DTE that DCE is operational.
(Data set is one terminology for modem.)
108/1 Connect data set to line: passes an instruction from DTE
for the DCE to connect its signal conversion equipment
to the line. This is normally in response to a signal on
circuit 125 (below).
108/2 Data terminal ready: indicates to DCE that DTE is ready
to operate. Normally it only enables the DCE and a
supplementary operation, e.g., depression of telephone
DATA button, is required before signal conversion
equipment is connected to the line.
125 Calling indicator: is used by DCE to inform DTE that a
calling signal is being received.

7LPLQJ Finally, there may be certain timing signals.

,QIRUPDWLRQIRU
6\QFKURQRXV Circuit Use
113 Transmitter signal element timing (DTE source).
7UDQVPLVVLRQ 114 Transmitter signal element timing (DCE source).
115 Receiver signal element timing (DCE source).
These three circuits are used to convey timing information between

DTE and DCE. They do this by means of regular transitions from ON to
OFF and vice versa. ON to OFF transitions on 113 indicate the rate at
which DCE should sample transmitted data on 103. DTE is responsible
for timing. OFF to ON transitions of 114 indicate to the DTE when the
next data element for transmission should be presented on 103. DCE
is responsible for timing.
ON to OFF transitions on 115 indicate the times at which DTE should

sample received data on 104. Note that other circuits are used to
control or indicate changes of data rate, standby operation, a backward
data channel, usually low speed, and other less frequently used
functions.
$QDORJ8VHU The connection between analog user input and the network relies on
,QWHUIDFHV the correct use of levels, and the conventional interface between two
and four wire lines. ITU-T Recommendation G.711 defines the
application of A-Law and T-Law coding to analog levels and allows
them to be related to peak codes. For example, an input signal of +3
dBm will produce a peak code of ±127. This will only hold true if the
dBr points are correctly set. Echo control must also be taken into
consideration.

(FKR&RQWURO Echo is not a new problem to telecommunications staff: a poor match at
a 2-wire/4-wire conversion point causes it. Echo is discussed in greater
detail in Appendix 1. The traditional solution is to install an echo
suppressor at each end of the analog circuit, which allows transmission
in just one direction at a time. There are problems with this.
1. Clipping occurs, as speech has to rise above a certain level before it

can be detected.
2. Level variation occurs, particularly during 2-way speech (both parties
trying to talk simultaneously).

The solution most widely adopted nowadays is the use of Echo

Cancellers.
(FKR&DQFHOOHUV Echo cancellers overcome the drawbacks of the echo suppressor by

attempting to duplicate the local echo path to produce a replica of the
echo, and use this to cancel the echo. This is a continuous process,
and once the echo path has been duplicated for a particular correction,
the echo can be effectively eliminated. Echo cancellers are placed in
the 4-wire portion of a circuit that may be an individual circuit path, or
more usefully in a path carrying a multiplexed digital signal. They are
designed to be compatible with each other, as well as with any echo
suppressor that may be present at the distant end.
3ULQFLSOHRI Refer to Figure 3.11. A portion of the receive path is fed into a variable
2SHUDWLRQ delay circuit where the delay can be adjusted so as to be the same as
the delay of the signal in the local echo path. The delayed signal is
then modified in amplitude and phase to form a replica of the echo. This
signal is then combined with the transmit path in such a way as to
cancel out the echo signal. The time taken for the initial setting up is
less than 500 ms.
(FKR&DXVHV In any transmission system, impedance mismatches will inevitably

DQG(IIHFWV occur at interface points between pieces of equipment and/or lines.
These mismatches cause a certain amount of power to be reflected
back to the sending end, depending on the degree of mismatch.
Measurement of the return loss, i.e., the reflected power compared with
the transmitted power is more important than the measurement of
actual impedance in the circuits, because it is the reflected power
which, if large enough, can seriously degrade a connection. The
reflected power arrives back at the talking subscriber as an echo with a
time delay equal to twice the time for the speech to reach the mismatch
point. On a satellite system, this would typically be in the order of 500
msec.

4-WIRE
TRANSMIT
NLP
2-WIRE USER
Echo
Control
Replica
4-WIRE
NLP - Non Linear RECEIVE
Processor
Figure 3.11 Principle of an Echo Canceller
If the echo is severe enough, its effects can prevent a talker from
continuing with conversation. The tolerance of an average subscriber to
echo has been subjectively measured. It is found to depend upon two
things: level of the received echo compared to the transmitted power,
i.e., echo path loss, and the time taken for the echo to return to the
talking end, echo path delay. For example, a subscriber can tolerate a
high level of echo provided the delay is short, or, a low-level echo if the
delay is long.
The point in a circuit that gives most trouble is the 2W-4W interface-
terminating unit. It is impossible for the balance to accurately match the
wide range of impedance presented by a variety of 2-wire lines in the
switched network, and this, in turn, gives rise to poor balance return
loss at some frequencies. The result is that some power is reflected into
the terminating unit from the 2-wire system, and this is returned to the
subscriber and will appear as echo. Echo path loss under such
conditions will be about 10 dB.

6\QFKURQL]DWLRQ This section discusses synchronization and focuses on practical
aspects on how the various subsystems of an overall end-to-end
network are kept in perfect synchronization with one another.

This section has three parts. The first part will discuss how the primary
multiplexers keep in synchronization, the second part on how the
customers synchronize with the primary multiplexers, and the third part
will provide an overview of network synchronization.
6\QFKURQL]LQJ In an earlier section, we discussed a method to recover a timing signal

WKH3ULPDU\ from the incoming traffic. The recovered timing is used to ensure that
0XOWLSOH[HU the circuits in the receive equipment operate at the same speed as the
&ORFN5HFRYHU\ circuits in the transmit equipment.
)UDPH
It is not sufficient to operate the two terminals at the same speed. They
6\QFKURQL]DWLRQ could be operating at exactly the same speed, but 180 degrees out of
phase, for example. It is essential that the traffic is also synchronized
between receiving and transmitting equipment. This is achieved by use
of a Frame Alignment Word (FAW).
8VHRIWKH)$: FAW is a specially defined word that is inserted in the frame structure
at regular intervals. In the CEPT frame structure, it is composed of one
8-bit word inserted into every alternate time slot zero (TS0). The ITU-T
defines this word in Recommendation G.704, and it is illustrated below.
X0011011
Note: The X in the FAW could be either a 1 or a 0. It plays no part in

the frame synchronization procedure .
The receiving equipment detects this word so that it can recognize the
start of the new frame. The problem is that this word can occur in
random data. Hence, to reduce the possibility of false synchronization
in the CEPT system, a different word is transmitted in the remaining
TS0s. This word, illustrated below, the FDW, is defined in ITU-T
Recommendation G.704.
8VHRIWKH The FDW is used for several purposes:

)UDPH'DWD
:RUG a. To allow for an optional telemetry channel (the bits
marked "T")
b. To convey an alarm to the distant end (the bit marked
"A")
c. To allow for the provision of an error checking facility
(the bits marked "X" in the FAW and FDW) and
d. To transmit a synchronizing bit which will help with
initial synchronization (the 1)

The bit which is used to help with initial synchronization is the "1" in the
CEPT FDW above. As it is not the same as the second bit in the FAW,
it can be used to check that the FAW has been replaced by something
else.
X1ATTTTT
CEPT Frame Data Word
/RJLFRI A logical process to achieve synchronization in the CEPT system is

$FKLHYLQJ illustrated in Figure 3.12(a), and is described in ITU-T Recommendation
6\QFKURQL]DWLRQ G.706. To quote from G.706, paragraph 4.1.2:
“Frame alignment will be assumed to have been (achieved)

when the following sequence is detected:
- for the first time, the presence of the correct frame alignment
signal;
- the absence of the frame alignment signal in the following

frame detected by verifying that bit 2 of the (FDW) is a 1;
- for the second time, the presence of the correct frame

alignment signal in the next frame;
...failure to meet one or both of these requirements should

cause a new search to be initiated.....”
6SHHGRI The process described above may seem complex, but in practice it
$FKLHYLQJ appears to be almost instantaneous when the equipment is plugged in.
6\QFKURQL]DWLRQ It could take just the reception of two complete frames to verify
synchronization. This could take 125msec x 2 = 250ms, although
normally it will take slightly longer.

SCAN
IN C O M IN G
DATA
NO YES
FAW
PRESET?
(1 2 5 u s e c la te r)
NO YES
FDW
PRESET?
(1 2 5 u s e c la te r)
NO FAW YES
PRESET?
IN S Y N C
a) S Y N C H R O N IZ A T IO N L O G IC
IN
S Y N C H R O N IZ A T IO N
CHECK FDW
F O R D IS T A N T A L A R M
YES
NO CHECK FO R CLEAR
CO UNTER
FAW
ADD ONE TO
COUNTER
YES NO
COUNTER
= 3?
LO SS O F
SYNC
b) L O G IC F L O W F O R L O S S O F S Y N C H R O N IZ A T IO N
Figure 3.12 CEPT Primary Synchronization Logic

9HULI\LQJ Once synchronization is achieved, the receiving equipment regularly

&RQWLQXHG checks the incoming signal to ensure that it remains in synchronization.
6\QFKURQL]DWLRQ This is done by checking the presence of the FAW at the beginning of
every alternate frame. Note that the FDW is no longer used for the
synchronization. The receiving equipment now proceeds to monitor bit
3 to determine the presence of a distant alarm.
/RVLQJ ITU-T Recommendation G.706 states that “frame alignment will be

6\QFKURQL]DWLRQ assumed to have been lost when three consecutive incorrect frame
alignment signals have been received” (Paragraph 4.1.1). This process
is shown diagrammatically in Figure 3.12(b). If the FAW is corrupted
once, this fact is remembered. If it is corrupted again on the next
expected occasion, this is also remembered. If it is corrupted on the
third consecutive occasion, the receiving equipment drops out of
synchronization and the whole process of searching for the FAW is
repeated. If only one or two FAWs are corrupted, then the equipment
remains in synchronization provided the third consecutive one is not
corrupted. When the next correct FAW is received, the circuit counter
returns to zero.
It has to be noted that although the equipment remains in

synchronization, the receipt of an occasional error is remembered and it
can be used by some receiving equipment to automatically calculate a
bit rate error ratio.
7LPH7DNHQWR The time taken to lose synchronization will appear to be instantaneous,

/RVH although it will actually take between four and six frame periods (500-
6\QFKURQL]DWLRQ 750 msec) depending on when synchronization is actually lost.
6\QFKURQL]LQJ Standard NAS frame structure:

1$6
(TXLSPHQW FAW in the standard NAS is scattered through the frame structure,
using the alternate alignment bits. Because this pattern is repetitive
(101010 .... etc.), the nonrepetitive multiframe alignment word is
distributed through the other alignment bits.
Synchronization is achieved once the whole complete alignment pattern

(spread through 12 frames) is detected. This will take at least 11 x 125
msec = 137.5 msec. In this case, loss of synchronization is confirmed
“over several frames” (ITU-T Recommendation G.706 paragraph 2.).

1$6([WHQGHG The six alignment bits making up the frame alignment signal are
6XSHUIUDPH irregular in pattern and serve the double purpose of frame and
6\QFKURQL]DWLRQ multiframe alignment. Once these six bits have been detected at the
receiver in the correct sequence, frame alignment is achieved. Loss of
frame alignment should be recognized if the frame alignment signal has
been missing for a maximum of 12 msec.
'DWD For data transmission, the receiver must be in synchronization with the
7UDQVPLVVLRQ transmitter, and this can be achieved in one of two ways.
$V\QFKURQRXV This is the type of synchronizing process used by, for example, a
7UDQVPLVVLRQ teleprinter. Each letter typed is represented by a five-bit code, and the
code is preceded by a start bit, and followed by a stop bit. It is
commonly called a "START/STOP" system, and although it is relatively
simple, it is rather inefficient. This system is used for relatively low-
speed circuits (say up to some 9.6 Kb/s).
Generally, this type of system uses VF modems to convert the low-

speed data into audio signals that can be passed through an audio
channel. For this reason, it is not necessary to synchronize the data
customer with the network.
6\QFKURQRXV A far more efficient system is known as a synchronous system. This

7UDQVPLVVLRQ allows the transmitter to produce traffic without start and stop bits by
synchronizing the transmitter and receiver from a common source. The
most convenient synchronizing signal source is the network clock.
Hence this clock source is used most often to synchronize 64 Kb/s
terminals. This concept is illustrated in Figure 3.13.
The network-timing signal can be sent to the data user by a separate

cable, or superimposed on the traffic. Superimposing the network
timing signal on the traffic is the most common system, because it
requires less line plant. The superimposed timing signal is at a rate
appropriate to the system in use, namely 8 and 64 kHz when customers
require 64 Kb/s, and 56 kHz when customers require 56 Kb/s.

CUSTOMER INTERFACE PRIMARY PRIMARY INTERFACE CUSTOMER

OFFICE UNIT MUX MUX UNIT OFFICE
DATA AND TIMING

COMBINED ON TO
ONE CABLE PAIR
CHAN CHAN
i/p o/p
DIGITAL
NETWORK
CHAN CHAN
o/p i/p
DATA TRAFFIC AND DATA TRAFFIC AND

TIMING ON SEPARATE TIMING ON SEPARATE
WIRES WIRES
Figure 3.13 Codirectional Interface
2WKHU'DWD There are a number of other data applications, each requiring different
8VHUV levels of synchronization. They are:
S+dx: The means whereby a voice channel is reduced in bandwidth to

permit use of the higher frequency band for telegraph transmission.
The telegraph machines, telex, or teleprinters, use start/stop
synchronization. Speech and low-speed data can also be combined
digitally often using proprietary equipment. In such cases, although the
network and combining equipment must be synchronous, the link
between the data customer and combining equipment could be either
synchronous or asynchronous.
Fax: Fax, or Facsimile transmission has been in use for many years,
and its use is increasing. Many fax machines operate digitally, although
the telephone lines in use are analog. Recent developments have
produced a new breed of machine, called Group 4 fax. This machine is
intended to operate at 64 Kb/s and offer, for example, a 3-second
transmission time for an A4 document. The earlier machines’
“handshake” at the beginning and end of transmission, is similar to the
start/stop system discussed earlier. Group 4 fax machines are
designed to operate in a synchronous mode.
1HWZRUN Although ITU-T does not recommend a specific method of

6\QFKURQL]DWLRQ synchronization, there are a number of systems in use, three of which
follow.

a. A system that uses a central clock which is distributed to

synchronize the primary multiplexers only.
b. A network that uses two or more mutually synchronized

clocks, that are distributed to all primary multiplexers.
c. A wholly synchronized system.
Each of these systems is described below.
&HQWUDO&ORFN This system, illustrated in Figure 3.14, uses a very accurate and highly
stable clock source, which is centrally located in the network. This clock
in the network is called a Stratum 1 clock in ITU-T G.811, although the
term normally used is LEVEL 1 CLOCK.
LEVEL ACCURACY
STRATUM 1
1 MINIMUM 1 in 10 11
USUAL (Caesium Beam) 7 in 10 12
LEVEL
STRATUM 2 STRATUM 2 1 in 109
2
LEVEL 1 in 107
STRATUM 3 STRATUM 3 STRATUM 3
3
LEVEL
STRATUM 4
4
Figure 3.14 Distribution of Clocks
0XWXDOO\ The level 1 clock is distributed to a number of less stable clocks, known
6\QFKURQRXV as level 2 clocks, which in turn control level 3 clocks. The level 2 and
level 3 sources are used to ensure that primary multiplexers, switches,
Earth station plesiochronous buffers, etc., are all synchronous.
In some cases where it is not practical to have a single timing source,

two or three identical sources are located in different areas. For
example, in a hurricane-prone zone, it makes good sense to have two
or three clocks located in different areas of the country to provide
backup.

They are all considered as level 1 clocks, and are mutually

synchronized. A possible configuration is shown in Figure 3.15. In this
configuration, the level 2 sources would then be fed from any two of the
level 1 sources, and the level 3 sources from the level 2 sources, as
before.
SYNC
SYNC SYNC
STRATUM 1 STRATUM 1 STRATUM 1 LEVEL 1
P S P S P S P S
2 2 2 2 LEVEL 2
P S P S P S P S P S P S
3 3 3 3 3 3 LEVEL 3
P = PRIMARY PATH
S = SECONDARY
Figure 3.15 Mutually Synchronous Stratum 1 Clocks
:KROO\
6\QFKURQRXV This system, illustrated in Figure 3.16, could be used to synchronize all
multiplexers, switches, etc., but it is not commonly used.
6\VWHP
0HWKRGVRI There are two basic methods of distributing the synchronization signals.
'LVWULEXWLRQ These are discussed below.
Over a Separate Distribution System
Where there is enough spare capacity on existing line systems, the

timing signal can be carried directly to each station or office within a
network. The separate distribution system could also rely on the receipt
of a very stable radio signal. The two most commonly used are Loran-
C, which is a 100 kHz radio signal, and navigational satellite system,
known as the Global Positioning System or GPS. The use of either of
these sources requires the use of specialized receiving equipment, but
the accuracy of the received timing source is sufficient to make it a
Level 1 source in any network.

Over the Traffic Carrying Network
In many cases, a Level 1 clock is distributed by superimposing the

timing on the normal traffic paths. The Level 1 clock externally feeds a
number of specific primary multiplexers that carry traffic to main
centers. The clock is recovered from the bit stream at each center, and
is used to derive the Level 2 clock. This process is repeated at other
centers to produce the Level 3 clock. At each level, the clock timing is
distributed to Earth stations, multiplexers, switches, customers, etc.,
as required. Often the routes are duplicated to provide reliability.
CLK 140 34
2 8
P
EXCHANGE
8 2
34 8
8 P
2 8 34
2 EXCHANGE
8 34 140
P
Figure 3.16 Wholly Synchronized Network

'LJLWDO Previous sections discussed how a digital signal is produced from an
,PSDLUPHQWV analog input, and how a number of channels can be combined into one
data stream. This section considers what can go wrong with a digital
stream, how to count errors, whether the errors can be corrected, and
how.
The only thing that can happen to a digital signal is that a 1 is received
instead of 0, or 0 instead of 1, i.e., errors are introduced. There are three
causes of error- Clock Slip, Jitter, and Noise. We will examine them in
turn.
&ORFN6OLS Clock Slip is a timing problem that occurs when two networks meet. This
situation exists in every Earth station, where one country’s network
interfaces with several others. To control this situation, it is necessary to
use buffer stores (plesiochronous or Doppler).

Section 2.7 described the concept of Clock Slip. As a review, suppose an

Earth station receives digital signals originating from another country.
Although the nominal bit rate received might be 2.048 Mb/s, it is unlikely
to be exactly 2.048 Mb/s. It is also unlikely that the receiving country will
be operating from oscillators running at exactly 2.048 Mb/s.
Consequently, from time to time, a bit may be lost or gained. This will be
an error.
Ideally, the way to overcome this problem would be to have both

countries use the same oscillator, but this is seldom possible. So, the next
best alternative is to use extremely accurate oscillators. These are
usually based on atomic standards that are used to time an entire
network in a country. The order of accuracy of a modern
telecommunication standards oscillator is ± 1 part in 1011. Even with such
an accuracy, an error may occur occasionally. But, if the occurrence of
errors can be controlled, the disruption will be minimized.
Clock slip results from differences between synchronized timing sources.

It occurs at the point of interface between one national timing system, and
one or more timing systems elsewhere. The result of a clock slip is that
errors will occur which, if not controlled, will produce a large proportion of
severely errored seconds at regular intervals.
The presence of Doppler shift buffers or plesiochronous buffers at

network interfaces (i.e., the Earth station) controls the rate of slip to a
theoretical maximum of 1 in 70 days. Effectively, this means that one 8-bit
word at 64 Kb/s would be lost or repeated once every 70 days.
(IIHFWVRI&ORFN Slips will cause errors to data circuit users, “clicks” to audio circuit users,
6OLS streaks on fax printouts, and other problems to users. The ITU
recommends maximum tolerable slip rates for various types of service.
They are:
Category A - generally unnoticeable

Category B - some services affected (Fax, 64 Kb/s data)
Category C - all services affected
The mean slip rate corresponding to these categories is reproduced from

ITU-T from Recommendation G.822 in Table 3.4.

Table 3.4 Allowable Slip Duration

Category A For at least 98.9 percent of testing time, there should be
fewer than 5 slips/24 hours.
Category B For a maximum of 1 percent of testing time, there could
be between 5 and 720 slips/24 hours.
Category C For a maximum of 0.1 percent of testing time, there may
be more than 30 slips/hour.
0HDVXUHPHQWRI Measurement of clock slip is normally performed in the International

&ORFN6OLS Switching Center (ISC) as part of a readout of control information from a
modern telephone exchange. Slip counters are available as part of
network analyzers, and can also be used by data centers.
([FHVVLYH&ORFN In practical end-to-end connections, the actual slip rate may considerably
6OLS exceed recommended targets. Whether or not it will affect the service can
be deduced from the above Table 3.4 and ITU-T Recommendation
G.822. In the Earth station environment, there are three potential sources
of excessive clock slip:
a. Human error - statistically, this is the largest source of errors in the

network. This includes patching errors, short interruptions, excessive
manual switching of transmission equipment, etc.
b. Excessive switching - includes switching main to standby equipment for

maintenance, diversity switching on radio backhauls, etc.
c. Wander - controlled by Doppler buffers.
-LWWHU Jitter is defined as the displacement in time of a signal from its ideal
position.
As an analogy, consider a fleet of buses leaving a bus station precisely at

10-minute intervals. Because of the flow of traffic through a city, some of
the buses might be delayed, and some might run ahead of schedule. To
an observer several miles along the route, the flow of buses will appear to
be jittered.
6RXUFHVRI-LWWHU Three main causes of jitter in a transmission system are the process of
multiplexing, particularly in higher order multiplexers, regeneration, and
the transmission path itself.

-LWWHU6RXUFH Earlier sections discussed how overheads are added to digital signals for
+LJKHU2UGHU various purposes, e.g., synchronization. These overheads should exist
0XOWLSOH[HUV only when the signal is passing between corresponding multiplexers, and
must be removed before the digital signal is fed to the end user. The
output signals are not regular and, therefore, pauses occur while the
overheads are removed. These pauses are smoothed out in the final
stages of the multiplexer, but some unsteadiness remains as jitter.
-LWWHU6RXUFH A regenerator has the job of receiving a degraded signal, extracting timing
5HJHQHUDWRUV information, and retransmitting a new signal, recreated from what has
been received, at the recovered clock rate. The main problem lies with
the recovered clock rate that tends to be pattern-dependent. Problems
also arise in regenerators due to equalizer misalignments, component
aging, and mistuning of the clock recovery circuits.
-LWWHU6RXUFH Because characteristics of the transmission path are subject to change,

7UDQVPLVVLRQ the signals passing along that path are also subject to change. This
degradation tends to be fairly slow, and is known as Wander.
3DWK
:DQGHU Wander is best described as "slow jitter", because the timing varies at a
slow rate. The two main causes already mentioned are now explained in
greater detail.
6RXUFHVRI Source 1: Radio Propagation

:DQGHU
The most significant radio path for satellite communication is that from the
transmitting station to the satellite to the receiving station. Because of
satellite movements, the path length between two ground stations will
change through a 24-hour period. Hence, the signals can take a longer
or shorter time to travel the distance depending upon the satellite position.
The wander frequency is one cycle per day. This phenomenon is dealt
with by the use of Doppler shift buffer stores at the receive Earth stations.
Source 2: Temperature Variations
Both copper and fiber cable systems with regenerators may be affected
by temperature, especially if there are large daily temperature changes or
seasonal variations. Propagation time will alter at a low rate. This might
apply to a backhaul, especially if regenerators are included in overhead
plant (i.e., installed on poles).

0HDVXUHPHQWRI There are two parameters associated with the measurement of jitter - the
-LWWHU amplitude and the frequency of the jitter.
Jitter amplitude is the amount in time by which the signal is displaced

from its ideal position. Usually, reference is made to the peak amplitude,
which is the maximum displacement from the ideal. Jitter frequency is a
measure of how often the jitter amplitude varies from peak, through zero,
and back to peak. In terms of the bus fleet analogy introduced earlier, the
amplitude of the jitter is the number of minutes the bus is delayed or early.
The frequency of the jitter would be a measure of how often each bus
arrives late or early.
-LWWHU$PSOLWXGH The amplitude of the jitter is measured in unit intervals, abbreviated as UI.
A unit interval is the duration of each bit period. At 2.048 Mb/s, the
duration of each bit is 488 nsec. If that signal were to arrive early or late
by, say, 244 nsec, the amplitude of the jitter would be described as:
244/488 = 0.5 Unit Interval
-LWWHU)UHTXHQF\ The frequency of a jittered signal is measured in kHz, Hz, or even

cycles/day. When observed on an oscilloscope, it will be seen that there
are a number of frequency components present on the jittered signal.
Hence, measurements of jitter frequency are often taken over a range of
frequencies, i.e., wideband, rather than at spot frequencies. Wander has
already been described as "slow jitter", and is usually taken as anything
slower than 20 Hz.
3UREOHPV If excessive jitter is present on a digital system, errors will occur. Signals
5HVXOWLQJIURP are expected by the receiving equipment at specific times, e.g., every 488
ns, for a 2 Mb/s signal. If those signals arrive early or late they will be
([FHVVLYH-LWWHU missed, and errors will be introduced. To limit errors, the ITU-T quotes
maximum figures for jitter anywhere in a network. These are measured
using a jitter receiver, and maximum jitter amplitudes are defined over
specific ranges of frequency.
-LWWHU There are three basic sets of jitter tests:

0HDVXUHPHQWV
1. A test to measure the maximum allowable jitter at the output of any
equipment or network.
2. A test to ensure that receiving equipment will tolerate a certain amount

of jitter at its input.

3. A test to examine how a jittered signal is handled by a transmission

network or piece of equipment.
These tests will be examined in turn and their limits discussed. An

alternative method of measuring jitter (using "eye patterns"), and a
method of reducing jitter, will also be discussed.
-LWWHU7HVWVIURP Because an excessive jitter at the output of a network can cause errors, it
D1HWZRUN is necessary to define the maximum amount allowable at any point. There
are several sources of jitter, all acting on the same digital signal.
Consequently, a signal is not jittered by one frequency, but by several
frequencies simultaneously. To take this into account, jitter measurement
measures the maximum jitter amplitude over a range of frequencies.
Many sources of jitter introduce fairly low frequency components,

although some sources introduce higher frequency components also. To
differentiate between them, the normal jitter measurements are performed
over two ranges of frequency, as shown in Figure 3.17(A).
Figure 3.17(B) shows relative passbands for the jitter measuring

equipment illustrated above, and quotes frequencies appropriate to
measurement of jitter at any 2 Mb/s point.
0D[LPXP When measuring jitter in the manner described above, the figures for the
$FFHSWDEOH-LWWHU maximum acceptable jitter at any point in the digital hierarchy can be
found in ITU-T Recommendations G.823 for CEPT hierarchy, or G.824 for
the NAS hierarchy. INTELSAT specifies these targets in IESS-308,
paragraph 10.7, and the most useful figures are reproduced here in
Figures 3.18 and 3.19.

B1 UNIT
INTERVALS
BAND PASS FILTER

CUT-OFF F1 AND F4
MEASURED
JITTER JITTER
DETECTOR AMPLITUDE
BAND PASS FILTER

HIERARCHICAL CUT-OFF F3 AND F4
INTERFACE OR
EQUIPMENT
OUTPUT PORT B2 UNIT
INTERVALS
MEASUREMENT ARRANGEMENTS FOR OUTPUT

FROM A HIERARCHIAL INTERFACE OR AN
OUTPUT PORT FROM CCITT REC. G.823
(A)
f1 f3 f4 JITTER FREQUENCY
eg. for 2.048 Mbit/s 20Hz 18kHz 100kHz
BAND PASS FILTERS FOR JITTER RECEIVERS
(B)
Figure 3.17 Jitter Measurement

Parameter Measurement filter bandwidth

Network limit
value
Band-pass filter having a lower cut-off frequency
(unit interval peak-to-peak) f1 or f3 and a minimum upper cut-off frequency f4
Digital rate
B 1 B 2 f1 (Hz) f3 (kHz) f4 (kHz)
(Kb/s)
64 0.25 0.05 20 3 20
2 048 1.5 0.2 20 18 100

8 448 1.5 0.2 20 3 400
34 368 1.5 0.15 100 10 800
139 264 1.5 0.075 200 10 3500
B1 unit
Band pass filter intervals
cut-off f1 and f4
Jitter Measured
Detector jitter amplitude
Band pass filter
Hierarchical Interface cut-off f3 and f4 B2 unit
or equipment intervals
output port
Figure 3.18 Maximum Output Jitter from a CEPT Port
Maximum permissible output jitter at hierarchial interfaces
Network limit Band-pass filter having a lower cut-off frequency

(UI peak-to-peak) f1 or f3 and a minimum upper cut-off frequency f4
Digital rate f1 f3 f4
(Kb/s) B 1 B 2
(Hz) (kHz) (kHz)
1 544 5.0 0.1 10 8 40
6 312 3.0 0.1 10 3 60
32 064 2.0 0.1 10 8 400

44 736 5.0 0.1 10 30 400
97 728 1.0 0.05 10 240 1000
B 1 unit
Band pass filter intervals
cut-off f1 and f4
Jitter Measured
Detector jitter amplitude
Band pass filter
Hierarchical cut-off f3 and f4 B 2 unit
or equipment intervals
output port
Figure 3.19 Maximum Output Jitter from a NAS Port

0D[LPXP Read the table for the amount of jitter measured at 2.048 Mb/s in Figure
$FFHSWDEOH 3.18, which refers to the CEPT hierarchy. Drawing a line under 2.048
-LWWHU Mb/s, the filter frequencies range from 20 Hz to 100 kHz (f1 to f4) for the
wider filter, and 18 kHz to 100 kHz (f3 to f4) for the higher part of the band.
$Q([DPSOH By referring to the drawing, a maximum of 1.5 UIs (B1) is tolerable over
the wider band, while 0.2 UI is the maximum tolerable between 18 kHz
and 100 kHz.
6HOHFWLRQRI Most jitter measuring sets will automatically select the correct filter
frequencies when the speed is selected, so the only figures usually
)LOWHUV needed are for B1 and B2 UIs.
5XQQLQJWKH As jitter tends to occur randomly, it is normal to run a test for a few
minutes, noting the maximum jitter amplitude during that time. Most test
7HVWV instruments will do this automatically. Tests will typically be performed
over a satellite link or over a backhaul, and may be performed while in
service. Refer to Figure 3.20.
-LWWHU7ROHUDQFH The above tests have specified the maximum jitter that may be apparent
7HVWV at the output of a network or at any hierarchical interface. Because there
may be a certain amount of jitter present at the output of the network, it is
possible that there may be a jittered signal into your receiver. The jitter
tolerance test, therefore, tests the receiver to ensure that it will handle a
jittered input up to a certain extent.
-LWWHU7ROHUDQFH The arrangement for testing the input jitter tolerance of transmission
7HVW3URFHGXUH equipment is shown in Figure 3.21. An unjittered input signal is
deliberately jittered by a specific amount. At the system output, the signal
is fed into an error detector. The equipment operates satisfactorily if no
errors occur.
DIGITAL
DIGITAL
RX FROM
TX EQPT
BACKHAUL
(1)
JITTER
RECEIVER
(2)
DIGITAL
DIGITAL
TX FROM
RX EQPT
BACKHAUL
JITTER TEST (1) WILL MEASURE JITTER PRODUCED BY THE

BACKHAUL.
JITTER TEST (2) WILL MEASURE JITTER PRODUCED BY THE

INTERNATIONAL LINK.
Tests could be made in-service
Figure 3.20 Jitter Tests
Pattern Jitter
Generator Generato 8
Jitter Tolerance Test

cf omplete
Error li l
Detector
2
Pattern
Generator 8
Jitter Tolerance
Jitter for receive section
T
Generator multiplexe
f
Error
Detector
2
JITTER TOLERANCE SPECIFIES DEGREE OF INPUT JITTER

WHICH MUST BE TOLERATED BY RECEIVE EQUIPMENT
(out-of-service checks)
Figure 3.21 Jitter Tolerance Test
-LWWHU7ROHUDQFH
Figure 3.22, taken from ITU-T Recommendation G.823, lays down the
7HVW7DUJHWV objectives for this test. Using 2.048 Mb/s as an example, and relating the
figures in the table to the graph adjacent to it, one will notice a certain
degree of agreement between this test and the maximum output jitter test.
Between frequencies f1 and f2, 20 Hz and 2.4 kHz, the transmission
equipment should operate with A1 (1.5) UIs of jitter. Between the
frequencies f3 to f4, 18 kHz to 100 kHz, the equipment should operate with
A2 (0.2) UIs of jitter. Similar graphs and tables can be found in G.824 for
the NAS.
-LWWHU0DUJLQ Although the test just described checks that the equipment operates
correctly, it is unclear just how much better it is than the graph. For
example, at 30 Hz, the equipment may be able to handle 1.5 UI, but not
1.6 UI of jitter. There is very little margin for equipment aging. It is usual,
especially when commissioning new equipment, to test a few spot
frequencies to check how much margin exists. The same test set up as
earlier is used. One frequency is selected, say 30 Hz, and the amplitude
of jitter is increased from 1.5 UI until errors occur. This is repeated at
several frequencies to determine the margin. Refer to Figure 3.23.
Although no figure for margin is specified, any narrow margin should be
investigated, especially when testing new equipment.
-LWWHU7UDQVIHU The test setup is shown in Figure 3.24. A signal with a known jitter
7HVWV amplitude is inserted into transmission equipment, and the amplitude of
jitter present at the output is measured. The jitter transfer is calculated
from the formula:
Jitter Transfer = 20 log10 (Jitter Amplitude Out, UI) dB

(Jitter Amplitude In, UI)
This test is repeated at various frequencies, and compared with the

appropriate ITU-T Recommendation, e.g., G.742 for a 2/8 Mb/s
multiplexer. See Figure 3.25. At the higher frequencies, it is sometimes
difficult to measure the jitter being inserted because of the amplitude of
the lower frequency jitter. Readings can be improved in accuracy by
using a selective measurement of jitter. The manufacturer of the jitter
measuring equipment should describe how to perform this in the
handbook.
Peak-to-peak
Parameter amplitude Pseudo-random
value unit Frequency
interval test signal
Recs 0.151
Digit rate A 0 A 1 A 2 f 0 f 1 f 2 f 3 f 4 and 0.152
Kbit/s
Slope equivalent
1.15 0.25 0.05 20 Hz 600 Hz 11 A 0 to 20 dB/decade
64 3 kHz 20 kHz 2 -1
-5
1.2 x 10 Hz
2 048 36.9 1.5 0.2 20 Hz 2.4 Hz 18 kHz 100kHz 2 15- 1
an
Pe
d A 1
-5 ak-
wa
8 448 152 1.5 0.2 1.2 x 10 Hz 20 Hz 400 Hz 3 kHz 400kHz 2 15- 1 to-
nd
pe
er
ak
am
jitt A 2
plit
er
ud
34 368 * 1.5 0.15 * 100 Hz 1 kHz 10 kHz 800kHz 2 23- 1 e
3500 f 0 f 1 f 2 f 3 f 4
139 264 * 1.5 0.075 * 200 Hz 500 Hz 10 kHz 2 23- 1
kHz
Jitter frequency
* Values under study
Figure 3.22 Input Jitter and Wander Tolerance

(ITU-T Recommendation G.823)
Peak-to-peak jitter and wander amplitude
Slope equivalent to
20 dB/decade
JI T
TE
1.5 R MA
RG
I N
0.2
0
20 Hz 2.4 kHz 18 kHz 100 kHz
Jitter frequency
Figure 3.23 Jitter Margin Results - 2 Mb/s Tributary
JITTER JITTER
RECEIVER GENERATOR
Jitter Amplitude Out (UI)

Jitter Transfer = 20 log 10 dB
Jitter Amplitude In (UI)
NB: This is an out-of-service test
Figure 3.24 Jitter Transfer Test
dB
20 dB/decade
0.5
f0 f5 f6 f7
40 Hz 400 Hz 100 kHz
outin
J J
20 log
-19.5
T 1501590-88
Figure 3.25 Jitter Transfer Characteristics of a 2/8 Mb/s Multiplexer

(ITU-T Recommendation G.742)
$FFXPXODWLRQRI As a network becomes more complex, the amount of jitter present will
-LWWHU increase. Much study has been performed on this, and computer models
have been produced. Jitter does not increase linearly, i.e., if there are two
digital processes instead of one, it does not double, but actually increases
at a slower rate. For details, refer to ITU-T study group documentation.
(\H3DWWHUQV One way of displaying jitter and other impairments is by using an

oscilloscope to produce an eye pattern. A received signal is fed into a
correctly terminated oscilloscope, which is triggered from an accurate
external clock. The trace on the oscilloscope will not be a fixed one, but
will thicken if jitter is present. A badly jittered signal will show as a very
thick display. Because the display can be thought of as being similar in
shape to a human eye, it is called an eye pattern. The advantage of this
test is that it does not require any special test equipment, but it is very
subjective.
-LWWHU5HGXFWLRQ It is often necessary to remove any jitter present in a received signal. The
block diagram in Figure 3.26 illustrates the principles of a jitter reduction
circuit. The operation of this circuit is described below.
PHASE
COMPARATOR CONTROL VCO
VOLTAGE
C/R
CLOCK
RECOVERY
WRITE CLOCK READ CLOCK
First in, First out

Buffer Store
JITTERED
TRAFFIC JITTER - REDUCED
INCOMING OUTPUT TRAFFIC
Figure 3.26 Diagram of a Jitter Reduction Circuit
2SHUDWLRQRI The incoming jittered traffic signal is written into a first-in, first-out buffer
-LWWHU5HGXFWLRQ store, by a write signal recovered from the incoming signal. The Write
signal will be jittered by the same amount as the traffic signal. The traffic
&LUFXLW signal is read out from the store by using a Read signal, also derived from
the incoming traffic, but with the jitter removed.
The jitter removal circuit includes a Voltage Controlled Oscillator(VCO)

which operates nominally at the line frequency 1.024 MHz. A DC voltage
that will either raise or lower the VCO frequency according to the polarity
and size of the DC voltage drives the VCO. The DC voltage is derived
from the difference between the VCO frequency and the line frequency
produced by a phase comparator. As the line frequency varies (the jitter),
so will the VCO.
However, there is a low pass filter between the phase comparator and the
VCO. If the incoming signal varies at too high a rate, i.e., if the jitter
frequency is too high, the varying DC voltage will not pass through the low
pass filter, and the VCO will assume a rate approximating the average
incoming frequency. The VCO will therefore be a smoothened recovered
clock that can be used to read the traffic smoothly out of the buffer. This
type of circuit is built into every receive card on high-order multiplexers so
that excessive jitter is reduced automatically in the multiplexer.

(UURUV Previous sections discussed the various ways in which a digital signal can
be degraded as it passes through a system. This section describes
methods to measure the degree of degradation particularly in an Earth
station environment, and consider what is an acceptable limit. In this
section, the subject of errors will be examined in detail, and a method of
setting objectives introduced. A simple method of counting errors and
quoting error performance is the Bit Error Ratio, BER.
Noise is an important cause of errors, and degrades the incoming signal.

The regenerator makes a decision based on the level of the incoming
signal. If there is noise on the signal, a wrong decision introduces an
error. At an Earth station, noise can occur as a result of poor carrier-to-
noise ratio (C/N), or interference on the satellite link. A laser or light
detector failure will introduce noise. A microwave backhaul might suffer
from errors due to interference or propagation phenomenon.
(IIHFWVRI(UURUV An ideal system will have no errors. If there are errors, something is
wrong. However, the matter of interest is whether the errors are
noticeable to circuit users. The effects of errors vary with the different
circuit users.
$XGLR&LUFXLW An audio circuit user - a telephone user, for example - will be listening to a
8VHUV decoded digital signal. Whether the user will notice the introduction of an
error depends on which bit of an 8-bit word is corrupted. Tests have
shown that the average user only notices 1 error in about 20. Even if an
error is noticed, it will not be noticed immediately.
It depends on the distribution of errors. If all the errors occur together,

they will be noticed. If they are evenly spread out, more errors per
second can be tolerated before an audio user will reject the signal.
From the above description it can be seen that if all the errors occur in
bunches, they are more likely to be rejected by audio users than if they
are evenly spaced. The number of errors per second is of secondary
importance; it is the grouping that counts.
'DWD&LUFXLW Data users normally organize the data into blocks. The length of the
8VHUV blocks depends on the protocol in use, but some bits in each block are
usually reserved for error checking purposes. The method may vary from
simple parity checking to complex methods.
Once the data user has detected an error in the received traffic, it is a
common practice to request a retransmission of that and subsequent
blocks.
2WKHU&LUFXLW Other circuit users include FAX, TV, and VF data. Each use has its own
8VHUV requirements. A TV system can be quite forgiving because the human
eyes and brain can link from one good picture to the next, skipping over
the occasional degraded picture. FAX messages may have to be
completely re-sent if errors occur, but VF data users may tolerate a
surprisingly high concentration of errors.
(UURU Three terms have been introduced to refer to errors, concentration of

7HUPLQRORJLHV errors, and background errors. These terms are: errored seconds,
severely errored seconds, and degraded minutes. Refer to ITU-T
Recommendation G.821 paragraph 1.4.
(UURUHG6HFRQGV If any 1-second interval contains any error, that second is called an
errored second. The number of errored seconds in a data circuit is
normally expressed as a percentage of the total testing period hence:
Errored Seconds = Number of seconds containing errors x 100 percent

Total testing period in seconds
(UURU)UHH It is psychologically more positive to talk about error-free seconds, (the

6HFRQGV number of 1-second intervals completely free of error), than errored
seconds, particularly in dealing with customers. It is quite common to see
this term used in place of errored seconds. The relationship between the
two is:
Error-Free Seconds = Total Test Period - Errored Seconds
This figure is commonly quoted as a percentage.
Error Free Sec. (%) = 100 - Errored Sec. (%)
6HYHUHO\(UURUHG This term is used to refer to any 1-second interval where the bit error
6HFRQGV6(6 ratio, BER, is worse than 1 in 103. For a 64 Kb/s, a severely-errored
second is one that contains more than 64 errors. Hence the number of
error bursts can be measured. As with errored seconds, SES is normally
quoted as a percentage of the total testing period:
Severely-Errored Seconds =
Number of seconds with BER > 1 in 103 x 100%
Total testing period in seconds
'HJUDGHG This figure takes a longer measuring period of sixty seconds, and if the
0LQXWHV'0 BER is worse than 1 in 106, the period is counted as a degraded minute.
If measurements are performed at 64 Kb/s, any period of 60 seconds
containing more than 4 errors is counted as a degraded minute. This is
used to count the long term, background, distribution of errors, and is also
normally expressed as a percentage:
Degraded Minutes = Number of minutes with BER > 1 in 106 x 100%
Total testing period in minutes
(UURU Error measurements at 64 Kb/s should include simultaneous

0HDVXUHPHQW measurement of all the three parameters: errored seconds, severely-
errored seconds, and degraded minutes to analyze the performance of a
circuit, and relate it to user requirements. Many manufacturers build this
facility as a standard feature of measuring equipment.
(UURU2EMHFWLYHV The ITU-T has set error objectives in the terms discussed above, and
related them to a standard reference circuit known as the Hypothetical
Reference Connection (HRX). Having set these objectives for the HRX,
the ITU-T then provides a method to calculate the objectives for any
circuit. This is a test mainly of interest to the data department of an
organization. INTELSAT’s interest is that the satellite link and backhaul
form part of the international connection, and should not, therefore,
contribute an excessive amount of errors. Consider the HRX to see
exactly where satellites fit in.
+5; Figure 3.27 shows an HRX with a total end-to-end length of 27500 km. It
is mainly made up of an international connection, which may pass
through up to three different countries at their ISCs. Each terminal
country will have a local connection between the 64 Kb/s users and their
nearest exchanges, remote line unit, switch, distribution node, etc., and
also a national trunk connection between the local exchanges and the
ISC.
27,500 km
LOCAL NATIONAL INTERNATIONAL NATIONAL LOCAL
S LE PC SC TC ISC ISC ISC ISC ISC TC SC PC LE S
S - Subscriber SC - Secondary Centre Switch

LE - Local Exchange TC - Tertiary Centre
PC - Primary Centre ISC - International Transition Element
Centre
Figure 3.27 Digital Hypothetical Reference Connection (HRX)
+5;4XDOLW\ Figure 3.28 illustrates relative quality of each constituent part of the HRX,
'HPDUFDWLRQ and indicates distances. The international section, from one terminal ISC
to another terminal ISC, is considered to stretch 25,000 km and provides
a high grade of service.
The national section, from a local exchange via an intermediate national

exchange to ISCs, performs to a medium grade, and the usually short link
from subscriber to local exchange performs to a local grade of service.
(DUWK6WDWLRQLQ The Earth station typically forms part of the international connection as
WKH+5; shown in Figure 3.29. Hence it contributes to the high-grade section of
any network. An Earth station-to-Earth station link is considered as being
equivalent to 12,500 km of the high-grade section, leaving up to 12,500
km for backhauls and/or international transit sections.
27,500 km
1,250 km 25,000 km 1,250 km
note 2 note 2
LE LE
T-
T-
reference
reference
point
point
(note 1)
LOCAL MEDIUM HIGH MEDIUM LOCAL

GRADE GRADE GRADE GRADE GRADE
NOTES:
1. The T-reference point is a CCITT defined subscriber/network ISDN interface.
2. This point may be at the LE, PC, SC, TC or ISC depending on country size.
Figure 3.28 System Quality Demarcation for Longest HRX
Sub LE ISC ISC LE Sub
3000 km 240 km
LOCAL MEDIUM HIGH GRADE MEDIUM LOCAL

GRADE GRADE GRADE GRADE
Figure 3.29 A Typical 64 Kb/s Connection that includes a Satellite Link
'DWD&LUFXLW Whenever a new service is implemented, SSOG tests between

7HVWLQJDW(DUWK corresponding Earth stations are necessary. The tests include a receive
BER measurement [SSOG-308, paragraph 8.13 for IDR services], which
6WDWLRQV is performed to give a quick check of circuit continuity, and ascertain
whether detailed end-to-end testing by data test centers is required. The
INTELSAT specification for a "quick test" is for a BER no worse than 1 x
107 over a 15-minute period.
,QLWLDO/LQHXS Table 3.5 shows digital error performance that ITU-T recommends in
Recommendation M.555, which states that tests can be performed on
loopback. The maximum acceptable error count would then be double
the figure mentioned above
Table 3.5 Quick Checklist of Digital Error Performance

(Provisional from ITU-T M.555)
Effective distance (note 1) Minimum test duration Maximum allowed counts

kilometres (in minutes) (note 2) in errored seconds
500 15 5
1000 15 10
2000 15 20
4000 15 40
8000 15 80
12 500 15 125
18 000 15 180
25 000 15 250
1. May be linearly interpolated for other distances.

2. Values relate to 1.5 or 2 Mb/s.
'DLO\ Daily maintenance and operation in the digital environment are generally
0DLQWHQDQFH less tedious than in the analog environment. Nevertheless, care should
be taken to ensure that the BER and/or concentration of errors do not
DQG2SHUDWLRQ increase and that antenna tracking accuracy is maintained. If the carrier-
to-noise ratio worsens, so will the BER, resulting (initially) in worsening
errored seconds and degraded minutes figures. Propagation difficulties,
Sun interference, spurious carriers, etc., will increase severely-errored
seconds and degrade BER. In extreme conditions, there will be a
complete loss of service.
0HDVXUHPHQWRI The measurement of errors is complex because different users expect

(UURUV different performance standards of the network. However, the simplest
way to measure errors is to count the number of errored bits received,
and express this as a proportion of the total number of bits received.
Example
A 64 Kb/s data test resulted in 3840 errors in 10 minutes. What is the

BER?
BER = Total number of errored bits·Total number of bits

Total number of errored bits = 3840
Total number of bits = 64000 x 60 x 10
BER = 3840·(64000 x 60 x 10)
= 1·10000
or 1 in 104

(UURU'HWHFWLRQ Parity checking, code violations, and CRC are some ways to detect
DQG&RUUHFWLRQ errors. Once an error is detected, it can be corrected or an automatic
request for a retransmission can be made. The latter is called Automatic
Repeat reQuest (ARQ).
3DULW\&KHFNLQJ Parity checking involves breaking the data stream into a series of blocks.
At the transmitter, the number of 1s in that block is counted, and if the
number is even, an extra parity 1 is added. At the receiver, each block is
checked to ensure that an odd number of 1s has arrived. An even number
of 1s indicates presence of error(s) and an ARQ is sent.
&RGH9LRODWLRQ Code violation involves coding each bit of information in a unique manner.
For example, each time a 1 is transmitted, the polarity or phase might be
inverted. If two signals of the same polarity were received consecutively,
an error might have occurred, and an ARQ is sent.
&\FOLF This is an established technique in lower rate systems. At a transmit

5HGXQGDQF\ terminal, the signals are fed into a modified counting circuit. After a
&KHFNLQJ specific number of bits, the contents of the counter are transmitted. At the
receive terminal, there is an identical counting circuit, and after the same
number of bits, the contents of the receive counter should be the same as
the contents of the transmit counter; if not, an ARQ can be generated, or
an alarm condition displayed. One drawback of ARQ is that a buffer
storage is necessary to hold errored and subsequent blocks until the error
can be corrected by the retransmission of the affected blocks.
)RUZDUG(UURU A commonly adopted alternative at Earth stations is Forward Error

&RUUHFWLRQ Correction (FEC). This method relies on a convolutional code, where
sufficient information is transmitted to allow the receiver to not only detect
an error, but also correct it without sending an ARQ.
FEC is required to achieve optimum use of satellite power and bandwidth,

and to provide the best possible reliability within the system limitations.
The major considerations on the satellite system follow.
a. The principle disturbance is additive wideband white noise.
b. The transmission delay is relatively large, about 250 ms, for

geostationary orbits.
In general, satellites are more often power-limited than bandwidth-limited.

Hence, sufficient bandwidth is available to allow the bandwidth expansion
that a FEC will require. This power limitation reduces the ability to use
high power signals to overcome noise problem. By coding, an apparent
gain in signal level against noise power is obtained due to the error
correcting capabilities of the code structures used. This apparent gain
is known as the coding gain. Figure 3.30 shows a typical BER
performance with and without coding.
The satellite transmission delay limits use of an ARQ system to low data
rates. This is because ARQ requires buffers capable of holding blocks of
data until a confirmation signal from the distant equipment is received.
As an example, a 10 Mb/s bearer would require a buffer capable of
holding a minimum of 5 Mb/s.
For the above reasons, FEC is used where the information for
transmission is coded using known patterns that will allow reliable
decoding at the distant end. On all coded systems, the bit rate to the
satellite is greater than information rate into the FEC encoder. Figure
3.31 shows the position of the FEC encoder and decoder in an IDR
channel unit.
BER 10
-1
-2
10
-3
10
Typical Value
Ideal Value
Without FEC
-4
10
R = 3/4
-5
10
With
FEC
-6
10
-7
10 Eb/No (dB)
0 2 4 6 8 10 12 14
Figure 3.30 BER Performance With and Without FEC
A D
TRANSMIT INTERFACES
a b SCRAMBLER c FEC d e
OVERHEAD ENCODER QPSK TO UP-
ADDITION CCITT REC. CONVERTER
(Rate 3/4) MODULATOR
V.35
TRANSMIT CHANNEL UNIT
a b c FEC d e
OVERHEAD DE- QPSK FROM DOWN
SCRAMBLER ENCODER
REMOVAL (Rate 3/4) DEMODULATOR CONVERTER
RECEIVE CHANNEL UNIT
RECEIVE INTERFACES
H a INFORMATION RATE IR E
b/c COMPOSITE RATE CR = IR PLUS OVERHEAD
d TRANSMISSION RATE R = CR/C (C = Code Rate = 3/4)
e SYMBOL RATE SR = R/2
Figure 3.31 Basic IDR Block
&RQYROXWLRQDO A convolutional code uses preceding data to form the code.

&RGHV Convolutional codes prove to be particularly suitable for systems where
the information to be transmitted arrives serially in long sequences rather
than in blocks. The information symbols are then encoded continuously
in serial form.
Coding is achieved by entering the symbols into a shift register. (Refer to

Figure 3.32.) Following each shift, a number of coded symbols are
obtained by the Modulo-2 addition of the contents of selected stages of
the shift register (Modulo-2 addition is addition with no carry facility, i.e.,
1+0+0 = 1, 1+1+0 = 0, etc.). Each stage of the shift register has a binary
digit acting on it according to the code generation bits known as the
operating polynomial G1 and G2 (A polynomial is an algebraic
expression consisting of 3 or more parts). The number (n) of coded
symbols at the output per information bit gives the code rate (1/n), e.g., ½
or ¾.
0011
X1i Output
Input
1101 10, 00, 01, 11
1 2 3
X2i
1001
Figure 3.32 Simplified Encoder
Figure 3.32 shows a simple ½ rate encoder with a three-stage shift

register. The number of stages of the register is known as the encoder’s
constraint length (K). The coded output is taken from X1i and X2i
alternately via the switch. The code generation polynomials in this case
are given by:
Polynomial G1 = 111 (A)
Polynomial G2 = 101 (B)
Referring to Figure 3.32 and assuming that the encoder starts in the all
zeros state, the first four bits 1011 produce an output of 11, 10, 00, and
01, respectively, as shown. Clearly, the output corresponding to each
new input bit depends on the previous 2 input bits that are stored in the
shift register.
The output bits can also be derived from the trellis diagram, shown in
Figure 3.33, which has been drawn to match the code generation for the
encoder in Figure 3.32. The trellis starts at the all zeros state, node a, at
time t = 0. Transitions are made corresponding to the input bit. These
transitions are denoted by a solid line for a 0 input, and a broken line for a
1 input. The output bits obtained are shown next to the transition.
The four states “a” to “d” equate to the conditions of stages 1 and 2 of the
shift register prior to the insertion of the next bit.
a = 00, b = 10, c = 01, d = 11
Figure 3.33 Trellis Diagram
Two output bits represent each input bit to the above encoder. The
location of any two output bits within the trellis can be identified from the
preceding and the following bit pairs, which are dependent on the
preceding and following input bits. Obviously, the error correcting
performance of the encoder and the decoder are improved by increasing
the number of input bits which have an effect on the output bit pairs of the
encoder. This is achieved by increasing the constraint length of the
encoder. However, it can be shown that little improvement is achieved for
a constraint length greater than 8.
,'5(QFRGHU Figure 3.34 shows a Rate ¾ convolutional encoder. This code is known
as a punctured type of convolutional code and is constructed from a Rate
½ encoder by periodically deleting specific bits from the Rate ½ output bit
sequence. It has been shown that punctured codes operating at rates
higher than ½ rate result in a performance loss of only 0.1 dB to 0.2 dB,
but the main advantage is reduced circuit complexity. The encoder has a
constraint length of 7 and generates polynomials of 133 and 171 in octal
notation or binary 1011011 and 1111001, respectively.
Rate 1/2 Rate 3/4

Coded Data Punctured
Generator Polynomial = 133 (Octal) Coded Data
= 1011011 (Binary)
Deleting Bit
Pattern = 110
Bit Selector P
Uncoded
Data Input Bit Selector Q
Deleting Bit
Pattern = 101
Generator Polynomial = 171 (Octal)

= 1111001 (Binary)
Figure 3.34 IDR Encoder
Figure 3.35 shows the four major processes associated with the operation
of a punctured code scheme. The data input at the transmit point (A) is
initially encoded by a rate ½ convolutional encoder implementing the
constraint length 7 code. The encoded output (B) consists of two
codewords, C0(n) and C1(n), for each input bit D(n). Certain codewords
are deleted from the data stream to be transmitted as shown in (B), and
the remaining codewords are regrouped into two-codeword symbols for
transmission over the IDR QPSK modulated channel (C).
Note that the result of this deletion of two codewords is that four
codewords are actually transmitted for every three information bits, thus
achieving a rate ¾ code scheme. At the receiver, the received symbols
are again regrouped to form the codeword pairing of the original rate ½
encoded output. Null information codewords that convey no information
to the decoder are inserted in place of the codewords that were deleted
by the symbol puncture circuit at the transmitter (D). The encoded data
stream with null symbols inserted is then decoded by a rate ½ Viterbi
decoder back to the original data stream (E).
The code used for the encoder in Figure 3.34 is, however, transparent to
180-degree carrier phase ambiguities when decoded. As a result, the
incoming data stream needs to be differentially encoded prior to being
passed to the FEC encoder.
Encoded Punctured Rx Data with Null

Data Encoded Insertions
Data Data Data
Input Output
Rate 1/2 Multi- Rate 1/2
Convolution Rate 3/4 Symbol Viterbl
Encoder Puncture Insertion Decoder
A B C D E
Transmitting Satellite Receiving

Station Channel Station
A D (1) D (2) D (3) D (4) D (5) D (6)
CO (1) CO (2) CO (3) CO (4) CO (5) CO (6)

B
C1 (1) C1 (2) C1 (3) C1 (4) C1 (5) C1 (6)
CO (1) CO (3) CO (4) CO (6)

Q Channel
C P Channel
C1 (1) C1 (2) C1 (4) C1 (5)
CO (1) CO (3) CO (4) CO (6)

D
C1 (1) C1 (2) C1 (4) C1 (5)
E D (1) D (2) D (3) D (4) D (5) D (6)
= Null Symbol Inserted
= Symbol Deleted (Punctured)
Figure 3.35 Rate 3/4 Punctured Code Operation
'LIIHUHQWLDO Differential encoding and decoding are used to remove phase ambiguities
(QFRGLQJ of the received phase modulated signal caused primarily by the methods
used within the demodulator to recover the carrier. By encoding the data
as differences between adjacent symbols, the effect of the ambiguity is
removed. Figure 3.36 shows a block diagram of a differential encoder,
and the output sequence.
2SHUDWLRQRIWKH The operation of the decoder is as follows:

'LIIHUHQWLDO
'HFRGHU If the sequence of input bits to the differential encoder is 1001, the
encoder is assumed to have transmitted a 1 as the previous bit. This
bit is compared with the first input bit. If the bits are the same, a 0 is
transmitted; if they are different, a 1 is transmitted. The encoding rule is:
the next transmitted bit is the Exclusive OR of the previous transmitted bit
and the input bit. At the receiver, the demodulator output bits are
differentially decoded by comparing adjacent bits. If they are the same,
the source bit was a 0; if they are different, the source bit was a 1.
MODULO 2
ADDITION
EX OR
A Bn
INPUT DATA OUTPUT DATA
Bn-1
DIFFERENTIAL ENCODER
Bn-1
A Bn
INPUT DATA EX OR OUTPUT DATA
MODULO 2
ADDITION
DIFFERENTIAL DECODER
Figure 3.36 Differential Encoder/Decoder
Assume Bn-1 = 1
Input (A) = 1011
Output (B) = 10010
With no ambiguity, the decoder output for the input from the above
encoder will be:
Demodulator Output 10010

Decoder Output 1011
With a 180-degree phase ambiguity the output of the decoder will be:
Demodulator Output 01101

Decoder Output 1011
9LWHUEL By definition, maximum likelihood decoding implies comparing the

'HFRGLQJ received sequence with all possible transmitted sequences before making
a decision on the correct sequence. Decoding an n bit long binary
0D[LPXP sequence would, therefore, require the decoder to compare all 2n different
/LNHOLKRRG sequences that could have been transmitted. Because of this exponential
'HFRGLQJ increase in decoding effort with the length of the sequence, maximum
likelihood decoding is difficult to implement and is rarely used.
7UHOOLV Considering the trellis structure code in Figure 3.37, Viterbi proposed a
simpler form of decoding which produces a metric algorithm for every
possible path. By comparing the incoming sequences with the possible
paths through the trellis, and giving an accumulated weight to each
possible transition, it is possible to obtain the path closest to the
transmitted sequence. Paths with higher weights at each node are
discarded after each transition, thus reducing the number of possible
paths to manageable levels. Although this is not Maximum Likelihood
Decoding in the true sense, the results obtained are identical.
+DPPLQJ From the trellis diagram in Figure 3.37, it can be seen that there are two
'LVWDQFH paths from each node. These two paths are each weighted by comparing
the received bit pair to the bit pairs produced by each path. The path with
the lowest accumulated weight at each node in the next level is selected
as the surviving path. For the present, we will consider only a binary
decoding technique, hard decision, in which the weight will be the
Hamming Distance.
The Hamming Distance is calculated by comparing the two bit pairs, i.e.,
the incoming data pair and one of the transition data pairs. For every bit
that is different, a value of 1 (decimal) is given, as shown in Figure 3.37.
00 00 00 00 00 00 00
a
11 11 11 11 11 11 11 11 11 11 11 11
b 10 10 00 10 00 10 00 10 00 10 00
01 01 01 01 01 01 01 01 01 01 01
d
10 10 10 10 10
t=0 t=1 t=2 t=3 t=4 t=5 t=6 t=7
Incoming Trellis Hamming

data Transition Distance
data
00 00 0
01 00 1
01 01 0
01 10 2
01 11 1
.... and so on for all possible combinations
Figure 3.37 Trellis Diagram and Hamming Codes
The weights are accumulated for each path. At each node the path with
the lowest value, Hamming Distance, is selected as the surviving path,
while the other is rejected. In the case of two paths yielding the same
weight, the survivor is chosen at random. There is no benefit from
retaining both paths. Hence, at each step, the extensions increase the
number of paths by a factor of 2, while the comparisons reduce that
number by a factor of 2 resulting in a constant number of surviving paths.
Refer to Figure 3.38.
Input
11 10 00 01 01 11 00
Data
(3)
a
2
(5)
b
0
(4)
c
3
(4)
d
3
t=0 t=1 t=2 t=3 t=4 t=5 t=6 t=7
Figure 3.38 Decoding Sequence to T = 3
After a number of steps through the trellis, it will be noted that all the
surviving paths have a common root. This root has the most likelihood of
being the transmitted sequence as shown in Figure 3.39, and as such is
decoded. The recovered data are passed to the output port.
11 01 00 10 10 8
(5) 11 (8)
0 3
01 00
10 10
(7)
01
2
t=0 t=1 t=2 t=3 t=4 t=5
Figure 3.39 Step by Step Decoding Process
The operation of the Viterbi decoder is always forward without backing up.
A decoding step involves only the determination of the branch weight, the
total accumulated weight and the pairwise comparison and proper path
selection. These operations are identical from level to level, and as they
must be performed at every state, the complexity of the decoder is
proportional only to the number of states, and hence grows exponentially
with constraint length. This provides a practical limit for Viterbi decoding
to convolutional codes of short constraint length (k<8).
([DPSOHVRI As an illustration, consider Viterbi decoding for the K=3, rate 1/2 code
9LWHUEL previously given. Let the input sequence be 1, 0, 1, 1, 0, 0, 0. The
corresponding output sequence will be 11, 10, 00, 01, 01, 11, 00. This is
'HFRGLQJ shown in bold lines through the Trellis in Figure 3.39.
Figure 3.39 traces the states up to the time interval t=5. The Hamming
Weights for each path are shown. The path with minimum Hamming
Distance (bold line) is retained and the others are omitted. The minimum
Hamming Distance traces out the received data stream of:
11 10 00 01 01.
Figure 3.38 shows the decoding sequence to t=3. It has been assumed
that the coder was in the all-zero’s state initially. The nonsurvivor paths
are shown as dotted lines. The accumulated weights for each path are
shown. Those for the nonsurvivor paths are shown in brackets.
Let us assume that an error is introduced during the transmission as

shown in Figure 3.40:
Transmit Data 11 10 00 01 01
Receive Data 11 10 10 01 01
where the third bit-pair is transmitted as 00 but received as 10. As can be

seen in Figure 3.40, by discarding the nonsurviving paths and their roots,
the correct path is decoded to t=5 despite the introduced error.
3UDFWLFDO9LWHUEL As discussed previously, a number of decoding steps need to be

'HFRGHUV completed before the correct path through the trellis can be established.
The decoder must, therefore, be able to store the path data and
'HFRGHU accumulated weights for each path in the Trellis for sufficient levels to
0HPRU\ allow the sole surviving path to be made apparent. It has been found
through simulation that a memory capable of holding these data for 4- to
5- thousand levels of the trellis is sufficient in a majority of cases. Should
the buffer be filled, and a sole surviving path is not available, the surviving
path with the lowest accumulated weight is selected. The size of the
memory within the decoder gives the length of the delay between the
code sequence that goes into the decoder and the corresponding
information bit appearing at the output.
ERROR
Input 11 01 10 10 10
1 3
Data 00 00
11 11 11
(4)
01 3
11 1
0 (4)
00
00 01
4
10 10 10
1
10
(3)
01
(3)
t=0 t=1 t=2 t=3 t=4 t=5
Figure 3.40 Decoding Sequency with Error Introduced
3UDFWLFDO9LWHUEL In the above decoding process, we used the Hamming Distance to

'HFRGHUV6RIW establish the weight of each path within the trellis. This is only possible
'HFLVLRQ for hard decision decoding. (Hard decision where a 1 is a 1, and a 0 is a
'HFRGLQJ 0 with no ambiguity.) For all decoders used in IDR services, soft decision
decoding (various levels of 1 and 0) is used.
Due to the presence of white noise at the demodulator input, the output
bits will not appear as clearly defined 1s or 0s, but will be at some
arbitrary level in between. It is normally assumed that should the output
signal be above a preset level, it is treated as a 1, and below that level as
a 0. Thus, the signal has been quantized using two-level quantization,
which is known as the hard decision case.
To improve the efficiency of the Viterbi decoder in the presence of white

noise, the output of the demodulator is quantized using eight levels, giving
a three-bit code for each bit of information. Thus, the information bit pairs
used for calculating the weighting for the paths within the trellis are now
represented by a six-bit codeword. The decision as to whether a received
bit is a 1 or a 0 is thus made apparent only by the surviving path through
the trellis. This is known as Soft Decision Decoding. Soft Decision
Decoding gives an improvement in the coding gain of the system of
approximately 2.5 dB over the Hard Decision method.
Digital Satellite Communications Technology Handbook Chapter 4 – Applications
&+$37(5
$33/,&$7,216

Any modern office uses some type of digital equipment. As the office
1HWZRUN expands, the requirements increase, and sooner or later the office will
$UFKLWHFWXUH need to communicate with another office. We can provide a digital
3ULQFLSOHVDQG network among offices using either existing line plant or installing new line
$SSOLFDWLRQV plant. A direct point to point connection between two users is relatively
easy to organize. Interfacing the user to the network requires signaling
and timing compatibility, which is typically achieved by G.703 interfacing
at 64 Kb/s.
&RQFHSWRI When more than two users wish to communicate to each other, there is
1HWZRUN an added problem: does the line go from A to B, then on to C, or is there
$UFKLWHFWXUH something better? Network architecture is a term used to describe the
ways to arrange the interconnection of more than two users. It can be
applied to a relatively modest connection, perhaps within one office
complex or to connections outside.
/RFDODQG:LGH When network users are fairly close together, typically up to 5 km, the
$UHD1HWZRUNV network is called a Local Area Network (LAN). A wider network is called
Wide Area Network (WAN). A third term is sometimes used to refer to
citywide systems: Metropolitan Area Network (MAN). There are
differences among these three. For example, LANs are usually privately
owned by a single organization. In some circumstances, a LAN in one
area might need to communicate with a LAN in another area; hence,
WANs and MANs have developed.
Satellite Earth stations are often involved as part of a WAN because they
carry traffic among distant locations. Often, small Earth stations are
installed at user locations in the IBS applications.
1HWZRUN Network topology refers to a physical connection among the users, and is
7RSRORJ\ like a network map. There are a number of basic layouts, each having its
own merits. We shall discuss five of them.
Star Network:
Figure 4.1 illustrates a Star network topology. Each user, or node, is
connected to a central point, and inter-user communication has to transit
through the central point. As each user operates independent of others, a
failure at one user would not cause a major network problem. The central
point is a critical area, and hence, it is normally provided with redundancy.
A star may be expanded either directly from the center, or in a
hierarchical manner from one or more nodes. The node selected would
then become the center point of another star.
Figure 4.1 Star Network
Figure 4.2 Ring Network
Figure 4.3 Bus Network
Figure 4.4 Tree Network
Figure 4.5 Trellis Network
Ring Network:
Figure 4.2 illustrates a Ring network, and is characterized by user-to-user
(node-to-node) connections forming a complete circle. Each user is
connected to two others. If one user fails, the whole ring may go out of
service, and a second ring may be needed to restore service. Despite this
disadvantage, ring topologies are popular in LANs, particularly for high-
speed networks.
Bus Network:
Figure 4.3 illustrates a Bus network. It is made up of a common medium,
to which each user is individually connected. One user temporarily
controls the bus and hence the control is often distributed. An alternative
method of control is to poll each user, who has a unique address, from a
central device. Advantages include the ease of adding new users and
minimal cable runs. This type of network is in wide use for LANs, and is
commonly used to control test equipment. Hewlett Packard Interface Bus
HPIB, GPIB, and IEEE 488 are some examples.
Tree Network:
Figure 4.4 illustrates a Tree network that is used on long distance
networks, such as WANs or MANs. It operates in a hierarchical manner,
and awards various users different levels of responsibility. Lower level
users are connected to higher level users who combine traffic from
several sources. Typical applications include a public telephone network,
or a synchronization hierarchy for PCM systems.
Trellis or Mesh Network:

Figure 4.5 illustrates a Trellis network, and is important in high capacity
systems because it offers complete connectivity with built-in redundancy.
It is an expensive network; consequently, it is mostly used in high
capacity switched networks, where network reliability is important.
1HWZRUN Satellite communication systems use many of these network topologies.

7RSRORJLHVLQ For example, the Engineering Service Circuit (ESC) system used by
INTELSAT is a variation of the Bus network, where the satellite is the
6DWHOOLWH6\VWHPV medium and each corresponding station has its own address. A satellite
TV system may be considered a version of a star network, where the
satellite is the center of the star, with one station transmitting to it and
many receiving from it. The INTELSAT FDMA communications systems
use a Trellis or Mesh type of network.

'DWD1HWZRUN To provide data communication among users, the terminal equipment at
&RPSDWLELOLW\ the two ends has to be compatible to operate. This is relatively easy to
organize if the same supplier provides both the terminals, but it is not
DQG,62 practical always.
Consider, for example, the problem of connecting data equipment at an

Australian gold mine with data equipment operated by an international
bank in Switzerland. Almost certainly, the equipment at either end would
have been manufactured by two different companies, the data protocols
and the codes used may be different. In order to operate successfully, all
these difficulties have to be overcome.
Commercial considerations have slowed progress towards designing and

adopting a truly international standard, yet the ITU-T and the International
Organization for Standardization (ISO) have produced plans, which are
gradually being adopted.
,622SHQ The ISO Open Systems Interconnection (OSI) is a plan designed to deal
6\VWHPV with the problems related to interconnecting. The plan is largely a matter
,QWHUFRQQHFWLRQ of common sense, but is defined in rather formal terms. Each interfacing
problem is dealt with separately in what is known as network layers.
Seven discrete layers have been identified. Figure 4.6 illustrates this
concept.
3K\VLFDO/D\HU Physical layer provides electrical, mechanical, and functional connections

OD\HU between two local networks. It is concerned with the passing of raw data
between the terminal and the network.
'DWD/LQN/D\HU Data link layer provides the synchronization and error control for the
OD\HU information that is transmitted over the physical link. The data link layer’s
task is to take a raw transmission facility and transform it into a line that
appears free of transmission errors to the network layer. It accomplishes
this task by organizing the input data into data frames, transmitting the
frames sequentially, and processing the acknowledgement frames that
the receiver returns.
1HWZRUN/D\HU Network layer provides means to establish, maintain and terminate the
OD\HU switched connections between end-systems. Included are addressing
and routing functions. The network layer, sometimes called the
communication subnet layer, controls the operation of the communication
network.
LAYERS LAYER FUNCTIONS LAYERS
7. Provides user interface to

7. APPLICATION lower levels 7. APPLICATION
6. Provides data formatting and

6. PRESENTATION code conversion 6. PRESENTATION
5. Handles coordination
5. SESSION between processes 5. SESSION
4. Provides control of quality

4. TRANSPORT of service 4. TRANSPORT
3. Sets up and maintains

3. NETWORK connections 3. NETWORK
2. Provides reliable data transfer

2. DATA LINK 2. DATA LINK
between terminal and network
1. Passes bit stream to and

1. PHYSICAL from network 1. PHYSICAL
PHYSICAL MEDIUM
Figure 4.6 ISO Open Systems Interconnection (OSI) Model
7UDQVSRUW/D\HU Transport layer provides end-to-end control and information interchange

OD\HU with the level of reliability that is needed for the application. The services
provided to the upper layers are independent of underlying network
implementation. The transport layer controls the quality of service. The
basic function of the transport layer, also known as the host-host layer, is
to accept data from the session layer, split it up into smaller units, if need
be, pass them to the network layer, and ensure that all the pieces
correctly arrive at the other end. All this must be done in the most
efficient way, and in a manner that isolates the session layer from the any
changes in the hardware technology.
6HVVLRQ/D\HU Session layer is the point at which each separate call is set up, and
OD\HU terminated.
3UHVHQWDWLRQ Presentation layer is the stage where data are put into a usable form.
/D\HUOD\HU Code conversion, encryption, and text compression are examples of the
process that could occur here.
$SSOLFDWLRQ Application layer is where the end user interfaces directly with the
/D\HUOD\HU network.
/D\HU Each layer in one organization works directly with the same layer in any
&RPSDWLELOLW\ other organization, and provides whatever interfacing is required to
connect between the higher layers and the network.
(DUWK6WDWLRQ INTELSAT provides a physical connection among the Earth stations, and
,QYROYHPHQW as such provides the level 1 layer of the OSI model. This is true for IDRs
and IBSs applications. In IBS applications, INTELSAT leaves it to users to
arrange higher levels themselves, whereas in IDR services, INTELSAT
becomes involved with number of layers. For example, layer 2, the data
link layer, may be a G.703 interface. Layer 3, the network layer, may be a
digital switch, setting up the paths as required. Layer 4, the transport
layer, would involve error checking, and layer 5 will actually start and
finish a call. INTELSAT supports the OSI model, and encourages users to
apply existing standards and protocols whenever possible.

,QWHUPHGLDWH Telecommunication services have been moving from analog towards to
'DWD5DWHV digital systems. INTELSAT has introduced several digital services, and
one of the widely used ones is IDR.
,'5&DUULHUV
IDR has the capability to handle both voice and non-voice information.
The data rates used are termed intermediate, and range between 64 Kb/s
and 44.736 Mb/s. INTELSAT has approved IDR operation with Standard
A, B, C, E3, E2, F3 and F2 Earth stations in C-band as well as standards
E1 and F1 in Ku-band.
Use of Digital Circuit Multiplication Equipment (DCME) will increase the

number of channels that can be carried within an allotted bandwidth. This
will be discussed in some detail in Section 4.5.
$GYDQWDJHVRI Operating IDR services has many advantages; some are specific to IDR
2SHUDWLQJ,'5 while others result from the fact that IDR is directly compatible with most
digital multiplex equipment. Some of the advantages are:
&DUULHUV
a. Improved equipment reliability and flexibility, and reduced
equipment cost in terms of both purchase and maintenance.
b. Enhanced system flexibility - in addition to voice circuits, IDR

can support a range of data services.
c. Transparency - The satellite link must not impede or alter the

information transmitted across it. Transparency must be maintained from
ISC-to-ISC . This will result in significant reduction in Earth station
multiplex equipment, because IDR provides direct access to the first,
second and third order digital hierarchies. The IDR system is compatible
with both the European CEPT and non-CEPT hierarchies.
d. The potential capacity of the carriers can be increased by a

factor of five or more by using of DCME.
7UDQVPLVVLRQ Figure 4.7 shows a block diagram of an IDR link that includes an IDR
&KDUDFWHULVWLFV modem. As mentioned earlier, IDR data rates range from 64 Kb/s to
44.736 Mb/s. This is the information rate and is the bit rate entering the
channel unit. Engineering Service Circuit/Channel (ESC) information is
then added to the carrier prior to applying FEC. It should be noted,
however, that the ESC is not mandatory on carriers smaller than 1.5
Mb/s. On carriers between 1.5 and 44.736 Mb/s, an overhead (OH) of 96
Kb/s for the ESC is mandatory.
As FEC - a method to correct errors by adding bits - requires introduction

of additional bits, the transmission rate of the data, before modulation, will
be greater than the information rate+ESC overhead. The data is
transmitted to the satellite using QPSK modulation. Each carrier has an
occupied satellite bandwidth of approximately 0.6 times the transmission
rate. The relationship between different data rates and bandwidths is
shown in Table 4.1.
INTELSAT V, VA, VA (IBS) and VI, IDR carriers employ FEC Rate 3/4
convolutional encoding with Viterbi decoding. For INTELSAT VII, VIIA,
VIII, 1X and K satellite series, it is mandatory for all Earth station modems
to be equipped to work with either Rate 1/2 or Rate 3/4. It should be
possible to independently select either the same or different FEC code
rates for the IDR modulator and demodulator. INTELSAT determines the
FEC code rate to be used for the purpose of maximizing transponder
capacity.
BASEBAND CHANNEL UNIT RF/IF
TERRESTRIAL
INTERFACE
- PROPAGATION
STATISTICS
CHANNEL UNIT IF/RF SYSTEM
OVERHEAD ADDITION UP
MULTIPLEX SCRAMBLER, FEC CONVERTER,
CODER, MODULATOR HPA
- E.I.R.P.
- UP LINK MARGIN - BO 1
- MUX FRAMING - MODULATION
STRUCTURE - OUTPUT SPECTRUM
- MULTI-DESTINATIONAL (FILTERING)
CAPABILITY - FEC CODING
- BUFFER CAPACITY - BER VS. Eb / No SATELLITE TRANSPONDER
G/T, SATURATION FLUX
- SLIP RATE - SCRAMBLING DENSITY, E.I.R.P.
- CLOCK ACCURACY - ORDERWIRES
- ALARMS
- PROPAGATION - BO 0
STATISTICS
CHANNEL UNIT
DEMODULATOR IF/RF SYSTEM
BUFFER DEMUX DECODER LNA, DOWN
DESCRAMBLER CONVERTER - CHANNEL
OVERHEAD CAPACITY
REMOVAL
- BER - G/T
- AVAILABILITY - DOWN LINK MARGIN
TERRESTRIAL
CLOCK
Figure 4.7 An IDR Link
Table 4.1 Transmission Parameters for INTELSAT Recommended IDR

Carriers with 3/4 Rate FEC
Information Overhead Data Rate Transmission Occupied Allocated

Rate(IR) Rate(OH) Bit/s Rate(TR) (Bit/s) Bandwidth Bandwidth
(Bit/s) (Kb/s) (IR + OH) (Hz) (Hz)
64 k 0 64 k 85.3 k 51.2 k 67.5 k

192 k 0 192 k 256.00 k 153.6 k 202.5 k
384 k 0 384 k 512.00 k 307.2 k 382.5 k
512 k 34.1 546.1 k 728.18 k 436.9 k 517.5 k
1.024 M 68.3 1.092 M 1.456 M 873.8 k 1057.5 k
1.544 M 96 1.640 M 2.187 M 1.31 M 1552.5 k
2.048 M 96 2.144 M 2.859 M 1.72 M 2002.5 k
6.312 M 96 6.408 M 8.544 M 5.13 M 6007.5 k
8.448 M 96 8.544 M 11.392 M 6.84 M 7987.5 k
32.064 M 96 32.160 M 42.880 M 25.73 M 30125.0 k
34.368 M 96 34.464 M 45.952 M 27.57 M 32250.0 k
44.736 M 96 44.832 M 59.776 M 35.87 M 41875.0 k
Notes:
1. The above table illustrates parameters for recommended carrier

sizes. However, any other information rate between 64 Kb/s and
44.736 Mb/s may also be used.
2. For information rates of 10 Mb/s and below, carrier frequency

spacing will be odd integer multiples of 22.5 kHz. For higher rates,
they will be any integer multiple of 125 kHz.
)RUZDUG(UURU
FEC is a method to correct errors by adding extra bits in a special code. It
&RUUHFWLRQ is required to achieve optimum use of satellite power and bandwidth to
)(& give the required Bit Error Rate (BER). FEC is discussed in Section 3.8.
0RGXODWLRQ Phase Shift has been chosen for IDR because of the necessity to
maintain a constant envelope on the transponder. Biphase, Two-Phase,
shift-keying modulation (BPSK) is the simplest form of PSK where the
phase shift changes with each new data bit. In this case, a binary source
code is mapped one bit at a time into a pair of phase states with 180
degrees phase difference.
Quadrature Phase Shift Keying (QPSK) encodes each pair of bits into
one of four phases. One of the principal advantages of QPSK over BPSK
is that QPSK achieves the same power efficiency as BPSK with only half
the bandwidth. QPSK is of particular importance for satellite data
transmission and therefore for IBS and IDR. The name “four phase” or
“quadriphase” refers to the fact that one carrier is modulated along a 0-
degree, 180-degree phase vector (the in-phase or cosine channel),
sometimes called the P channel or A channel. The other carrier is
modulated along a 90-degree, 270-degree phase vector (the quadrature
or sine channel), sometimes called the Q channel or B channel.
0RGXODWRUV A typical QPSK modulator is shown in Figure 4.8. The input data stream
(1) is converted into two analog multilevel signals, (2) by alternately
selecting each bit out of the D/A converter that also performs signal
processing. These two signals are mapped and correctly shaped at (3) to
modulate carriers, which are arranged to have a quadrature phase
relationship. These two-biphase shift-keyed modulated carriers (4) are
summed to get a four-phase shift key modulated carrier (5). This process
converts the baseband digital input signal into a modulated IF output
signal.
PHASE SHIFTER
(RETARDS BY 90 o )
π CARRIER
2 OSCILLATOR
DATA A OUTPUT
1001 1 0 0 1
LOW-PASS MOD (d) (c) (b) (a)
FILTER 1 ’A’ PHASES 1,1 0,1
1
CONVERTER 0,0 1,0
AND SIGNAL 2 3 4
PROCESSOR
1 5
0
0 ’B’ PHASES
LOW-PASS MOD
1
FILTER 2 1,1
0
0
DATA B
1
1010
1 1 0 1 0
0,1 1,0
(e)
0,0
Figure 4.8 Quadrature Phase Shift Keying (QPSK) Modulator
The actual QPSK process is described below:
1. Input data 11001001 goes into the converter and signal processor.
2. Data are split into two streams of A data and B data, filtered at (3) and
applied to the A and B BPSK modulators. The output consists of two
phases of either 1 or 0.
3. Modulator 1 is phase shifted by 90 degrees with respect to

Modulator 2.
4. The first pair of bits is “1” on the A data stream, and “0” on the B data
steam, giving two vectors at point (a), which combine by vectoral addition
to give a 1,0.
5. The next pair is 0,1 at point (b).
6. The next pair is 00 at point (c).
7. The next pair is 11 at point (d). These four vectors are combined as
shown at point (e), which is the vector diagram for the four-phase state.
'HPRGXODWRUV Figure 4.9 shows a digital demodulator for the receive carrier. The
received signal (1) is band-limited at band pass filter (BPF) and divided
into two signals (2). These signals are low-pass filtered (3) and detected
by the local carrier recovery circuit, which provides two signals in a
quadrature relationship (4). The signals detected after low-pass filtering
are the demodulated signals, each having an amplitude corresponding to
the input signal vector position. The analog-to-digital converter changes
these signals back into the original data signals (5). Operation of the
demodulator requires the provision of a carrier recovery circuit to give
reference timing as well as a symbol timing recovery circuit.
0XOWLSOH$FFHVV The data blocks are configured in the satellite transponder in a Frequency
Division Multiple Access (FDMA) mode. Multiple operators radiating
carriers at the same time, each carrier being separated in frequency,
make multiple access possible. The system is thus the same type of
access method as the current analog multiple access systems with which
you should be familiar.
LOW-PASS
FILTER
DATA
A
1 2 o 3 4
90
A/D AND
BAND-PASS PHASE CARRIER SYMBOL TIMING SIGNAL
FILTER SPLITTER RECOVERY & RECOVERY PROCESSING
0 o
DATA
B
LOW-PASS
FILTER
Figure 4.9 Block Diagram of a QPSK Demodulator
(DUWK6WDWLRQ The conversion of an existing Earth station from analog operation to IDR
(TXLSPHQW must be carefully planned. An important consideration is the stringent
frequency stability requirement for digital carriers.
One problem is that the phase demodulator can detect other phase
signals as data, thus introducing errors in the receive data. A major
cause of this is due to the use of Analog-Up/Down Converters for IDR,
that have poor phase noise performance.
Phase noise can be divided into two categories.
• Discrete Signals, which are caused by vibration or power fluctuations,

i.e., distinct components.
• Random Signals, which are caused by a modulating signal consisting

of random frequencies shown as a continuous spectrum over a wide
range of frequencies, i.e., oscillator drift.
Figure 4.10 shows an RF signal consisting of a carrier frequency and side

phase noise spectrum with discrete noise spikes displayed at evenly
spaced frequencies.
AMPLITUDE
CARRIER
DISCRETE
SIGNAL NOISE PHASE NOISE
FREQUENCY
Figure 4.10 RF and Phase Noise Side-band Spectrum
+RZGRZH Although there are a number of methods, it is difficult to measure phase

PHDVXUHSKDVH noise in a working Earth station. However, with a high quality spectrum
QRLVH" analyzer capable of a resolution bandwidth of 10 Hz or less, and a video
bandwidth of 1 Hz, a measurement can be made, provided a stable
reference source is available.
Figure 4.11 shows a typical "in station" phase noise test setup. The setup
includes the transmit side as well as the receive side.
The up-converters/down-converters, HPAs and LNAs are similar for both

analog and IDR working, except for the tighter specification for frequency
stability on digital carriers.
25 dBW
PATH UNDER TEST
SYNTHESISED HPA
SIGNAL UP-CONVERTER
GENERATOR
RF. MON 0dBm
40
dB
-40 dBm
ATTN. SET TEST

TO 6.6dB TRANSLATOR
-55 dBm -31.6 dBm

-61.6 dBm
SPECTRUM DOWN 30 dB
CONVERTER SPLITTER LNA FROM
ANALYSER
Rx
FEED
PORT
Figure 4.11 Phase Noise Test Setup
6FUDPEOLQJ Scrambling (energy dispersal) is a mandatory requirement to reduce the

maximum power flux density in accordance with ITU-R Recommendation
358-3, and to meet the off-axis e.i.r.p. density criteria in accordance with
ITU-R Recommendation 524-3. To accomplish this, a data scrambler is
employed at the transmit Earth Station. This scrambler is self-
synchronizing and a single error in the received data stream can produce
3 errors over an interval of 20 bits (error extension). For this reason, the
FEC encoder must follow the scrambler at the transmit Earth Station. At
the receive Earth Station, the descrambler must follow the decoder.
Figure 4.12 shows a typical scrambler. The actual scrambler as used on
IDR is shown in Figure 15 of IESS-308.
The action of the transmit scrambler illustrated in Figure 4.12 can be

described as follows, assuming a stream of 1’s at the input to gate 2:
1. As can be seen from the Logic Table, the initialization

sequence shown on the figure - having a 1 and a 0 at its
"Exclusive-Or" gate number 1 input -will give a 1 on the output
going to gate 2.
2. Gate 2, with a 1 at the input and a 1 as the enable signal at

the second input, will produce a 0 at its output.
3. The shift register will step in and register 14/15 will become 00
to gate number 1. This gives a 0 output to gate number 2 that,
with a 1 in for input data, produces a 1 out.
4. The shift register clocks on, and the input to gate number 1 is
now 1,0, which will give 1 to the input of gate 2. If another 1 is
on gate 2, the output will be a 0.
5. Gate number 1 with 0,1 at its input will give 1 to gate number
2, and if the second input of gate 2 is a 1, then the output of
gate number 2 will be 0, and the action continues, dependent
on the incoming data.
The same circuit is used for the descrambling sequence.
INPUT A
DATA B A C
1
INITIALIZATION B
SEQUENCE
2 SYMBOL
C 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A
C
B
SCRAMBLED SHIFT REGISTER CLOCK

DATA OUT
FUNCTION
SCRAMBLED
DATA IN EXCLUSIVE OR
SHIFT REGISTER CLOCK
LOGIC TABLE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A B C
0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0
0 1 1
INITIALIZATION 1 0 1
SEQUENCE C 1 1 0
A
B 1 B
A
2
OUTPUT
DATA
Figure 4.12 Typical Scrambler/Descrambler
4XDOLW\RI IDR carriers have been designed to provide a service in accordance with
6HUYLFH ITU-R Recommendation 522-2, Recommendation 614, and
Recommendation 579-1. INTELSAT will provide sufficient power from the
satellite to ensure certain minimum BER performance. Refer to Tables
4.2, 4.3, and 4.4.
Table 4.2 IDR Performance

(G-821 Quality INTELSAT V, VA,VA (IBS) AND VI)
Weather condition Minimum BER Performance

(% of year)
Clear sky a 10-7 for 95.9%
Degraded a 10-6 for 99.36%
Table 4.3 IDR Performance

(G-826 Quality INTELSAT VII, VIIA, VIII and K)

(% of year)
Clear sky a 2 x 10-8 for 95.9%
Degraded a 2 x 10-7 for 99.36%
Degraded a 7 x 10-5 for 99.96%
Table 4.4 IDR Performance (optional)

(G-826 Plus Quality INTELSAT VII, VIIA, VIII and K)

(% of year)
Clear sky a 10-9 for 95.9%
(,53 Under clear sky conditions and light winds, the e.i.r.p. will be maintained
6WDELOLW\ to within ± 0.5 dB for Standard A, B, C, and F3 stations, and ± 1.5 dB for
Standard E2, E3, and F2 stations of the nominal value assigned by
INTELSAT. The tolerance includes all factors causing variation, such as
HPA output power instability, antenna transmitting gain instability,
antenna beam pointing error, and tracking error.
In the event of severely adverse local weather conditions, the 6 GHz

power flux density at the satellite may be permitted to drop 2 dB below the
nominal setting, recognizing, however, that this will result in a degraded
channel performance at receiving Earth stations.
For 14 GHz, the drop in power flux density at the satellite may be
between 5 dB and 7 dB of the nominal setting between 0.01 and 0.04
percent of the year, depending on the satellite and the beam being used.
Should power control devices be used, it is recommended that when the

up-path excess attenuation is greater than 1 dB, control of transmitter
power should be applied to maintain the power flux density at the satellite
to within ± 1 dB of nominal, to the extent that it is possible with the total
power control range available.
)UHTXHQF\ The RF tolerance (maximum uncertainty of initial frequency adjustment

7ROHUDQFH plus long term drift) on all Earth station transmitted carriers shall be ±
0.025R Hz up to a maximum of ± 3.5 kHz, where R is the transmission
rate in bits per second. Long term is assumed to be at least 1 month.
The Earth station receive chain frequency stability should be consistent

with the frequency acquisition and tracking range of the demodulator, but
as a minimum, it is recommended that it be no greater than ± 3.5kHz.
2XWRI%DQG Any out-of-band emissions must be at least 26 dB below the carrier,

(PLVVLRQV measured in a 4 kHz band as shown in Figure 4.13.
1 MHz 500 kHz 0 +500 kHz 1 MHz
-5
26 dB
-10
-15
-20
-25
-30
Figure 4.13 2 Mb/s IDR Carrier Spectrum
7LPLQJ The primary order 1.544 or 2.048 Mb/s digital signals in both directions of
$FFXUDF\ transmission shall be derived in one of three ways:
a. From a clock with an accuracy of 1 part in 1011: This means that

the clock may be derived from a national cesium beam reference or a
widely available reference (such as Loran-C) which has the required
accuracy.
b. From an incoming clock received from a remote Earth Station

by satellite: In this case, the remote Earth Station must derive timing by
method (a) above.
c. In cases where there is no synchronous digital network at either

end, but the channels are converted to analog voice circuits, the internal
clock of the PCM multiplex equipment is of sufficient accuracy (about 5
parts in 106).
As an emergency backup, a local clock with a long-term stability of at

least 1 part in 105 per month for cases (a) and (b) shall be available to
keep the circuit operating in case the primary clock source fails. The
emergency clock shall be tied to the primary clock unless there is a failure
of the primary clock.
%XIIHU&DSDFLW\ Buffers are required to perform two functions: Doppler shift and
plesiochronous buffering. The location and size of the buffers depend on
the system configuration and the satellite used, and should be selected
on a case-by-case basis. (Buffering is discussed in Section 3.5). A block
diagram of a plesiochronous and Doppler buffer is shown in Figure 4.14.
In most cases, receive side buffering will be performed at the primary

order bit rate. This means that for higher order IDR carriers, buffering will
be performed after the demultiplex equipment. The reason for this is to
rely solely on reference clocks at the primary order data rate, because
higher order clocks with 1 part in 1011 accuracy are not readily available
with existing national digital networks. Although this approach is
recommended, it can be agreed bilaterally to also transmit higher order
streams with a clock accuracy of 1 part in 1011 to allow buffering to be
performed at either the higher order data rate or the primary order rate.
Buffers should be reset whenever the channel suffers loss of service, and
when they reach saturation or become empty. For primary order data
streams which form part of an international plesiochronous digital
network, slips should consist of integer multiples of one complete
multiframe, to avoid loss of synchronization of the multiplex equipment.
DATA BUFFER DATA
CLOCK CLOCK
SYNCHRONOUS TO SYNCHRONOUS TO
SATELLITE NETWORK TERRESTRIAL
NETWORK
WRITE READ
COUNTER COUNTER
Figure 4.14 Block Diagram of the Plesiochronous Doppler

,'5 In recent years, many IDR carriers have been implemented in the
,PSOHPHQWDWLRQ INTELSAT system. Users generally find that the IDR carriers are no
more complex to introduce than additional FDM/FM carriers. Where
digital backhaul systems are available, or planned, the use of IDR carriers
,QWURGXFWLRQ is now simpler than the introduction of transmultiplexers that are needed
to connect such backhaul systems to analog carriers.
In most cases, it is possible to use existing up-converter and down-

converter equipment used for FDM/FM carriers, provided they satisfy the
IDR frequency stability and phase noise requirements. Some users have
found it possible to transmit several IDR carriers through a single Earth
station uplink, and maintain the necessary intermodulation performance
of the HPA. In cases where it is necessary to assign multiple carriers for
one link between two Earth stations, INTELSAT tries to assign these
carriers as close to each other as practicable.
0XOWLSOH[LQJ The G.700 series of ITU-T Recommendations describes the multiplexing

6WDQGDUGVDQG and framing structure of the digital information streams to be used on the
recommended IDR carrier sizes of 1.544 Mb/s and above. For other IDR
,QWHUZRUNLQJ carrier sizes, in the range of 1128 Kb/s to 2.048 Mb/s, the multiplexing
and framing structures which have been defined for the IBS Open
Network (IESS-309), or other mutually agreeable structures could be
used.
The advent of IDR carriers and other digital transmission systems for use
on international routes has raised the issue of interworking between
countries whose national networks are based on different digital
hierarchies and speech encoding laws.
Recognizing this, the ITU-T initiated an accelerated procedure to approve

Recommendations for interworking. The main factors to be considered in
interworking are the basic multiplex rate (2.048 Mb/s or 1.544 Mb/s), the
speech encoding characteristics (A-law or 1-law), and the selection of a
suitable multiplexing hierarchy, which will be compatible with the networks
involved. The ITU-T has revised the text of Recommendation 702 that
addresses these factors, and the principal points are summarized below.
a. For operation between networks using different primary levels

(2.048 Mb/s and 1.544 Mb/s), the interworking hierarchy should be 2.048
- 6.312 - 44.736 - 139.264 Mb/s. To accommodate this, the ITU-T
approved a new Recommendation, G.747, which defines second-order
digital multiplex equipment operating at 6312 Mb/s that multiplexes three
tributaries of 2.048 Mb/s.
b. For PCM operation between networks using different speech

encoding laws (A-law and µ-law), the international link will use A-law
encoding, and the µ-law conversion will be performed in the country
operating the µ-law network.
c. For operation between networks using different primary levels

(2.048 Mb/s and 1.544 Mb/s), the 1.5/2 Mb/s Multiplex System
Conversion function shall be implemented in the country operating the
1.544 Mb/s network. The Multiplex System Conversion function
embodies the following properties.
• Termination of a digital link operating at a digital hierarchical level of

1.544 Mb/s.
• Termination of a digital link operating at a digital hierarchical level of
2.048 Mb/s.
• Rearrangement of 64 Kb/s channels between 1.544 Mb/s and 2.048
Mb/s digital terminations.
(,53 The selection of the RF and IF characteristics for IDR is guided by the
principle that the parameters and equipment would be similar to that used
5HTXLUHPHQWV in the SCPC and FDM/FM systems. This means that e.i.r.p. requirements,
5DLQ0DUJLQV rain margins, and HPA size should be equivalent to or less stringent than
DQG8SOLQN the SCPC or FDM/FM requirements, wherever possible. One item, which
3RZHU&RQWURO requires particular attention, is the phase noise characteristic of the Earth
station up and down chains.
(DUWK6WDWLRQ Replacing an FDM/FM link with an IDR Link

(TXLSPHQW
Figure 4.15 shows a block diagram of the new arrangement wherein the
&RQILJXUDWLRQV FDM/FM Channel unit is replaced by an IDR Channel unit.
Expansion of an IDR System:
Figure 4.16 shows a block diagram of an existing IDR system and the
QPSK modem needed to expand the system.
Single Destination IDR Implementation
Figure 4.17 shows a block diagram of single destination IDR

implementation with primary level terrestrial interface. The new IDR
equipment is situated between the national digital network and the Earth
station IF and RF equipment.
Single Destination Transmit, Multidestination Receive
Figure 4.18 shows a block diagram of equipment needed to implement

single destination transmit, and multidestination receive carrier systems at
an Earth station.
Multidestination 2.048 Mb/s IDR Carrier - 64 Kb/s
Figures 4.19, 4.20, and 4.21 show multidestination IDR 2.048 Mb/s carrier
applications with 64 Kb/s channels.
Multidestination IDR Higher Order Carriers
Figures 4.22, 4.23, and 4.24 show multidestination IDR higher order
carriers.
Diplexer
HPA LNA
Up Down
Converter Converter
FM/FDM IDR
Channel Unit Channel Unit
ESC Clock
DEMU MUX
X
From Radio To Radio
Relay Link Relay Link
Figure 4.15 Replacement of FDM/FM Link with an IDR Link
Diplexer
HPA LNA
Up Down
Converter Converter
IF Combining Network IF Splitting Network
Expansion
QPSK QPSK QPSK QPSK
QPSK
Modulator Modulator Demodulator Demodulator
Modem
From MUX Equipment To MUX Equipment
Figure 4.16 Expansion of an IDR System
IF/RF Chains
QPSK QPSK
Modulator IDR Demodulator
Channel Unit
FEC Coder, FEC Decoder,

Scrambler 2.048 Mbit/s
Descrambler
Overhead Overhead
Addition Removal
Terrestrial
ESC
Interface Buffer
DEMUX or 10 -11 Clock MUX or

Cross-Connect Cross-Connect
To/From National Digital Network
Figure 4.17 Single Destination IDR Implementation

with Primary Level Terrestrial Interface
IF/RF Chains
8.448 Mbit/s
Satellite Group
Primary Delay Equalizer
Level Carrier
(2.048 Mbit/s)
QPSK QPSK
Modulator Demodulator
FEC Coder, FEC Decoder,

Scrambler Descrambler
Backward
Alarm
Overhead
Overhead Removal
Addition
8.448 Mbit/s
2.048 Mbit/s
DEMUX
2.048 Mbit/s
Clock* 10 -11 Clock Buffer

Extractor
Figure 4.18 Single Destination Transmit, Multidestination Receive Carrier
Earth Station "A" (West)
15 Channels to "B" 2.048 2.048

30 G.732 Mbit/s QPSK Mbit/s
64 kbit/s 15 Channels to "C" MUX MOD
Channels To
"B" and "C"
10 -11 Backward
15 Clock alarms
Channels
2.048 2.048
From "B"
G.732 Mbit/s QPSK Mbit/s
Buffer
DEMUX DEMOD From
Not "B"
Used
10 -11
Clock
30
64 kbit/s
Channels 15
Channels
From "C"
2.048 2.048
G.732 Mbit/s QPSK Mbit/s
Buffer
DEMUX DEMOD From
Not "C"
Used
10 -11
Clock
Figure 4.19 Multidestination 2.048 Mb/s IDR Application:

2048 Mb/s Carrier with 64 Kb/s Channels
IF/RF Chains
Primary Level Primary Level Primary Level

To B and C From E/S B From E/S C
QPSK QPSK QPSK

Modulator Demodulator Demodulator
Backward
Alarms
Overhead Overhead Overhead
Addition Removal Removal
ESC ESC
Buffer Buffer
Digital 10 -11 Clock

Cross-Connect
Digital
Cross-Connect
Terrestrial Interface Primary Level
Figure 4.20 Multidestination 2.048 Mb/s IDR Carrier Implementation

with Individual 64 Kb/s Channels (Station A)
Earth Station "B" (West)

2.048 From "A"
From QPSK Mbit/s G.732
Buffer DEMUX (15-64 kbit/s Channels)
"A" DEMOD
Not Used (To "C")
Backward 10 -11 Backward

Alarm Clock Alarm
To To "A"
QPSK 2.048 Mbit/s G.732
(15-64 kbit/s Channels)
"A" MOD MUX
Not Used
10 -11 (Or to Other E/S)
Clock
Earth Station "C" (East)

Not Used (To "B")
2.048
From QPSK Mbit/s G.732
Buffer From "A"
"A" DEMOD DEMUX
10 -11 Backward
Backward
Clock Alarm Not Used
Alarm
(Or to Other E/S)
To QPSK 2.048 Mbit/s G.732
"A" MOD MUX To "A"
10 -11
Clock
Figure 4.21 Multidestination 2.048 Mb/s

IDR Application with 64 Kb/s Channels
IF/RF Chains
Higher Order Carrier Higher Order Carrier 2.048 Mbit/s Carrier

To B and C From B From C
Satellite Group Satellite Group

Delay Equalizer Delay Equalizer
QPSK QPSK QPSK

Modulator Demodulator Demodulator
Overhead Overhead Overhead

Addition Removal Removal
ESC ESC
High Order MUX Higher Order MUX

Buffer
(e.g., G.742) (e.g., G.742)
10 -11
To To Clock
Independent
E/S B E/S C
Buffers From
E/S B
Terrestrial Interface
DEMUX or MUX or
Cross-Connect Cross-Connect
1 Primary
Level Stream
From E/S B
Figure 4.22 Multidestination IDR Implementation - Higher Order Carriers
Earth Station "A" (West)

To "B" 8.448 8.448
4 - 2048 kbit/s To "B" G.732 Mbit/s QPSK Mbit/s
Streams To "B" MUX MOD
To "C" To
"B" and "C"
Backward
From "B" Alarm
8.448
8.448
Three Mbit/s
From "B" G.742 Mbit/s QPSK
Indep.
DEMUX DEMOD From
From "B" Buffers
"B"
Not Used
10 -11
4 - 2048 kbit/s Clock
Streams
Backward
Alarm
2.048
2.048 Mbit/s
From "C" Mbit/s QPSK
Buffer DEMOD
From
10 -11 "C"
Clock
Figure 4.23 Multidestination IDR Application - Higher Order Carriers
Earth Station "B" (East)

10 -11
Clock
8.448 From "A"
8.448 Three 3-2048 kbit/s
Mbit/s QPSK Mbit/s From "A" Streams
From DEMOD G.742 Indep.
DEMUX From "A"
"A" Buffers
Backward Not Used
Alarm Backward (To "C")
Alarm
8.448 8.448 To "A"
Mbit/s QPSK Mbit/s To "A" 3-2048 kbit/s
G.742
MOD To "A" Streams
To "A" MUX
Not Used
Earth Station "C" (East)
8.448
Mbit/s 8.448 Not used
QPSK Mbit/s G.742 (To "B")
DEMOD DEMUX
From "A"
Buffers 1-2048 kbit/s
Stream
10 -11
Backward Clock
Alarm
2.048
Mbit/s
QPSK To "A" 1-2048 kbit/s
MOD Stream
To "A"
Figure 4.24 Multidestination IDR Application - Higher Order Carriers

(QJLQHHULQJ To accommodate stations with operational IDR carriers, and those with
6HUYLFH&LUFXLWV advanced plans for operating such carriers, two sets of specifications
were formulated. The first set deals with carriers that were authorized
(6&IRU,'5 prior to June 1988, which are defined as previous equipment. The second
&DUULHUV deals with all carriers/equipment authorized after June 1988, defined as
new equipment.
3UHYLRXV For all data rates, previous equipment may continue to be used in the IDR
(TXLSPHQW system without modification under the conditions listed below. If it does
6SHFLILFDWLRQV not meet these conditions, the equipment would need modification to
meet the requirements defined for new equipment.
• Use of the equipment is restricted to single destination carriers.

• There is a bilateral agreement on the use of the equipment.
• The provision of ESCs by a method defined in the following
paragraphs continues to be available.
&RPPXQLFDWLRQ An Earth station operating IDR carriers in addition to other INTELSAT

WRDQGIURP services such as TDMA, DAMA, FDM/FM, or SCPC, will have access to
the ESC network via the other carriers. This ESC access will be used for
,17(/6$7 communication between the INTELSAT Operation Center (IOC) and the
Earth station. Figure 4.25 shows a typical ESC system management
configuration.
Where an Earth station operates only IDR carriers, but one of the
correspondents’ IDR Earth stations has access to the TDMA, DAMA,
FDM/FM or SCPC ESC network, communication between IOC and the
Earth station not having such access will be achieved via the Earth station
having such access. In the instances where none of the corresponding
Earth stations have access to the TDMA, DAMA, FDM/FM, or SCPC ESC
network, and no alternatives are available, communication will be
achieved via the public switched network.
SYSTEM
MANAGEMENT
SATELLITE
NETWORK
GATEWAY E/S
IOC DEDICATED TRAFFIC
4-W LINKS AOR E/S
ETAM
AOR
ROARING CREEK
AOR
IOC
ETAM
POR
= EARTH STATION
NOTE: THIS SYSTEM
BREWSTER CONFIGURATION IS
JAMESBURG SUBJECT TO FUTURE
= SATELLITE
IOR CHANGE
= SWITCHED ESC CONNECTION

(SYSTEM MANAGEMENT
NETWORK GATEWAY E/S) MADLEY
Figure 4.25 INTELSAT System Management

ESC Networks for IDR Carriers
&RPPXQLFDWLRQ When corresponding Earth stations have access to the TDMA, DAMA,
EHWZHHQ FDM/FM, or SCPC ESC network, such facilities shall be used. At Earth
&RUUHVSRQGLQJ stations equipped only for IDR carriers, it is necessary to provide two
voice channel units for engineering service circuits. These circuits must
(DUWK6WDWLRQV be available at the Earth station or at a designated control point capable
of communicating with the Earth station on a 24-hour basis. The two
voice circuits may either be provided as 64Kb /s or 32 Kb/s channels.
1HZ ESC facilities are not considered necessary on carriers with data rates of
(TXLSPHQW less than 1.544 Mb/s, because of their relatively small size. However, it is
6SHFLILFDWLRQV still mandatory that communication links between INTELSAT and the
corresponding Earth station be established in accordance with the
'DWD5DWHVOHVV specifications for Earth stations with previous equipment.
WKDQ0EV
'DWD5DWHV For data rates of 1.544 Mb/s and above, a 96 Kb/s, overhead-framing
JUHDWHUWKDQ structure has been formulated. The overhead structure has the capacity
0EV to carry two 32 Kb/s channels for digitized voice or voiceband data, one 8
Kb/s data channel, and four separate alarms. Each of these two voice
channels carries the combined speech plus five telegraph (S + 5Dx)
channels from the ESC equipment. The signaling conventions for the
voice and telegraph circuits are those used for current FDM/FM ESC
systems. The overhead unit on the transmit side takes the incoming data
and adds the overhead bits. No knowledge of the structure of the
incoming data is required for this process. On the receive side, the
reverse process occurs. The unit also detects faults within the system
and generates necessary alarm conditions.
,'5(6&8QLW Figure 4.26 shows a typical IDR ESC unit. The ESC unit accepts two
analog voice channels from the ESC console, digitizes the outgoing
signal at 32 Kb/s using ITU-T Recommendation G.721 ADPCM. It frames
the digital voice circuits, 8 Kb/s of data, backward alarms, and traffic data
into a single bit stream at a rate of 96 Kb/s over the traffic data rate. On
the receive side, the ESC unit deframes and separates these signals, and
delivers analog ESC voice to the ESC console. In addition, the receive
path includes an adjustable length buffer to accommodate plesiochronous
and Doppler clock shifts.
2YHUKHDG The frame structure is derived by adding 12 bits every 125 microseconds
)UDPH6WUXFWXUH resulting in a 96-Kb/s overhead rate. The allocation of bits within the
overhead is as follows.
- 4 bits per frame giving a total of 32 Kb/s, with 20 Kb/s for

frame and multiframe alignment, 4 Kb/s for backward alarms
to up to four destinations, and 8 Kb/s for digital ESC data
- 4 bits each per frame for the two ESC voice channels for a
total of 64 Kb/s
An 8-frame multiframe is defined to increase the uniqueness of the

alignment signal. Details of the overhead structure are shown in Figures
4.27, 4.28, and 4.29.
7LPLQJZLWKLQ Timing on the transmit side for the composite stream, information plus
WKH2YHUKHDG overhead, is derived from the incoming data. To protect the ESC circuits
against failure of the incoming data, a backup clock with a long-term
8QLW stability of 1 part in 105 must be available within the overhead unit. On the
receive side, the overhead unit derives its timing from a clock recovered
from the received data. Separate transmit and receive clocks at 32, 8,
and 1 kHz are generated by the unit for use by the ESC equipment.
TRAFFIC
DATA TRAFFIC +
ESC MOD OVERHEAD
Tx ESC DATA
TRANSMIT 96 kbit/s INTERFACE
CLOCK INTERFACE
MUX overhead RS-422
ANALOGUE ESC ADPCM

VOICE INPUTS ESC PROCESSOR
VOICE FRAMING/
8 kbit/s INTER- DEFRAMING
BACKWARD FACE AND ALARM
ALARMS UNIT
DATA
ESC ESC DEMOD
ESC DATA BUFFER INTERFACE
Rx INTERFACE RECEIVE
MEMORY MUX RS-422 TRAFFIC +
CLOCK
OVERHEAD
96 kbit/s
overhead
TRAFFIC
READOUT CLOCK
Figure 4.26 ESC Block Diagram
FRAME PERIOD
125 Ts
12 bits 193 bits or 256 bits DATA

OH (1544 kbit/s) (2048 kbit/s)
FIRST BIT
TRANSMITTED
BIT
FRAME NO. 1 2 3 4 5* 6 7 8 9* 10 11 12
1 0 1 0 0 V 1 V 2
2 1 A 1 d 1 d 2 V 1 V 2
3 0 1 0 0 V 1 V 2
4 0 A 2 d 3 d 4 V 1 V 2
5 0 1 0 0 V 1 V 2
6 1 A 3 d 5 d 6 V 1 V 2
7 1 1 0 0 V 1 V 2
8 1 A 4 d 7 d 8 V 1 V 2
FRAME AND MULTIFRAME ALIGNMENT, ESC VOICE CHANNELS

BACKWARD ALARM,
ESC DATA (FA, A, d)
Vi = ESC VOICE CHANNEL i BITS (i = 1,2); (Set to 1 if not used)
Ai = BACKWARD ALARM TO DESTINATION i (i = 1,2,3,4); no alarm = 0; Alarm = 1
di = ESC DIGITAL DATA (i = 1 to 8); (Set to 1 if not used)
8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)

OVERHEAD (OH) RATE = 12 BITS/125 s = 96 kbit/s
* Bits 5 and 9 in the Overhead Frame correspond to the first bits transmitted in
the ESC voice channels.
** d1 corresponds to the first bit transmitted in the ESC data channel.
Figure 4.27 Overhead Structure for 1.544 and 2.48 Mb/s IDR Carriers
SUB-FRAME PERIOD
125/3 = 41 2/3 s)
4 BITS OH
263 BITS DATA SUB-FRAME 1
(FA.A.d)
4 BITS OH
V1
4 BITS OH
V2
- 3 SUB-FRAMES = 1 FRAME (PERIOD = 125 s)

- ALLOCATION OF OH BITS IS SAME AS 1544 AND 2048 kbit/s CASE
- 8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)
- OH RATE = 12 BITS/125 s = 96 kbit/s
Figure 4.28 Overhead Structure for 6312 Kb/s IDR Carriers
SUB-FRAME PERIOD
125/3 = 41 2/3 s)
4 BITS OH
(FA.A.d)
4 BITS OH
V1
4 BITS OH
V2
- 3 SUB-FRAMES = 1 FRAME (PERIOD = 125 s)

- ALLOCATION OF OH BITS IS SAME AS 1544 AND 2048 kbit/s
- 8 FRAMES = 1 MULTI-FRAME (PERIOD = 1 ms)
- OH RATE = 12 BITS/125 s = 96 kbit/s
Figure 4.29 Overhead Structure for 8448 Kb/s IDR Carriers
)UDPHDQG Frame and multiframe alignment should be carried out using the
0XOWLIUDPH alignment signal that comprises of the 8-bit code inserted in the first bit of
$OLJQPHQW every frame, and the 3-bit code inserted in the second, third, and fourth
bits of every other frame. Frame and multiframe alignments are assumed
to have been lost when four consecutive alignment signals are received
with one or more errors. In this case, an appropriate alarm will be
generated, and a continuous alignment search will be initiated. Frame
and multiframe alignments are assumed to have been recovered when
the presence of a correct alignment signal is detected for the first time.

$ODUP&RQFHSWV IDR alarm concepts follow the alarm protocols formulated for digital
LQ,'5 multiplex equipment (ITU-T Recommendation G.732/G.733). Figure 4.30
shows the actions taken after detection of each specified fault condition.
The detection of faults and generation of alarms are handled by the
overhead unit.
FAULT (F) DETECTED ACTION (A) TO BE TAKEN
IN TO
LOCATION CONDITION STATION TERRESTRIAL TO SATELLITE
LINK **
FS1 * AS1 - AD1

IN STATION (S) FS2 * AS1 AH1 AD2
FA1 AS1 - AD1

FROM
TERRESTRIAL
LINK
FE1 AS1 AH1 AD2

FROM FE2 AS1 AH1 AD2
SATELLITE FE3 AS1 - AD2
FE4 AS2 - -
* This function is to be performed only if practicable.
** Actions to be taken to the terrestrial link (i.e., AH1) are not mandatory.
Figure 4.30 Fault Conditions and Consequent Actions
Following is a description of the faults and alarms shown in the table

above.
Faults in the Earth Station

FS1 Failure of the uplink equipment.
FS2 Failure of the downlink equipment.
From the Terrestrial Link

FA1 Loss of incoming signal (data or clock).
From Satellite
FE1 Loss of incoming signal.
FE2 Loss of overhead frame and multiframe alignment.
FE3 BER of 1 in 103 exceeded (measured on the overhead alignment
signal).
FE4 Alarm indication received from the distant Earth station (in bit 2 of
even frames in the overhead structure).
Alarms In the Earth Station

AS1 Prompt maintenance alarm generated - Urgent attention required
AS2 Deferred maintenance alarm generated - Nonurgent attention
To the Terrestrial Link

AH1 AIS applied to the outgoing information stream to indicate that a
fault has been detected, and to be used as a service alarm by the
terrestrial link.
To the Satellite
AD1 AIS applied to the outgoing information bit stream to indicate that
a fault has been detected, and to be used as a service alarm at the
distant end.
AD2 Alarm indication to the remote Earth station (i.e., backward alarm).
It is transmitted as rate "1" in bit 2 of even frames. In the case of
multidestinational carriers, it is transmitted only in the frames of the
multiframe that has been assigned to that particular carrier.
Action When a fault alarm is detected, ensure that traffic is not lost by
taking the appropriate action to switch in standby equipment and isolate
the faulty equipment that needs to be repaired.

'LJLWDO(6& Most of the analog ESC equipment is over 10 years old and is no longer
supported by the original equipment manufacturers. Accordingly,
INTELSAT has developed a digital ESC network to replace the aging
analog EDSC equipment.
INTELSAT’s digital ESC network provides a gateway to a variety of online

operational and technical services. The digital ESC creates an Extranet,
which is an extension of INTELSAT Intranet to customers via WAN.
Customers can search and view a variety of INTELSAT documents and

databases using a standard World Wide Web (WWW) browser on a
workstation PC.
In addition to the Extranet applications, customers can simultaneously

operate voice over the 64 Kb/s ESC channel. Many features, such as
station-to-station direct dialing to all Ocean Regions and direct dial to
INTELSAT internal extensions are available. The addition of Frame
Relay Access Device (FRAD) at the ESC Gateways has made facsimile
over ESC possible to stations with FRADs that support the facsimile
feature.
A separate handbook on Digital ESC has been prepared by INTELSAT

and readers can refer to this document for details on implementation and
other information.

7'0$DQG Detailed information of TDMA and Space Switched (SS-TDMA) theory is
667'0$ available in the INTELSAT training publication entitled Time Division
Multiple Access: INTELSAT’s Cost Efficient Community Service- TDMA.

,17(/6$7 The IBS, first introduced in 1983, provides a full range of international and
%XVLQHVV6HUYLFH domestic digital private network business communications. It can be
used by a variety of large and small Earth stations using teleports, or
,%6 customer premise Earth stations. Services can be simplex or duplex, and
include single channel or multiplexed data, voice, and digital video
applications. IBS may NOT be interconnected with the Public Switched
Telephone Network (PSTN).
,%6 The applications of IBS are many, varied, and continuously expanding.
$SSOLFDWLRQV They include:
Data Communications Applications:
Dedicated private line networks

INTERNET
Interconnecting computers
Interconnecting local, wide, and metropolitan area networks
Electronic Data Interchange (EDI)
Electronic Mail (email)
Public switched data applications (56 and 64 Kb/s)

ISDN applications
Document, news, and financial data distribution
Database updating
Facsimile
Voice Communications Applications:
Digital voice
Interconnecting corporate PABX’s and private networks
Dedicated private line networks
High quality audio or radio program distribution
Video Communications Applications:
Videoconferencing
Digital TV
Service Summary
- Provides digital services for businesses

- Carriers are sized by information data rate, overhead, and FEC rates.
- Individual carriers or full and fractional transponder leases may be used.
- Leased on an individual, unidirectional basis
- Normally provided in either carrier or transponder pairs for full duplex
service.
Modulation
QPSK/FDMA, TDM/QPSK/FDMA, or QPSK/TDMA/FDMA
7UDQVPLVVLRQ Different sized carriers are defined for tariff and allocation purposes,
3DUDPHWHUV desired grade of service, and for the Earth station size. Carrier sizes are
defined in increments of 64 Kb/s. An allowance is made of 10 percent for
overhead, and either FEC Rate 1/2 or 3/4 may be specified. "Open
Network" operation is defined in IESS-309. "Closed Network" allows
users greater freedom than open network options for choosing
modem/framing unit equipment, and to design links with different grades
of service or data rates. Any Circuit Multiplication Equipment (CME) may
be used.
"Basic IBS" for C-band uplinks meets the error performance objectives of
ITU-R Recommendation 614 for ISDN connections. For Ku-band uplinks,
this meets an availability objective of 99 percent.
"Super IBS" is an alternative which provides availability at Ku-band

equivalent to that at C-band by also meeting the ITU-R Recommendation
614 for ISDN connections.
Service quality within leases is determined by the transmission plan.
&RQQHFWLYLWLHV Basic C-to-C, Ku-to-Ku

Enhanced C-to-Ku, Ku-to-C
(DUWK6WDWLRQV A wide variety of Earth stations is possible, and the small Standards E1
and F1 can be type-accepted. IBS Earth station characteristics are
summarized below.
Frequency E/S G/T Antenna Diameter

Band Standard (dB/°k) (Meters)
________________________________________________________
C A 35.0 15.0 - 17.0

B 31.7 11.0 - 13.0
F3 29.0 9.0 - 10.0
F2 27.0 7.5 - 8.0
F1 22.7 4.5 - 5.5
Ku C 37.0 11.0 - 13.0

E3 34.0 8.0 - 10.0
E2 29.0 5.5 - 6.5
E1 25.0 3.5 - 4.5
Note: All Earth station standard performance characteristics are provided

in the INTELSAT Earth Station Standards (IESS).

,17(/1(7 INTELNET was first introduced in 1984 to provide business data
networks, and is now the most flexible of INTELSAT’s business services.
Each customer can define their network characteristics and implement
them within capacity allotments for 100 kHz to 72 MHz in 100 kHz
increments. The customer can choose between ground and space
segment costs trade-offs for either international or domestic voice and
data networks. There are no restrictions on antenna size which makes
the service ideal for VSAT and customer premise applications.
$SSOLFDWLRQV Data Communications Applications:
• News distribution and wire services

• INTERNET
• Photo and Image transmission
• Point of sale transactions, inventory control
• Credit/Debit card transactions
• Reservation systems for airlines, hotels and car rental
• Corporate data networks
• Financial data networks, automated tellers, stock markets
• Electronic trading networks
• Oil industry networks
• Weather and environmental service networks
Voice Communications Applications:
• Voice/audio networks
• Audio and radio program channels
Video Communications:
Videoconferencing
Modulation
Any modulation technique and satellite access may be used.
7UDQVPLVVLRQ Customers, who can design their own transmission plans, decide these.
3DUDPHWHUV INTELSAT assesses the plan to ensure that other customers are not
adversely affected. Parameters must meet those defined in IESS-410
(INTELSAT Leased Transponder Definitions and Associated Operating
Conditions.) CME may be used. The user determines service quality.
Any available satellite beam can provide coverage. Service can be
provided in the cross-strapped mode if the capacity has already been
configured for cross-strap operation.
(DUWK6WDWLRQV Earth stations must comply with the Standard G specifications for
international applications and Standard Z specifications for domestic
applications, or they must be approved by INTELSAT as nonstandard
Earth stations.
Standard G IESS-601
Standard Z IESS-602
Leases IESS-410
Type acceptance for INTELNET terminals is possible, as described in

SSOG-200.

&LUFXLW The first milestone in speech processing was achieved in the late 60’s
0XOWLSOLFDWLRQ through ITU-T Recommendation G.711 for PCM coding of telephone
(TXLSPHQW signals. PCM of 64 Kb/s has a high degree of robustness to transmission
errors and offers adequate performance to speech and voice band data.
In the early 80’s, developments in digital signal processing techniques

activated discussions on new speech processing techniques to improve
the transmission system’s efficiency and reduce the circuit transmission
costs. As a result, the circuit multiplication idea was fashioned.
Circuit multiplication can be performed using one of the following two

approaches:
a) Digital Circuit Multiplication Equipment (ITU-T Recommendation G.763

modified and ITU-T Recommendation G.766), when equipped with the
facsimile demodulation/remodulation option.
b) Packet Circuit Multiplication Equipment, which uses the packet switch

philosophy (ITU-T Recommendations G.764 and G.765).
Users can take advantage of circuit multiplication because the savings in

recurring transmission media costs offset the investment in circuit
multiplication equipment. However, the choice of circuit multiplication
approach that suits a specific user (DCME or PCME) depends not only on
the technology, but also on the applications the user offers its customers,
the network configuration, and the long-term network planning. As a way
to encourage DCME use, INTELSAT offers the DCME Link Dimensioning
(DLD) program on request.
Both circuit multiplication approaches use DSI and ADPCM. (ADPCM

has been discussed in Section 2.3.) A brief explanation of DSI follows.
'LJLWDO6SHHFK
Digital Speech Interpolation is used to concentrate a number of channels
,QWHUSRODWLRQ (trunks) onto a smaller number of output channels (bearers). The original
'6, number of trunk channels is then recovered at the distant end, using the
reverse process.
DSI operates on the basis that connection of a trunk channel to a bearer

channel is assigned only when the speech is active. Idle time is inherent
to the human conversational behavior. Because one direction of
transmission is active only for 30 - 40 percent of the time in average
conversations, 60 to 70 percent of the transmission time is wasted when
no DSI is used.
During a normal telephone conversation the two partners will not talk at
the same time--one talks and the other listens. Moreover, the one
speaking will not only produce words and silence between words, he will
take time breathing or thinking after an inquiry while the other party simply
listens. DSI takes advantages of this phenomenon by disconnecting the
circuit during the silence periods and assigning the bearer channel to
another trunk with an active speech burst. (See Figure 4.31.) As a result,
DSI combines speech bursts from several trunk channels into a lower
number of bearer channels. If the number of trunks is large, the statistics
of the speech and silence distributions will permit a significantly smaller
number of bearer channels to be used.
Speech bursts
1.2 1.1
1 D
2.2 2.1 3.3 1.2 3.2 2.2 3.1 2.1 1.1
2 S
3.3 3.2 3.1 Assignment and control information
3 I
TRUNK INPUT BEARER SIDE
TRANSMIT SIDE
Front clipping
due to freezeout
1.2 1.1
D
3.3 1.2 3.2 2.2 3.1 2.1 1.1
1
2.2 2.1
S 2
3.3 3.2 3.1
Assignment and control information 3
I
BEARER SIDE TRUNK OUTPUT
RECEIVE SIDE
Figure 4.31 Digital Speech Interpolation
Figure 4.31 shows three trunk channels, each with a voice activity factor
of 33 percent. These three channels can, in theory, be accommodated
into one bearer. For the system to work, an additional channel containing
the assignment and control information must be created to inform the
receiver what circuit the speech burst belongs to. The assignment and
control information is actually transmitted in a separate bearer channel
not shown here. DSI, however, has one disadvantage that affects system
performance: that is ’freezeout’.
)UHH]HRXW What will happen if a trunk channel becomes active and there is no
bearer capacity? In Figure 4.31, the first speech burst in trunk 3
appeared when trunk 2 was using the bearer. This condition will produce
a clipping in the front of the first speech burst of trunk 3. In the worst
case, if more speech bursts are generated and no more bearer capacity
is available, the entire speech burst will be dropped.
Freezeout is expressed as ’Freezeout Fraction’, i.e., as a ratio of the total

time that the individual channel experiences the freezeout condition, to
the total time of the active interval. The ITU-T recommends that the
freezeout fraction must not exceed 2 percent.
Figure 4.32 shows that the DSI function is based on a speech level
detection. Once the threshold is reached, a bearer assignment process is
initiated. A hangover time is provided at the end of every speech burst to
keep the detector ’ON’ after speech energy has ceased to improve the
freezeout fraction.
START OF END OF END OF

SPEECH SPEECH SPEECH
BURST BURST BURST
POWER
HI !! IS MARIO HOME ?
NOISE THRESHOLD
HANGOVER HANGOVER
TIME
TIME TIME
TURN ON DELAY
FOR BEARER
ASSIGNMENT
Figure 4.32 Speech Burst Level Detection
'LJLWDO&LUFXLW DCME is defined in the ITU-T Recommendation G.763 to provide circuit

0XOWLSOLFDWLRQ multiplication by means of DSI and ADPCM (G.726). It operates either
over an E1 or a T1 frame structure. The DCME frame structure described
(TXLSPHQW in this module is based on an E1 frame structure (CEPT 2.048 Mb/s) and
'&0( is as follows.
Bearer Frame
The DCME bearer frame output maintains the CEPT frame duration
(125µs) and the Frame Alignment Word structure (known as TS0) as
shown in Figure 4.33a. The following 31 (8 bits) time intervals are divided
into 4-bit nibble units to be used as Bearer Channels.
A bearer frame is composed of:
* One Frame Alignment Word (8 bits)

* One Control Channel (4 bits)
* 61 Nibbles to carry the bearer channels (4 bits each)
DCME Frame
A DCME frame is composed of 16 bearer frames (16 * 125 µs = 2 ms) as

depicted in Figure 4.33b. This frame is required to deliver one control
channel message.
DCME Multiframe
A multiframe DCME structure is composed of 64 DCME frames (128 ms)

and conveys additional DCME-to-DCME information. (See Figure 4.33c.)
a)
CEPT FRAME or BEARER FRAME = 125 µ Sec
CEPT
TRAFFIC
FAW
TS 0 BC BC BC BC BC BC
CC #1 #2 #3 #4 #5 #6
.. .. .. .. .. .. .. .. .. .. .. .. .. .. .. BC BC BC BC
#58 #59 #60 #61
8 Bits
DCME control channel
b)
DCME FRAME = 2 m Sec
BEARER BEARER BEARER

FRAME FRAME FRAME
#0 #1 #15
TS C
TRAFFIC
TS C
TRAFFIC
TS C
TRAFFIC .. .. .. .. .. .. .. .. TS C
TRAFFIC
0 C 0 C 0 C 0 C
c)
DCME MULTIFRAME = 128 m Sec
DCME DCME DCME DCME

FRAME FRAME FRAME .. .. .. .. .. .. .. .. FRAME
#0 #1 #2 #63
Figure 4.33 DCME Frame and Multiframe Structures
&RQWURO&KDQQHO CC conveys the following information. (See Figure 4.34.)

&&
* Trunk to bearer assignment
* Channel idle noise level
* Dynamic load control information
* Self diagnostic information
* Signal classification
A full CC message is transmitted in one DCME frame (every 2 ms) and is

formed of 64 bits. Each bearer frame transmits part of a CC in the first
nibble of the bearer frame. The first bit of the nibble is reserved to transmit
the multiframe synchronization unique word.
The remaining 48 bits contain an encoded CC message and are

transmitted at a rate of 3 bits in each 125µs bearer frame. A complete
CC message is received in 2 ms.
DCME FRAME = 2 m Sec

(One control channel message delivered)
BEARER FRAME #0 BEARER FRAME #1 BEARER FRAME #15
1st 2nd 16th
nibble nibble nibble
of CC of CC of CC
TS
TRAFFIC
TS
TRAFFIC .. .. .. .. .. TS
TRAFFIC
0 0 0
48 CC bits
Sync bit delivered
3 bits of 1110101100100001 Unique word pattern DCME frame 1 to 63
encoded CC
0001010011011110 Unique word pattern DCME frame 0
Figure 4.34 DCME Frame Structure
As the CC information is critical for the DCME, the CC is protected using

a 1/2 Golay code with a transmission scheme as shown in Figure 4.35.
The actual CC information (without FEC) is 24 bits.
%HDUHU&KDQQHO A bearer channel (BC) word is used to identify a new BC assignment

%&:RUG (Figure 4.35). The most significant bit is used to indicate the BC type. For
data, it will be 1. For all the other types (bit bank, fax bank, transparent,
voice), the most significant bit will be 0. The seven LSB in binary code
will identify the BC, 1 to 61 for normal traffic, and 64 to 124 for overload
channels.
,QWHUPHGLDWH The intermediate trunk (IT) word is used to identify the input IT
7UXQN,7 interconnected to the BC and related information, for example:
:RUG
Binary code Use
1 to 216 Identification of input IT available for traffic

232 to 235 DCME-to-DCME order wires (up to four
correspondents)
250 If the associated BC is used as bit bank.
251 If the associated BC is used as fax bank.
'DWD:RUG The data word is divided into synchronous data word and asynchronous
data word. Refer to Figure 4.35.
6\QFKURQRXV The synchronous data word conveys information relative to the BC

'DWD:RUG assignment and IT identification synchronously. It has the information
relative to:
• Background noise level information in the local IT to be transmitted to

the distant DCME
• Whether the BC is the first 4-bit nibble of a 64 Kb/s clear channel
• Channel checks
48 bits
Dummy bit Dummy bit
Info bits Check bits Info bits Check bits
1 2 3 11 12 13 14 22 23 24 1 2 3 11 12 13 14 22 23 24
Data word
BC word IT word Sync Async Normal assigment message
Bits Bits
MSB LSB MSB LSB 1 41 4
Figure 4.35 CC Message Structure
$V\QFKURQRXV The four Least Significant Bits (LSBs) of the data word will convey the
'DWD:RUG following types of DCME-to-DCME information not related to the BC and
IT assignments:
* Circuit supervision and alarm indication
* Bearer related backward alarm indication to the remote DCME
* Dynamic Load Control (DLC) messages
An asynchronous data word multiframe is formed when 64 DCME frames

(128 ms) are transmitted. A control channel message example is shown
in Figure 4.36. The CC, once decoded, could have the following
information.
BC word:
First bit 0 The channel is carrying voice.
Other bits 0011010 IT assigned to BC # 26.
IT word 01010110 The traffic comes from IT # 86.

Sync data word 0100 Background noise -55 dBmOp.
Async data word 0111 Async data word information
BC word IT word Data word

Sync Async
00011010 01010110 0100 0111
Bits Bits
MSB LSB MSB LSB 1 4 1 4
Figure 4.36 CC Message Example
6LJQDO Before an IT channel is connected to a BC, it is first classified according

&ODVVLILFDWLRQ to the activity and type characteristics. The classification task is
performed in the activity detector and data/speech discrimination module,
and follows a three-level tree as shown in Figure 4.37. If the channel is
preassigned, the classification tree is skipped.
LEVEL 1: Intermediate Trunk active or inactive

LEVEL 2: Intermediate Trunk carries voice or non-voice signals.
LEVEL 3: Transmission speed classification
IT
LEVEL 1:
SIGNAL NO SIGNAL
VOICE LEVEL 2:
NON-VOICE
2, 3, 4 bits
ADPCM
V.21 G3
V.22
VOICE FAX
BAND LEVEL 3:
V.26
V.27 DATA
V.29
V.32
5 bits 5 bits FAX

ADPCM ADPCM DEMOD
Figure 4.37 Signal Classification Tree
&RQQHFWLYLW\ Once the signal is classified, the IT-ADPCM encoder-BC connection is

,PSOHPHQWDWLRQ implemented at the beginning of the DCME frame that occurs three
'HOD\ frames after the start of the DCME frame containing the related Control
Channel message (Figure 4.38).
Frame n Frame n + 1 Frame n + 2 Frame
Assignment message
Implementation
Figure 4.38 Implementation Delay
The speech burst from the active IT goes through the DSI process and on
to the ADPCM encoder. The actual IT–to-BC connection is established
according to the Control Channel information. If the IT becomes idle, the
BC channel will be disconnected.
9RLFH&KDQQHO Every new speech burst will be assigned to a different BC. If BC

+DQGOLQJ channels are available, the ADPCM encoder will code the voice signal
with 4 bits ADPCM. A list of the available BCs (from 1 to 61) containing
voice will be created and updated in the transmit and receive side every
time a new BC is assigned.
If there are no available BC channels, and a new IT becomes active, an

overload channel will be required. The overload channel numbering in
the BC word ranges from 64 to 84 for 4/3 bit coding and from 64 to 124
for 3/2 bit coding. The overload channels are created by ’robbing’ the
LSB from the active voice channels (from 1 to 61), by using 3- or 2-bit
ADPCM encoding, and assigning the ’robbed’ bits to the overload
channels. This is a pseudo-random process to evenly distribute the 3- or
2-bit encoding in the total voice channels. Figure 4.39 shows how two
overload channels are created by ‘robbing’ bits from normal BCs. The
required 4 bits for BC 64 are taken from BCs 4, 5, 9, and 10. The 3 bits
for BC 65 are robbed from BCs 11, 12, and 13. In the following 2 ms, the
bit robbing pattern will be different. Note that the overload channels can
be created containing 4, 3, or 2 bits depending on the loading condition.
9RLFH%DQG When an IT channel burst is declared as data, it will require 5-bit ADPCM
'DWD+DQGOLQJ encoding independent of the data speed. The channel itself will be
declared as a data channel and will not be subject to bit robbing.
Whenever a 40 Kb/s voice band data channel is required, a Bit Bank

nibble will be created. In Figure 4.39, a preassigned 40 Kb/s data
channel is transmitted. The four MSBs are transmitted in BC # 2, and the
fifth bit (the LSB) in bit 1 of the Bit Bank (in BC # 1). If an extra 40 Kb/s
are required, the LSB will also be taken from bit 2 of the Bit Bank. The
process is repeated and extra Bit Banks are created until all the 40 Kb/s
channels have been handled. This process is the same as that used for
fax calls when no Fax Demodulation/Remodulation is used. The impact
on the DCME gain is evident.
40 kbit/s 40 kbit/s 64 kbit/s

pre-assigned pre-assigned
BC numbering scheme
1 2 ... 4 5 ... 8 9 10 11 12 13 ... 38 39 40 41 42 ... 60 61
Time
CC B D V V D V V V V V T V V V V V
slot 0
B = Bit bank
D = Data
V = Voice
T = Transparent
1 2 ... 4 5 ... 8 9 10 11 12 13 ... 38 39 40 41 42 ... 60 61 64 65 ... 124
Normal BC range
Overload BC range
Figure 4.39 Bearer Format
)D[+DQGOLQJ
ZLWK)D[ The basic function of the facsimile module is to identify Group III fax calls,
demodulate the fax signal, and transmit the demodulated information to
'HPRGXODWLRQ the remote facsimile module via the DCME where the voice band signal is
5HPRGXODWLRQ reconstructed to its original format. If a call can not be demodulated, it is
routed through a 40 Kb/s ADPCM channel.
The fax module demodulates the image data of each fax call and
accumulates the information for 2 ms before transmission. Depending on
the fax data rate, the number of bits in 2 ms may be a non-integer
number. To compensate for this, and also to cope with timing differences
between the fax machine and the DCME fax frame clock, one stuffing bit
and a control bit are used. The resulting bit structures of the fax
demodulation and storage of 2 ms are referred to as Fax Data Channel
(FDC).
For example, in Figure 4.40, a fax call with a 9.6 Kb/s data rate is
transmitted. The number of bits accumulated in a 2 ms interval is slightly
in excess of 19 (19.2 to be exact), so that sometimes 19 and sometimes
20 data bits will be transmitted. The 20th bit of the FDC will, therefore, be
either a dummy bit or a data bit. The 21st bit of the FDC will indicate
which of the two cases applies.
Control bit
Dummy bit
or data bit
Data
1 bits 18 19 20 21
...
Information demodulated in 2 ms.
Figure 4.40 Fax Data Channel (FDC) Formed from a 9.6 Kb/s Fax Call
The number of bits in the FDC depends on the transmission rate of the
fax signal and is calculated as follows:
FDC length = I (R*2) + 2
where:
R Fax rate in Kb/s (2.4, 4.8, 7.2, 9.6, 12, and 14.4 Kb/s)
I( ) Integer part of the number
If the number of information bits accumulated in 2 ms is an integer, for

example as in 12 Kb/s fax data rates, the number of bits accumulated
would be 24. In practice, will be 23 sometimes, and 25 at other times.
Therefore, the 24th and 25th bits of the FDC will be dummy bits or data
bits, as indicated by the control bit (the 26th bit of the FDC).
)D[&RQWURO The FCC, as shown in Figure 4.41, is provided for the transmission of
&KDQQHO)&& information related to frame description messages, fax call control codes,
and auxiliary information. The FCC structure consists of a 9-bit IT field
and a 12-bit message field. This 21-bit FCC is transmitted once per
DCME frame (2 ms).
The IT field value identifies the IT from which the fax call was
demodulated. The IT numbering ranges from 1 to 511. The numbering
ranges from 1 to 216 is the normal range used to designate the IT traffic
trunks. The special range from 500 to 511, is reserved for functions
within modules (0 and 217 to 499 are not used). The message field is
used to convey information, such as whether FEC coding is applied to the
demodulated information, demodulated fax rate, input level, etc., to
properly demodulate the signal at the receive side.
IT field Message field

(9 bits) (12 bits)
Figure 4.41 Fax Control Channel Structure
)D[0RGXOH The FDCs of various trunks are arranged in a continuous sequence no

)UDPH)0) matter what the FDC length is. This sequence, preceded by the FCC,
constitutes an FMF. The length of the FMF should be such that the FCC
plus the FDCs is an even number m of 32-bit blocks. This requirement is
achieved by attaching a certain number of dummy bits to the FMF (called
frame filling in Figure 4.42).
Figure 4.42 depicts an FMF. The FDCs are arranged in ascending IT

number (1 to 216).
)D[%ORFNV Once the FMF is formed, the bits are grouped in contiguous 32-bit blocks.
The 21 bits of the FCC are entirely contained in block 1 because FEC
(BCH coding) is always applied to the FCC. This action adds 10
additional FEC check bits plus a dummy bit to the FCC, resulting in a 32-
bit structure to conform block 1 (Figure 4.43).
Fax Module Frame length

21 bits Fax Data Channels Frame
filling
Fax
Control
Channel
Ascending ITh ITi ITj ITk .... ITq

IT no.
Figure 4.42 Fax Module Frame Structure
FCC Demodulated data from different ITs

Block 1 Block 2 Block 3 . . . . . . . . Block m
Info Check Frame

bits Bits ITh ITi ITj ITk .... ITq
filling
21 10 Dummy bit
Bits Bits
Figure 4.43 Creation of Fax Blocks
)D[7UDQVSRUW In every DCME frame, the facsimile data interface delivers m fax blocks to
&KDQQHOV)7& the DCME. Special 32 Kb/s BC channels called FTC or Fax Banks
transport the fax blocks. The fax block bits are inserted at a rate of 2 bits
per PCM frame so that all the bits of a block are transmitted in 16 PCM
frames (2 ms). Every FTC (or fax bank) conveys 2 fax blocks. Thus, the
number of FTCs required to transmit the m fax blocks is m/2. The FTC
number 1 is mapped in the bearer frame as the first nibble following the
control channel Figure 4.44).
PCM FRAME or BEARER FRAME = 125 µ Sec

FTC
TRAFFIC
#1*
TS 0 BC BC BC BC BC BC
CC #1 #2 #3 #4 #5 #6 .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. BC BC BC BC
#58 #59 #60 #61
8 Bits
DCME control channel
* FTC #1 = FCC + Fax block 2
Figure 4.44 FCC and FDC Over a Bearer Frame
'&0( The simplest way to use a DCME is in single destination or point-to-point

2SHUDWLQJ mode. This mode of operation, although preferable for its simplicity, may
0RGHV not be practicable for all users. Two other options are available, namely
Multiclique and Multidestination.
The question of when to operate in multiclique mode, and when to

operate in multidestination mode depends on a number of factors,
notably:
*the number of destinations and the traffic requirement on each route, and
*the capacity of the backhaul system.
In general, the DCME should be located at the ISC. DCME can be

located at the Earth station only if the backhaul is analog.
As a general guide, multidestination mode is economical for a large

number of small capacity routes via satellite. Single destination mode is
more suited to single, large, and medium capacity routes. Multiclique
mode lies somewhere in between.
6LQJOH This is the simplest concept of DCME applied to large and medium traffic
'HVWLQDWLRQ routes between two destinations over satellite bearers. Typical traffic
values of between 60 and 150 trunk channels (2 to 5 PCM frames) per
0RGH DCME would be normal. An example of system configuration is shown in
Figure 4.45A.
Trunk side Trunk side

Bearer side
1 1
2 2
3
A B 3
4 4
A: POINT-TO-POINT
1
1 2
2
D B 3
A
3 A C 4
4 C
1
2
B: MULTICLIQUE C 3
4
1 1
2 2
3 A B 3
4 4
1
C: MULTIDESTINATION 2
& C 3
MIXED MODE
4
1
2
C 3
4
1
2
D 3
4
Figure 4.45 DCME Operating Modes
0XOWLFOLTXH In multiclique mode, the DCME output is split into two traffic streams with
0RGH the DCME generating a "Control Channel" for each stream or "Pool".
These two pools do not have to be the same size. Each interpolation
pool will contain all channels for a particular destination. Thus, there is a
maximum of two pools in any bearer frame. Each interpolation pool within
the bearer frame structure will carry the assignment information in a
control channel associated with the pool. The boundaries between the
pools are variable and operator controlled. Each pool can be
incremented in 8-bit bearer time slots.
An example system configuration of multiclique DCME with IDR carriers

is shown in Figure 4.45B. It should be noted that the cross-connect
equipment or time slot interchange equipment required to route the traffic
is not part of the DCME. In this mode of operation, typical traffic values of
between 60 and 150 trunk channels per DCME shared between two
destinations are anticipated.
0XOWLGHVWLQDWLRQ In multidestination mode, the DCME output can be "mapped" for up to

0RGH four destinations. One Control Channel controls the whole pool. With
multidestination, the receive DCME will accept one Bearer Frame stream
from each destination. In the multidestination mode of operation, typical
traffic values of some 60 to 150 trunk channels per DCME will be shared
by up to four destinations. (See Figure 4.45C.)
0L[HG0RGH It must be noted that Mixed Mode operation, i.e., Multidestination together
with Multiclique, is also possible. In this mode, the DCME will correspond
with up to four destinations by means of a maximum of two interpolation
pools within the bearer frame. One of the interpolation pools may serve
up to three destinations and the other will serve one destination. As in the
case of multiclique, the boundaries between the pools will be variable,
under operator control, and in increments of 8-bit bearer time slots.
'&0(*DLQ The DCME gain is defined as the input trunk channel to output bearer
channel. Theoretically, this gain is calculated as 2.5 for the DSI and 2 for
ADPCM (5 for the DCME).
However, as the system is influenced by the amount of Voice Band Data

calls, fax calls, clear channels, etc., the maximum available gain will
depend on the following factors:
a. Number of trunk channels

b. Number of bearer channels
c. Trunk channel occupancy
d. Speech activity
e. Voice-band data traffic
f. Ratio of half to full duplex voice-band data
g. Type of signaling
h. 64 Kb/s clear channel data traffic
i. Minimum acceptable speech quality
j. Dynamic load control threshold
The factor that has the greatest significance in the DCME gain is the
number of 64 Kb/s data channels required because each such channel
absorbs 2 x 32 Kb/s bearer channels. Figure 4.46 shows the DCME
traffic handling capability. A lesser, but still significant factor is the
percentage of voice-band data that varies according to the route and time
of day. This can be checked using a Digital Channel Occupancy
Analyzer (DCOA) which often shows data variations with peaks that may
or may not always coincide with speech.
Another significant factor is the type of signaling employed on the route in

question. Compelled signaling systems hold channels active for
significant periods, hence not allowing any interpolation during the
signaling period. The speech activity depends on the characteristic of the
language. It is usual to assume a 35 to 40 percent speech activity.
Speech quality is determined by the encoding rate of the ADPCM process

(average bit per sample), and the amount of speech lost while a newly
active trunk channel is being connected to a bearer channel (freezeout).
If a large number of channels are in competition, the beginning of a
speech burst is more likely to be clipped or frozen out. The usual criteria
for acceptable speech performance are an average encoding rate of 3.7
bits per sample, and less than 2 percent probability of clipping exceeding
50 ms (freeze-out fraction) or, alternatively, less than 0.5 percent of
speech should be lost due to clipping. Approximations have been derived
which relate the number of trunk lines to the achievable DCME gain for
use in initial system dimensioning. These are shown in Figure 4.46.
6.0
0% Data
5.0
10% Data
DCME GAIN 4.0

20% Data
30% Data
3.0 40% Data
2.0
0 10 20 30 40 50 60 70 80 90 100 110 120 10 130 140 150 160 170 180
TRUNK LINES
Figure 4.46 DCME Trunk Capacity versus Gain
2YHUORDG The dynamic variation in the number of bearer channels available for the
&RQWURO interpolation process due to voice-band data and 64 kb/s data activity
requires action to be taken to safeguard speech quality. The following
solutions are feasible.
a. The system can be dimensioned so that the maximum

anticipated trunk activities fall well within the quality criteria (3.7 bits per
sample). In this situation, the DCME is used less efficiently, particularly
outside the busy hour. However, efficiency can be improved if the system
is deployed in a multiclique or multidestination mode where routes carried
can have widely differing busy hours. Thus, although trunk channels may
have relatively low busy hour occupancy, the bearer channels would
always be well loaded.
b. The DCME can be programmed to correspond with its

associated ISC and have the exchange assign a busy status to the
channel when the quality criteria are violated. This is more commonly
known as DLC.
c. The signal-to-quantization performance can be offset against

reductions of quality by using variable rate ADPCM algorithms. It is
possible to quantize speech samples to 3 or 2 bits rather than 4 on
individual speech channels, either for the whole speech burst or on a
cyclic basis for a given number of samples.
Due to better efficiency, “b” and “c” are the widely recommended
solutions.
0DSSLQJ Before any DCME operating mode is established, the users must agree
on how the system will be mapped. Taking Figure 4.47 as a reference, a
DCME map consists of the information given to the DCME to break down
the input trunk channels (TCs) into 64 Kb/s intermediate trunks (ITs).
These will then be processed by the DSI and ADPCM, and transported as
bearer channels (BCs).
Remember, the TCs are connected to the DCME from the ISC in PCM
frames (each with 30 or 24 channels), and the DCME handles not TCs
but ITs. The mapping reduces the CC size and allows the flexibility
required for multiclique and multidestination operation. The map is a
static arrangement that has to be agreed to between the users, and it can
be different for the transmit and receive sides.
TRUNK CHANNELS ( TC ) INTERMEDIATE TRUNK BEARER CHANNELS

In groups of 24 or 30 channels ( I T = 1 to 216) (BC = 1 to 61 for normal
and 64 to 124 for overload)
1 1
2
2 .
.
3 . TX
I 30
4 31 RX 1
.
DSI
5 . &
S RX 2**
6 60 ADPCM
61
C 7 . PROCESSING RX 3**
M A. P PING
8 .
RX 4**
.
9* .
.
10* 216 DCME
* Possible only if the ** Used in Multidestination

ISC-to-DCME connection and Mixed modes
is over 1.544 Mbit/s links.
Figure 4.47 DCME TCs to IT Mapping
Therefore, mapping is a designation that relates each trunk channel to an

internal numbering designation (IT) within the DCME to convey the trunk
channel to bearer channel connectivity via the control channel. The IT
numbering goes from 1 to 216 and defines the maximum number of trunk
channels in the DCME trunk side. This connectivity is achieved only if the
DLC is connected to the ISC.
:KDW
VQH[WLQ
'&0(" We can anticipate expanded use of new speech processing techniques
such as LD-CELP, in which the voice is coded in 16 Kb/s without
sacrificing voice quality. LD-CELP is an attractive alternative to further
increase the DCME gain from the actual 5 to 1, to 10 to 1. This
alternative will be available with the advent of VLSI chips capable of
handling several voice channels.
Another feature that could be included in future DCMEs, is the

demodulation/remodulation of FAX data in the range of 14.4 to 28.8 Kb/s
(ITU Recommendation V.34).

3DFNHW&LUFXLW Packet switching has been thought of as a data communication
0XOWLSOLFDWLRQ technique. However, it was initially devised as a technique to avoid voice
communication circuit wiretapping by breaking a voice conversation into
(TXLSPHQW ’packets’ as depicted in Figure 4.48. A further enhancement of the
3&0( technique was its capability to mix pieces of a call with pieces of other
calls at each switch.
It was only at the destination that all the pieces could be collected and
reassembled in the original order so that the voice became intelligible.
Obviously, every ’packet’ needs a certain type of addressing information
(called header and trailer) such as destination, time stamp, and related
information to reconstruct the original message.
%DVLFVRI3DFNHW Packet switching evolved rapidly in data communications because data

6ZLWFKLQJ uses digital information, which is relatively simple to break down into small
packets. Moreover, the bursty nature of data information does not require
a permanent connection between the transmitter and receiver to deliver
the information. To discipline the data transmission in a network, a full set
of protocols was developed. These are:
* User-to-user protocols
* User-to-packet switch protocols
* Packet switch-to-packet switch protocols.
These protocols apply to all data communications, to route the signal and
to assemble the information at the destination.
Packet switching operates like the mail. The letter (i.e., information) is
placed in an envelope (user-to-user protocol), the envelope is stamped
and addressed (user-to-packet switch protocol).
Once it is deposited in the mailbox, the post office routes the letter
according to the address, and delivers it to a partner post office (packet
switch-to-packet switch protocol). En route to its destination, the
envelope could be handled by intermediate post offices (intermediate
packet switches). Here the addresses of all the arriving envelopes will be
checked, local letters retained, and in-transit letters forwarded to the next
post office until they reach their destination, where the packet will be
delivered to the user.
for is =M
The secret formula is =M
E = M.C2
is
for
se se
mul
se
E
fo r
The
is
=
M
mul
cret
The secret formula is

E = M.C2
E
cret
a
E se
cret is
E
C2
a
a
cret
m
ul mul
a
The C2
C2 The
Figure 4.48 Historical Origin of Packet Switching
Let us take an example. In Figure 4.49, user A addresses information to

user C. It transmits the data at a given rate to the switch X1 where the
packets are formed, stored, and forwarded in a noncontiguous form
(datagrams) at a higher rate. The routing will depend on the network
status. Whenever a packet is delivered to the next node (either X2 or X3),
an acknowledgement message will be sent back to the sender (X1),
where the stored messages will be discarded.
In case of link degradation between X1 and X2, the acknowledgement

information will require a retransmission of packet 1 from X1. At the
receiver (X4), the original information is assembled and delivered to user
C. The following are important packet switching features.
• The network can become self-healing (Automatic routing or

networking).
• If one packet is delivered with an error, or not delivered at all, a
retransmission is demanded.
• If congestion arises, a packet is routed via alternate paths. If the
congestion is severe, an entire packet can be dropped and
transmitted later.
If an interactive connection is established between two users, transmit

and receive packets will not follow the same routing and will be treated as
independent entities. However, neither user will notice it.
Retransmission X5
X2
Error
1
Message 1
3 2 1 1 Reassembly
A X1 Acknowledgements X4 C
3 2 1
2
3
3
2
X3
X6
Figure 4.49 Basic Operation of a Packet-Switched Network
3DFNHWL]HG In the mid-1980s, there was renewed interest in packetized voice. The
9RLFH3URWRFRO goal was to integrate voice, voice band data, digital data, high-speed
data, video, signaling, and network control into packets of common
format. The result was ITU-T Recommendation G.764 for ’packetized
voice protocols’. With this approach, voice and data can be integrated
thanks to the networking advantage derived from packet-switched
networks.
In principle, this integration should lead to a more efficient use of the

available transmission resources. Voice and data, however, are impacted
differently by delay and errors. Voice, for example, requires low and
uniform delay and is not expected to be retransmitted, whereas data
traffic is more sensitive to bit errors and can be retransmitted. A packet-
switched network introduces fixed delay (signal processing), variable
delay (depending on the routing of the packet), and packet dropping to
alleviate congestion. These effects are destructive on voice conversation.
Therefore, the voice traffic packetization protocol specifies that:
• Time stamp information must be added in the network nodes for

speech reconstruction at the receiving end for packets arriving at
irregular intervals (or, in some structures, out of order).
• The block dropping method must be used for congestion control in

any point of the network, instead of packet dropping.
9RLFH3DFNHW Collecting 128 speech samples over a 16 ms interval of an incoming full

rate channel forms a voice packet. The signal is then coded in G.727
ADPCM and arranged as shown in Figure 4.50.
• The address octets are used to identify the data origin and
destination.
• An UIH control field is used when a management entity requests
unacknowledged information transfer. The two least significant bits
LSBs are reserved to perform cyclic redundancy checks over the
address octets.
• Protocol discrimination has a fixed value. It identifies the packet as a
voice packet.
• Block dropping indicators track the status of block dropping within the
packets.
• The time stamp is a record of the cumulative variable delays
experienced by a packet in a network with a 1 ms resolution.
• Coding type indicates the method used to code the speech samples
at the originating point before packetization.
• * A sequence number is used by the end point in the build-out
process to determine the first packet of a burst and whether a
packet has been lost. The sequence number and time stamp allow
for the removal of variability in the network delay.
• Noise level indicates the background noise level at the transmit side.
The receiving end uses the noise level information to determine the
noise level that may be played in the absence of voice
packets.
• Each information block has 16 octets.
• The check sequence is an algorithm to check the integrity of the
transmitted information.
8 7 6 5 4 3 2 1
Octet 1
Address (upper subfield)
Octet 2
Address (lower subfield)
Octet 3
HEADER
UIH control field
Protocol discriminator Octet 4
Block dropping indicator Octet 5
Time stamp Octet 6
Coding type Octet 7
Sequence number Noise level Octet 8
Non-droppable 16
block Octets
INFORMATION
Non-droppable 16
block Octets
Optionally droppable 16
block Octets
Optionally droppable 16
block Octets
Check sequence
TRAILER
Check sequence
Figure 4.50 Packetized Voice Frame Format
'URSSDEOHDQG Remember that G.727 ADPCM arranges the output information into core
1RQGURSSDEOH bits and enhancement bits. Now, as the packetized voice protocol
collects 128 ADPCM samples, the packet information is ordered in such a
%LW%ORFNV way that all the first 128 core bits of the 128 ADPCM samples are
grouped together to compose the first nondroppable block. (See Figure
4.51.) The second 128 core bits of the 128 ADPCM samples are also
grouped (composing the second nondroppable block). The same
procedure is performed on the third, fourth, and fifth 128 enhancement
bits of the 128 ADPCM samples to build the first, second, and third
droppable blocks. Figure 4.51 shows the bit blocks arrangement.
16 msec
Sample Sample Sample Sample Sample Sample
Core 1 2 3 126 127 128
bits Enhancement
bits
..............
(* if required)
1 2 3 4 5 1 2 3 4 5 .............. 1 2 3 4 5 1 2 3 4 5
* * * *
Pre-packetized
bit format
(ADPCM output)
....... .......
Frame 1st most significant 2nd most significant Last 128 Second 128 First 128
Trailer
header non-droppable bits non-droppable bits droppable bits droppable bits droppable bits
1 . . . . . . . 128 1 . . . . . . . 128 1 . . . . . . . 128 1 . . . . . . . 128 1 . . . . . . . 128
Bit # 1 of the Bit # 2 of the Bit # 3 of the Bit # 4 of the Bit # 5 of the
128 samples 128 samples 128 samples 128 samples 128 samples*
Packetized bit format
Figure 4.51 Voice Packet Bit Ordering
3&0(9RLFH PCME uses the packetized voice protocol and ADPCM G.727 for voice
%DQG+DQGOLQJ band handling. Before any processing, the signal is classified in three
levels as shown in Figure 4.52. If the signal is classified as voice, it is
packetized according to the voice protocol already described. Note that
different ADPCM rates can be used for voice as a way to control
congestion.
If a sudden congestion begins, it is relieved by the instantaneous

buffering required to form the packet (16 ms) and by dropping one or two
of the droppable blocks that contain the enhancement bits. This
procedure shortens the voice packet allowing more packets in the output.
The header informs the receiver of the contents and length of a packet.
The block dropping can be performed by any PCME in a network. The
buffering and the block dropping feature eliminate the freeze-out.
3URFHVVLQJ)D[ An optional fax demodulation capability can be used to route incoming fax
&DOOV calls. In that case, calls will be routed to a fax demodulation module.
Every fax page will constitute a packet. The operation is as follows.
The transmitting PCME determines whether it can demodulate the fax

signal. If it can, then it informs the receive end in a special packet to
negotiate the allocation of hardware resources. Once the resources have
been allocated, the demodulated information of each fax page becomes
an information packet. This characteristic allows the destination
remodulator to resynchronize with the demodulator on a packet-by-packet
basis, which permits an indefinite page length to be transmitted.
VOICE
CHANNEL
LEVEL 1:
SIGNAL NO SIGNAL
VOICE LEVEL 2:
NON-VOICE
2, 3, 4 bits
ADPCM
LOW MEDIUM HIGH OTHER
SPEED SPEED SPEED > 9.6 kbit/s LEVEL 3:
< 1.2 kbit/s 1.2 to 4.8 7.2 to 9.6
kbit/s kbit/s
3 bits 4 bits G-3 FAX 8 bits PCM

ADPCM ADPCM or
5 bits ADPCM
5 bits
ADPCM
FAX 5 bits
DEMOD ADPCM
Figure 4.52 PCME Signal Classification
9RLFH%DQG The signal classification is performed in such way that the appropriate
'DWD3URFHVVLQJ ADPCM algorithm is selected to process the VBD with either 3, 4, 5, or 8
bits, as dictated by the modem speed. Because low-speed modems are
automatically handled at lower bit rates, no bandwidth is wasted.
'LJLWDO'DWD The PCME can interface digital data channels by using a Virtual Data Link
Capability (VDLC).
3URFHVVLQJ
• A special Digital Circuit Emulation (DICE) protocol is used to transport
special circuits in a bit transparent manner. The information is broken
into packets and transported.
• If the signal is based on the X.25 protocol or any other link access
protocol (already packetized from a packet switch network), the
frames will be relayed to the output without modification.
• The idle codes and flags will be removed from signals containing the
High-Level Data Link Control (HDLC) procedure. This approach, plus
the burst nature of the signal, can give data compression ratios of
40:1 in interactive data applications.
• The Virtual Data Link Capability (VDLC) allows the PCME to transport
any digital data rate.
3&0( The PCME supports single destination and multidestination operations.

The single destination operation is functionally equivalent to a single
2SHUDWLQJ destination DCME link.
0RGHV
0XOWLGHVWLQDWLRQ A multidestination configuration is particularly easy for packet systems
2SHUDWLRQ because the address information is contained in each packet header.
Because individual control channels are not needed for each destination,
there is no limit to the number of destinations in a PCME. Furthermore, if
the signal goes through tandem PCMEs, the packet itself is not decoded
but routed to the final destination. This feature enhances the speech
quality because the ADPCM-PCM-ADPCM conversion is not performed.

,17(/6$7 INTELSAT introduced Demand Assigned Multiple Access (DAMA)
'$0$ service in 1996 in Atlantic Ocean Region first, and extended it to all the
three ocean regions in 1997. The INTELSAT DAMA service for 16 Kb/s
telephony has been designated as “Thin Route-on-Demand” service.
This section discusses the service features briefly. The reader can refer
to the INTELSAT handbook DAMA: Your Global Thin Route on Demand
Connection for a detailed discussion on the subject.
Thin Route-on-Demand provides on-demand mesh connectivity between

multiple Earth stations, and is therefore a flexible and cost-effective
multiple-access technology. Thin Route-on-Demand is beneficial for thin-
route operators looking to replace analog FDM/FM and SCPC circuits.
Because Thin Route-on-Demand can provide direct connectivity among
large communities of users, transit charges can be reduced or
eliminated. Thin Route-on-Demand provides new users the opportunity
of getting globally connected through the use of smaller Earth stations.
INTELSAT maintains a record for every call made, and bills customers
for the answered call duration.
The DAMA Network platform is a flexible concept that can offer a wide
variety of services, such as:
• Thin Route-on-Demand telephony service among gateway Earth

stations
• Thin Route-on-Demand telephony service to remote areas via Very

Small Aperture Terminal (VSAT) Earth stations
• On-demand 64 Kb/s or higher connections for data applications.
Thin Route-on-Demand can operate with a wide range of Earth station

sizes, with the transmission automatically optimized on a call-by-call
basis, and also supports many different telephony interfaces, and
signaling protocols. This powerful combination of transmission and
switching flexibility permits direct connections between switches, PBXs,
or handsets, not permissible in a hierarchical telephone network.
Customers can use the Earth station facilities to provide international as
well as domestic telecommunications services on a single network
platform.
6HUYLFH2IIHULQJ Service Location
The service is offered in all three-ocean regions at the main connectivity

orbital locations - 335.5 degrees E, 60 degrees E, and 174 degrees E in
Global Transponder 36, as shown in Figures 4.53 through 4.55. The
three outer concentric rings in these figures indicate the 10-degree,
5-degree, and 0-degree elevation angle locations for the global beam.
Figure 4.53 INTELSAT 605 at 335.5oE
Figure 4.54 INTELSAT 604 at 60oE
Figure 4.55 INTELSAT VIII at 174oE
6HUYLFH7\SH Standard Service: Telephony
DAMA service supports 16 Kb/s Single Channel Per Carrier (SCPC)

providing:
• 16 Kb/s telephony, using ITU-T G.728 LD-CELP speech coding
• 14.4 Kb/s fax and voice-band data
Enhanced Service: Data
Dial up 64 Kb/s or 2 x 64 Kb/s service can be provided via a standard N-

ISDN interface. This option requires the use of a special ISDN interface
card, and uses a subset of ISDN D-channel signaling.
Baseline Application - International PSTN
The baseline application is international PSTN service between gateway

Earth stations connected to ISCs, using the ITU-T Signaling System No.
5 telephony protocol, as shown in Figure 4.56.
PSN
PSN
DAMA
INTER- DAMA
Terminal INTER-
NATIONAL Terminal
SWITCH NATIONAL
SWITCH
PSN PSN
DAMA DAMA
INTER- INTER-
Terminal Terminal
NATIONAL NATIONAL
SWITCH SWITCH
Figure 4.56 Baseline Application - International PSTN
(DUWK6WDWLRQV A wide range of Earth station sizes can carry the service. Although the
service provides direct “mesh” connections, certain Earth station–to-
Earth station connections may not be allowed because of off-axis
emission constraints. To help users plan their Earth station facilities and
desired correspondents, matrices that identify the allowable
connectivities are available in IESS-311 (INTELSAT DAMA Carrier
Performance Characteristics) for different satellite and coverage
characteristics. Tables 4.5, 4.6 and 4.7 summarize typical Earth station
connectivity matrices for INTELSAT VI through INTELSAT VIII global
beam operation.
Table 4.5 Earth Station Connectivity Matrix

for INTELSAT-VI Global Beam, Rate ¾
Allowed between And

Std-A Std-A,B,F3,F2,F1,H4
Std-B Std-A,B,F3,F2,F1
Std-F3 Std-A,B,F3,F2
Std- H4(3.7m) Std-A,B,F3
Std-H3(2.4m) Std-A,B

for INTELSAT-VII Global Beam, Rate ¾
Allowed between And

Std-A Std-A,B,F3,F2,F1,H4, H3
Std-B Std-A,B,F3,F2,F1,H4
Std-F3 Std-A,B,F3,F2,F1
Std-F1 Std-A,B,F3
Std-H3(2.4m) Std-A

for INTELSAT-VIII Global Beam, Rate ¾
Allowed between And

Std-A Any e/s
Std-B Std-A,B,F3,F2,F1,H4,H3
Std-F3 Std-A,B,F3,F2,F1,H4
Std-F2 Std-A,B,F3,F2,F1
Std-H4(3.7m) Std-A,B,F3
Std-H2(1.8m) Std-A
The H series correspond to smaller aperture C-band Earth stations with

antennas that have nominal diameters between 1.8m and 3.7m. These
have been incorporated into the current INTELSAT Earth Station
Standards (IESS-207). At the present time, due to operational
constraints, INTELSAT disallows Standard H2 (1.8m) stations to operate
on the global beam.
Exceptions are permitted for cases with sufficient uplink pattern

advantage and/or improved sidelobe performance. IESS-311(Rev.A)
provides tables showing the required margins to be made up. It has
been determined in many cases that mesh operation is permissible
between Standard F1 Earth stations.
For domestic/regional applications, users may designate their large

Earth stations to function as:
a) star-nodes for small e/s to small e/s (double hop)

connectivities, and/or
b) traffic gateways to access their national PSTN at any

switching hierarchical level of their choice.
7UDQVSRQGHU The networks operate on Transponder 36 (GA/GA) in the three Ocean

*DLQ6HWWLQJ Regions with high gain settings to minimize the uplink power
requirements from small Earth stations.
+RVW6WDWLRQ The Network is managed by a Network Management Control Center

/RFDWLRQV (NMCC). The NMCC is located at a “Host Station”. Routine operation
of the system will be conducted from the Headquarters Management
Facility (HQMF) at the INTELSAT Operations Center (IOC). Two
“partner” Host stations are being deployed for each Network in opposite
Hemi beams for maximum expansion potential and for geographic
redundancy of the global transponder service. Host station locations
are listed below:
AOR: Bercennay (France) and Clarksburg (USA)

IOR: Aflenz (Austria) and Vikram (India)
POR: Beijing (China) and California (USA)
'$0$6\VWHP The system has the capability to provide call-by-call mesh connections
2YHUYLHZ between Earth stations equipped with Traffic Terminals. On-demand
connections are under the control of a centralized NMCC, installed at a
"host" station, and under the supervision of the IOC. Two
geographically redundant NMCCs will ensure a high level of Network
availability. Figure 4.57 shows the concept.
On-Demand
Network
Redundant Network
Management and Control INTELSAT Operations
Centers Center, Washington DC
(INTELSAT Managed)
Figure 4.57 Network Concept
The NMCC performs two key functions.
•Routing of each call to its intended destination.

•Allocation of a satellite circuit from the available pool for the duration of
the call.
The whole process is rapid and automatic, facilitated by "control"

channels over which call requests, call assignments, monitor, and control
information are exchanged between the NMCC and Traffic Terminals.
Upon receipt of ITU-T Signaling System # 5 "seize" signal, a traffic

channel unit emulates a called exchange response of "proceed to send",
and collects the register signaling address information. After validation,
the channel unit forwards a satellite connection request and address
information to the central DAMA processor at the NMCC over the
Inbound Control Channel, using the Aloha protocol. When there is a free
channel unit at the called terminal, the NMCC assigns a pair of SCPC
carriers to be used by the calling and called terminals, specifying their
frequency and power level. The latter is determined based on the Traffic
Terminal Radio Frequency characteristics stored in the NMCC terminal
database. The assignment message to the called terminal also carries
the call address information. The called terminal emulates a calling

exchange, forwards a "seize" signal to the called exchange, and upon
receipt of "proceed to send", then sends the register signaling
information to complete the connection. The call release procedure is
simple. There is no fixed association between satellite channels and
Earth station channels. INTELSAT retrieves call records from the NMCC,
and the space segment usage charges are based on the answered call
duration.
Thin Route-on-Demand is like a transit switch. It allows connection of

different types of telephone equipment and communicates directly with a
large number of users. Trunks need not be preassigned/prerouted for
different destinations; rather, the Network routes calls dynamically to
intended destinations. Therefore, the trunk circuits connected to Traffic
Terminals can be shared across a number of destination trunks. Use of
Thin Route-on-Demand eliminates transit charges by establishing direct
links with correspondents.
The terminal equipment is modular, and can support as few as one

channel, and as many as hundreds of channels. The terminal equipment
which needs to be procured by the user, is manufactured by Hughes
Network Systems (HNS), USA. INTELSAT makes it simple for
customers to procure terminal equipment at predetermined prices,
through an ”Ordering Agreement” negotiated by INTELSAT with HNS.
For conversion of analog or SCPC traffic to Thin Route-on-Demand
traffic, Signatories may qualify for short-term financing for the purchase
and installation of Traffic Terminals and associated Earth station
equipment.
$SSOLFDWLRQV Although the service has been initially conceived for international PSTN
%H\RQG applications, the attractive tariffs for small stations are expected to
,QWHUQDWLRQDO stimulate the demand for other applications. Customers will be able to
361 rapidly expand services with low-cost Earth stations that are easy to
install, maintain, and redeploy. A number of domestic, regional, and
international applications can be supported with the flexibility that the
DAMA platform can offer. Signatories and users will immediately be able
to offer these service applications both domestically and internationally in
a closed user group arrangement, without the expense of implementing
their own network management facilities.
The use of smaller Earth stations will permit rapid extension of PSTN
service to remote and less developed areas in a "star" topology, using
existing gateway Earth stations as star nodes as well as entry points
(hubs) into the PSTN. This scenario is particularly suited for rural
telephony applications.
There are almost 300 Standard A and B Earth stations operating on the
satellites at 335.5 degrees E, 60 degrees E, and 174 degrees E, which
could be used as the gateways. Star topology for traffic is necessitated
by the global beam operation. However, future deployment of networks
with higher power and higher gain transponders would facilitate "mesh"
operation between small Earth stations.
6HUYLFH In addition to thin route telephony, the DAMA platform is also capable of
(QKDQFHPHQW providing data communications, including the provisioning of a dial-up 64
IRU'LDO8S Kb/s clear channel service that uses a subset of ISDN signaling. This
service is capable of facilitating narrowband multimedia applications (at
.EV user data rates of up to 128 Kb/s using two 64 Kb/s channels) via VSAT
terminals at hard-to-reach customer locations, and terminating the link
into the terrestrial infrastructure via large gateway Earth stations.
A number of Signatories have expressed interest in targeting the market
for business/specialized networks using this capability.
Readers may also consult the following documents:
IESS-311 Performance Characteristics for Demand Assigned

Multiple Access (DAMA) Digital Carriers
SSOG-311 INTELSAT DAMA Satellite System Operations Guide
(Parts 1 and 2)
IESS-207 Standards A, B, D, F, and H: Antenna and Wideband RF
Performance Characteristics of C-Band Earth Stations
Accessing the INTELSAT Space Segment

9HU\6PDOO VSATs are a class of Earth stations suitable for use on customer
$SHUWXUH premises, usually operating in conjunction with a large-size hub Earth
station, and capable of supporting a wide range of two-way services.
7HUPLQDO VSATs have evolved rapidly as a result of technical advances in
96$7 many areas including: packet transmission and switching, efficient
1HWZRUNV multiple-access protocols, powerful microprocessors, RF technology,
antenna miniaturization, protocol standardization and implementation of
FEC codecs and modems, and higher power satellites. INTELSAT
has published the INTELSAT VSAT Handbook, which is available to
Signatories and customers upon request.

96$7,%6 INTELSAT has recently extended IBS to VSAT terminals, and this service
is called VSAT IBS. VSAT IBS provides a preengineered solution to
enable business communications services using small Earth station
antennas.
The high quality of VSAT IBS allows applications, such as:
• Digital video-conference
• Real-time banking transactions
• Data and voice communications
• Internet Service Providers (ISPs) to Internet backbone connectivity
VSAT IBS extends IBS to VSAT terminals with small antennas, as small
as 1.8m in C- band, and 1.2m in Ku-band. Earlier, the smallest antenna
that IBS could use was 4.5m in C-band, and 3.7m in Ku-band. Details of
VSAT IBS are available in the following documents:
• Extension of INTELSAT Business Services to VSATs - Application

Note
• INTELSAT Business Services (IBS) - IESS 309 (Rev. 6)
Tables 4.8 and 4.9 summarize the VSAT antenna characteristics.
Table 4.8 VSAT Antenna Characteristics in C-band
Antenna Standard F1 H4 H3 H2
Typical Antenna 3.5-5.0 3.5-3.8 2.4 1.8
Diameter (m)
Typical G/T dB/K 22.7 22.1 18.3 15.1
Table 4.9 VSAT Antenna Characteristics in Ku-band
Antenna Standard E1 K3 K2
Typical Antenna 2.4-3.5 1.8 1.2
Diameter (m)
Typical G/T dB/K 25 23.3 19.8
VSAT IBS allows communications between a gateway station and a

VSAT. A gateway is an Earth station with an antenna size larger than F2
in C-band and E2 for Ku-band. Gateways are typically the central site of
a STAR network. VSAT IBS networks operate in STAR topology to
minimize the rated power and cost of the VSAT SSPA, and the satellite
resources. VSAT IBS is available in C- and Ku- bands on any INTELSAT
satellites. Table 4.10 summarizes technical characteristics of VSAT IBS.
Table 4.10 Technical Characteristics of VSAT IBS
Parameters VSAT IBS

Satellites VI, VII, VIIA, VIII
Beams All beams
VSAT Earth station E1, F1, H AND K (Larger gateway may be required at the
standards other end of the link.)
Information rate 64 Kb/s to 8448 Kb/s
Forward Error Correction Rate 1/2 convolutional encoding/Viterbi decoding with Reed-
Solomon (219,201) outer coding
Modulation QPSK or BPSK
a
Threshold BER 10 -10 for more than 99.6% of the year
?
Quality
Clear sky BER 10 -10

7UHOOLV&RGHG TCM IDR is INTELSAT’s newest, high-quality digital carrier service. This
0RGXODWLRQ is an improvement over the existing QPSK IDR service. INTELSAT offers
,QWHUPHGLDWH TCM IDR carriers in C- and Ku- bands through INTELSAT satellites VII,
VIIA, VIII, and IX satellites for operation with Standard A, B, C, E, and F
'DWD5DWH Earth stations. TCM technique is more bandwidth efficient than QPSK
7&0,'5 IDR, and will support a greater number of channels in a given bandwidth.
&DUULHUV Hence, TDM IDR will promote more efficient usage of the orbital
spectrum. Current technology also allows TCM IDR channel unit designs
to incorporate an option for switching between the TCM IDR and QPSK
IDR modes of operation. This will provide backward compatibility with
existing QPSK IDR channel units for information rates less than 10 Mb/s.
TCM IDR digital carriers in the INTELSAT system use coherent 8 PSK
modulation operating at information rates ranging from 64 Kb/s to 44.736
Mb/s. The information rate is defined as the bit rate entering the channel
unit, prior to the application of any overhead or FEC. For TCM IDR, the
FEC comprises an inner rate 2/3 Pragmatic TCM encoder/TCM decoder,
concatenated with a mandatory Reed-Solomon (219,201) outer code.
Pragmatic TCM encoding is a patented technique that uses the standard
k=7 convolutional code of rate 1/2 in conjunction with supplementary
circuitry to generate TCM encoded information.
7&0,'5 The TCM IDR service platform supports all voice and data applications,
$SSOLFDWLRQV but is particularly well suited to applications that require low BER/high
availability performance, such as:
• Internet backbone access

• Internet Network Access Point (NAP)-to-NAP()
• Multicasting
• Multimedia
• International Public Switched Network
• High data rate trunking
7UDQVPLVVLRQ
3DUDPHWHUV Though any information rate from 64 Kb/s to 44.736 Mb/s can be used,
INTELSAT has defined a set of recommended information rates. Table
4.11 shows INTELSAT-recommended TCM IDR information rates and
associated overheads for Rate 2/3 TCM 8 PSK with mandatory Reed-
Solomon coding (219, 201) outer coding.
Table 4.11 INTELSAT-Recommended TCM IDR

Information Rates and Overheads
N um be r of 6 4 K b/s Info rm ation rate T ype o f O v erhe ad

bea re r ch a n ne ls (n x 64 K b/s )
No with 9 6 K b /s ID R w ith 6.7% IB S
overhe ad overhead overhe ad
8 512 x x
16 1024 x x
24 1544 x
30 2048 x
90 6312 x
12 0 8448 x
480 320 64 x
480 343 68 x
630 447 36 x
Note: “x” indicates the recommended rate corresponding to the type of

overhead.
7&0,'5 Performance of TCM IDR carriers will meet the requirements of Note 2 of
3HUIRUPDQFH Recommendation 3 of ITU R S.1062. Table 4.12 shows TCM IDR
performance figures.
Table 4.12 TCM IDR Performance
Weather Condition Minimum BER Performance Typical BER

(% of year) Performance
% of year
Clear Sky a10-9 for c 95.9% a10-10 for c 95.9%
Degraded a10-8 for c 99.36% a10-10 for c 99.36%
Degraded a10-6 for c 99.96% a10-10 for c 99.36%
Degraded Not Specified in ITU a10-5 for c 99.98%
&KDQQHO8QLW The channel unit consists of the following:
• Modulator/Demodulator (modem)
• Pragmatic TCM encoder/TCM decoder
• Scrambler/descrambelr
• Overhead framing unit
• Reed-Solomon encoder/decoder
• Interleaver/deinterleaver
• Switchability to QPSK/IDR mode of operation (optional)
Fig 4.58 illustrates TCM IDR channel unit.
The channel unit uses coherent 8 PSK modulation together with rate 2/3
pragmatic TCM encoding/decoding and Reed-Solomon (219,201) outer
coding. For TCM IDR carriers that have information rates less than 1.544
Mb/s, either no overhead framing or IBS overhead framing can be used.
For information rates equal to or greater than 1.544 Mb/s, an overhead
framing structure has been defined to facilitate the provision of ESCs and
maintenance alarms.
Switchability between the TCM IDR and QPSK IDR mode of operation is
an optional requirement that allows users to maintain backward
compatibility with existing QPSK IDR channel unit designs. Refer to
IESS 310 for detailed performance characteristics for TCM IDR
carriers.
%DQGZLGWK Compared to QPSK IDR, TCM IDR service typically uses about 20
(IILFLHQF\ percent less bandwidth per carrier, and almost the same satellite power
when used with Standard A antennas. Table 4.13 shows a typical
comparison between the two services.
Reed-Solomon
TCM Encoder
Synchronous Scrambler (219,201) 8 PSK Modulator
(Rate 2/3)
Encoder/Interleaver
To Upconverter
Information
Rate
Transmit
Channel Unit
RS Encoder
Reed-Solomon
TCM Decoder
Synchronous Descrambler (219,201) 8 PSK Demodulator
(Rate 2/3)
Decoder/Deinterleaver
From Downconverter
Information
Rate
RS Decoder
Receive
Channel Unit
Fig 4.58 Illustration of TCM IDR Channel Unit
Table 4.13 Typical Comparison between QPSK IDR and TCM IDR
QPSK IDR TCM IDR

Information rate 2 .048 Mb/s 2 .048 Mb/s
Number of 64 Kb/s channels 30 30
Overhead 96 Kb/s 96 Kb/s
Allocated Bandwidth 2002.5 kHz 1597.5 kHz
Number of 2 Mb/s carriers in 72 MHz 36 45
transponder (typical)
Number of 64 Kb/s channels in 72 MHz 1080 (36 x 30) 1350 (45 x 30)
transponder
Digital Satellite Communications Technology Handbook Appendix A - Echo Control
$33(1',;$
(&+2&21752/

,QWURGXFWLRQ This appendix provides information on:
• echo problems in satellite communications

• differences between echo suppressors and echo cancellers
• survey results that present the trend toward digitization and the use of
echo cancellers in the INTELSAT network
• problems that might arise in circuits using echo control, causes, and
solutions for those problems
• technical tradeoffs and costs for different cancellers
• capital investment considerations when deciding to procure and install
echo cancellers.

(FKR3UREOHPV Telephones are 2-wire devices and are connected by a hybrid to a 4-wire
LQ6DWHOOLWH&RP connection that transmits and receives the signal along the rest of the
circuit path. Because of impedance mismatch at the hybrid, some of the
PXQLFDWLRQV signal is reflected back towards the speaker, causing echo.
Echo is an inevitable component of sound transmission. However, in a

terrestrial communication, the time difference between the time that we
speak and the time that we hear is usually so small that we do not notice
the echo. However, the talker may hear the signal that is reflected after a
delay of 30 milliseconds (ms) as a "hollow" or "tinny" sound. If the signal
is delayed by more than 30 ms, the talker will hear a delayed and
distorted version of his own speech, making conversation very difficult. If
the delay is 500 ms, a full word may be heard in the form of an echo.
A relatively large transmission time is a contributing factor to echo

becoming audible that causes degradation. As distances between talkers
increase, the signal requires more time to travel the network’s entire path.
Note: This Appendix is based on INTELSAT’s Technical Manual on Echo

Control that discusses the results performed for INTELSAT on Echo
Control.
Because the satellites are in the geostationary orbit, approximately

23,800 miles from the Earth above the equator, transmission of an
electromagnetic signal from the ground to a satellite (uplink) and to the
distant receiver (downlink) will take approximately one-quarter of a
second (250 ms). This is termed a single hop. A double hop is a
transmission that involves two satellites and will take half a second. By
contrast, signals transmitted entirely over terrestrial lines have a much
shorter distance to travel and, therefore, echo plays a less important role
in terrestrial lines. However, a significant level of echo can occur in
terrestrial lines when delay is increased by complex digital signal
processing equipment as well as multiple network switches, channel
banks, multiplexers, and repeaters.

(FKR&RQWURO If echo in a telephone network is not controlled effectively, it interferes
with the desired signal and degrades the network’s transmission quality.
A strong echo may cause severe destabilization of a link making it
oscillate resulting in degradation of the signal due to multiple reflections.
Two types of echo control equipment are available:
• echo suppressor
• echo canceller

(FKR Echo suppressor is one of the early devices developed to control the
6XSSUHVVRU echo in satellite circuits. An echo suppressor is a voice-activated switch
that is set either to an “on” or an “off” position. The echo suppressor is
connected to the 4-wire side of a circuit. The suppressor terminates all
sound when it is in the “on” position, temporarily blocking the
communication link in one direction. When all communication is
suppressed in one direction, no echo, or new speech from the other end,
is transmitted.
During periods of double-talk, when both parties in a telephone

conversation speak simultaneously, suppressors may treat the new voice
as an echo and reduce its volume or partially block its transmission. With
suppressors, information losses occur not only in verbal conversation but
in the transmission of data via facsimile or modem as well. Because the
suppressor blocks the communication link, it can cause initial parts of
speech to be lost in transmission. This speech-clipping phenomenon
represents a severe shortcoming of the echo suppressor.
There is only one relevant ITU-T recommendation that applies to echo

suppressors. ITU-T Recommendation G.164 pertains to both analog and
digital echo suppressors.
Analog suppressors conforming to Recommendation G.161 are

considered obsolete by the ITU Telecommunication Standardization
Sector. INTELSAT recommended discontinuation of their use by June
1992.
:RUNLQJRI The function of an echo suppressor is to suppress echo by blocking the

(FKR signal in the reverse path. A voice-activated switch that is connected to
6XSSUHVVRUV the 4-wire side of a circuit enables suppressors. Because they are voice-
activated, or level sensitive, correct suppressor operation depends on the
accurate level detection of the signals presented on each input port.
While in the single-talk mode (when only one person is speaking), the
suppressor uses a complex level detection logic to compare the signals in
both directions of transmission to determine which talker (Talker 1-the
near-end talker or Talker 2-the far-end talker) is active at any given time,
and suppresses the transmission in the reverse path. Figure A-1
presents the block diagram of an echo suppressor.
Suppression Switch
Send-in Send-out
Near End/
Talker 1
Level and Far End/

Comparison Talker 2
Hybrid Logic
Received
Speech
6 dB
Rec-out Rec-in
Figure A.1 Echo Suppressor Block Diagram
ITU-T Recommendation G.164 classifies analog and digital echo

suppressors based on the transmission path characteristics and the type
of logic used for level detection and level comparison.
• Type A: Interfaces with analog signals, and uses analog circuit logic
and analog suppression
• Type B: Interfaces with analog signals, and uses digital circuit logic
and analog suppression
• Type C: Interfaces with digital signals, and uses digital circuit logic
and digital suppression
• Type D: Interfaces with analog signals, but uses digital circuit logic
and digital suppression
Type A generally uses nonadaptive logic for echo suppression. Types B,

C, and D may employ either adaptive or nonadaptive logic that is adjusted
according to the attenuation of the echo path. Adaptive echo suppressors
perform significantly better than nonadaptive ones by dynamically
adjusting the echo suppressor control to match the circuit conditions over
a wide input signal range.
3UREOHPVZLWK Suppressors have two problems: speech-clipping and double-talk.

6XSSUHVVRUV
6SHHFK&OLSSLQJ In Figure A-1, when only the far-end talker (Talker 2) is active, a switch is
opened on the send side that suppresses the echo returning to the far-
end talker. That is, it permits the signal of the instantaneous talker to be
transmitted to the near-end, but blocks the echo traveling the return path.
When Talker 1 initiates speech, the situation is reversed. However,

during this transition, the first few syllables of Talker 1 may remain
blocked due to its finite circuit reaction time. The suppressor at the far
end cannot quickly differentiate between echo and new speech from the
near-end. Disabling, or turning off the suppressor requires finite time for
completion. Thus, the far end listener cannot hear all that is spoken to
him because part of the voice signal is lost each time the suppressor is
disabled. This loss of the first syllable, or more, of a voice signal is called
speech clipping or chopping.
'RXEOH7DON If both the near-end and far-end talkers speak simultaneously (double-
talk), an enabled suppressor allows only one of the two talkers to be
heard. Because the suppressor cannot treat speech separately from
echo, echo spurts may be heard during double-talk because near-end
talker speech and far-end talker echo are simultaneously present in the
signal.
To reduce the problem of echo spurts, the echo suppressor is

programmed to stop echo suppression and start volume attenuation to
compensate for double-talk. To attenuate the signal, loss is injected in
the receive path, thereby reducing the volume of both the echo and new
voice signals.
Though digitally implemented echo suppressors perform better than

analog ones, all echo suppressors exhibit the inherent deficiencies.
When echo suppressors are implemented digitally, they provide improved
operation during double-talk. Their operation is critically dependent on
signal levels, as well as signal level differences, including thresholds used
for determining and identifying single- and double-talk conditions. When
the signals fall within the normal operating ranges and the Echo Return
Loss (ERL), or loss in signal level, is greater than 15 dB, the echo
suppressor performs well; otherwise, its performance rapidly degrades.

3ULQFLSOHRI Demand for high quality long-distance telephone service and advances in
(FKR&DQFHOOHUV signal processing technology prompted researchers to develop a new
device that would improve the echo suppressor performance. The end
product was the echo canceller.
The echo canceller removes echo from a telecommunication circuit

without blocking the communication link. This is accomplished by
sampling the far-end talker signal and internally generating a dynamic
model or replica of the incoming voice signal through an algorithm. This
replica is subtracted from the reflected signal as it passes through the
echo canceller on the return path, thereby canceling the echo component.
When echo cancellers were first introduced, their large size and high
costs discouraged widespread installation. However, digital signal
processing and improved manufacturing techniques have made echo
cancellers more attractive. Today, their many special advantages
including better performance, low-cost (especially in multichannel units),
self-testing ability, and adaptability to react to different circumstances in
the circuit have made echo cancellers the leading method of echo control
within the INTELSAT system.
Compared to the performance of echo suppressors, echo cancellers

improve the quality of voice service in telecommunication networks.
Cancellers adapt more easily to different communication environments
and circuit conditions. They allow simultaneous two-way conversation
(including double-talk) without loss of speech or syllables or volume
reduction, thereby offering overall high quality voice and data services.
Echo cancellers are voice-activated devices, which remove echo from the
circuit without attenuating or suppressing the voice signal. Like
suppressors, cancellers are positioned in the 4-wire side of the network.
However, instead of blocking a voice signal to remove the echo and
everything else as well, the echo canceller subtracts an estimate of the
echo from the returning signal. Figure A.2 shows a typical echo canceller
block diagram and Figure A.3 shows a typical transmission path.
There are different types of cancellers, and the design may be based
upon a single channel or multichannel operation. ITU-T
Recommendation G.165 addresses both analog and digital echo
cancellers and provides for three different types of such devices.
1. Type A: Interfaces with analog signals and uses an analog

subtracter.
2. Type C: Interfaces with digital signals and uses a digital subtracter.
3. Type D: Interfaces with analog signals and uses a digital
subtracter.
There are very few Type A cancellers. Type D cancellers are usually
found in applications where fewer circuits are involved. The majority of
cancellers sold today are Type C. They are available for multichannel
operation in increments of 24 or 30 channels, corresponding to the
primary digital hierarchy, T-1 or E1. The following discussion applies to
all types of echo cancellers unless a reference is made to a specific type.
Customer Network
Echo Canceller
side Side
Send-in
Send-out
- Non-Linear
Near End/ Processor
Talker 1
Correction Far End/

Control Talker 2
Double Talk
Hybrid
Detector
Echo
Estimate
Received
Speech
Rec-out Rec-in
Figure A.2 Block Diagram of Echo Canceller
ERL ERL
3 or 6 dB 3 or 6 dB
Talker 1 Normal Speech Path
x
Echo Return Path
A/D A/D
Long-Delay
Talker Talker
Terrestrial
Interface
Interface
/2 /4 /4 /2
Near 1’s 2’s Far
Hybrid Hybrid
Talker Echo Echo Talker
or Satellite
Canceller Canceller
Talker 1 Digital Network Talker 2
Echo Return Path

x
Talker 2 Normal Speech Path
Note: An echo canceller al Talker 2’s end cancels echo only for Talker 1’s speech, and only Talker 1 can hear the
difference that Talker 2’s echo canceller makes in the quality of the connection
Figure A.3 Typical Transmission Path
Refer to Figure A.3. In the transmission path when Talker 1 (the near-end
talker) speaks, the voice signal is transmitted through a hybrid, the point
where a 2-wire circuit becomes a 4-wire circuit, at the near-end. It is
transmitted through a channel bank or multiplexer. Talker 1’s speech
signal passes transparently through Talker 1’s echo canceller, the near-
end canceller, before being placed onto a long-distance terrestrial or
satellite network. After its journey through the network, Talker 1’s signal
passes through Talker 2’s echo canceller, into the channel bank
equipment that converts the signal from digital to analog so that it can be
heard. The analog signal is finally passed through a second hybrid to
Talker 2’s telephone.
When the voice signal reaches the end of the satellite or terrestrial
network, it passes through the echo canceller on its way to the intended
receiver (Talker 2’s telephone) before it is converted from a 4-wire to a 2-
wire. The far-end echo canceller performs a large number of samplings
and complex calculations within a short time, referred to as convergence
time. This parameter is a measure of the efficiency of the echo canceller
operation. The echo canceller estimates the voice signal pattern and
makes a model of that pattern. This process, called convergence, is the
process of dynamically developing a mathematical model of the voice
signal.
When the reflected echo passes through the echo canceller on the echo
return path, the echo canceller subtracts the estimated echo from the
actual echo based on the convergence model. Any residual error signal
is used to improve the model for the next estimate. The digital echo
canceller employs digital signal processing to dynamically update the
model of the echo with variations in the incoming signal and network
response, allowing the model to adapt continuously to changing speech
pattern and circuit conditions.
Convergence time measures the speed of the echo canceller in

constructing the mathematical model. The smaller the convergence time,
measured in milliseconds, the more efficient the echo canceller, and the
more precise is the cancellation so that voices are crisp from the very
beginning of speech.
After convergence, most of the echo is cancelled without affecting any

new speech in the send path. However, the echo canceller may not be
perfect in cancelling the echo due to errors in the model and limitations in
convergence and quantization noise. For the single-talk condition, a
nonlinear processor (NLP) attenuates the residual echo. The NLP, also
called the center clipper, attenuates, or fine tunes, the volume of the
remaining echo to an inaudible level. In the event of double-talk, a
detector recognizes the double-talk condition, removes the nonlinear
processor, and disables the adaptive loop to prevent the near-end talker’s
speech from causing improper corrections to the impulse response of the
echo canceller.
ERL is the loss in signal level that occurs while the signal travels through
the network’s end-path. The end-path is the portion of the network from
the echo canceller’s receive-out port to the send-in port. The most
sensitive echo cancellers have ERL near zero, meaning that the canceller
can perform when there is almost no measurable difference between the
level of the original voice signal and that of the echo. A typical value of
ERL is 6 dB. The value of ERL is an important factor in determining the
overall performance of the echo canceller.
Echo Return Loss Enhancement (ERLE) indicates the level of echo the
speaker will hear after the voice signal has been processed through the
canceller. ERLE is the sum of the network’s end path ERL, and the
effects of the canceller with and without the NLP. Like ERL, ERLE is also
measured in decibels. ERLE and convergence time are two basic
measures of a canceller’s performance.
The end-path, as stated earlier, is the portion of the network from the
receive-out port of the echo canceller to its send-in port. The echo
canceller’s end-path delay corresponds to the maximum length of time
that a signal may take in travelling around the network’s end-path, and still
be cancelled when it returns to the canceller through the send-in port.
Current designs of echo cancellers can typically accommodate end-path
delays ranging from 8 ms to 128 ms. For optimum performance, it is
necessary to have an echo canceller with an end-path delay capability
that is long enough to accommodate the longest end-path delay possible
in the network.
Data tone disablers temporarily disconnect digital echo cancellers during

high-speed (greater than 9600 baud) data transmissions by a facsimile
machine or modem. At lower speeds, the digital echo canceller can
accommodate digitally encoded data because it is designed to be
transparent.
Signaling refers to the ways an echo canceller accommodates the various

signaling formats that precede any transmission such as those which
initiate a phone or fax transmission. Even though the echo canceller has
no active role in signaling, the canceller must be transparent to the
signaling format used.
&RVW)DFWRUV If a digital carrier system is available, in either T-1 or E1 format, it will be

cost effective to use digital echo cancellers. Even in single channel
applications, some voice codecs may be purchased with an optionally
equipped echo canceller. Also, some PBXs are available with built-in
echo cancellation.
Recent developments in the large-scale integration technology for digital

echo cancellers have further enhanced performance, while significantly
adding to the flexibility and efficiency. Improvements have included larger
tail-end delay values and multichannel systems. Discounts, particularly
for volume purchases, are available from most manufacturers making the
use of digital echo cancellers even more attractive.
Cost savings can usually be realized through the use of multichannel

cancellers. If a channel bank must be added for the multichannel
canceller, then the cost of the multichannel canceller will be somewhat
higher. Typically, the cost of 18 single channel cancellers will be equal to
the cost of a T-1 channel bank and a T-1 echo canceller.
Single channel cancellers are more expensive to install. The cost of a

mounting shelf, which can contain up to 12 cancellers, must be added to
the single channel cost. Single channel echo cancellers are also more
complex to install. A multichannel echo canceller input consists of four
pairs of wires: Send-in, Send-out, Receive-in, and Receive out that
provide input and output for 24 channels. By contrast, 96 pairs must be
connected for 24 single channel units.
The cost of a digital E1 EC-6000 echo canceller ranges from $150 to

$215 per installed channel. This cost includes variations in the number of
channels installed per shelf, tail circuit lengths (8 to 128 ms) and signaling
options.
5HOLDELOLW\ Multichannel digital cancellers generally come with some form of

diagnostic and network control capability. Some units have an automatic
self-test of idle channels with an error listing provided to either a control
terminal or a printer. One manufacturer provides two backup cancellers
in the event of a failure in a particular channel. The manufacturers list a
mean time between failure (MTBF) greater than 20 years in their
specifications for these cancellers.
0DLQWHQDQFH Maintenance costs are lower for multichannel cancellers. Single channel
units must be individually tested. By contrast, multichannel cancellers
provide terminal and remote access by means of an RS-232 v.24 port
with built-in automatic self-test and error reporting functions.

6XPPDU\ Over the last 25 years, subjective tests have been conducted to compare
the quality of satellite links with that of the terrestrial links. Tests have
shown that a primary cause of quality degradation is echo. Pure delays,
delays without any echo, up to a few hundred milliseconds do not
significantly degrade the communications quality of a voice circuit.
However, in some instances, a round-trip delay in excess of 30 ms may
cause the echo to become objectionable, and the communications quality
degraded unless these echoes are eliminated by suitable echo control
devices. Further, it is necessary that the circuits to which these devices
are connected be properly maintained for the echo control devices to
perform adequately.
Field trials in the United States by the Bell system clearly demonstrated
that echo canceller-equipped satellite circuits operating in the U.S.
domestic network performed as well as terrestrial circuits.
They also indicated that the echo suppressors, conforming with ITU-T
Recommendation G.161 for long propagation delay circuits, impair
speech transmission, and result in chopping, echo spurts, and a general
degradation of circuit performance. New ITU-T Recommendation G.164-
type digital echo suppressors, which operate with shortened hangover
times, improved logic for the control of echo suppression and break-in,
also improve performance, but not to the same extent as the echo
cancellers.
Tests were also performed on composite circuits in which satellite links

are used in one direction, and terrestrial links in the other, reducing round-
trip transmission delay. The results for the composite circuits were better
than for the all-satellite circuit with the same echo suppressors. However,
the results for the composite circuits with only suppressors were no better
than the echo cancellers on the all-satellite circuit.
Results of many field trials have proven that even with the long
propagation delays of the satellite, echo cancellers can provide a circuit
quality comparable to that of terrestrial circuits. Unlike circuits using echo
suppression, echo cancellation makes it possible to permit full-duplex
communication without interruption. Advances in circuit miniaturization,
digital signal processing, and manufacturing techniques have made echo
cancellers cost effective. The cancellers’ self-testing capability and
audible performance characteristics make them superior to echo
suppressors from both technological and practical viewpoints. INTELSAT
recommends that echo cancellers conforming to or exceeding ITU-T
Recommendation G.165 requirements be placed on all voice circuits
transported over the system.
Digital Satellite Communications Technology Handbook Glossary
Glossary
Acronyms and Abbreviations

Adaptive Differential Code-Excited Linear Prediction (ADCELP)
Adaptive Differential Pulse Code Modulation (ADPCM)
Adaptive PCM (APCM)
Adaptive Predictive Coding (APC)
Adaptive Transform Coding (ATC)
Alarm Indication Signal (AIS)
Alternate Mark Inversion (AMI)
Amplitude Shift Keying (ASK)
ARQ (Automatic Repeat reQuest)
Band Pass Filter (BPF)
Bearer Channel (BC)
Binary Phase-Shift Keying (BPSK)
Bit Error Rate (BER)
Channel Associated Signaling (CAS)
Channel Translating Equipment (CTE
Circuit Multiplication Equipment (CME)
Coded Mark Inversion (CMI)
Code-Excited Linear Prediction (CELP)
Common Channel Signaling (CCS)
Control Channel (CC)
Cyclic Redundancy Checking (CRC)
Data Circuit Terminating Equipment (DCE)
Data Terminal Equipment (DTE)
DCME Link Dimensioning (DLD)
Degraded Minutes (DM)
Demand Assigned Multiple Access (DAMA)
Digital Channel Occupancy Analyzer (DCOA)
Digital Circuit Emulation (DICE)
Digital Circuit Multiplication Equipment (DCME)
Digital Speech Interpolation (DSI)
Dynamic Load Control (DLC)
Echo Return Loss (ERL)
Echo Return Loss Enhancement (ERLE)
Electronic Data Interchange (EDI)
Electronic Mail (email)
Engineering Service Circuit (ESC)
Fax Control Channel (FCC)
Fax Data Channel (FDC)
Fax Module Frame (FMF)
Fax Transport Channels (FTC)
Forward Error Correction (FEC)

Frame Alignment Word (FAW)
Frame Data Word (FDW)
Frame Relay Access Device (FRAD)
Frequency Division Multiple Access (FDMA)
Frequency Shift Keying (FSK)
Headquarters Management Facility (HQMF)
High Density Bipolar (HDB)
High-Level Data Link Control (HDLC)
Hughes Network Systems (HNS)
Hypothetical Reference Connection (HRX)
INTELSAT Business Services (IBS)
INTELSAT Earth Station Standards (IESS)
INTELSAT Operations Center (IOC)
INTELSAT Signatory Training Program (ISTP)
INTELSAT’s Assistance and Development Program (IADP)
Intermediate Data Rate (IDR)
Intermediate Frequency (IF)
Intermediate Trunk (IT)
International Organization for Standardization (ISO)
International Telecommunication Union (ITU)
International Transmission Maintenance Center (ITMC)
Internet Service Providers (ISPs)
International Switching Center (ISC)
Justification Control Word (JCW)
Least Significant Bits (LSBs)
Linear Predictive Coding (LPC)
Local Area Network (LAN)
Low Delay-Code Excited Linear Prediction (LD-CELP)
Low Rate Encoders (LREs)
M-ary PSK (MPSK)
Metropolitan Area Network (MAN)
Multiframe Alignment Word (MFAW)
Nearly Instantaneous Companding (NIC)
Network Access Point (NAP)
Network Management Control Center (NMCC)
NonLinear Processor (NLP)
North American Systems (NASs)
Open Systems Interconnection (OSI)
Packet Circuit Multiplication Equipment (PCME)
Phase Noise (PN)
Phase Shift Keying (PSK)
Public Switched Telephone Network (PSTN)
Pulse Amplitude Modulation (PAM)
Pulse Code Modulation (PCM)
Quadrature Amplitude Modulation (QAM)

Quadrature Phase Shift Keying (QPSK)
radiofrequency (RF)
Satellite Switched TDMA (SS-TDMA)
Single Channel Per Carrier (SCPC)
Single Frequency (SF)
Time Division Multiple Access (TDMA)
Time Division Multiplexing (TDM)
Time Slot (TS)
Trellis-Coded Modulation Intermediate Data Rate (TCM IDR)
Trunk Channels (TCs)
Voltage Controlled Oscillator (VCO)
Very Small Aperture Terminal (VSAT)
Virtual Data Link Capability (VDLC)
Wide Area Network (WAN)
World Wide Web (WWW)

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PREFACE

The INTELSAT Digital Satellite Communications Technology

INTELSAT will update the handbook from time to time. Please

Telephone: +1 202 944 7070

First printed on: December 1989

1.1 INTELSAT Overview .................................................................................................... 7

Chapter 2 - Digital Basics

2.1 Pulse Code Modulation (PCM)..................................................................................... 9

Chapter 3 - Modem Basics

Last Updated: 12 March 1999 Page 3 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

4.1 Network Architecture: Principles and Applications................................................... 129

Appendix A - Echo Control

1.0 Introduction .............................................................................................................. 215

Last Updated: 12 March 1999 Page 4 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Last Updated: 12 March 1999 Page 5 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Since INTELSAT first began operations in 1965, communications

In accordance with its charter, INTELSAT provides international public

The successful implementation and growth of the INTELSAT system

Last Updated: 12 March 1999 Page 7 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

enabled countries with different political systems and economic

The achievements of INTELSAT during its relatively short history

To encourage digitalization, INTELSAT has introduced new digital

Now, more and more traffic carried by INTELSAT uses digital

Last Updated: 12 March 1999 Page 8 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

 The object of any transmission system is to produce at the output, an

PCM is the representation of a signal by a series of digital pulses;

3ULQFLSOHVRI Sampling of an analog waveform results in a train of Pulse Amplitude

Last Updated: 12 March 1999 Page 9 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

In an analog system, the amplification of the signal at repeaters also

REGEN DECODER Reformed analog

Figure 2.1 Simplified Digital Transmission System

Last Updated: 12 March 1999 Page 10 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Representing the original signal by discrete values which leads to a

Systems using codes to represent discrete signal values (samples) are

4XDQWL]DWLRQ In practice, it is almost impossible to transmit information about the exact

Last Updated: 12 March 1999 Page 11 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Provided that line impairments do not prevent a correct decision regarding

(Note: If the analog/digital transformation is made more than once, the

Figure 2.2 Linear Quantization using 8 Levels and 3-Bit Code

Last Updated: 12 March 1999 Page 12 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Quantization error will be less if there are smaller steps. However,

Quantization noise depends on step size and not on signal amplitude. If

A-Law characteristic is most commonly used throughout the world. A

Last Updated: 12 March 1999 Page 13 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

96 16 steps each of range

80 16 steps each of range 16 amplitude units 1xx xxxxx

48 16 steps each of range 4 amplitude units

16 steps each of range 1 amplitude unit

input signal level

Figure 2.3 ITU-T A-Law Encoding Characteristics: Positive Values

Last Updated: 12 March 1999 Page 14 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

&RPSDUDWRU The comparator output has two states:

5HFHLYH The incoming bit pattern at 32 Kb/s is applied to an integrator identical to

/LPLWDWLRQV The integrator voltage variations are, at best, only an approximate

Last Updated: 12 March 1999 Page 15 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Figure 2.4 Principles of Delta Modulation

Last Updated: 12 March 1999 Page 16 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

Figure 2.5 Process of Delta Modulation

 Delta modulation is one of the groups of codes known as Differential

Last Updated: 12 March 1999 Page 17 of 229 Doc. No.: DIGITECH-1998-HNDBK-102

ADPCM is a code recognized by INTELSAT and the ITU-T as a method

One practical use of APCM is Nearly Instantaneous Companding (NIC),

TRAFFIC INPUT RESULTING

Figure 2.6 ADPCM Principle

The object of any transmission system is to produce at the output, an

Delta modulation is one of the groups of codes known as Differential

/'&(/3 Figure 2.11 shows a simplified block diagram of an LD-CELP encoder.

/'&(/3 Figure 2.12 shows a simplified block diagram of an LD-CELP decoder.