EE 4218 AES Major Project Briefing

Akash Kumar

Project Guidelines
Work in pairs Develop a 128-bit AES decryption engine In C language running on a Microblaze-based platform on FPGA In VHDL running on FPGA While one C-implementation is sufficient, multiple

VHDL alternatives should be explored in terms of area and timing Measure speed-ups Plot all implementations on a Pareto curve
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Pareto Curve
Resources

Performance-1

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Project Implementation
Key and Encoded image Encoded and Decoded image

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Microblaze-based Design
Read the key & encoded image from serial port FSL FIFO Run on MB and on hardware, and compare speedup Decrypt the image with the key Decrypt the image with the key FSL FIFO Display the encoded and the decoded image Running on Microblaze
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Dummy design inverts the colours

What is Provided!
A very useful wiki page:

http://wiki.nus.edu.sg/display/ee4218
Links to resources Updates FAQs

A basic Microblaze-based design on FPGA A dummy co-processor attached to Microblaze

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ADVANCED ENCRYPTION STANDARD

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Sources
Cryptography and Network Security by

Behrouz A. Forouzan, 2008, (book and slides) Mc Graw Hill. AES Wiki page: http://en.wikipedia.org/wiki/Advanced_Encryption _Standard Flash animation by Enrique Zabala (very useful): http://www.cs.bc.edu/~straubin/cs38105/blockciphers/rijndael_ingles2004.swf
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Advanced Encryption Standard (AES)

AES is a symmetric-key encryption standard

adopted by the U.S. government Developed by two Belgian cryptographers Vincent Rijmen and John Daemen: also known as Rijndael Standard has three key-sizes 128, 192, 256 bits For the project, use key-size of 128 bits Block size is also 128 bits (16 = 4x4 bytes) AES ciphers used worldwide.
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Encryption and Decryption

Plain Text
Add Round Key Sub Bytes

Plain Text
Add Round Key

Cipher Key

Inv Sub Bytes Inv Shift Rows Inv Mix Column Add Round Key Inv Sub Bytes Inv Shift Rows Add Round Key

Repeated in 9 Rounds

Shift Rows Mix Colums Add Round Key Sub Bytes Shift Rows Add Round Key

Repeated in 9 Rounds

Cipher Text

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Plain Text (Data) Generation

1 byte = 8 bits

b0 b1 b2 b3 b4 b5 b6 b7

1 Word = 4 bytes

b0 b1 b2 b3

1 Block = 4 words

b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 b4 b5 b6 b7 b8 b12 b9 b13 b10 b14 b11 b15

b0 b1 b2 b3

Starting point for AES Encryption

1 State = 1 block

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Substitute Bytes

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Substitution Box
0x 0 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 0 63 ca b7 4 9 53 d0 51 cd 60 e0 e7 ba 70 e1 8c 1 7c 82 fd c7 83 d1 ef a3 0c 81 32 c8 78 3e f8 a1 2 77 c9 93 23 2c 0 aa 40 13 4f 3a 37 25 b5 98 89 3 7b 7d 26 c3 1a ed fb 8f ec dc 0a 6d 2e 66 11 0d 4 f2 fa 36 18 1b 20 43 92 5f 22 49 8d 1c 48 69 bf 5 6b 59 3f 96 6e fc 4d 9d 97 2a 6 d5 a6 3 d9 e6 6 6f 47 f7 5 5a b1 33 38 44 90 24 4e b4 f6 8e 42 7 c5 f0 cc 9a a0 5b 85 f5 17 88 5c a9 c6 0e 94 68 8 30 ad 34 7 52 6a 45 bc c4 46 c2 6c e8 61 9b 41 9 1 d4 a5 12 3b cb f9 b6 a7 ee d3 56 dd 35 1e 99 a 67 a2 e5 80 d6 be 2 da 7e b8 ac f4 74 57 87 2d b 2b af f1 e2 b3 39 7f 21 3d 14 62 ea 1f b9 e9 0f c fe 9c 71 eb 29 4a 50 10 64 de 91 65 4b 86 ce b0 d d7 a4 d8 27 e3 4c 3c ff 5d 5e 95 7a bd c1 55 54 e ab 72 31 b2 2f 58 9f f3 19 0b e4 ae 8b 1d 28 bb f 76 c0 15 75 84 cf a8 d2 73 db 79 8 8a 9e df 16

Inverse Substitution Box

0x 0 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 0 52 7c 54 8 72 6c 90 d0 3a 96 47 fc 1f 60 a0 17 1 9 e3 7b 2e f8 70 d8 2c 91 ac f1 56 dd 51 e0 2b 2 6a 39 94 a1 f6 48 ab 1e 11 74 1a 3e a8 7f 3b 4 3 d5 82 32 66 64 50 0 8f 41 22 71 4b 33 a9 4d 7e 4 30 9b a6 28 86 fd 8c ca 4f e7 1d c6 88 19 ae ba 5 36 2f c2 d9 68 ed bc 3f 67 ad 29 d2 7 b5 2a 77 6 a5 ff 23 24 98 b9 d3 0f dc 35 c5 79 c7 4a f5 d6 7 38 87 3d b2 16 da 0a 2 ea 85 89 20 31 0d b0 26 8 bf 34 ee 76 d4 5e f7 c1 97 e2 6f 9a b1 2d c8 e1 9 40 8e 4c 5b a4 15 e4 af f2 f9 b7 db 12 e5 eb 69 a a3 43 95 a2 5c 46 58 bd cf 37 62 c0 10 7a bb 14 b 9e 44 0b 49 cc 57 5 3 ce e8 0e fe 59 9f 3c 63 c 81 c4 42 6d 5d a7 b8 1 f0 1c aa 78 27 93 83 55 d f3 de fa 8b 65 8d b3 13 b4 75 18 cd 80 c9 53 21 e d7 e9 c3 d1 b6 9d 45 8a e6 df be 5a ec 9c 99 0c f fb cb 4e 25 92 84 6 6b 73 6e 1b f4 5f ef 61 7d

Shift Rows/ Inverse Shift Rows

Shift Rows (to LEFT)

Inv Shift Rows (to RIGHT)

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Mix Columns/ Inverse Mix Columns

Inv Mix Column

(C-1(x) b)

Mix Columns

C(x)a
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Mix Columns/ Inverse Mix Columns

02 01 B =C A= 01 03 03 02 01 01 01 03 02 01 01 x 2 x + 3 y + z + t 01 y x + 2 y + 3z + t = 03 z x + y + 2 z + 3t 02 t 3x + y + z + 2t

0 E 0 B 0 D 09 09 0 E 0 B 0 D C 1 = 0 D 09 0 E 0 B 0 B 0 D 09 0 E

C B = C C A = A
Inverse Mix Column
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Add Round Keys

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Add Round Keys

Bit-wise add is essentially an XOR operation XOR operation
A 0 0 1 1 B 0 1 0 1 Z 0 1 1 0

A K = B B K = A K K = A0 = A
Therefore, adding round key two times returns

original value (so long as the key is the same)

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KEY EXPANSION

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Key Expansion
11 different keys needed in total First one is the cipher key

Other ten generated from cipher key

128-bit AES = 16-byte AES i.e. 16 byte KEY

b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15

W0 W1 W2 W3

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Key Expansion
Round Pre-round Round 1 Round 2 Round 3 Round 4 Round 5 Round 6 Round 7 Round 8 Round 9 Round 10 w0 w1 w2 w3 w4 w5 w6 w7 w40 w41 w42 w43
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Key

Key Expansion

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Rotate Word & Substitute Word

RotWord: Rotates the four bytes in a word by one

byte
B0 B1 B2 B3 B1 B2 B3 B0

SubWord: substitute individual bytes by subByte

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Round Constants
In each round a different word is added (XORed)
R1 01 00 00 00 R2 02 00 00 00 R3 04 00 00 00 R4 08 00 00 00 R5 10 00 00 00 R6 20 00 00 00 R7 40 00 00 00 R8 80 00 00 00 R9 1B 00 00 00 R10 36 00 00 00

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Observations
Note that for decryption the keys are needed in

reverse order Key schedule generation can be pipelined note the dependencies in Slide 23 See if there is any potential of hardware reuse You may want to test your design with test vectors provided in official AES standard available on the EE4218 Project Wiki

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