MB

2005.12

Caspar_zhang

Intel
AMD

ATX +12V -12V +5V -5V +3V +5VSB

DC-DC ATX
DC-DC PWM
+5vsb+3vsb
vcore PWM +3V_DUAL
+3v +3vsb MOSFET

+12V -12V +5V (-5V) +3V

+5VSB +3VSB +1.5VSB +1.5V +5V_Dual
+3V_DUAL +2.5V_DUAL + 2.5V_DAC 1.8V_Dual
VCORE VTT_DDR VTT+_CPU ect.

ATX Power Supply

+5VSB: Pin9
+3V: Pin1,2,12,13
+5V: Pin4,6,21,22,23
+12V: Pin10,11
-12V: Pin14
GND: Pin3,5,7,15,
17,18,19,24
PS_ON#: Pin16
PWROK: Pin8
NC: Pin20
ATX2.2

ATX Power Supply

+12V: Pin3,4 CPU Vcore
GND: Pin1,2

ATX2.2

ATX Power Supply

Voltage

Tolerances

+5VSB

+5VSB: Standby power power down state

, :Standby and Dual
power.
ATX 10mA.
USB , ,
. Power supply 2A .
Tolerance: +5V 5%
stand by power :Super I/O,
South Bridge,LAN chip,etc. S3
Memory +2.5V dual.

+3.3V

+3.3V.
+3.3V Power Supply .
5A .
: Audio Chipset; PCI; PCIEX;
South Bridge; SIO; Bios;

5V
IO +5V, :
KB&MS,USB,F_PANEL .
IO Super I/O.
2.-5V .
1.

12V
1.+12V

Vcore(P5&P4&K8
,K7 5V Vcore ).
2.+12V PCI slot,AGP
slot,COM ,FAN power .
3.-12V PCI slot COM
.

+2.5V_Dual

, A8 CPU
.
2. Linear Regulator
+3V_Dual . Switch
Regulator +5V_Dual .
1.

+2.5V
+2.5V +2.5V_Dual MOS
, +12V MOS gate . S3
+2.5V . .

+2.5V_DUAL =-> +2.5V

Q 23

+ 2 .5 V _ D A U L

+ 2 .5 V

2 S

N D S 351N

+12V

1
8 .2 K O h m

V D D A _E N

<34>
2

P R 12

GND

P C E 6
1 0 U F /2 5 V
/X

PSON#
PSON# , Low ,Power
Supply +3.3V,+5V,-5V,+12V,-12V .
High ,Power Supply
.
Soft Power down
. .

.
pull up +5VSB.
User Power Button , Super I/O
low, Power Supply .

PWROK

PWROK OK . +3.3V
and +5V Normal 95% , Power
Supply .
+3.3V or +5V Normal 95%
,Power Supply Low.
, ok,
.
,
. ASIC +3.3V and +5V
, , ASIC
PWROK . ASIC
AS016,W83627EHF .
PIN

Intel

AMD

Intel

P5+Intel915G

(P5GD2-VM ).

1. .
2. .
3. Power Buttom
.

1.

RTCRST#&V_3V_BAT
.
Crystal 32.768KHz .

2.
SIO Check +5VSB .
+5Vsb +3VSB.
SIO RSMRST# +5VSB
OK.
SUSCLK (32KHZ).

3. Power Buttom

,
PWRBTN# SIO SB.
SIO IO_PWRBTN# .
SB SLP_S3# SLP_S4# SIO.
SIO PS_ON#(Low) ATX Power.
ATX Power PSON# HighLow
,ATX Power 12V, +3.3V,
5V Main Power .

3. Power Buttom

+3.3V and +5V

Normal 95% , ATX Power
Supply PWROK_PS Super
IO, Super IO ATX Main Power
OK.
Super IO VCC&PWROK_PS ,
PWROK . ATX
Main Power OK.

3. Power Buttom

ATX Power 12V, +3.3V, 5V Main

Power , +VTT_CPU,+1.5V,
+2.5V_DAC,+ 5V_Dual,+3V_Dual,+1.8V_Dual
.
+VTT_CPU CPU ,CPU VTT_PWRGD
[High] CPU;ICS;VRM;
CPU VTT_PWRGD VTT_CPU Spec
,OK CPU VID[0:5].
VRM VTT_PWRGD VID
Vcore.
VCORE ,Processor Voltage
Regulator VRMPWRGD ICH6,
VCORE .

3. Power Buttom

VTT_PWRGD

SLP_S3#&VTT_PWRGD
OK ( ,
High),
CK_PG
High.

Q1 , CK_PG#
HighLow.
ICS
Clock
Generator(ICS);
Clock
+3V_CLK Drive Crystal 14.318MHz OK ,ICS
Generator
Clock.

Clock.
1) : S3 CK_PG#(
VTT_PWRGD#/PD)
Low-->High, Keep ICS Register Data,
S3 ,

3. Power Buttom

Clock OK ,
PLTRST# PCIRST# Device.
The ICH6 drives PLTRST# inactive a
minimum of 1 ms after both PWROK and
VRMPWRGD are driven high.
PLTRST# PCIRST# :
A.PLTRST# : Platform Reset
PCIRST#:
PCI Reset
B.PLTRST# connected to all component that
previously need PCIRST#,except PCI slots
and devices. PCIRST# is connected to PCI
Devices and slots without resetting
system.
C.PLTRST# is higher than PCIRST#.

3. Power Buttom

NB PLTRST# 1ms
, CPURST# CPU, CPU
.( CPURST#
&Clock OK
);

P5GD2-VM

3v_Bat

IO_PWRBTN#

SIO

PS_ON#

SLP_S4#

NB

PCIRST#

PCI Device

CPURST#

+5v

PLTRST#

+3.3v

PWROK

+12v

PWRBTN#

CPU

ATX

D GR WP_ TT V+

SB

SLP_S3#

UP C_ TT V+

+3Vsb

V +VID[ 0:5 ]
R
Vcore
M

RSMRST#

RTC_RST#
32.768

+VTT_PWRGD

PWROK_PS

+3VSB

CPUPWRGD

VRMPWRGD

AMD
A8

+
k8 +
k8 +
A8 +

Nforce4
K8T800+VT8237
Sis760+Sis965
ATIRD480+M1573

A8N-SLI

+3vsb1

CPU_PWOK 14
VCORE 12
+1.2V_HT 11
CPURST# 15

25MHZ 1

CPU

PWROK 9.

3.3&1.5PLL 7
+1.5v 7

A8 + Nforce4 (A8N-SLI )

+5VSB 1

Nforce4

SLP_S3# 5
SIO_PWBTIN 4.

PSON# 6.
CPUVDD_EN10

VCORE&HTT
VCORE 12

+1.2V_HT 11

+12V 7

PWRBTIN 3.

HTT_EN 10

HTT_VLD 13

VCORE_PG 13

PWRGD_SB 2.

ATX

SIO

+12V&+5V&+3V 7

ATX_PWRGD 8.

K8V-MX
K8 + K8M800+VT8237 (K8V-MX )
CPU_PWOROK 18
CPU_RST# 20

RSMRST# 2.

SUSC# 5.
SUSB# 6.

SIO

+12V 9

SB_PCIRST 19

NB_PWROK 18

NB

+2.5_en 12

ATX_PWRG 10

+1.2_en 16
+2.5vual_ref 11
VCORE_PG 15

VCORE_EN 13
VCORE_PG 15

VCORE_EN 13

ITE8282M

PSON# 8

ATX

Cpu_rst# 20

SB_PWROK 17

PSON_SIO# 7

CPU_PWOROK 18

VRM

VCORE 14

SIO_PWRBTIN# 4

SB

CPU

+3VSB 1.

PWRBTIN# 3.

+12&+5v&+3v 9

IT8282M

CPU_PWRGD

+2.5V

+1.2V

+1.2V

+3VSB

NE_ E R OCV

# N OSP_ XT A

NB
SIS760

ATXPWROK

SB_PSON#

AC_PWR

W83627EHF

VCORE

CPU

ATX
Power

RSMRST#

PWRBTN#

V
R
M

CPU_PWGD

+5VSB
-12V
+5V
+3V
+12V

# T S R_ EI CP

# T S RE DI

# T S RT OL SI CP

SIO

SIS965L

# T S RI CP

# T S RS O
IB

# T S RP GA

+3VSB

SB

k8 + Sis760+Sis965 (K8S-MV )

D G WP_ E R OCV

CPU_PWRGD

K8S-MV

+1.2V_ref_EN

+2.5V_Dual_ref
(DIMMPWR_EN)

+2.5V_dual

CPURST#

+2.5V_ref
+2.5V

Power
modules

A8R-MVP

ASIC_CPUPWGD
NB_CPUPWGD

IT8282M

+1.2V_EN
+2.5v_EN

VDIMM_DUAL_EN

L A UD_ V5. 2+

NB
RD480

PS_ON#

V5. 2+_ A DDV

BSV5+

PWRBTN#

T H_ V2. 1+

ITE8712F

NE_ E R OCV

# T S RE DI

# T S RS O
IB

# T S R_ EI CP

ATX
D G WP_ MRV

SB_PWRGD

CPU

PWROK_PS

M1573

VCORE

+5V

SIO

# N OSP_ XT A

SLP_S5#

# T S RT OL SI CP

SLP_S3#

# T S RP GA

SB_PWRBTN#

V
R
M

+12v

SB

RSMRST#

A8 + ATIRD480+M1573 (A8R-MVP )

+3v

K OR WP UP C_ BS