Programmable Controller Basics

Files And Programs

MicroLogix Packaged Controllers

We are going to discuss...

1. What Are Program Files

2. Program File Functions 3. Ladder Logic Concepts

4. I/O Addressing
5. Logic 6. Examples

Memory Organization

PROGRAM FILES

DATA FILES

Integer Files Control File Counter File Timer File Bit File Status File Input File Output File

6 - 15
STI File HSC File Error File Main Program Reserved System

Subroutine Files

MicroLogix 1000 only

MicroLogix 1000 MEMORY

Memory Organization

MicroLogix 1000 MEMORY

PROGRAM FILES

STI File HSC File Error File Main Program Reserved System

5 6 - 15
Subroutine Files

MicroLogix 1000 only

File 0 - System File

Dedicated & Reserved file Used to store various system related information.
Processor type and configuration Communication parameters I/O configuration Passwords Misc...

File 1 - Reserved
Future
New enhancements New features New functionality

File 2 - Main Program

Dedicated & Open file Main Ladder Program
Typically is where the main user program resides Must have some program logic

File 3 - Error File

Preconfigured and Open file
Referred to as the Error Subroutine

Will be scanned whenever a recoverable fault is detected

certain errors and inhibit a shutdown)

(Allows users to clear

Recoverable faults include:

Retentive data lost (0005) Startup protection after power loss (0016) Minor Error at end of scan (0020) File boundaries violated ( Sequencers 0032, Stacks and Bit Shifts (0033) Negative data in ACC or PRE of a timer (0034) Invalid HSC preset (0037)

May be used as a user subroutine, but is not recommended

File 4 - High Speed Counter File

Preconfigured and Open file
Referred to as the HSC Subroutine Will be scanned whenever a HSC interrupt occurs HSC Interrupts are:
Preset data value is reached (High or Low) Underflow or Overflow conditions are detected

May be used as a user subroutine, but is not recommended

File 5 - Selectable Timed Interrupt File

Preconfigured and Open file
Referred to as the STI subroutine Scanned whenever the STE instruction is set (1) Adjustable interval, 10msec resolution May be used as a user subroutine, but is not recommended

Files 6-15 - User Subroutines

Open Files
Typically used for application specific requirements. Accessed from file 2 (Main program) through special program flow instructions
JSR SBR RET Jump to Subroutine and return Subroutine Identifier Ret to Main program

Nesting of subroutines is allowed (8 Levels allowed, 3 Levels if the

Error, HSC or STI subroutines are enabled)
MicroLogix 1000 and SLC 500 only

Relay Ladder Logic (RLL)

What is Relay Ladder Logic?
Is the primary programming language for PLCs A graphical representation of the program designed to look like relay logic

Ladder Logic Concepts

Read / Conditional Instructions
Start (Rung #1)

Write / Control Instructions

|| || || || || || |/| |/| |/|

() () () ()

End (Rung #5)

||

|/|

()

Ladder Logic Concepts

Read / Conditional Instructions Write / Control Instructions

|/|
T

||
F

()
F

No Logical Continuity

|/|
T

|/|
T
Logical Continuity

()
T

Logical AND Construction

IF input 4 AND input 5 have power THEN energize output 0

I/4 I/5 O/0

On

||
T

||
T

()
T

Logical Continuity

Logical OR Construction
IF input 4 OR input 5 have power THEN energize output 0
I/4

T
Logical Continuity

O/0 On

||
F I/5

()

||

I/4

F
Logical Continuity

O/0

On

||
T I/5

()

||

Complex Construction

I/4

I/0

I/1

||
I/5

|/|
I/1

||
I/7

|| |/|

I/9 I/10 O/0

|| ()

I/8

||

|/|
I/2

|/|
I/3

|| ||
I/11

I/1

|/|

||

Read Instructions
Supply Voltage
LS 1

Unused

Unused

COM

I/0

I/1

I/2

I/3

I/4

COM

I/5

I/6

I/7

I/8

I/9

The instruction is: If the input device is The input bit is Examine ON Examine OFF

-| |XIC False True

-|/|XIO True False

Open (0) Closed (1)

Logic 0 Logic 1

Write Instruction
|| |/| ()

Rung State TRUE

Output Bit ON

Output Terminal ENERGIZED

OTE Output Energize

-( )FALSE OFF De-energized

L1

L2/N

GND

VAC VDC

O/0

VAC VDC

O/1

VAC VDC

O/2

VAC VDC

O/3

VAC VDC

O/4

O/5

Supply Voltage

Putting it Together
Supply Voltage

PB1

Unused

Unused

COM

I/0

I/1

I/2

I/3

I/4

COM

I/5

I/6

I/7

I/8

I/9

L1

L2/N

GND

VAC VDC

O/0

VAC VDC

O/1

VAC VDC

O/2

VAC VDC

O/3

VAC VDC

O/4

O/5

Supply Voltage

I/8

O/0

||

()

Addressing Example

L1 PB1 LS1 PS2 SOL6

L2
I/5 I/6 I/7 O/0

||

||

||

()

DEVICE PB1 LS1 PS2

ADDRESS HHP Logix I/5 I:0/5 I/6 I/7 O/0 I:0/6 I:0/7 O:0/0

SOL6

Relay Logic to Ladder Logic

PB1 LS1 SOL2 I/4 I/6 O/0

||
LS1 PB2 CR3

||
I/5

()
B/0

I/7

||
I/8

||

()

LS3
B/0 CR3 |/| LS4 M1

||
|/|
I/9 O/1

||

()

INPUT Address Assignment: PB1- I/4 PB2- I/5 LS1- I/6 LS2- I/7 LS3- I/8 LS4- I/9

OUTPUT Address Assignment: SOL2- O/0 M1- O/1