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INTRODUCTION TO
PROGRAMMABLE
LOGIC
CONTROL
Revision 2
ASSESSMENT
Topic 1
Basic Principle of
Control Technology
PLC
PROGRAMMABLE LOGIC CONTROL (PLC):
A digital electronic device that uses a
programmable memory to store instructions
and to implement specific functions such as
logic, sequence, timing, counting and
arithmetic to control machines and process.
Definition of Control
What is CONTROL?
CONTROL is the process in a system in which
one or several input variables influence other
variables
DIN 19226
INFORMATION
COMMANDS
C
O
N
T
R
O
L
S
Y
S
T
E
M
SENSORS
ACTUATORS
P
L
A
N
T
Xi > Xs
Xs - Actual value
N
C
Xs
Xi < Xs
Xi
24 VDC
S1
S2
S1
K1
K1
N
S2
PLC
K1
0V
Hardwire
PLC
Comparison
Hardwired control systems
HISTORY OF PLC
During the late 1960s, General Motors (USA) was interested in the
computer application to replace the hardwire systems.
Bedford Associates (Modicon) and Allen Bradley responded to General
Motors.
The name given was Programmable Controllers or PC.
Programmable Logic Controller or PLC was a registered trademark of
the Allen Bradley.
Later, PC was used for Personal Computer and to avoid confusion PLC
for Programmable Controller and PC for a personal computer.
INPUT
MODULES
PG/
PC
CENTRAL
PROCESSING
UNIT (CPU)
MEMORY
(EPROM/RAM)
OUTPUT
MODULES
Input Connections
Input card
Input
Devices
Converter
field voltage to 5V
acceptable by the CPU
Threshold
Decision
Opto-Isolation
Logic
To CPU / Memory
Output Connections
Output card
Converter
5V to field voltage
to drive field devices
Output
Devices
Logic
Opto-Isolation
Switching
Circuitry
Protection
Circuitry
To field wiring
CPU
Four basic types of CPU operations:
Input and output operation
Arithmetic and logic
Reading or changing contents of memory locations
Jump operations
CPU
ACCUMULATOR
INTERNAL
PROGRAM
MEMORY
(RAM)
MEMORY
SUBMODULE
(EPROM/
EEPROM/
RAM)
TIMERS,
COUNTERS,
Memory
SERIAL
INTERFACE
PROCESSOR
PII
PIQ
CPU
The CPU reads in input signal states, processes the control program
and controls the outputs.
The CPU provides internal Memory, timers and counters.
Restart procedure can be preset and errors can be diagnosed using the
CPUs LEDs.
The overall Reset on the CPU is used to delete the contents of the
RAM.
A PG or a Memory submodule is used to transfer the control program to
the CPU.
Program Memory
Program memory
Non-programmable
Non-alterable
ROM / PROM
Alterable
UV erasable
EPROM / REPROM
Semiconductor RAM
Electrically erasable
EEPROM / EAPROM
Semiconductor
EEPROM / EAPROM
Memory Submodules
EPROM SUBMODULE
An ultraviolet erasing device is used to delete the contents of the
submodule
EEPROM SUBMODULE
EEPROM submodule can be programmed or erased using a
programmer
RAM SUBMODULE
Can be used in addition to program storage; and used to test a
control program during system startup
Hardware Summary
External power supply
PG
PS951
CPU
Input
module
Input
devices
Output
module
Output
devices
=
=
The sensor is
Voltage at input
Signal state
NO contact
activated
present
NO contact
NC contact
activated
NC contact
not present 0
1
Types of Addressing
Symbolic
Absolute
example:
A
I 0.0
=
Q 8.0
A
I0.4
=
Q20.5
Call FC18
Symbol
example:
A
=
A
=
Call
System_On
System_On
M_FORW
MOTOR_FOR
COUNT
Address
Data Type
MOTOR_FOR
Q20.5
BOOL
COUNT
FC18
FC18
Count bottles
SYSTEM_ON
I0.0
BOOL
Switch system ON
SYSTEM_ON
Q8.0
BOOL
Indicator: System is ON
M_FORW
I0.4
BOOL
Max. 24 character
Comment
Max. 80 character
Q 4.0
( )
&
Q 4.0
FBD
OPERATION + OPERAND
I 0.0
M 80.0
STL
OPERAND + OPERATION
I 0.0
M 80.0
&
OPERATION + OPERAND
A I 0.0
A M 80.0
OPERATION + OPERAND
Q 4.0
( )
Q 4.0
= Q 4.0
Program Execution
PLC Scan Function:
Read the status of all inputs and outputs
Examine the application program instructions
Execute the control program
OB1
Linear program scanning
OB = Organization Block
Every program must have OB1
OB1
A I 0.0
A I 0.1
= Q 4.0
:
:
:
BE
Operating
system
OB1
JU FC 1
JU FC 4
:
:
:
BE
A I 0.0
A I 0.1
= Q 4.0
:
:
:
BE
FC4
A Q 4.0
A I 0.2
= Q 5.0
:
:
:
BE
Linear programming
Structured programming
OB1
Network 1
A I 0.6
A I 0.7
= Q 4.2
Network 2
A I 0.7
A I 0.5
= Q 4.3
Network 3
A Q 4.2
A I 0.2
= Q 5.5
BE
FC 1
OB 1
Network 1
JU FC 1
JU FC 4
BE
Network 1
A I 0.6
A I 0.7
= Q 4.2
Network 2
A I 0.7
A I 0.5
= Q 4.3
BE
FC 4
Network 1
A Q 4.2
A I 0.2
= Q 5.5
BE
Program Execution
24 VDC
I 0.0
Input
module
Process
input image
Process
output image
Output
module
Q 4.0
A I 0.1
I 0.1
P
I
I
1
= Q 4.0
O I 0.5
O I 0.7
P
I
Q
= Q 4.3
BE:
I 0.7
1
Input cycle
Program execution
GND
A I 0.0
I 0.5
Program in
the RAM
Output cycle
1
Q 4.3
Execute
Program
Logic
Update Output
OB1
PIQ
BLOCK TYPES
ORGANISATION BLOCKS (OB) Interface between the operating system and the
user program
FUNCTIONS (FC) - Contains a partial functionality of the program
DATA BLOCKS (DB) Are data areas of the user program in which user data are
managed in a structured manner
SYSTEM FUNCTION BLOCKS (SFB), SYSTEM FUNCTIONS (SFC) - SFBs and
SFCs are integrated in the S7 CPU and allow you access to some important system
functions
FUNCTION BLOCKS (FB) - FBs are blocks with a memory which you can
program yourself
INSTANCE DATA BLOCKS (DB) - Instance DBs are associated with the block
when an FB/SFB is called. They are created automatically during compilation
JU FC4
..
...
BE
JU FC 7
..
...
BE
A I ....
..
..
..
BE
Addressing
Input (I)
0.0 to 0.7
1.0 to 1.7
2.0 to 2.7
3.0 to 3.7
4.0 to 4.7
Output (Q)
5.0 to 5.7
8.0 to 8.7
Counters (C)
Timers (T)
9.0 to 9.7
0 to 63
0 to 127
Topic 3
Programming Basic
Functions
I 0.0
I 0.1
Q 4.0
( )
FBD
STL
I 0.0
A I 0.0
A I 0.1
= Q 4.0
I 0.1
&
Q 4.0
OR Operation
LAD
I 0.0
Q 4.0
I 0.1
FBD
STL
I 0.0
O I 0.0
O I 0. 1
= Q 4.0
I 0.1
>= 1
Q 4.0
I 0.0
I 0.2
I 0.1
I 0.3
LAD
I 0.0
I 0.1
I 0.2
I 0.3
Q 4.0
FBD
I 0.0
I 0.1
I 0.2
I 0.3
&
>= 1
&
Q 4.0
STL
A I 0.0
A I 0.1
O
A I 0.2
A I 0.3
= Q 4.0
I 0.0
I 0.2
I 0.1
I 0.3
LAD
I 0.0
I 0.1
I 0.2
I 0.3
Q 4.0
FBD
I 0.0
I 0.1
I 0.2
I 0.3
>= 1
&
>= 1
Q 4.0
)
STL
A(
O I 0.0
O I 0.2
)
A(
O I 0.1
O I 0.3
)
= Q 4.0
NO contact
NO contact
NO contact
NO contact
NC contact
NC contact
NC contact
NC contact
NO contact
NO contact
NC contact
NC contact
NO contact
NO contact
NC contact
NC contact
The sensor is
activated
not activated
activated
not activated
activated
not activated
activated
not activated
Signal state
1
0
0
1
0
1
1
0
Latching Output
S3
K2
S4
K2
S1
K1
S2
K1
RS Memory Function
S3
S4
K2
S2
K2
S1
K1
S
SET Priority / Dominant SET
( )
RS Memory Function
S1
S3
K1
S
S2
K1
S4
K2
( )
Try This !
LAD
I 0.0
I 0.1
Q 4.0
I 0.2
I 0.3
Q 4.0
I 0.4
I 0.5
(
(
)
)
Q 4.0
)
I 0.4 and I 0.5 ?
The Answer
I 0.0 and I 0.1 = NO!
I 0.2 and I 0.3 = NO!
I 0.4 and I 0.5 = YES but why ?
I 0.1
Q 4.0
I 0.2
I 0.3
Q 4.0
I 0.4
I 0.5
Q 4.0
(
(
(
)
)
)
I 0.1
Q 4.0
I 0.2
I 0.3
Q 4.0
I 0.4
I 0.5
Q 4.0
(
(
(
)
)
)
I 0.1
Q 4.0
I 0.2
I 0.3
Q 4.0
I 0.4
I 0.5
Q 4.0
(
(
(
)
)
)
Using Memory...
I 0.0
I 0.1
M 100.0
I 0.2
I 0.3
M 100.1
I 0.4
I 0.5
M 100.2
M 100.0
M 100.1
M 100.2
Q 4.0
Q 4.0
I 0.0
I 0.1
I 0.2
&
>=1
Q 5.0
A Q 4.0
A(
O I 0.1
O I 0.2
O I 0.3
)
= Q 5.0
RLO
STAT
Parenthesized Function
Mathematics
Logic Operation
AND before OR
RLO
STAT
A I 0.0
1
A I 0.1
1
O
A I 0.2
0
1
1
1
\
0
Parenthesized Function
Mathematics
Logic Operation
OR before AND
A I 0.0
A(
O I 0.1
O I 0.2
)
A I 0.3
= Q 4.1
RLO
1
1
1
1
1
1
1
STAT
1
\
1
0
\
1
1
Topic 4
Numerical Systems and
Data Formats
Load Operation
ACCUM 2
ACCUM 1
Byte d
Byte c
Byte b
Byte a
Byte b
Byte a
IB 0
L
L
IB 0
IB 1
PII
IB 1
0
IB 0
IB 1
Information from PII
Transfer Operation
ACCUM 2
Byte d
Byte c
ACCUM 1
Byte b
Byte a
T
PIQ
Byte a
Byte d
Byte c
Byte b
QB 0
QB 0
Byte a
Topic 5
Timer Operations
Return Operations
BE (Block End)
the return operation is performed unconditionally
it is always the last statement in the block
OB1
System
:
:JU
:A
:JC
:
:BEU
:
:JU
:BE
FC1
I 0.0
FC 2
FC3
I 0.6
is always executed
is executed only
when I 0.6 = 0
FC2
is not
executed
:
:
:BE
is executed only
when I 0.0 = 1
FC3
:
:
:BE
is not executed
Topic 6
Counter Operations
Counter
Counter Operations
CU
CD
S
CV
R
BI
DE
Q
- count up
- count down
- set counter to the count value (CV)
- the count value
- reset the counter (count value = 0)
- counter output as binary number
- counter output as BCD number
- counter status
Q = 0 when count value = 0
Q = 1 when count value > 1
Timing Diagram
Counter Input
Counter Output
Comparator
Types of comparison:
!=F
><F
>F
>=F
<F
<=F
Comparison Operations
The comparison operations compare two digital values in
accumulator 1 and accumulator 2
The result of comparison produces an RLO:
Comparison satisfied
RLO = 1
RLO = 0
Comparator