Electronic Devices and Circuit Theory: FET Biasing

Electronic Devices and Circuit Theory
Boylestad
FET Biasing
Chapter 7
Ch.7 Summary
Common FET Biasing Circuits

JFET Biasing Circuits
Fixed-Bias
Self-Bias
Voltage-Divider Bias
D-Type MOSFET Biasing Circuits

Self-Bias
E-Type MOSFET Biasing Circuits

Feedback Configuration
Electronic Devices and Circuit Theory © 2013 by Pearson Higher Education, Inc
Boylestad Upper Saddle River, New Jersey 07458 • All Rights Reserved
Ch.7 Summary
Basic Current Relationships
For all FETs:

IG  0 A I D  IS
For JFETS and D-Type MOSFETs:

2
 V 
ID  IDSS 1  GS 
 VP 
For E-Type MOSFETs:

ID  k (VGS  VT )2
Ch.7 Summary
Fixed-Bias Configuration
VDS  VDD  IDRD

VS  0 V
VC  VDS
V  VGS
VGS  VGG
Ch.7 Summary
Self-Bias Configuration
Ch.7 Summary
Self-Bias Calculations
VGS  IDRS
1. Select a value of ID < IDSS and use the component value of RS to calculate
VGS. Plot the point identified by ID and VGS and draw a line from the origin of
the axis to this point.
2. Plot the transfer curve using IDSS and VP
(VP = |VGSoff| on spec sheets) and a few
points such as VGS = VP / 4 and VGS = VP / 2
etc.
The Q-point is located where the first
line intersects the transfer curve. Using
the value of ID at the Q-point (IDQ):
VDS  VDD  ID (RS  RD ) VS  IDRS VD  VDS  VS  VDD  VRD
Ch.7 Summary
IG = 0 A
ID responds to changes
in VGS.
Ch.7 Summary
Voltage-Divider Bias Calculations

VG is equal to the voltage across
divider resistor R2:
R2VDD
VG 
R1  R2
Using Kirchhoff’s Law:
VGS  VG  IDRS
The Q-point is established by plotting a line that intersects the transfer

curve.
Ch.7 Summary
Voltage-Divider Q-Point
Plot the line that is defined

by these two points:
VGS = VG, ID = 0 A
VGS = 0 V, ID = VG / RS
Plot the transfer curve by

plotting IDSS, VP and the
calculated values of ID
The Q-point is located where the line intersects the transfer
curve
Ch.7 Summary
Voltage-Divider Bias Calculations
Using the value of ID at the Q-point, solve for the other

values in the voltage-divider bias circuit:
VDS  VDD  ID (RD  RS )

VD  VDD  IDRD
VS  IDRS
Ch.7 Summary
D-Type MOSFET Bias Circuits
Depletion-type MOSFET
bias circuits are similar
to those used to bias
JFETs. The only
difference is that D-type
MOSFETs can operate
with positive values of
VGS and with ID values
that exceed IDSS.
Ch.7 Summary
Self-Bias Q-Point (D-MOSFET)

Plot the line that is defined by these
two points:
VGS = VG, ID = 0 A
ID = VG /RS, VGS = 0 V
Plot the transfer curve using IDSS, VP

and calculated values of ID.
The Q-point is located where the line
intersects the transfer curve. Use the
value of ID at the Q-point to solve for
the other circuit values.
These are the same steps used to analyze JFET self-bias circuits.
Ch.7 Summary
Voltage-Divider Bias (D-MOSFET)

Plot the line that is defined by these two
points:
VGS = VG, ID = 0 A
ID = VG/RS, VGS = 0 V
Plot the transfer curve using IDSS, VP and

calculated values of ID.
The Q-point is located where the line

intersects the transfer curve. Use the
value of ID at the Q-point to solve for the
other variables in the circuit.
These are the same steps used to analyze JFET voltage-divider bias circuits.
Ch.7 Summary
E-Type MOSFET Bias Circuits
The transfer curve for

the E-MOSFET is
very different from
that of a simple JFET
or D-MOSFET.
Ch.7 Summary
Feedback Bias Circuit (E-MOSFET)
IG  0 A
VRG  0 V
VDS  VGS
VGS  VDD  IDRD
Ch.7 Summary
Feedback Bias Q-Point (E-MOSFET)

Plot the line that is defined
by these two points:
VGS = VDD, ID = 0 A
ID = VDD / RD , VGS = 0 V
Using these values from the

spec sheet, plot the transfer
curve:
VGSTh , ID = 0 A
VGS(on), ID(on)
The Q-point is located where Using the value of ID at the Q-point,
the line and the transfer curve solve for the other variables in the
intersect circuit
Ch.7 Summary
Voltage-Divider Biasing
Plot the line and the transfer

curve to find the Q-point using
these equations:
R2VDD
VG 
R1  R2
VGS  VG  IDRS
VDS  VDD  ID (RS  RD )
Ch.7 Summary
Voltage-Divider Bias Q-Point

(E-MOSFET)
Plot the line using
VGS = VG , ID = 0 A
ID = VG / RS , VGS = 0 V
Using these values from the spec sheet, plot the transfer curve:
VGSTh, ID = 0 A
VGS(on) , ID(on)
The point where the line and the transfer curve intersect is the Q-point.
Using the value of ID at the Q-point, solve for the other circuit values.
Ch.7 Summary
p-Channel FETs
For p-channel FETs the same calculations and graphs

are used, except that the voltage polarities and current
directions are reversed.
The graphs are mirror images of the n-channel graphs.
Ch.7 Summary
Applications
Voltage-controlled resistor
JFET voltmeter
Timer network
Fiber optic circuitry
MOSFET relay driver

Electronic Devices and Circuit Theory: FET Biasing

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Electronic Devices and Circuit Theory

Common FET Biasing Circuits

D-Type MOSFET Biasing Circuits

E-Type MOSFET Biasing Circuits

Basic Current Relationships

For all FETs:

For JFETS and D-Type MOSFETs:

For E-Type MOSFETs:

VDS  VDD  IDRD

VDS  VDD  ID (RS  RD ) VS  IDRS VD  VDS  VS  VDD  VRD

Voltage-Divider Bias Calculations

Using Kirchhoff’s Law:

The Q-point is established by plotting a line that intersects the transfer

Plot the line that is defined

Plot the transfer curve by

Voltage-Divider Bias Calculations

Using the value of ID at the Q-point, solve for the other

VDS  VDD  ID (RD  RS )

D-Type MOSFET Bias Circuits

Self-Bias Q-Point (D-MOSFET)

Plot the transfer curve using IDSS, VP

Voltage-Divider Bias (D-MOSFET)

Plot the transfer curve using IDSS, VP and

The Q-point is located where the line

E-Type MOSFET Bias Circuits

The transfer curve for

Feedback Bias Circuit (E-MOSFET)

Feedback Bias Q-Point (E-MOSFET)

Using these values from the

Plot the line and the transfer

Voltage-Divider Bias Q-Point

For p-channel FETs the same calculations and graphs

The graphs are mirror images of the n-channel graphs.

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