CHAPTER 4 :JFET

Junction Field Effect Transistor

Introduction (FET)
Field-effect transistor (FET) are important
devices such as BJTs
Also used as amplifier and logic switches
Types of FET:
MOSFET (metal-oxide-semiconductor field-effect
transistor)
Depletion-mode MOSFET
JFET (junction field-effect transistor)
What is the difference between JFET and
MOSFET?

Current-controlled amplifiers
Voltage-controlled amplifiers
High input impedance (MO)
(Linear AC amplifier system)
Temperature stable than BJT
Smaller than BJT
Can be fabricated with fewer processing
BJT is bipolar conduction both hole and
electron
FET is unipolar uses only one type of current
carrier
Less noise compare to BJT
Usually use as logic switch
Introduction.. (Advantages of
FET)
Disadvantages of FET
Easy to damage compare to BJT
???
Junction field-effect transistor (JFET)
There are 2 types of JFET
n-channel JFET
p-channel JFET

Three Terminal
Drain D (Saliran)
Gate -G (Get)
Source S (Punca)
Junction field-effect transistor..
N channel JFET:
Major structure is n-type material (channel)
between embedded p-type material to form 2 p-
n junction.
In the normal operation of an n-channel device,
the Drain (D) is positive with respect to the
Source (S). Current flows into the Drain (D),
through the channel, and out of the Source (S)
Because the resistance of the channel depends
on the gate-to-source voltage (V
GS
), the drain
current (I
D
) is controlled by that voltage

N-channel JFET
N-channel JFET..
P channel JFET:
Major structure is p-type material
(channel) between embedded n-type
material to form 2 p-n junction.
Current flow : from Source (S) to Drain
(D)
Holes injected to Source (S) through p-
type channel and flowed to Drain (D)
P-channel JFET
P-channel JFET..
Water analogy for the JFET control
mechanism
JFET Characteristic Curve
To start, suppose V
GS
=0
Then, when V
DS
is increased, I
D
increases.
Therefore, I
D
is proportional to V
DS
for small
values of V
DS
For larger value of V
DS
, as V
DS
increases, the
depletion layer become wider, causing the
resistance of channel increases.
After the pinch-off voltage (V
p
) is reached, the I
D

becomes nearly constant (called as I
D
maximum,
I
DSS
-Drain to Source current with Gate Shorted)

I
D
versus V
DS
for V
GS
= 0 V.
JFET Characteristic Curve
JFET for V
GS
= 0 V and 0<V
DS
<|V
p
|
Channel
becomes
narrower as
V
DS
is
increased
Pinch-off (V
GS
= 0 V, V
DS
= V
P
).
Application of a negative voltage to
the gate of a JFET.
JFET Characteristic Curve..
For negative values of V
GS
, the gate-to-channel
junction is reverse biased even with V
DS
=0
Thus, the initial channel resistance is higher (in which
the initial slope of the curves is smaller for values of
V
GS
closer to the pinch-off voltage (V
P
)
The resistance value is under the control of V
GS
If V
GS
is less than pinch-off voltage, the resistance
becomes an open-circuit ;therefore the device is in
cutoff (V
GS
=V
GS(off)
)
The region where I
D
constant The saturation/pinch-
off region
The region where I
D
depends on V
DS
is called the
linear/triode/ohmic region
n-Channel JFET characteristics curve with
I
DSS
= 8 mA and V
P
= -4 V.
JFET Characteristic Curve
p-Channel JFET
p-Channel JFET characteristics with I
DSS
= 6
mA and V
P
= +6 V.
Characteristics for n-channel
JFET
P
+
+
+
Characteristics for p-channel
JFET
Operation of n-channel JFET
JFET is biased with two voltage sources:
V
DD
V
GG
V
DD
generate voltage bias between Drain (D)
and Source (S) V
DS
V
DD
causes drain current, I
D
flows from Drain
(D) to Source (S)
V
GG
generate voltage bias between Gate (G)
and Source (S) with negative polarity source is
connected to the Gate Junction (G) reverse-
biases the gate; therefore gate current, I
G
= 0.
V
GG
is to produce depletion region in N channel
so that it can control the amount of drain
current, I
D
that flows through the channel
Transfer Characteristics





The input-output transfer characteristic of
the JFET is not as straight forward as it is
for the BJT. In BJT:

I
C
=| I
B

which | is defined as the relationship
between I
B
(input current) and I
C
(output
current).


Transfer Characteristics..





In JFET, the relationship between V
GS
(input
voltage) and I
D
(output current) is used to
define the transfer characteristics. It is called
as Shockleys Equation:



The relationship is more complicated (and not
linear)
As a result, FETs are often referred to a
square law devices
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
V
P
=V
GS (OFF)
Defined by Shockleys equation:



Relationship between I
D
and V
GS
.
Obtaining transfer characteristic curve axis
point from Shockley:
When V
GS
= 0 V, I
D
= I
DSS
When V
GS
= V
GS(off)
or V
p
, I
D
= 0 mA

) (
2
) (
1
off
GS P
off
GS
GS
DSS D
V V
V
V
I I =
|
|
.
|

\
|
=
Transfer Characteristics
Transfer Characteristics
JFET Transfer Characteristic Curve JFET Characteristic Curve
Exercise 1
| |
|
|
\ .
D
GS P
DSS
I
V = V 1 -
I
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
V
GS
I
D
0 I
DSS

0.3Vp I
DSS
/2
0.5Vp I
DSS
/4
Vp 0 mA
Sketch the transfer defined by
I
DSS
= 12 mA dan V
GS(off)
= - 6
Exercise 1
| |
|
|
\ .
D
GS P
DSS
I
V = V 1 -
I
Sketch the transfer defined by I
DSS
= 12 mA dan
V
GS(off)
= V
p=
- 6
I
DSS
I
DSS
/2
I
DSS
/4
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
V
GS
=0.3V
P

V
GS
=0.5V
P

Answer 1
Exercise 2
| |
|
|
\ .
D
GS P
DSS
I
V = V 1 -
I
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
V
GS
I
D
0 I
DSS

0.3Vp I
DSS
/2
0.5Vp I
DSS
/4
Vp 0 mA
Sketch the transfer defined by
I
DSS
= 4 mA dan V
GS(off)
= 3 V
Exercise 2
| |
|
|
\ .
D
GS P
DSS
I
V = V 1 -
I
Sketch the transfer defined by
I
DSS
= 4 mA dan V
GS(off)
= 3V
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
V
GS
=0.5V
P

V
GS
=0.3V
P

V
P

I
DSS
I
DSS
/2
I
DSS
/4
Answer 2
Answer 2
DC JFET Biasing
Just as we learned that the BJT must be
biased for proper operation, the JFET also
must be biased for operation point (I
D
, V
GS
,
V
DS
)
In most cases the ideal Q-point will be at
the middle of the transfer characteristic
curve, which is about half of the I
DSS
.
3 types of DC JFET biasing configurations :
Fixed-bias
Self-bias
Voltage-Divider Bias

Fixed-bias
VDS
+
_
VGG
VGS
_
RD
VDD
RG
+ C1
C2
Fixed-bias
+
V
in
_
+

V
out


_

+
Use two
voltage
sources: V
GG
,
V
DD
V
GG
is reverse-
biased at the
Gate Source
(G-S)
terminal, thus
no current
flows through
R
G
(I
G
= 0).
Fixed-bias..
DC analysis
All capacitors replaced with open-circuit
VDS
+
_
VGG
VGS
_
RD
VDD
RG
+
Loop 1
Fixed-bias
1. Input Loop
By using KVL at loop 1:
V
GG
+ V
GS
= 0
V
GS
= - V
GG

For graphical solution, use V
GS
= - V
GG
to draw the load
line
For mathematical solution, replace V
GS
= -V
GG
in Shockleys
Eq. ,therefore:




2. Output loop
- V
DD
+ I
D
R
D
+ V
DS
= 0
V
DS
= V
DD
I
D
R
D


3. Then, plot transfer characteristic curve by using Shockleys
Equation
2
) (
2
) (
1 1
|
|
.
|

\
|
+ =
|
|
.
|

\
|
=
off GS
GG
DSS
off GS
GS
DSS D
V
V
I
V
V
I I
Example : Fixed-bias
| |
|
\ .
2
GS
D DSS
P
V
I = I 1 -
V
Determine the following
network:

1. V
GSQ
2. I
DQ
3. V
D
4. V
G
5. V
S
Mathematical Solutions
GSQ GG
V = - V = - 2
( )
| | | |
| |
\ . \ .
=
2 2
GS
DQ DSS
P
2
V - 2
I = I 1 - =10mA 1 -
V -8
=10mA 0 5.6 .75 25mA
( ) ( )
O
DS DD D D
V = V - I R =16 - 5.625mA 2k
=16V-11.25V = 4.75V
Graphical solution for the network
GSQ GG
V = - V = - 2
DS
4 V = .75V
D
G
S
V =
V =
4.75V
- 2V
V = 0V
Draw load line for:
Self-bias
Using only one voltage source
DC analysis of the self-bias configuration.
~ =
=
G G G
RG
RG
Since I 0A, V I R
thus V 0A,
Q point for V
GS
Graphical Solutions:
Defining a point on the self-bias line.
V
GS
I
D
0 I
DSS

0.3Vp I
DSS
/2
0.5Vp I
DSS
/4
Vp 0 mA
Graphical Solutions:
Sketching the self-bias line.
D DSS
GS D S
DSS S
I = I 2
V = -I R
I R
= -
2
( )
DS DD D S D
V = V - I R +R
S D S
V = I R
Mathematical Solutions:

Replace in the Shockleys Equation:








By using, quadratic equation and formula, choose value of
I
D
that relevant within the range (0 to I
DSS
): nearly to I
DSS
/2

Find V
GS
by using ;also choose V
GS
that
within the range (0 to V
P
)

2
) (
2
) (
1
;
1
|
|
.
|

\
|

=
=
|
|
.
|

\
|
=
P
S D
DSS D
off GS P
P
GS
DSS D
V
R I
I I
theref ore
V V
V
V
I I
Example : Self-bias configuration
GSQ
DQ
D
G
1. V
2. I

Det
3. V

e

rmine the following for
4. V

the network
5. Vs
Graphical Solutions:
Sketching the transfer characteristics
curve
Vgs I
D
0 I
DSS

0.3Vp I
DSS
/2
0.5Vp I
DSS
/4
Vp 0 mA
Sketching the self-bias line
D GS
D GS
When I = 4mA, V =
When I = 8mA, V
- 4V
= - 8V
Graphical Solutions: Determining the Q-
point
Q-point
I
DQ
=2.6mA
V
GSQ
=-2.6mV


Mathematical Solutions
( )
V V and mA I choose theref ore
V V
k mA k mA
R I V R I V
mA I mA I
I kI
kI I I
MI kI kI
m
k I
m
k I
m I
V
R I
I
R I V recall
V
V
I I
GS D
S D GS S D GS
D D
D D
D D D
D D D
D D
D
P
S D
DSS
S D GS
P
GS
DSS D
6 . 2 588 . 2 ;
6 . 2 9 . 13
) 1 ( 588 . 2 ) 1 ( 9 . 13
588 . 2 9 . 13
0 288 . 0 132 8
8 96 288 . 0 36
1 6 6 36
36
8
6
) 1 ( 6
8
6
) 1 (
1 8
) (
1
1
21 1
2
2
2
2 2
2
2
= =
= =
= =
= =
= =
= +
+ =
+ =
|
.
|

\
|

+
=
|
.
|

\
|

+ =
|
|
.
|

\
|

=
=
|
|
.
|

\
|
=
Solutions
GSQ
V = - 2.6V
( )
( )
DS DD D D S
V = V - I R + R
= 20V- 2.6mA 4.3k
= 8.82V
I
DQ
= 2.6mA
I
D
=I
S
Voltage-divider bias
A
I
G
=0A
Redrawn network
2
G DD
1 2
R
V = V
R + R
Sketching the network equation for the
voltage-divider configuration.
=
D
GS
GS G
I =0mA
G
D
S
V =0V
V = V
V
I
R
G GS RS
GS G RS
GS G D S
V
V - V - V = 0
V = V
= V - I
V
R
-
Effect of R
S
on the resulting
Q-point.
Example : Voltage-divider bias
DQ GSQ
D
S
DS
DG
1. I andV
2. V
3. V

Determine the following for th
4. V

e netw k
5. V
or
Solutions
( )( )
2
G DD
1 2
DD
2
R
V = V
R + R
270k 16V
= V
2.1M+0.27M
= 1.82V
D GS
When I = 0mA, V = +1.82V
( )
GS G D S
D
V = V - I R
=1.82V- I 1.5k
GS D
+1.82V
When V = 0V, I = = 1.21mA
1.5k
Determining the Q-point for the network
( )
GS D
V =1.82V- I 1.5k
I
DQ
=2.4mA
V
GSQ
=-1.8V


( )
+
DS DD SS D S D
DS S
V = V + V - I R R
= V + V = 8.82V+2 11 .6V = .42V
Mathematical solutions
How to get I
DS
, V
GS
and V
DS
for
voltage-divider bias configuration by
using mathematical solutions?
Exercise 3:
DQ GSQ
DS
D
S
1. I andV
2. V

Determine the
followi
3. V

ng for the

networ
4. V
k
Drawing the self bias line
( )
O
GS D S
GS D
V +I R - 10V = 0
V = 10V- I 1.5k
D GS
When I = 0mA, V = 10V
GS D
10V
When V = 0V, I = = 6.67mA
1.5k
Determining the Q-point
I
DQ
=6.9mA
V
GSQ
=-0.35V
( ) ( )
DS DD SS D S D
V = V - V - I R + R
= 20+10- (6.9mA)(1.8k+1.5k)
= 7.23V
( )
D DD D D
V = V - I R =7.58V
S D DS
V = V - V
= 7.58V- 7.23V = 0.35V
Exercise 4
D S
Determine the required
values of R and R
Determining V
GS
Q
for the network.

=
O
DD DQ
RD
D
DQ DQ
V V
V 20V 12V
R = =
I I 2.5mA
= 3.2k
( ) ( )

= O
GSQ
S
DQ
V
-1
R = = 0.4k
I 2.5mA